From patchwork Thu Sep 5 10:37:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 11132649 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C5AD0112C for ; Thu, 5 Sep 2019 10:37:11 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A3674206BB for ; Thu, 5 Sep 2019 10:37:11 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A3674206BB Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7482289FDE; Thu, 5 Sep 2019 10:37:10 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 48E9389FDE for ; Thu, 5 Sep 2019 10:37:09 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Sep 2019 03:37:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,470,1559545200"; d="scan'208";a="266980582" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by orsmga001.jf.intel.com with SMTP; 05 Sep 2019 03:37:06 -0700 Received: by stinkbox (sSMTP sendmail emulation); Thu, 05 Sep 2019 13:37:06 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Thu, 5 Sep 2019 13:37:06 +0300 Message-Id: <20190905103706.3421-1-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190904162625.15048-8-ville.syrjala@linux.intel.com> References: <20190904162625.15048-8-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 07/15] drm/i915: Check pipe source size against pfit limits X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä The panel fitter imposes extra limits on the maximum pipe source size we can use. Check for that. v2: Skip the checks if the crtc is disabled Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 57 ++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 348071db8b4c..ccec2b54677d 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -11768,6 +11768,57 @@ static bool c8_planes_changed(const struct intel_crtc_state *new_crtc_state) return !old_crtc_state->c8_planes != !new_crtc_state->c8_planes; } +static int intel_pch_pfit_check_src_size(const struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + int max_src_w, max_src_h; + + if (INTEL_GEN(dev_priv) >= 11) { + max_src_w = 5120; + max_src_h = 4320; + } else if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) { + max_src_w = crtc->pipe == PIPE_A ? 5120 : 4096; + max_src_h = 4096; + } else if (INTEL_GEN(dev_priv) >= 8) { + max_src_w = 4096; + max_src_h = 4096; + } else if (INTEL_GEN(dev_priv) >= 7) { + /* + * PF0 7x5 capable + * PF1 3x3 capable (could be switched to 7x5 + * mode on HSW when PF2 unused) + * PF2 3x3 capable + * + * This assumes we use a 1:1 mapping between pipe and PF. + */ + max_src_w = crtc->pipe == PIPE_A ? 4096 : 2048; + max_src_h = 4096; + } else { + max_src_w = 4096; + max_src_h = 4096; + } + + if (crtc_state->pipe_src_w > max_src_w || + crtc_state->pipe_src_h > max_src_h) { + DRM_DEBUG_KMS("pipe %c source size (%dx%d) exceeds pfit max (%dx%d)\n", + pipe_name(crtc->pipe), crtc_state->pipe_src_w, + crtc_state->pipe_src_h, max_src_w, max_src_h); + return -EINVAL; + } + + return 0; +} + +static int intel_pch_pfit_check(const struct intel_crtc_state *crtc_state) +{ + if (!crtc_state->base.enable || + !crtc_state->pch_pfit.enabled) + return 0; + + return intel_pch_pfit_check_src_size(crtc_state); +} + static int intel_crtc_atomic_check(struct drm_crtc *crtc, struct drm_crtc_state *crtc_state) { @@ -11791,6 +11842,12 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc, return ret; } + if (!HAS_GMCH(dev_priv)) { + ret = intel_pch_pfit_check(pipe_config); + if (ret) + return ret; + } + /* * May need to update pipe gamma enable bits * when C8 planes are getting enabled/disabled. From patchwork Thu Sep 5 10:37:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 11132651 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 35ACE15E9 for ; Thu, 5 Sep 2019 10:37:55 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1CC052145D for ; Thu, 5 Sep 2019 10:37:54 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1CC052145D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D5DB26E03B; Thu, 5 Sep 2019 10:37:53 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9B7D16E038 for ; Thu, 5 Sep 2019 10:37:52 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Sep 2019 03:37:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,470,1559545200"; d="scan'208";a="187935743" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by orsmga006.jf.intel.com with SMTP; 05 Sep 2019 03:37:43 -0700 Received: by stinkbox (sSMTP sendmail emulation); Thu, 05 Sep 2019 13:37:42 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Thu, 5 Sep 2019 13:37:42 +0300 Message-Id: <20190905103742.3555-1-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190904162625.15048-9-ville.syrjala@linux.intel.com> References: <20190904162625.15048-9-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 08/15] drm/i915: Check pfit scaling factors X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Make sure we're not exceeding the max scaling factors for the panel fitter. v2: Rebase due to crtc enable check Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 46 +++++++++++++++++++- 1 file changed, 45 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index ccec2b54677d..f7f93af55ec5 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -11810,13 +11810,57 @@ static int intel_pch_pfit_check_src_size(const struct intel_crtc_state *crtc_sta return 0; } +static int intel_pch_pfit_check_scaling(const struct intel_crtc_state *crtc_state) +{ + struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_rect src = { + .x2 = crtc_state->pipe_src_w << 16, + .y2 = crtc_state->pipe_src_h << 16, + }; + const struct drm_rect *dst = &crtc_state->pch_pfit.dst; + int ret, max_scale; + + if (INTEL_GEN(dev_priv) >= 9) { + if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) + max_scale = 0x18000 - 1; /* < 1.5 */ + else + max_scale = 0x30000 - 1; /* < 3.0 */ + } else { + max_scale = 0x12000; /* 1.125 */ + } + + ret = drm_rect_calc_hscale(&src, dst, 0, max_scale); + if (ret < 0) { + DRM_DEBUG_KMS("pfit horizontal downscale (%d->%d) exceeds max (0x%x)\n", + crtc_state->pipe_src_w, + drm_rect_width(dst), max_scale); + return ret; + } + + ret = drm_rect_calc_vscale(&src, dst, 0, max_scale); + if (ret < 0) { + DRM_DEBUG_KMS("pfit vertical downscale (%d->%d) exceeds max (0x%x)\n", + crtc_state->pipe_src_h, + drm_rect_height(dst), max_scale); + return ret; + } + + return 0; +} + static int intel_pch_pfit_check(const struct intel_crtc_state *crtc_state) { + int ret; + if (!crtc_state->base.enable || !crtc_state->pch_pfit.enabled) return 0; - return intel_pch_pfit_check_src_size(crtc_state); + ret = intel_pch_pfit_check_src_size(crtc_state); + if (ret) + return ret; + + return intel_pch_pfit_check_scaling(crtc_state); } static int intel_crtc_atomic_check(struct drm_crtc *crtc, From patchwork Thu Sep 5 10:38:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 11132653 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9D82E112C for ; Thu, 5 Sep 2019 10:38:24 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E0DFE206BB for ; Thu, 5 Sep 2019 10:38:23 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E0DFE206BB Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 55A296E03C; Thu, 5 Sep 2019 10:38:23 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 44BC66E03C for ; Thu, 5 Sep 2019 10:38:22 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Sep 2019 03:38:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,470,1559545200"; d="scan'208";a="212736167" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by fmsmga002.fm.intel.com with SMTP; 05 Sep 2019 03:38:19 -0700 Received: by stinkbox (sSMTP sendmail emulation); Thu, 05 Sep 2019 13:38:19 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Thu, 5 Sep 2019 13:38:19 +0300 Message-Id: <20190905103819.3688-1-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190904162625.15048-10-ville.syrjala@linux.intel.com> References: <20190904162625.15048-10-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 09/15] drm/i915: Check pfit minimum timings X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Transcoder hdisplay/vdisplay have documented minimum limits when using the panel fitter. Enforce those limits. v2: Skip the checks if the crtc is disabled Add debugs for the failures Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 63 ++++++++++++++++++-- 1 file changed, 59 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index f7f93af55ec5..2c523f500cb4 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -11768,6 +11768,20 @@ static bool c8_planes_changed(const struct intel_crtc_state *new_crtc_state) return !old_crtc_state->c8_planes != !new_crtc_state->c8_planes; } +static int intel_pch_pfit_check_timings(const struct intel_crtc_state *crtc_state) +{ + const struct drm_display_mode *adjusted_mode = + &crtc_state->base.adjusted_mode; + + if (adjusted_mode->crtc_vdisplay < 7) { + DRM_DEBUG_KMS("Vertical active (%d) below minimum (%d) for pfit\n", + adjusted_mode->crtc_vdisplay, 7); + return -EINVAL; + } + + return 0; +} + static int intel_pch_pfit_check_src_size(const struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); @@ -11856,6 +11870,10 @@ static int intel_pch_pfit_check(const struct intel_crtc_state *crtc_state) !crtc_state->pch_pfit.enabled) return 0; + ret = intel_pch_pfit_check_timings(crtc_state); + if (ret) + return ret; + ret = intel_pch_pfit_check_src_size(crtc_state); if (ret) return ret; @@ -11863,6 +11881,42 @@ static int intel_pch_pfit_check(const struct intel_crtc_state *crtc_state) return intel_pch_pfit_check_scaling(crtc_state); } +static int intel_gmch_pfit_check_timings(const struct intel_crtc_state *crtc_state) +{ + struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + const struct drm_display_mode *adjusted_mode = + &crtc_state->base.adjusted_mode; + int min; + + if (INTEL_GEN(dev_priv) >= 4) + min = 3; + else + min = 2; + + if (adjusted_mode->crtc_hdisplay < min) { + DRM_DEBUG_KMS("Horizontal active (%d) below minimum (%d) for pfit\n", + adjusted_mode->crtc_hdisplay, min); + return -EINVAL; + } + + if (adjusted_mode->crtc_vdisplay < min) { + DRM_DEBUG_KMS("Vertical active (%d) below minimum (%d) for pfit\n", + adjusted_mode->crtc_vdisplay, min); + return -EINVAL; + } + + return 0; +} + +static int intel_gmch_pfit_check(const struct intel_crtc_state *crtc_state) +{ + if (!crtc_state->base.enable || + (crtc_state->gmch_pfit.control & PFIT_ENABLE) == 0) + return 0; + + return intel_gmch_pfit_check_timings(crtc_state); +} + static int intel_crtc_atomic_check(struct drm_crtc *crtc, struct drm_crtc_state *crtc_state) { @@ -11886,11 +11940,12 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc, return ret; } - if (!HAS_GMCH(dev_priv)) { + if (HAS_GMCH(dev_priv)) + ret = intel_gmch_pfit_check(pipe_config); + else ret = intel_pch_pfit_check(pipe_config); - if (ret) - return ret; - } + if (ret) + return ret; /* * May need to update pipe gamma enable bits