From patchwork Thu Sep 12 09:54:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxin Yu X-Patchwork-Id: 11142707 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 28C5814ED for ; Thu, 12 Sep 2019 09:57:06 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A7CE2206A5 for ; Thu, 12 Sep 2019 09:57:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=alsa-project.org header.i=@alsa-project.org header.b="SRL3lsLv" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A7CE2206A5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=alsa-devel-bounces@alsa-project.org Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id F2FA21739; Thu, 12 Sep 2019 11:56:12 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz F2FA21739 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1568282223; bh=/OmtNFNdc6wbdcpLT/++QhBirliF4XsBHHou3kw5Ehw=; h=From:To:Date:In-Reply-To:References:Cc:Subject:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=SRL3lsLv5KhV0bLH/VYrSL1znVzI9JrXN0bFyJl6yn7pGKL8dM/XF8+3PSAaOHmqF 0tNRYyWEsJhq6WiImh5mNz0x9OHXTo8Jpnq29T1gF9sS8+iWSmESlNJxpMC81a6VXX 719NAva9KFod7GIGvh4Q/s/mBOxgAeyTfcJF5ZTo= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 18E2DF80444; Thu, 12 Sep 2019 11:55:19 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa1.perex.cz (Postfix, from userid 50401) id E8BFCF80143; Thu, 12 Sep 2019 11:55:15 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on alsa1.perex.cz X-Spam-Level: * X-Spam-Status: No, score=1.0 required=5.0 tests=RDNS_NONE,SPF_HELO_NONE, SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from mailgw01.mediatek.com (unknown [210.61.82.183]) by alsa1.perex.cz (Postfix) with ESMTP id 0D375F80321 for ; Thu, 12 Sep 2019 11:55:09 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 0D375F80321 X-UUID: fcc8dc5bcb1e4836a51220321d6c95a5-20190912 X-UUID: fcc8dc5bcb1e4836a51220321d6c95a5-20190912 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1030287229; Thu, 12 Sep 2019 17:55:04 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 12 Sep 2019 17:55:02 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 12 Sep 2019 17:55:02 +0800 From: Jiaxin Yu To: , Date: Thu, 12 Sep 2019 17:54:55 +0800 Message-ID: <1568282096-13821-2-git-send-email-jiaxin.yu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1568282096-13821-1-git-send-email-jiaxin.yu@mediatek.com> References: <1568282096-13821-1-git-send-email-jiaxin.yu@mediatek.com> MIME-Version: 1.0 X-MTK: N Cc: alsa-devel@alsa-project.org, lgirdwood@gmail.com, jiaxin.yu@mediatek.com, tzungbi@google.com, linux-mediatek@lists.infradead.org, eason.yen@mediatek.com Subject: [alsa-devel] [PATCH 1/2] ASoC: dt-bingdings: mediatek: mt8183: add a property "medaitek, toprgu" X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" This patch adds a property "mediatek,toprgu" in example so that we could use reset controller(usually we call it toprgu or watchdog) to reset audio domain regs. Signed-off-by: Jiaxin Yu --- Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt b/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt index 396ba38619f6..45ca182a4ecc 100644 --- a/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt +++ b/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt @@ -4,6 +4,7 @@ Required properties: - compatible = "mediatek,mt68183-audio"; - reg: register location and size - interrupts: should contain AFE interrupt +- mediatek,toprgu: A phandle to the TOPRGU which for reset controller unit - power-domains: should define the power domain - clocks: Must contain an entry for each entry in clock-names - clock-names: should have these clock names: @@ -20,6 +21,7 @@ Example: compatible = "mediatek,mt8183-audio"; reg = <0 0x11220000 0 0x1000>; interrupts = ; + mediatek,toprgu = <&watchdog>; power-domains = <&scpsys MT8183_POWER_DOMAIN_AUDIO>; clocks = <&infrasys CLK_INFRA_AUDIO>, <&infrasys CLK_INFRA_AUDIO_26M_BCLK>, From patchwork Thu Sep 12 09:54:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxin Yu X-Patchwork-Id: 11142709 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6AD391599 for ; Thu, 12 Sep 2019 09:57:55 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F19D8206A5 for ; Thu, 12 Sep 2019 09:57:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=alsa-project.org header.i=@alsa-project.org header.b="do5GqTdk" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F19D8206A5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=alsa-devel-bounces@alsa-project.org Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 341D21742; Thu, 12 Sep 2019 11:57:03 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 341D21742 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1568282273; bh=PF0tgVqXRw5MbQjc2iueLo21KoxmaBzAzWzSBOUdcZg=; h=From:To:Date:In-Reply-To:References:Cc:Subject:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=do5GqTdkbOff95kx+73QLj2TnYCTDDzS0n6wRRkXJU5cEi133bKutHtaJPk3dxnJG /PaKWnwChRnh2dt7cAz4DNdAr7LNoQdJGoLUglKkNJF8ZU9AKEd70gQKez3arPSyM9 cG0RJchTSqvvoC6kNkWzv/zWSDk+SaNxyXKI8yII= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 4C610F805A0; Thu, 12 Sep 2019 11:55:20 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa1.perex.cz (Postfix, from userid 50401) id 2447AF80444; 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Thu, 12 Sep 2019 17:55:03 +0800 From: Jiaxin Yu To: , Date: Thu, 12 Sep 2019 17:54:56 +0800 Message-ID: <1568282096-13821-3-git-send-email-jiaxin.yu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1568282096-13821-1-git-send-email-jiaxin.yu@mediatek.com> References: <1568282096-13821-1-git-send-email-jiaxin.yu@mediatek.com> MIME-Version: 1.0 X-MTK: N Cc: alsa-devel@alsa-project.org, lgirdwood@gmail.com, jiaxin.yu@mediatek.com, tzungbi@google.com, linux-mediatek@lists.infradead.org, eason.yen@mediatek.com Subject: [alsa-devel] [PATCH 2/2] ASoC: mt8183: fix audio playback slowly after playback during bootup X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Before regmap_reinit_cache we must reset audio reg as default value. So we use reset controller unit(toprgu) to reset audio hw. Signed-off-by: Jiaxin Yu --- sound/soc/mediatek/common/mtk-base-afe.h | 1 + sound/soc/mediatek/mt8183/mt8183-afe-pcm.c | 21 +++++++++++++++++++++ sound/soc/mediatek/mt8183/mt8183-reg.h | 6 ++++++ 3 files changed, 28 insertions(+) diff --git a/sound/soc/mediatek/common/mtk-base-afe.h b/sound/soc/mediatek/common/mtk-base-afe.h index 60cb609a9790..bccc079ee660 100644 --- a/sound/soc/mediatek/common/mtk-base-afe.h +++ b/sound/soc/mediatek/common/mtk-base-afe.h @@ -60,6 +60,7 @@ struct mtk_base_afe { void __iomem *base_addr; struct device *dev; struct regmap *regmap; + struct regmap *toprgu_regmap; struct mutex irq_alloc_lock; /* dynamic alloc irq lock */ unsigned int const *reg_back_up_list; diff --git a/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c b/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c index 4a31106d3471..0e5634b3a8e3 100644 --- a/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c +++ b/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c @@ -1089,6 +1089,7 @@ static int mt8183_afe_pcm_dev_probe(struct platform_device *pdev) struct mtk_base_afe *afe; struct mt8183_afe_private *afe_priv; struct device *dev; + unsigned int reg_value; int i, irq_id, ret; afe = devm_kzalloc(&pdev->dev, sizeof(*afe), GFP_KERNEL); @@ -1126,6 +1127,26 @@ static int mt8183_afe_pcm_dev_probe(struct platform_device *pdev) return ret; } + /* toprgu_regmap init */ + afe->toprgu_regmap = syscon_regmap_lookup_by_phandle(dev->of_node, + "mediatek,toprgu"); + if (IS_ERR(afe->toprgu_regmap)) { + dev_err(dev, "could not get toprgu_regmap from dev\n"); + return PTR_ERR(afe->toprgu_regmap); + } + + /* read TOPRGUWDT_SWSYSRST, the high 8bits must be zero */ + regmap_read(afe->toprgu_regmap, TOPRGUWDT_SWSYSRST, ®_value); + + /* write TOPRGUWDT_SWSYSRST, we need set high 8bits as 0x88 first */ + reg_value |= 0x88000000; + + /* reset audio domain registers */ + reg_value |= 1 << AUDIO_RST_SFT; + regmap_write(afe->toprgu_regmap, TOPRGUWDT_SWSYSRST, reg_value); + reg_value &= ~(1 << AUDIO_RST_SFT); + regmap_write(afe->toprgu_regmap, TOPRGUWDT_SWSYSRST, reg_value); + /* enable clock for regcache get default value from hw */ afe_priv->pm_runtime_bypass_reg_ctl = true; pm_runtime_get_sync(&pdev->dev); diff --git a/sound/soc/mediatek/mt8183/mt8183-reg.h b/sound/soc/mediatek/mt8183/mt8183-reg.h index e544a09e1913..8579ac4052ff 100644 --- a/sound/soc/mediatek/mt8183/mt8183-reg.h +++ b/sound/soc/mediatek/mt8183/mt8183-reg.h @@ -413,6 +413,12 @@ #define AFE_MAX_REGISTER AFE_GENERAL2_ASRC_2CH_CON13 #define AFE_IRQ_STATUS_BITS 0x1fff +/* TOPRGUWDT_SWSYSRST */ +#define TOPRGUWDT_SWSYSRST 0x18 +#define AUDIO_RST_SFT 17 +#define AUDIO_RST_MASK 0x1 +#define AUDIO_RST_MASK_SFT (0x1 << 17) + /* AUDIO_TOP_CON3 */ #define BCK_INVERSE_SFT 3 #define BCK_INVERSE_MASK 0x1