From patchwork Sat Sep 21 17:01:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 11155601 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F053776 for ; Sat, 21 Sep 2019 17:02:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C594821907 for ; Sat, 21 Sep 2019 17:02:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569085325; bh=D/aj1o5oREexJ28TkCWasuQ4NQ6KQT2BjyhV/jLm9fM=; h=From:To:Cc:Subject:Date:List-ID:From; b=b3ZfwB5rFNSlvGqyR29sQMLgqtVsmUU98MFuZnPEbRA02fVaUTAm3WzxBfeNwdRAe 31CzjRQ2xIJMj1tFUUl21FFCoYz3SKLyopqHKOeuee3xmCpmyBp9lY4t3UNJwuh59C LYYy1iQmWeZF5Cu8HT9vpsM5WICC4yC1QPBzReqQ= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2438052AbfIURCF (ORCPT ); Sat, 21 Sep 2019 13:02:05 -0400 Received: from mail.kernel.org ([198.145.29.99]:39388 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2438031AbfIURCF (ORCPT ); Sat, 21 Sep 2019 13:02:05 -0400 Received: from localhost.localdomain (unknown [194.230.155.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 3BADC20820; Sat, 21 Sep 2019 17:02:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569085323; bh=D/aj1o5oREexJ28TkCWasuQ4NQ6KQT2BjyhV/jLm9fM=; h=From:To:Cc:Subject:Date:From; b=ivY7rekAsl0U8vsoflBPsWSU1AXznr2gsFox8O6voDZFTrEqG0Luykrp/A9QRtYT5 8Buc3vvfAAZ73LPo+E9Lw5T4TsXw11aD8XTNVmqpToqtKWJ04IyUogd6ycasdC/da/ rFoC2lZZKsA1op+eN2x8QJiJN+Y2IHryOeAZ4Z7U= From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Bartlomiej Zolnierkiewicz , Sylwester Nawrocki Subject: [PATCH v3 1/8] dt-bindings: timer: Convert Exynos MCT bindings to json-schema Date: Sat, 21 Sep 2019 19:01:45 +0200 Message-Id: <20190921170152.5033-1-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Convert Samsung Exynos Soc Multi Core Timer bindings to DT schema format using json-schema. Signed-off-by: Krzysztof Kozlowski --- Changes since v1: 1. Indent example with four spaces (more readable), 2. Rename nodes in example to timer, 3. Remove mct-map subnode. --- .../bindings/timer/samsung,exynos4210-mct.txt | 88 -------------- .../timer/samsung,exynos4210-mct.yaml | 113 ++++++++++++++++++ 2 files changed, 113 insertions(+), 88 deletions(-) delete mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt create mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt deleted file mode 100644 index 8f78640ad64c..000000000000 --- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt +++ /dev/null @@ -1,88 +0,0 @@ -Samsung's Multi Core Timer (MCT) - -The Samsung's Multi Core Timer (MCT) module includes two main blocks, the -global timer and CPU local timers. The global timer is a 64-bit free running -up-counter and can generate 4 interrupts when the counter reaches one of the -four preset counter values. The CPU local timers are 32-bit free running -down-counters and generate an interrupt when the counter expires. There is -one CPU local timer instantiated in MCT for every CPU in the system. - -Required properties: - -- compatible: should be "samsung,exynos4210-mct". - (a) "samsung,exynos4210-mct", for mct compatible with Exynos4210 mct. - (b) "samsung,exynos4412-mct", for mct compatible with Exynos4412 mct. - -- reg: base address of the mct controller and length of the address space - it occupies. - -- interrupts: the list of interrupts generated by the controller. The following - should be the order of the interrupts specified. The local timer interrupts - should be specified after the four global timer interrupts have been - specified. - - 0: Global Timer Interrupt 0 - 1: Global Timer Interrupt 1 - 2: Global Timer Interrupt 2 - 3: Global Timer Interrupt 3 - 4: Local Timer Interrupt 0 - 5: Local Timer Interrupt 1 - 6: .. - 7: .. - i: Local Timer Interrupt n - - For MCT block that uses a per-processor interrupt for local timers, such - as ones compatible with "samsung,exynos4412-mct", only one local timer - interrupt might be specified, meaning that all local timers use the same - per processor interrupt. - -Example 1: In this example, the IP contains two local timers, using separate - interrupts, so two local timer interrupts have been specified, - in addition to four global timer interrupts. - - mct@10050000 { - compatible = "samsung,exynos4210-mct"; - reg = <0x10050000 0x800>; - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, - <0 42 0>, <0 48 0>; - }; - -Example 2: In this example, the timer interrupts are connected to two separate - interrupt controllers. Hence, an interrupt-map is created to map - the interrupts to the respective interrupt controllers. - - mct@101c0000 { - compatible = "samsung,exynos4210-mct"; - reg = <0x101C0000 0x800>; - interrupt-parent = <&mct_map>; - interrupts = <0>, <1>, <2>, <3>, <4>, <5>; - - mct_map: mct-map { - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = <0 &gic 0 57 0>, - <1 &gic 0 69 0>, - <2 &combiner 12 6>, - <3 &combiner 12 7>, - <4 &gic 0 42 0>, - <5 &gic 0 48 0>; - }; - }; - -Example 3: In this example, the IP contains four local timers, but using - a per-processor interrupt to handle them. Either all the local - timer interrupts can be specified, with the same interrupt specifier - value or just the first one. - - mct@10050000 { - compatible = "samsung,exynos4412-mct"; - reg = <0x10050000 0x800>; - - /* Both ways are possible in this case. Either: */ - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, - <0 42 0>; - /* or: */ - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, - <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>; - }; diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml new file mode 100644 index 000000000000..5d6db1ddd7f6 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml @@ -0,0 +1,113 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos SoC Multi Core Timer (MCT) + +maintainers: + - Krzysztof Kozlowski + +description: |+ + The Samsung's Multi Core Timer (MCT) module includes two main blocks, the + global timer and CPU local timers. The global timer is a 64-bit free running + up-counter and can generate 4 interrupts when the counter reaches one of the + four preset counter values. The CPU local timers are 32-bit free running + down-counters and generate an interrupt when the counter expires. There is + one CPU local timer instantiated in MCT for every CPU in the system. + +properties: + compatible: + enum: + - samsung,exynos4210-mct + - samsung,exynos4412-mct + + reg: + maxItems: 1 + + interrupts: + description: | + Interrupts should be put in specific order. This is, the local timer + interrupts should be specified after the four global timer interrupts + have been specified: + 0: Global Timer Interrupt 0 + 1: Global Timer Interrupt 1 + 2: Global Timer Interrupt 2 + 3: Global Timer Interrupt 3 + 4: Local Timer Interrupt 0 + 5: Local Timer Interrupt 1 + 6: .. + 7: .. + i: Local Timer Interrupt n + For MCT block that uses a per-processor interrupt for local timers, such + as ones compatible with "samsung,exynos4412-mct", only one local timer + interrupt might be specified, meaning that all local timers use the same + per processor interrupt. + minItems: 5 # 4 Global + 1 local + maxItems: 20 # 4 Global + 16 local + +required: + - compatible + - interrupts + - reg + +examples: + - | + // In this example, the IP contains two local timers, using separate + // interrupts, so two local timer interrupts have been specified, + // in addition to four global timer interrupts. + + timer@10050000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x10050000 0x800>; + interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, + <0 42 0>, <0 48 0>; + }; + + - | + // In this example, the timer interrupts are connected to two separate + // interrupt controllers. Hence, an interrupt-map is created to map + // the interrupts to the respective interrupt controllers. + + mct: timer@101c0000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x101C0000 0x800>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <&mct>; + interrupts = <0>, <1>, <2>, <3>, <4>, <5>; + interrupt-map = <0 &gic 0 57 0>, + <1 &gic 0 69 0>, + <2 &combiner 12 6>, + <3 &combiner 12 7>, + <4 &gic 0 42 0>, + <5 &gic 0 48 0>; + }; + + - | + // In this example, the IP contains four local timers, but using + // a per-processor interrupt to handle them. Only one first local + // interrupt is specified. + + timer@10050000 { + compatible = "samsung,exynos4412-mct"; + reg = <0x10050000 0x800>; + + interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, + <0 42 0>; + }; + + - | + // In this example, the IP contains four local timers, but using + // a per-processor interrupt to handle them. All the local timer + // interrupts are specified. + + timer@10050000 { + compatible = "samsung,exynos4412-mct"; + reg = <0x10050000 0x800>; + + interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, + <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>; + }; From patchwork Sat Sep 21 17:01:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 11155605 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CBFD014DB for ; Sat, 21 Sep 2019 17:02:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AA9B921928 for ; Sat, 21 Sep 2019 17:02:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569085331; bh=2l1I33Xe5hDz42o1/ZVvgVgbND3Hlh/p+Y+TYnwAq4s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=Dj5pziVPynMHdcs8w/JxIokQ9ttMaknqfsDVVpScmSbB3ajxTX1nnVNzuUkpdPE9/ 93TP8nvkhstH9h7Q25xrsWvD5WAz7F7Ip4C1m5gGhhdU5fQlnfH/Czt4RMWtsjl18k 93lH9vbwC8fPTcsjLN3ylTsQgCOPHR77O7sltM/o= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2438206AbfIURCI (ORCPT ); Sat, 21 Sep 2019 13:02:08 -0400 Received: from mail.kernel.org ([198.145.29.99]:39514 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2438031AbfIURCI (ORCPT ); Sat, 21 Sep 2019 13:02:08 -0400 Received: from localhost.localdomain (unknown [194.230.155.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id E12F5218AE; Sat, 21 Sep 2019 17:02:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569085327; bh=2l1I33Xe5hDz42o1/ZVvgVgbND3Hlh/p+Y+TYnwAq4s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OnAAb+rJZUcNvlroMCU3IpKTPJJeSycaG/v1aT5Dawex2b1p/pmMDGXNtP4fv7P2e sqfDwawpccX4J/XIw5+nQUfc80ywEwq7da1Cb85K3adSFVo1Hgt3ZELh6X9nVR4iSR yWZcJt5XgYlXrXl+TEHjF5mOVU4QUH2DdPnx5BeY= From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Bartlomiej Zolnierkiewicz , Sylwester Nawrocki Subject: [PATCH v3 2/8] ARM: dts: exynos: Rename Multi Core Timer node to "timer" Date: Sat, 21 Sep 2019 19:01:46 +0200 Message-Id: <20190921170152.5033-2-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190921170152.5033-1-krzk@kernel.org> References: <20190921170152.5033-1-krzk@kernel.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org The device node name should reflect generic class of a device so rename the Multi Core Timer node from "mct" to "timer". This will be also in sync with upcoming DT schema. No functional change. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos3250.dtsi | 2 +- arch/arm/boot/dts/exynos4210.dtsi | 2 +- arch/arm/boot/dts/exynos4412.dtsi | 2 +- arch/arm/boot/dts/exynos5250.dtsi | 2 +- arch/arm/boot/dts/exynos5260.dtsi | 2 +- arch/arm/boot/dts/exynos54xx.dtsi | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 784818490376..d122fb52d3d4 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -265,7 +265,7 @@ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; - mct@10050000 { + timer@10050000 { compatible = "samsung,exynos4210-mct"; reg = <0x10050000 0x800>; interrupts = , diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index f220716239db..6d3f19562aab 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -106,7 +106,7 @@ arm,data-latency = <2 2 1>; }; - mct: mct@10050000 { + mct: timer@10050000 { compatible = "samsung,exynos4210-mct"; reg = <0x10050000 0x800>; interrupt-parent = <&mct_map>; diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index d20db2dfe8e2..8b6d5875c75d 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -243,7 +243,7 @@ clock-names = "aclk200", "aclk400_mcuisp"; }; - mct@10050000 { + timer@10050000 { compatible = "samsung,exynos4412-mct"; reg = <0x10050000 0x800>; interrupt-parent = <&mct_map>; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index fc966c10cf49..7a01349317a3 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -233,7 +233,7 @@ power-domains = <&pd_mau>; }; - mct@101c0000 { + timer@101c0000 { compatible = "samsung,exynos4210-mct"; reg = <0x101C0000 0x800>; interrupt-controller; diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi index 3581b57fbbf7..b0811dbbb362 100644 --- a/arch/arm/boot/dts/exynos5260.dtsi +++ b/arch/arm/boot/dts/exynos5260.dtsi @@ -180,7 +180,7 @@ reg = <0x10000000 0x100>; }; - mct: mct@100b0000 { + mct: timer@100b0000 { compatible = "samsung,exynos4210-mct"; reg = <0x100B0000 0x1000>; clocks = <&fin_pll>, <&clock_peri PERI_CLK_MCT>; diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi index 9c3b63b7cac6..247d23872384 100644 --- a/arch/arm/boot/dts/exynos54xx.dtsi +++ b/arch/arm/boot/dts/exynos54xx.dtsi @@ -64,7 +64,7 @@ }; }; - mct: mct@101c0000 { + mct: timer@101c0000 { compatible = "samsung,exynos4210-mct"; reg = <0x101c0000 0xb00>; interrupt-parent = <&mct_map>; From patchwork Sat Sep 21 17:01:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 11155607 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 851F014DB for ; Sat, 21 Sep 2019 17:02:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6437921928 for ; Sat, 21 Sep 2019 17:02:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569085332; bh=r0Q4VB/j5PL/rgZkRPpQzQ1S0oUxFSc3euGBv7t4Az4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=PFppcjgHoyH50e4hSziTxq89cpjeduf5IJQ7E4MCLZBWGaSIlNUA+JxA331uyDIyV oXkjSZTv4zKvNU0kSr351fNoGZ902O8oD+568rNOAvtBPx2E3mBHPAnqB+8wgS9T5m UCqdck3slONCAl6zKpNaJaNENxDX6CmS248vOwrE= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2438277AbfIURCL (ORCPT ); Sat, 21 Sep 2019 13:02:11 -0400 Received: from mail.kernel.org ([198.145.29.99]:39654 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2438031AbfIURCL (ORCPT ); Sat, 21 Sep 2019 13:02:11 -0400 Received: from localhost.localdomain (unknown [194.230.155.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 9CCB321907; Sat, 21 Sep 2019 17:02:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569085330; bh=r0Q4VB/j5PL/rgZkRPpQzQ1S0oUxFSc3euGBv7t4Az4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iyOhYRg0R5F0iOR+PFexeovw1dm3Y/lUP4Q6QAZvnyIAqXwpcBmHP0xwaLEuvkjie UAVvBK183DtsynyHXphvY3hl3WhaJnqB5jJI8U99dHNVaE2TcfDe68pRR9W6f9Qt1u dQjam3/1D0HS0sUCYVuVLWYkaKR/w19AxQgYecv8= From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Bartlomiej Zolnierkiewicz , Sylwester Nawrocki Subject: [PATCH v3 3/8] arm64: dts: exynos: Rename Multi Core Timer node to "timer" Date: Sat, 21 Sep 2019 19:01:47 +0200 Message-Id: <20190921170152.5033-3-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190921170152.5033-1-krzk@kernel.org> References: <20190921170152.5033-1-krzk@kernel.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org The device node name should reflect generic class of a device so rename the Multi Core Timer node from "mct" to "timer". This will be also in sync with upcoming DT schema. No functional change. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index a76f620f7f35..8baf3c645eae 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -754,7 +754,7 @@ status = "disabled"; }; - mct@101c0000 { + timer@101c0000 { compatible = "samsung,exynos4210-mct"; reg = <0x101c0000 0x800>; interrupts = , From patchwork Sat Sep 21 17:01:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 11155609 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A7B2014DB for ; Sat, 21 Sep 2019 17:02:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 870FC218AE for ; Sat, 21 Sep 2019 17:02:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569085338; bh=MnKtv/tVqwT4kcJd+5kJhN0nMZpd4Rb6U5zHzZea9kc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=PnsG5uD4r/eawbYdBM8wHq6z9gzoE3UEXZzlk27nx/KiUeT9hPNONb4V8MQQuteJI bsvGz5ziq/yxQSa7krmsJP0wMyso9bcCVD5yn9HTlRcRNVeEuLw5nI3O1Vqe9GB9Yg ciuoqp+Qg/EYAevA3/5Ch5fYciSsKfvR00FB5HXI= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2438368AbfIURCQ (ORCPT ); Sat, 21 Sep 2019 13:02:16 -0400 Received: from mail.kernel.org ([198.145.29.99]:39786 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2438031AbfIURCP (ORCPT ); Sat, 21 Sep 2019 13:02:15 -0400 Received: from localhost.localdomain (unknown [194.230.155.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 49C4321882; Sat, 21 Sep 2019 17:02:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569085334; bh=MnKtv/tVqwT4kcJd+5kJhN0nMZpd4Rb6U5zHzZea9kc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Qdzak8FXP6sF8L36U+PL+SiqYIyQODTkLk9gEs6cDNSplUhr21xWrYLZsacQJ4otl O5qhwe5zbzuiGF2pfAzrAdjBf5hDooZxA5F0XQ6UjYwB+QNmC7LOG1yab/wC0yW8BE a4OJPmQJa1VDWY+f9H1Mv1FcMZnfXAObLIJcu7Bo= From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Bartlomiej Zolnierkiewicz , Sylwester Nawrocki Subject: [RFT v3 4/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4210 Date: Sat, 21 Sep 2019 19:01:48 +0200 Message-Id: <20190921170152.5033-4-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190921170152.5033-1-krzk@kernel.org> References: <20190921170152.5033-1-krzk@kernel.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Multi Core Timer node has interrupts routed to two different parents - GIC and combiner. This was modeled with a interrupt-map within a subnode but can be expressed in an easier and more common way, directly in the node itself. Signed-off-by: Krzysztof Kozlowski --- Not tested. --- arch/arm/boot/dts/exynos4210.dtsi | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 6d3f19562aab..38c49ab8c733 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -109,23 +109,19 @@ mct: timer@10050000 { compatible = "samsung,exynos4210-mct"; reg = <0x10050000 0x800>; - interrupt-parent = <&mct_map>; - interrupts = <0>, <1>, <2>, <3>, <4>, <5>; clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; clock-names = "fin_pll", "mct"; - - mct_map: mct-map { - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = - <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>, + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <&mct>; + interrupts = <0>, <1>, <2>, <3>, <4>, <5>; + interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>, <1 &gic 0 69 IRQ_TYPE_LEVEL_HIGH>, <2 &combiner 12 6>, <3 &combiner 12 7>, <4 &gic 0 42 IRQ_TYPE_LEVEL_HIGH>, <5 &gic 0 48 IRQ_TYPE_LEVEL_HIGH>; - }; }; watchdog: watchdog@10060000 { From patchwork Sat Sep 21 17:01:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 11155613 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E4C4676 for ; Sat, 21 Sep 2019 17:02:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C3824218AE for ; Sat, 21 Sep 2019 17:02:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569085345; bh=ZhlatAQJ3gbAFsTaWLwFfMHgUb56DQV27LgklGme05w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=VXQ8EbLRpGHOJT97AyKF3M9SAyMExGsbgeSv/fXmNJ2z2ZdEPcx46zDAnQA0j9Ied eKJUbtOaH9+pnhW8BABd7WdOKGXwcu7JVQiMGTxtIS+CX0l4zC+yf8toe01leLrspZ x73AjUKlMJ77bx5irc/5PcL3IaKpsHZhYpuvHHcc= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2438382AbfIURCU (ORCPT ); Sat, 21 Sep 2019 13:02:20 -0400 Received: from mail.kernel.org ([198.145.29.99]:39930 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2438377AbfIURCT (ORCPT ); Sat, 21 Sep 2019 13:02:19 -0400 Received: from localhost.localdomain (unknown [194.230.155.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 5E4212190F; Sat, 21 Sep 2019 17:02:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569085338; bh=ZhlatAQJ3gbAFsTaWLwFfMHgUb56DQV27LgklGme05w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=tBysDp4gwW+VrTrbK206X0kuUyh0if1grnyL8UMjAAS14VgeSsqtTDx3uZ5e9SP34 C9zjLhxaj8MzDzvI5GSN3UxPu2facYXgjFJ3nniZ9CwpfkoqjDdW0nLXcgm+eXGSN5 /fQq2btfTyZc95vwHuJHsh3vbZ5yjgQRNbeUWdBc= From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Bartlomiej Zolnierkiewicz , Sylwester Nawrocki Subject: [RFT v3 5/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4412 Date: Sat, 21 Sep 2019 19:01:49 +0200 Message-Id: <20190921170152.5033-5-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190921170152.5033-1-krzk@kernel.org> References: <20190921170152.5033-1-krzk@kernel.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Multi Core Timer node has interrupts routed to two different parents - GIC and combiner. This was modeled with a interrupt-map within a subnode but can be expressed in an easier and more common way, directly in the node itself. Tested on Odroid U3 (Exynos4412). Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos4412.dtsi | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index 8b6d5875c75d..7e2dabefd53f 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -243,25 +243,21 @@ clock-names = "aclk200", "aclk400_mcuisp"; }; - timer@10050000 { + mct: timer@10050000 { compatible = "samsung,exynos4412-mct"; reg = <0x10050000 0x800>; - interrupt-parent = <&mct_map>; - interrupts = <0>, <1>, <2>, <3>, <4>; clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; clock-names = "fin_pll", "mct"; - - mct_map: mct-map { - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = - <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>, + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <&mct>; + interrupts = <0>, <1>, <2>, <3>, <4>; + interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>, <1 &combiner 12 5>, <2 &combiner 12 6>, <3 &combiner 12 7>, <4 &gic 1 12 IRQ_TYPE_LEVEL_HIGH>; - }; }; watchdog: watchdog@10060000 { From patchwork Sat Sep 21 17:01:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 11155619 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E7A8876 for ; Sat, 21 Sep 2019 17:02:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C730121882 for ; Sat, 21 Sep 2019 17:02:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569085361; bh=7bM9pWcEH6BpytbPP5wmLlyloc+4k6xwQpF8p+f70xM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=NeWfs8Z4dbpEPhOxlaL3kPq3K30pccbLJAgZv7eu0lOAX9a8NktjGmtxFIpiZ4pIF kaGd2wZJkDFDx1ZbmX99zoVx2agbKy+7/nwj97RI6v1FlWsiV0z8LaBEnFNma+iWS0 s1YU1gnszRuWPWJrqp44n+cpVP41l8jt3uM26PGM= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2438400AbfIURC1 (ORCPT ); Sat, 21 Sep 2019 13:02:27 -0400 Received: from mail.kernel.org ([198.145.29.99]:39996 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2438377AbfIURCX (ORCPT ); Sat, 21 Sep 2019 13:02:23 -0400 Received: from localhost.localdomain (unknown [194.230.155.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 22C3020820; Sat, 21 Sep 2019 17:02:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569085342; bh=7bM9pWcEH6BpytbPP5wmLlyloc+4k6xwQpF8p+f70xM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qR2E8wm+9EaURawg/o+x76l6LzAuuiYPNDPR/GYxJO1kUtrcZVxbyzG/a8SpZCisk qBmOAmoVdbLFSv+xHT8mm1y8mjn09dZ75YSaBv9J5G0w/wfPph3DUxiwtyZcT+M0cf BVHSVrSUUUP+uHBlSyXnVzt8DBIWYUxytrsrZanY= From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Bartlomiej Zolnierkiewicz , Sylwester Nawrocki Subject: [RFT v3 6/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos5250 Date: Sat, 21 Sep 2019 19:01:50 +0200 Message-Id: <20190921170152.5033-6-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190921170152.5033-1-krzk@kernel.org> References: <20190921170152.5033-1-krzk@kernel.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Multi Core Timer node has interrupts routed to two different parents - GIC and combiner. This was modeled with a interrupt-map within a subnode but can be expressed in an easier and more common way, directly in the node itself. Signed-off-by: Krzysztof Kozlowski --- Not tested. --- arch/arm/boot/dts/exynos5250.dtsi | 30 ++++++++++++------------------ 1 file changed, 12 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 7a01349317a3..e0fcf3c2f537 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -233,28 +233,22 @@ power-domains = <&pd_mau>; }; - timer@101c0000 { + mct: timer@101c0000 { compatible = "samsung,exynos4210-mct"; reg = <0x101C0000 0x800>; - interrupt-controller; - #interrupt-cells = <2>; - interrupt-parent = <&mct_map>; - interrupts = <0 0>, <1 0>, <2 0>, <3 0>, - <4 0>, <5 0>; clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; clock-names = "fin_pll", "mct"; - - mct_map: mct-map { - #interrupt-cells = <2>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = <0x0 0 &combiner 23 3>, - <0x1 0 &combiner 23 4>, - <0x2 0 &combiner 25 2>, - <0x3 0 &combiner 25 3>, - <0x4 0 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>, - <0x5 0 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>; - }; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <&mct>; + interrupts = <0>, <1>, <2>, <3>, <4>, <5>; + interrupt-map = <0 &combiner 23 3>, + <1 &combiner 23 4>, + <2 &combiner 25 2>, + <3 &combiner 25 3>, + <4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>, + <5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_0: pinctrl@11400000 { From patchwork Sat Sep 21 17:01:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 11155615 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D985A76 for ; Sat, 21 Sep 2019 17:02:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B900F21D71 for ; Sat, 21 Sep 2019 17:02:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569085348; bh=K7z//Y/yLJWsZpw2WZeSz4YckSjsAIIkQrg5GbosjAU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=SjzdKgkRqhCbQ7eXcuF31bu3mHK5Mulz9IenWpbB9QqyhEqaoXuAMOaVKzyhG4Hp+ 5Hgkcg2jZCDUsOkGuQRlaZxk8jNxXCCXCdOs31zia9h2zt54nrguyW0xSuuWPpfd0+ E9Tf3RbZa+xBkaZ2Z4aDpH5pAZ2HAZkEtX1HHnO0= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2438396AbfIURC1 (ORCPT ); Sat, 21 Sep 2019 13:02:27 -0400 Received: from mail.kernel.org ([198.145.29.99]:40176 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2438395AbfIURC0 (ORCPT ); Sat, 21 Sep 2019 13:02:26 -0400 Received: from localhost.localdomain (unknown [194.230.155.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id DC43621882; Sat, 21 Sep 2019 17:02:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569085346; bh=K7z//Y/yLJWsZpw2WZeSz4YckSjsAIIkQrg5GbosjAU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eOCyX2tGs+6hBnI46pENiaekDrJv2+ild9ii0foLROp6wXYdIrsxBJGc7K73fVjBV /WJPERUnAjGmhfrBOV1I4pRs+PCF3/b0ZvhPpHitUgG030cPL4oyWAEeEyjGnoshBY 7NmqiV3yAEkvPX3NLyS1AM4vEogbSsfz2Zq1ElH8= From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Bartlomiej Zolnierkiewicz , Sylwester Nawrocki Subject: [RFT v3 7/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos54xx Date: Sat, 21 Sep 2019 19:01:51 +0200 Message-Id: <20190921170152.5033-7-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190921170152.5033-1-krzk@kernel.org> References: <20190921170152.5033-1-krzk@kernel.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Multi Core Timer node has interrupts routed to two different parents - GIC and combiner. This was modeled with a interrupt-map within a subnode but can be expressed in an easier and more common way, directly in the node itself. Tested on Odroid XU (Exynos5410), Odroid HC1 (Exynos5422) and Arndale Octa (Exynos5420). Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos54xx.dtsi | 37 ++++++++++++++----------------- 1 file changed, 17 insertions(+), 20 deletions(-) diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi index 247d23872384..a1c10a9a86f8 100644 --- a/arch/arm/boot/dts/exynos54xx.dtsi +++ b/arch/arm/boot/dts/exynos54xx.dtsi @@ -67,27 +67,24 @@ mct: timer@101c0000 { compatible = "samsung,exynos4210-mct"; reg = <0x101c0000 0xb00>; - interrupt-parent = <&mct_map>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <&mct>; interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>, - <8>, <9>, <10>, <11>; - - mct_map: mct-map { - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = <0 &combiner 23 3>, - <1 &combiner 23 4>, - <2 &combiner 25 2>, - <3 &combiner 25 3>, - <4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>, - <5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>, - <6 &gic 0 122 IRQ_TYPE_LEVEL_HIGH>, - <7 &gic 0 123 IRQ_TYPE_LEVEL_HIGH>, - <8 &gic 0 128 IRQ_TYPE_LEVEL_HIGH>, - <9 &gic 0 129 IRQ_TYPE_LEVEL_HIGH>, - <10 &gic 0 130 IRQ_TYPE_LEVEL_HIGH>, - <11 &gic 0 131 IRQ_TYPE_LEVEL_HIGH>; - }; + <8>, <9>, <10>, <11>; + interrupt-map = <0 &combiner 23 3>, + <1 &combiner 23 4>, + <2 &combiner 25 2>, + <3 &combiner 25 3>, + <4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>, + <5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>, + <6 &gic 0 122 IRQ_TYPE_LEVEL_HIGH>, + <7 &gic 0 123 IRQ_TYPE_LEVEL_HIGH>, + <8 &gic 0 128 IRQ_TYPE_LEVEL_HIGH>, + <9 &gic 0 129 IRQ_TYPE_LEVEL_HIGH>, + <10 &gic 0 130 IRQ_TYPE_LEVEL_HIGH>, + <11 &gic 0 131 IRQ_TYPE_LEVEL_HIGH>; }; watchdog: watchdog@101d0000 { From patchwork Sat Sep 21 17:01:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 11155617 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5461514DB for ; Sat, 21 Sep 2019 17:02:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 333C320820 for ; Sat, 21 Sep 2019 17:02:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569085360; bh=WMIbHRXqKnTwV8Qyk4jQI2KbATovpC39pOQTs+GXcc0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=lyyCxY991M0tUABBD7t65j38jLE0jUt3RF0INeiY6qNj/54E4AbdrqVJj6IQ+r4mo 3WlNb7tS/+pq6W8RfRycf5VdFJMiPiBL4wkUdhnsb4+41pCpT7umVHSUP54rjnVJkP zCc9pGoEDzVf1oBKnKIDlPTr1pDIvR0j4/RByg1I= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2438415AbfIURCc (ORCPT ); Sat, 21 Sep 2019 13:02:32 -0400 Received: from mail.kernel.org ([198.145.29.99]:40286 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2438407AbfIURCa (ORCPT ); Sat, 21 Sep 2019 13:02:30 -0400 Received: from localhost.localdomain (unknown [194.230.155.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 7F78F21907; Sat, 21 Sep 2019 17:02:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569085349; bh=WMIbHRXqKnTwV8Qyk4jQI2KbATovpC39pOQTs+GXcc0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Jn4oa/WZlNu7XYMRyE3vTpcyy7SDnSQ+LtCys+Cm8vBnYTyInxGkF//s24yG0dQ6j tlH9/OEOS4zVc9KHgRphEc3DrVt8hSdMjy24cqhja0nhBFxCFv5DJnD2VyhB2Qerql Oc5FC5g6t8yJv1hwGkHoSZkBI7VJFDIThDe+dFaQ= From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Bartlomiej Zolnierkiewicz , Sylwester Nawrocki Subject: [PATCH v3 8/8] ARM: dts: exynos: Use defines for MCT interrupt GIC SPI/PPI specifier Date: Sat, 21 Sep 2019 19:01:52 +0200 Message-Id: <20190921170152.5033-8-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190921170152.5033-1-krzk@kernel.org> References: <20190921170152.5033-1-krzk@kernel.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Replace hard-coded number with appropriate define for GIC SPI or PPI specifier in interrupt. This makes code easier to read. No expected functionality change. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos4210.dtsi | 8 ++++---- arch/arm/boot/dts/exynos4412.dtsi | 4 ++-- arch/arm/boot/dts/exynos5250.dtsi | 4 ++-- arch/arm/boot/dts/exynos54xx.dtsi | 16 ++++++++-------- 4 files changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 38c49ab8c733..650bee6355e4 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -116,12 +116,12 @@ #interrupt-cells = <1>; interrupt-parent = <&mct>; interrupts = <0>, <1>, <2>, <3>, <4>, <5>; - interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>, - <1 &gic 0 69 IRQ_TYPE_LEVEL_HIGH>, + interrupt-map = <0 &gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, + <1 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, <2 &combiner 12 6>, <3 &combiner 12 7>, - <4 &gic 0 42 IRQ_TYPE_LEVEL_HIGH>, - <5 &gic 0 48 IRQ_TYPE_LEVEL_HIGH>; + <4 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, + <5 &gic GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; }; watchdog: watchdog@10060000 { diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index 7e2dabefd53f..0810c14bf424 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -253,11 +253,11 @@ #interrupt-cells = <1>; interrupt-parent = <&mct>; interrupts = <0>, <1>, <2>, <3>, <4>; - interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>, + interrupt-map = <0 &gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, <1 &combiner 12 5>, <2 &combiner 12 6>, <3 &combiner 12 7>, - <4 &gic 1 12 IRQ_TYPE_LEVEL_HIGH>; + <4 &gic GIC_PPI 12 IRQ_TYPE_LEVEL_HIGH>; }; watchdog: watchdog@10060000 { diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index e0fcf3c2f537..61f22feefda9 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -247,8 +247,8 @@ <1 &combiner 23 4>, <2 &combiner 25 2>, <3 &combiner 25 3>, - <4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>, - <5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>; + <4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, + <5 &gic GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_0: pinctrl@11400000 { diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi index a1c10a9a86f8..f52c7ce5d320 100644 --- a/arch/arm/boot/dts/exynos54xx.dtsi +++ b/arch/arm/boot/dts/exynos54xx.dtsi @@ -77,14 +77,14 @@ <1 &combiner 23 4>, <2 &combiner 25 2>, <3 &combiner 25 3>, - <4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>, - <5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>, - <6 &gic 0 122 IRQ_TYPE_LEVEL_HIGH>, - <7 &gic 0 123 IRQ_TYPE_LEVEL_HIGH>, - <8 &gic 0 128 IRQ_TYPE_LEVEL_HIGH>, - <9 &gic 0 129 IRQ_TYPE_LEVEL_HIGH>, - <10 &gic 0 130 IRQ_TYPE_LEVEL_HIGH>, - <11 &gic 0 131 IRQ_TYPE_LEVEL_HIGH>; + <4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, + <5 &gic GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, + <6 &gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, + <7 &gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <8 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <9 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + <10 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <11 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; }; watchdog: watchdog@101d0000 {