From patchwork Sun Sep 22 20:12:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre GRIVEAUX X-Patchwork-Id: 11155957 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1012114DB for ; Sun, 22 Sep 2019 20:12:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E201020869 for ; Sun, 22 Sep 2019 20:12:27 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=deutnet.info header.i=@deutnet.info header.b="WkO0ZIYJ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730944AbfIVUMZ (ORCPT ); Sun, 22 Sep 2019 16:12:25 -0400 Received: from srv1.deutnet.info ([116.203.153.70]:44662 "EHLO srv1.deutnet.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729892AbfIVUMY (ORCPT ); Sun, 22 Sep 2019 16:12:24 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=deutnet.info; s=default; h=In-Reply-To:Message-ID:Subject:Cc:To:From:Date; bh=LoUpqJudWyj9nM8kZMC0gqj41Fj/RyQbOaPaMoFSwFk=; b=WkO0ZIYJOBX/zIt0CfmL6/rvS ERz51EzgWD6gqJqILv8+Kdsg/upHFLMEhlYwgjrOQ2XzrQAUf1PkTbbCBPNByz3nZpqHBRWkm5yKn pU/+lGO880nsoXNympALDGXqIeRO0MXvNCK7Gv+Uv3wwB4t9jPlFD/n9zCfjktzGEzNv1xW31Nu80 Lnr3Ujcqje0dN4sGpJf/hfIfRNBKa/KmjOrvt44MWkKXk6gx4ammUdIzJ/HGKOj25CYjeWZieOJcO MbipTeIHRRgXutUcGVYRoLPIJenmJeIxTJPvvurdFXTYy1wYA4GDuPUF5zq4bdgiwsuV+p7oaGQ3C OkbEouICw==; Received: from [2001:bc8:3dc9::1] (helo=localhost) by srv1.deutnet.info with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1iC8DU-0007sx-6S; Sun, 22 Sep 2019 22:12:20 +0200 Received: from agriveaux by localhost with local (Exim 4.92) (envelope-from ) id 1iC8DT-007ve7-RP; Sun, 22 Sep 2019 22:12:19 +0200 Date: Sun, 22 Sep 2019 22:12:19 +0200 From: Alexandre GRIVEAUX To: robh+dt@kernel.org, mark.rutland@arm.com, ralf@linux-mips.org, paul.burton@mips.com, jhogan@kernel.org, agriveaux@deutnet.info Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 1/4] MIPS: CI20: DTS: Add I2C nodes Message-ID: <3f74e79546aff3e2f77e94361685d53f4e44fa7b.1569181001.git.agriveaux@deutnet.info> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Adding missing I2C nodes and some peripheral: - PMU - RTC Signed-off-by: Alexandre GRIVEAUX --- arch/mips/boot/dts/ingenic/ci20.dts | 147 ++++++++++++++++++++++++++++ 1 file changed, 147 insertions(+) diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts index 2e9952311ecd..4a77fa30a9cd 100644 --- a/arch/mips/boot/dts/ingenic/ci20.dts +++ b/arch/mips/boot/dts/ingenic/ci20.dts @@ -87,6 +87,123 @@ pinctrl-0 = <&pins_uart4>; }; +&i2c0 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_i2c0>; + + clock-frequency = <400000>; + + act8600: act8600@5a { + compatible = "active-semi,act8600"; + reg = <0x5a>; + status = "okay"; + + regulators { + vddcore: SUDCDC1 { + regulator-name = "VDDCORE"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + }; + vddmem: SUDCDC2 { + regulator-name = "VDDMEM"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + }; + vcc_33: SUDCDC3 { + regulator-name = "VCC33"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + vcc_50: SUDCDC4 { + regulator-name = "VCC50"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + vcc_25: LDO_REG5 { + regulator-name = "VCC25"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + }; + wifi_io: LDO_REG6 { + regulator-name = "WIFIIO"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + }; + vcc_28: LDO_REG7 { + regulator-name = "VCC28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + vcc_15: LDO_REG8 { + regulator-name = "VCC15"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + }; + vcc_18: LDO_REG9 { + regulator-name = "VCC18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + vcc_11: LDO_REG10 { + regulator-name = "VCC11"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + }; + }; + }; +}; + +&i2c1 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_i2c1>; + +}; + +&i2c2 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_i2c2>; + +}; + +&i2c3 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_i2c3>; + +}; + +&i2c4 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_i2c4>; + + clock-frequency = <400000>; + + rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + interrupts = <110>; + }; +}; + &nemc { status = "okay"; @@ -209,6 +326,36 @@ bias-disable; }; + pins_i2c0: i2c0 { + function = "i2c0"; + groups = "i2c0-data"; + bias-disable; + }; + + pins_i2c1: i2c1 { + function = "i2c1"; + groups = "i2c1-data"; + bias-disable; + }; + + pins_i2c2: i2c2 { + function = "i2c2"; + groups = "i2c2-data"; + bias-disable; + }; + + pins_i2c3: i2c3 { + function = "i2c3"; + groups = "i2c3-data"; + bias-disable; + }; + + pins_i2c4: i2c4 { + function = "i2c4"; + groups = "i2c4-data-e"; + bias-disable; + }; + pins_nemc: nemc { function = "nemc"; groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe"; From patchwork Sun Sep 22 20:12:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre GRIVEAUX X-Patchwork-Id: 11155959 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7712E13B1 for ; Sun, 22 Sep 2019 20:12:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 54B2A206B6 for ; Sun, 22 Sep 2019 20:12:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=deutnet.info header.i=@deutnet.info header.b="lWw29Rey" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731575AbfIVUMn (ORCPT ); Sun, 22 Sep 2019 16:12:43 -0400 Received: from srv1.deutnet.info ([116.203.153.70]:44672 "EHLO srv1.deutnet.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729892AbfIVUMn (ORCPT ); Sun, 22 Sep 2019 16:12:43 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=deutnet.info; s=default; h=In-Reply-To:Message-ID:Subject:Cc:To:From:Date; bh=5UXMOr/ulTWR012xYXMNl3dPd+SSd8gi2/c+EtqMttc=; b=lWw29ReyagtKHd1f82LKd0b97 WQM1Rpw83bmgFSPxqa3D24ITEJRCOnU8rjEc8U2oJX+KBHbnFkvooU1gVk0cLMvJtYzvrFh7xbnDQ Kin9nO5nikeQehai/HiAqVKpY5JleyRug9p+tD+CNLMKaHaeJOegakfNHbLhmQ7ZU5bplalujyfq8 ZN90iZIKJmqW8bXNj/TtWPiN5ergAvqnvNT1OQIpH29HHeAXgAfC6CC6+CuM05blABSpKgb58++3A lV8ycy/iSAkUDgaQZzLTEatOiq7bNz3qUYUDzkg2vh4lyWFZO7tQOrGtFuDHKZb6CfDKjhSzjA7JP S6aJEuLAg==; Received: from [2001:bc8:3dc9::1] (helo=localhost) by srv1.deutnet.info with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1iC8Dl-0007tN-Pg; Sun, 22 Sep 2019 22:12:37 +0200 Received: from agriveaux by localhost with local (Exim 4.92) (envelope-from ) id 1iC8Dl-007vee-Du; Sun, 22 Sep 2019 22:12:37 +0200 Date: Sun, 22 Sep 2019 22:12:37 +0200 From: Alexandre GRIVEAUX To: robh+dt@kernel.org, mark.rutland@arm.com, ralf@linux-mips.org, paul.burton@mips.com, jhogan@kernel.org, agriveaux@deutnet.info Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 2/4] MIPS: CI20: DTS: Add IW8103 Wifi + bluetooth Message-ID: <2ab4eb8e7f2c1de24228dd9216cd42e8dd2007a4.1569181001.git.agriveaux@deutnet.info> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Add IW8103 Wifi + bluetooth module to device tree and related power domain. Signed-off-by: Alexandre GRIVEAUX --- arch/mips/boot/dts/ingenic/ci20.dts | 39 +++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts index 4a77fa30a9cd..c62c36ae94c2 100644 --- a/arch/mips/boot/dts/ingenic/ci20.dts +++ b/arch/mips/boot/dts/ingenic/ci20.dts @@ -31,6 +31,13 @@ gpio = <&gpb 25 GPIO_ACTIVE_LOW>; enable-active-high; }; + + wlan0_power: fixedregulator@1 { + compatible = "regulator-fixed"; + regulator-name = "wlan0_power"; + gpio = <&gpb 19 GPIO_ACTIVE_LOW>; + enable-active-high; + }; }; &ext { @@ -54,9 +61,18 @@ bus-width = <4>; max-frequency = <50000000>; + non-removable; pinctrl-names = "default"; pinctrl-0 = <&pins_mmc1>; + + brcmf: wifi@1 { +/* reg = <4>;*/ + compatible = "brcm,bcm4330-fmac"; + vcc-supply = <&wlan0_power>; + device-wakeup-gpios = <&gpd 9 GPIO_ACTIVE_HIGH>; + shutdown-gpios = <&gpf 7 GPIO_ACTIVE_LOW>; + }; }; &uart0 { @@ -73,6 +89,23 @@ pinctrl-0 = <&pins_uart1>; }; +&uart2 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_uart2>; + uart-has-rtscts; + + bluetooth { + compatible = "brcm,bcm4330-bt"; + reset-gpios = <&gpf 8 GPIO_ACTIVE_HIGH>; + vcc-supply = <&wlan0_power>; + device-wakeup-gpios = <&gpf 5 GPIO_ACTIVE_HIGH>; + host-wakeup-gpios = <&gpf 6 GPIO_ACTIVE_HIGH>; + shutdown-gpios = <&gpf 4 GPIO_ACTIVE_LOW>; + }; +}; + &uart3 { status = "okay"; @@ -314,6 +347,12 @@ bias-disable; }; + pins_uart2: uart2 { + function = "uart2"; + groups = "uart2-data", "uart2-hwflow"; + bias-disable; + }; + pins_uart3: uart3 { function = "uart3"; groups = "uart3-data", "uart3-hwflow"; From patchwork Sun Sep 22 20:12:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre GRIVEAUX X-Patchwork-Id: 11155961 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 076E914DB for ; Sun, 22 Sep 2019 20:13:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D939020869 for ; Sun, 22 Sep 2019 20:12:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=deutnet.info header.i=@deutnet.info header.b="Y598Tbxa" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387655AbfIVUM4 (ORCPT ); Sun, 22 Sep 2019 16:12:56 -0400 Received: from srv1.deutnet.info ([116.203.153.70]:44682 "EHLO srv1.deutnet.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729892AbfIVUM4 (ORCPT ); Sun, 22 Sep 2019 16:12:56 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=deutnet.info; s=default; h=In-Reply-To:Message-ID:Subject:Cc:To:From:Date; bh=60OHukiHnNspCw6OiVucbGC3zH8iOy4aw+kE5lf5Fcs=; b=Y598TbxalyCEDnB33hTvaNier +ggf33Jo+FjbodgdNV/m2JuOTrp0WNvOSp5GyOd8EKmQAaQUa9UfEWxKMUMuXaWw2JnbaqQPsdC+m rZkU8bAXkHrl6A2ceWc0llkvh8w5SdEiC0/pGtnfoJ61q4ETek413wFUHsUfXskvSqxEEZ/zt0nig tyV6LlYVgUFkN7ovwIwcRkD6djLW5n1uKMWDq8Qh/AkoTi1tfTqOk/fI3Tgna3K6AlOLPg93X/8FJ Qi1w3FWwyI4WVl1GjHEkxcxapDY0kQlxUUof/ldbuN8EP8Y9q5zW1IZnCNyw5OBP8Xfv2k2FjE5py cDmwxJkPA==; Received: from [2001:bc8:3dc9::1] (helo=localhost) by srv1.deutnet.info with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1iC8E0-0007tk-IR; Sun, 22 Sep 2019 22:12:52 +0200 Received: from agriveaux by localhost with local (Exim 4.92) (envelope-from ) id 1iC8E0-007vfB-6q; Sun, 22 Sep 2019 22:12:52 +0200 Date: Sun, 22 Sep 2019 22:12:52 +0200 From: Alexandre GRIVEAUX To: robh+dt@kernel.org, mark.rutland@arm.com, ralf@linux-mips.org, paul.burton@mips.com, jhogan@kernel.org, agriveaux@deutnet.info Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 3/4] MIPS: CI20: DTS: Add Leds Message-ID: <400e1552629dcf84d11cddab60b0177057e2c852.1569181001.git.agriveaux@deutnet.info> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Adding leds and related triggers. Signed-off-by: Alexandre GRIVEAUX --- arch/mips/boot/dts/ingenic/ci20.dts | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts index c62c36ae94c2..37b93166bf22 100644 --- a/arch/mips/boot/dts/ingenic/ci20.dts +++ b/arch/mips/boot/dts/ingenic/ci20.dts @@ -25,6 +25,34 @@ 0x30000000 0x30000000>; }; + leds { + compatible = "gpio-leds"; + + led0 { + label = "ci20:red:led0"; + gpios = <&gpc 3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "none"; + }; + + led1 { + label = "ci20:red:led1"; + gpios = <&gpc 2 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "nand-disk"; + }; + + led2 { + label = "ci20:red:led2"; + gpios = <&gpc 1 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "cpu1"; + }; + + led3 { + label = "ci20:red:led3"; + gpios = <&gpc 0 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "cpu0"; + }; + }; + eth0_power: fixedregulator@0 { compatible = "regulator-fixed"; regulator-name = "eth0_power"; From patchwork Sun Sep 22 20:13:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre GRIVEAUX X-Patchwork-Id: 11155963 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3EA3C13B1 for ; Sun, 22 Sep 2019 20:13:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1205D20882 for ; Sun, 22 Sep 2019 20:13:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=deutnet.info header.i=@deutnet.info header.b="lB+pkqsq" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388747AbfIVUNJ (ORCPT ); Sun, 22 Sep 2019 16:13:09 -0400 Received: from srv1.deutnet.info ([116.203.153.70]:44692 "EHLO srv1.deutnet.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388723AbfIVUNJ (ORCPT ); Sun, 22 Sep 2019 16:13:09 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=deutnet.info; s=default; h=In-Reply-To:Message-ID:Subject:Cc:To:From:Date; bh=/BP8hOWE8SJ76SRf1RmiWyLqtKvXhcXYW4oao3LZWlU=; b=lB+pkqsq5ngXh/Zi0/7wsCsa8 aW8g0qd9xLSsT8X3lvyYzVZ7cu596Ipc06stOJO1ZO1DJPVNBhuD2aAgGj667hmdGmGvXP+i7UeZA XtOwM5f6dCpQ4t53xgNOKRHtnlPoyWOBAgowbNcuBr7DPs2Qw3REE+Mlm4h+V+mPA/t1Z29jrOICc mtz33a/XSXrEcWEFTgkV0py/nt6I8ndDz1s/p0jhkywFk9FdP8/sYX4+CI5F+Ax12m+FlHElkr88h 0eJkbucaqCoetZME+8FV41AZf4NSNJ84QWmuq2BvRpfzTPw/P5eosTjiMvcmyAz1eX7md6176ienE +kSORIMMA==; Received: from [2001:bc8:3dc9::1] (helo=localhost) by srv1.deutnet.info with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1iC8EE-0007u8-5c; Sun, 22 Sep 2019 22:13:06 +0200 Received: from agriveaux by localhost with local (Exim 4.92) (envelope-from ) id 1iC8ED-007vfi-Qc; Sun, 22 Sep 2019 22:13:05 +0200 Date: Sun, 22 Sep 2019 22:13:05 +0200 From: Alexandre GRIVEAUX To: robh+dt@kernel.org, mark.rutland@arm.com, ralf@linux-mips.org, paul.burton@mips.com, jhogan@kernel.org, agriveaux@deutnet.info Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 4/4] MIPS: JZ4780: DTS: Add CPU nodes Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The JZ4780 have 2 core, adding to DT. Signed-off-by: Alexandre GRIVEAUX --- arch/mips/boot/dts/ingenic/jz4780.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi index f928329b034b..9c7346724f1f 100644 --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi @@ -7,6 +7,23 @@ #size-cells = <1>; compatible = "ingenic,jz4780"; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "ingenic,jz4780"; + device_type = "cpu"; + reg = <0>; + }; + + cpu@1 { + compatible = "ingenic,jz4780"; + device_type = "cpu"; + reg = <1>; + }; + }; + cpuintc: interrupt-controller { #address-cells = <0>; #interrupt-cells = <1>;