From patchwork Mon Sep 23 16:14:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 11157265 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B90061747 for ; Mon, 23 Sep 2019 16:14:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8293A217D9 for ; Mon, 23 Sep 2019 16:14:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569255273; bh=H8nRPYUseeS10GjqnOPrzC9Yz/nMH7vpi1Y4wo1PFCA=; h=From:To:Cc:Subject:Date:List-ID:From; b=yVDIAFF9pXNk+rTjhVqcMnlAB/BGppx+vTBdHPU+kl86+202B9sCs0+ifstF/0iWZ r8bCALqILHnT4qC0Cvggra28ryUcaxuS7Zl925zWQW1g6bzRJmZt+HDFjmHG33fp2U yWRwU7i4gp6v7nbPy1lsBFsv/1Rdr0A1hOt9e2Yk= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388549AbfIWQOa (ORCPT ); Mon, 23 Sep 2019 12:14:30 -0400 Received: from mail.kernel.org ([198.145.29.99]:58514 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388155AbfIWQO3 (ORCPT ); Mon, 23 Sep 2019 12:14:29 -0400 Received: from localhost.localdomain (unknown [194.230.155.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 21A3F2168B; Mon, 23 Sep 2019 16:14:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569255268; bh=H8nRPYUseeS10GjqnOPrzC9Yz/nMH7vpi1Y4wo1PFCA=; h=From:To:Cc:Subject:Date:From; b=KY68NKIMh2Aa/wFDIM/Q5O1PemkYu9Kpavfm8xuoYF5+PpFW+3efiikoistWP6PHp N220A8sQu8LjGgAL1uhZOZz1n4ES+TpqEhDzHXW1YHecvsK2VXBmt357oafEhyVTOR 8B/F4Nk2WzsJcrq2D+P/JtqPMUZFNy/BXQ2ur+aE= From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , Marek Szyprowski , Andrzej Hajda , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: Sylwester Nawrocki Subject: [PATCH v4 1/8] dt-bindings: timer: Convert Exynos MCT bindings to json-schema Date: Mon, 23 Sep 2019 18:14:04 +0200 Message-Id: <20190923161411.9236-1-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Convert Samsung Exynos Soc Multi Core Timer bindings to DT schema format using json-schema. Signed-off-by: Krzysztof Kozlowski --- Changes since v3: 1. Use interrupts-extended instead of interrupts-map. Changes since v1: 1. Indent example with four spaces (more readable), 2. Rename nodes in example to timer, 3. Remove mct-map subnode. --- .../bindings/timer/samsung,exynos4210-mct.txt | 88 ------------ .../timer/samsung,exynos4210-mct.yaml | 125 ++++++++++++++++++ 2 files changed, 125 insertions(+), 88 deletions(-) delete mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt create mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt deleted file mode 100644 index 8f78640ad64c..000000000000 --- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt +++ /dev/null @@ -1,88 +0,0 @@ -Samsung's Multi Core Timer (MCT) - -The Samsung's Multi Core Timer (MCT) module includes two main blocks, the -global timer and CPU local timers. The global timer is a 64-bit free running -up-counter and can generate 4 interrupts when the counter reaches one of the -four preset counter values. The CPU local timers are 32-bit free running -down-counters and generate an interrupt when the counter expires. There is -one CPU local timer instantiated in MCT for every CPU in the system. - -Required properties: - -- compatible: should be "samsung,exynos4210-mct". - (a) "samsung,exynos4210-mct", for mct compatible with Exynos4210 mct. - (b) "samsung,exynos4412-mct", for mct compatible with Exynos4412 mct. - -- reg: base address of the mct controller and length of the address space - it occupies. - -- interrupts: the list of interrupts generated by the controller. The following - should be the order of the interrupts specified. The local timer interrupts - should be specified after the four global timer interrupts have been - specified. - - 0: Global Timer Interrupt 0 - 1: Global Timer Interrupt 1 - 2: Global Timer Interrupt 2 - 3: Global Timer Interrupt 3 - 4: Local Timer Interrupt 0 - 5: Local Timer Interrupt 1 - 6: .. - 7: .. - i: Local Timer Interrupt n - - For MCT block that uses a per-processor interrupt for local timers, such - as ones compatible with "samsung,exynos4412-mct", only one local timer - interrupt might be specified, meaning that all local timers use the same - per processor interrupt. - -Example 1: In this example, the IP contains two local timers, using separate - interrupts, so two local timer interrupts have been specified, - in addition to four global timer interrupts. - - mct@10050000 { - compatible = "samsung,exynos4210-mct"; - reg = <0x10050000 0x800>; - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, - <0 42 0>, <0 48 0>; - }; - -Example 2: In this example, the timer interrupts are connected to two separate - interrupt controllers. Hence, an interrupt-map is created to map - the interrupts to the respective interrupt controllers. - - mct@101c0000 { - compatible = "samsung,exynos4210-mct"; - reg = <0x101C0000 0x800>; - interrupt-parent = <&mct_map>; - interrupts = <0>, <1>, <2>, <3>, <4>, <5>; - - mct_map: mct-map { - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = <0 &gic 0 57 0>, - <1 &gic 0 69 0>, - <2 &combiner 12 6>, - <3 &combiner 12 7>, - <4 &gic 0 42 0>, - <5 &gic 0 48 0>; - }; - }; - -Example 3: In this example, the IP contains four local timers, but using - a per-processor interrupt to handle them. Either all the local - timer interrupts can be specified, with the same interrupt specifier - value or just the first one. - - mct@10050000 { - compatible = "samsung,exynos4412-mct"; - reg = <0x10050000 0x800>; - - /* Both ways are possible in this case. Either: */ - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, - <0 42 0>; - /* or: */ - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, - <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>; - }; diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml new file mode 100644 index 000000000000..bff3f54a398f --- /dev/null +++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml @@ -0,0 +1,125 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos SoC Multi Core Timer (MCT) + +maintainers: + - Krzysztof Kozlowski + +description: |+ + The Samsung's Multi Core Timer (MCT) module includes two main blocks, the + global timer and CPU local timers. The global timer is a 64-bit free running + up-counter and can generate 4 interrupts when the counter reaches one of the + four preset counter values. The CPU local timers are 32-bit free running + down-counters and generate an interrupt when the counter expires. There is + one CPU local timer instantiated in MCT for every CPU in the system. + +properties: + compatible: + enum: + - samsung,exynos4210-mct + - samsung,exynos4412-mct + + reg: + maxItems: 1 + + interrupts: + description: | + Interrupts should be put in specific order. This is, the local timer + interrupts should be specified after the four global timer interrupts + have been specified: + 0: Global Timer Interrupt 0 + 1: Global Timer Interrupt 1 + 2: Global Timer Interrupt 2 + 3: Global Timer Interrupt 3 + 4: Local Timer Interrupt 0 + 5: Local Timer Interrupt 1 + 6: .. + 7: .. + i: Local Timer Interrupt n + For MCT block that uses a per-processor interrupt for local timers, such + as ones compatible with "samsung,exynos4412-mct", only one local timer + interrupt might be specified, meaning that all local timers use the same + per processor interrupt. + minItems: 5 # 4 Global + 1 local + maxItems: 20 # 4 Global + 16 local + + interrupts-extended: + description: | + If interrupts are coming from different controllers, this property + can be used instead of regular "interrupts" property. + The format is exactly the same as with "interrupts". + Interrupts should be put in specific order. This is, the local timer + minItems: 5 # 4 Global + 1 local + maxItems: 20 # 4 Global + 16 local + +required: + - compatible + - interrupts + - reg + +allOf: + - if: + not: + required: + - interrupts + then: + required: + - interrupts-extended + +examples: + - | + // In this example, the IP contains two local timers, using separate + // interrupts, so two local timer interrupts have been specified, + // in addition to four global timer interrupts. + + timer@10050000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x10050000 0x800>; + interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, + <0 42 0>, <0 48 0>; + }; + + - | + // In this example, the timer interrupts are connected to two separate + // interrupt controllers. Hence, an interrupts-extended is needed. + + timer@101c0000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x101C0000 0x800>; + interrupts-extended = <&gic 0 57 0>, + <&gic 0 69 0>, + <&combiner 12 6>, + <&combiner 12 7>, + <&gic 0 42 0>, + <&gic 0 48 0>; + }; + + - | + // In this example, the IP contains four local timers, but using + // a per-processor interrupt to handle them. Only one first local + // interrupt is specified. + + timer@10050000 { + compatible = "samsung,exynos4412-mct"; + reg = <0x10050000 0x800>; + + interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, + <0 42 0>; + }; + + - | + // In this example, the IP contains four local timers, but using + // a per-processor interrupt to handle them. All the local timer + // interrupts are specified. + + timer@10050000 { + compatible = "samsung,exynos4412-mct"; + reg = <0x10050000 0x800>; + + interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, + <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>; + }; From patchwork Mon Sep 23 16:14:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 11157283 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 17C601668 for ; Mon, 23 Sep 2019 16:15:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E9ECB20B7C for ; Mon, 23 Sep 2019 16:15:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569255306; bh=2l1I33Xe5hDz42o1/ZVvgVgbND3Hlh/p+Y+TYnwAq4s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=iOmjCGuMoeBOCI1QdSUHrnrmcb4FJoBv6FNTGbN09In/8h/soDDDMZaKoxZ0bo3yp pRRI97v1qo1uvjb8ATRCQRmuEJPBQIgZqkYqbSGo8M4ntZgrfbdacG+E6ahe8IBgpo EtGNXbSG6Qc7hKh+qvczV+K6U1dJVRjUqPaJqcUw= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388653AbfIWQOe (ORCPT ); Mon, 23 Sep 2019 12:14:34 -0400 Received: from mail.kernel.org ([198.145.29.99]:58628 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388155AbfIWQOd (ORCPT ); Mon, 23 Sep 2019 12:14:33 -0400 Received: from localhost.localdomain (unknown [194.230.155.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 43A9B217F4; Mon, 23 Sep 2019 16:14:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569255272; bh=2l1I33Xe5hDz42o1/ZVvgVgbND3Hlh/p+Y+TYnwAq4s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Qcu1nsEcJrmBd9nP7gRCfhI2viAM1NPqXcOAcTcSbggdmkI7Hvdc25k/k/FdALeop S/U/E/TmSr43BT2YgNyS/omRIO6fW5ulCizF44VvPLukirbv+THS8l0IkX36QR82WG eBxV5H7X0San8RVA4BNaZnidxgiwloLMdNe9cUkI= From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , Marek Szyprowski , Andrzej Hajda , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: Sylwester Nawrocki Subject: [PATCH v4 2/8] ARM: dts: exynos: Rename Multi Core Timer node to "timer" Date: Mon, 23 Sep 2019 18:14:05 +0200 Message-Id: <20190923161411.9236-2-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190923161411.9236-1-krzk@kernel.org> References: <20190923161411.9236-1-krzk@kernel.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org The device node name should reflect generic class of a device so rename the Multi Core Timer node from "mct" to "timer". This will be also in sync with upcoming DT schema. No functional change. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos3250.dtsi | 2 +- arch/arm/boot/dts/exynos4210.dtsi | 2 +- arch/arm/boot/dts/exynos4412.dtsi | 2 +- arch/arm/boot/dts/exynos5250.dtsi | 2 +- arch/arm/boot/dts/exynos5260.dtsi | 2 +- arch/arm/boot/dts/exynos54xx.dtsi | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 784818490376..d122fb52d3d4 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -265,7 +265,7 @@ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; - mct@10050000 { + timer@10050000 { compatible = "samsung,exynos4210-mct"; reg = <0x10050000 0x800>; interrupts = , diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index f220716239db..6d3f19562aab 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -106,7 +106,7 @@ arm,data-latency = <2 2 1>; }; - mct: mct@10050000 { + mct: timer@10050000 { compatible = "samsung,exynos4210-mct"; reg = <0x10050000 0x800>; interrupt-parent = <&mct_map>; diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index d20db2dfe8e2..8b6d5875c75d 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -243,7 +243,7 @@ clock-names = "aclk200", "aclk400_mcuisp"; }; - mct@10050000 { + timer@10050000 { compatible = "samsung,exynos4412-mct"; reg = <0x10050000 0x800>; interrupt-parent = <&mct_map>; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index fc966c10cf49..7a01349317a3 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -233,7 +233,7 @@ power-domains = <&pd_mau>; }; - mct@101c0000 { + timer@101c0000 { compatible = "samsung,exynos4210-mct"; reg = <0x101C0000 0x800>; interrupt-controller; diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi index 3581b57fbbf7..b0811dbbb362 100644 --- a/arch/arm/boot/dts/exynos5260.dtsi +++ b/arch/arm/boot/dts/exynos5260.dtsi @@ -180,7 +180,7 @@ reg = <0x10000000 0x100>; }; - mct: mct@100b0000 { + mct: timer@100b0000 { compatible = "samsung,exynos4210-mct"; reg = <0x100B0000 0x1000>; clocks = <&fin_pll>, <&clock_peri PERI_CLK_MCT>; diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi index 9c3b63b7cac6..247d23872384 100644 --- a/arch/arm/boot/dts/exynos54xx.dtsi +++ b/arch/arm/boot/dts/exynos54xx.dtsi @@ -64,7 +64,7 @@ }; }; - mct: mct@101c0000 { + mct: timer@101c0000 { compatible = "samsung,exynos4210-mct"; reg = <0x101c0000 0xb00>; interrupt-parent = <&mct_map>; From patchwork Mon Sep 23 16:14:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 11157281 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 76773112B for ; Mon, 23 Sep 2019 16:15:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4A8E120B7C for ; Mon, 23 Sep 2019 16:15:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569255305; bh=r0Q4VB/j5PL/rgZkRPpQzQ1S0oUxFSc3euGBv7t4Az4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=L8yX5sgLNZd/35b+2mkhd81QpgaTAE68o83wpGTMqu40xheZZH6QMF0aYXbbunkfy FH2h5Rt8PjVQUX4Vkk0xekf1eYeVKztP8YqK90CGzEyWNq/AIzeqHEBSyPsLwj7uRw NDVESEFzSLir1J1DK23iRDX5QO09S59VhoEAj2Xo= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388728AbfIWQOj (ORCPT ); Mon, 23 Sep 2019 12:14:39 -0400 Received: from mail.kernel.org ([198.145.29.99]:58738 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388155AbfIWQOh (ORCPT ); Mon, 23 Sep 2019 12:14:37 -0400 Received: from localhost.localdomain (unknown [194.230.155.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 4D7AF2089F; Mon, 23 Sep 2019 16:14:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569255276; bh=r0Q4VB/j5PL/rgZkRPpQzQ1S0oUxFSc3euGBv7t4Az4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OQr9qvF1cztPu5G3FA8F7RDfeioLDuCCQ+kZcyosBVEqOYMDbtgowDSgdNCu6j4Ih Yx4qMeOSJ3MwnPhleLtPS2Mvwq5oAs/dZJLtOX1lJT56G6eXvVB38Y10PSw6lNCn6U jRbMPVi0C7PHo56ie97GYxowJQRnJjzLspOze2Ys= From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , Marek Szyprowski , Andrzej Hajda , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: Sylwester Nawrocki Subject: [PATCH v4 3/8] arm64: dts: exynos: Rename Multi Core Timer node to "timer" Date: Mon, 23 Sep 2019 18:14:06 +0200 Message-Id: <20190923161411.9236-3-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190923161411.9236-1-krzk@kernel.org> References: <20190923161411.9236-1-krzk@kernel.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org The device node name should reflect generic class of a device so rename the Multi Core Timer node from "mct" to "timer". This will be also in sync with upcoming DT schema. No functional change. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index a76f620f7f35..8baf3c645eae 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -754,7 +754,7 @@ status = "disabled"; }; - mct@101c0000 { + timer@101c0000 { compatible = "samsung,exynos4210-mct"; reg = <0x101c0000 0x800>; interrupts = , From patchwork Mon Sep 23 16:14:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 11157269 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1454D1747 for ; Mon, 23 Sep 2019 16:14:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E67D42196E for ; Mon, 23 Sep 2019 16:14:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569255284; bh=XzOwzt4EaDZ9rGaWKVtEVQXODQx4kDEr42DdUyLF9nw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=I/l2CBXIdJfGY0/TkDxhRzVAsVBc1xz1Udv65e1zhEXRbMlAF2IvVP+EMCZRLD0vd h6a4A7PwfVEUZ5m2WENv0OclkVptOnTAeo/rXcPMgnrLSDAZ6uh3RfrkDy5immaepL i1c7TDoPu5VQJ/BogNeL/kgNACxXmK6LoO8tw9fQ= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2394831AbfIWQOm (ORCPT ); Mon, 23 Sep 2019 12:14:42 -0400 Received: from mail.kernel.org ([198.145.29.99]:58872 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2394695AbfIWQOl (ORCPT ); Mon, 23 Sep 2019 12:14:41 -0400 Received: from localhost.localdomain (unknown [194.230.155.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 343352168B; Mon, 23 Sep 2019 16:14:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569255280; bh=XzOwzt4EaDZ9rGaWKVtEVQXODQx4kDEr42DdUyLF9nw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=xfG2fVlepDQbEBbjD4wbtwex8SGgtPbxKDn/6J7/FG+egAXLJumQN9lB4o5yNHixn ibB991ZBSGbVoSF/60Yx44nnWdBbaWiq8jSi6LL3mCfCzG/IdeF0kOCRDjEaF4ycez K0bIfhq51GoWmKBGdO6Mf2T3qSdIt50G7g9josg8= From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , Marek Szyprowski , Andrzej Hajda , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: Sylwester Nawrocki Subject: [RFT v4 4/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4210 Date: Mon, 23 Sep 2019 18:14:07 +0200 Message-Id: <20190923161411.9236-4-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190923161411.9236-1-krzk@kernel.org> References: <20190923161411.9236-1-krzk@kernel.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Multi Core Timer node has interrupts routed to two different parents - GIC and combiner. This was modeled with a interrupt-map within a subnode but can be expressed in an easier and more common way, directly in the node itself. Signed-off-by: Krzysztof Kozlowski Tested-by: Marek Szyprowski --- Not tested. Changes since v3: 1. Use interrupts-extended instead of interrupts-map. --- arch/arm/boot/dts/exynos4210.dtsi | 21 ++++++--------------- 1 file changed, 6 insertions(+), 15 deletions(-) diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 6d3f19562aab..5fa33d43821e 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -109,23 +109,14 @@ mct: timer@10050000 { compatible = "samsung,exynos4210-mct"; reg = <0x10050000 0x800>; - interrupt-parent = <&mct_map>; - interrupts = <0>, <1>, <2>, <3>, <4>, <5>; clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; clock-names = "fin_pll", "mct"; - - mct_map: mct-map { - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = - <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>, - <1 &gic 0 69 IRQ_TYPE_LEVEL_HIGH>, - <2 &combiner 12 6>, - <3 &combiner 12 7>, - <4 &gic 0 42 IRQ_TYPE_LEVEL_HIGH>, - <5 &gic 0 48 IRQ_TYPE_LEVEL_HIGH>; - }; + interrupts-extended = <&gic 0 57 IRQ_TYPE_LEVEL_HIGH>, + <&gic 0 69 IRQ_TYPE_LEVEL_HIGH>, + <&combiner 12 6>, + <&combiner 12 7>, + <&gic 0 42 IRQ_TYPE_LEVEL_HIGH>, + <&gic 0 48 IRQ_TYPE_LEVEL_HIGH>; }; watchdog: watchdog@10060000 { From patchwork Mon Sep 23 16:14:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 11157271 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9AEA91747 for ; Mon, 23 Sep 2019 16:14:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 79069217F4 for ; Mon, 23 Sep 2019 16:14:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569255288; bh=LTvLyPkZ7lh2IDczYfBNwnxnXfly/CnHg9F9GnaeWnU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=aYs8S2nyL9IawwLdz7cMrwFzSn2vKkN5gA6SR/lfvuZegjacf11vt91xv3XDVvFLC zOUIcEMChspMEDlzytWPtz1v8aau2vSYBLEXlXFhmbnHj9+ENwujbsknp0yWlAl4Hp JbFccCRox1+7qjyaKJgjFLffsmgg7IAcgLcuyvP0= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2395132AbfIWQOp (ORCPT ); Mon, 23 Sep 2019 12:14:45 -0400 Received: from mail.kernel.org ([198.145.29.99]:58954 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2395003AbfIWQOo (ORCPT ); Mon, 23 Sep 2019 12:14:44 -0400 Received: from localhost.localdomain (unknown [194.230.155.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id F375A20B7C; Mon, 23 Sep 2019 16:14:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569255284; bh=LTvLyPkZ7lh2IDczYfBNwnxnXfly/CnHg9F9GnaeWnU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qRKJm6V/awTf/tmnqOaszbM5rG1JhwHYeZnXY9EUidxEzzOuR2hZKAkjuqK99cuPk SeD7gSGrj+ODNf6ZAeJp2f3o+bAvP1Q7vt0HIrTfCfFkgmuKrNOekYZDWhofu2hqho E3f2b4cKCNv77kPCxe7DcS/Q6RbjLeKjO8e+FyZ8= From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , Marek Szyprowski , Andrzej Hajda , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: Sylwester Nawrocki Subject: [RFT v4 5/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4412 Date: Mon, 23 Sep 2019 18:14:08 +0200 Message-Id: <20190923161411.9236-5-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190923161411.9236-1-krzk@kernel.org> References: <20190923161411.9236-1-krzk@kernel.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Multi Core Timer node has interrupts routed to two different parents - GIC and combiner. This was modeled with a interrupt-map within a subnode but can be expressed in an easier and more common way, directly in the node itself. Tested on Odroid U3 (Exynos4412). Signed-off-by: Krzysztof Kozlowski Tested-by: Marek Szyprowski --- Changes since v3: 1. Use interrupts-extended instead of interrupts-map. --- arch/arm/boot/dts/exynos4412.dtsi | 19 +++++-------------- 1 file changed, 5 insertions(+), 14 deletions(-) diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index 8b6d5875c75d..9b5fb4e54d7c 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -246,22 +246,13 @@ timer@10050000 { compatible = "samsung,exynos4412-mct"; reg = <0x10050000 0x800>; - interrupt-parent = <&mct_map>; - interrupts = <0>, <1>, <2>, <3>, <4>; clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; clock-names = "fin_pll", "mct"; - - mct_map: mct-map { - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = - <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>, - <1 &combiner 12 5>, - <2 &combiner 12 6>, - <3 &combiner 12 7>, - <4 &gic 1 12 IRQ_TYPE_LEVEL_HIGH>; - }; + interrupts-extended = <&gic 0 57 IRQ_TYPE_LEVEL_HIGH>, + <&combiner 12 5>, + <&combiner 12 6>, + <&combiner 12 7>, + <&gic 1 12 IRQ_TYPE_LEVEL_HIGH>; }; watchdog: watchdog@10060000 { From patchwork Mon Sep 23 16:14:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 11157279 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7894E1800 for ; Mon, 23 Sep 2019 16:15:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 55BD92168B for ; Mon, 23 Sep 2019 16:15:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569255302; bh=Gx9Sv2CF5OTZ8trzCLgiPyHqEt/kwqhbnPXiX7vSKz0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=aOo2lRo5+weQDMxL+1WtJT3cyBFTpBQWtCADyEkdxid/UBJ+fvyUuJ9ld21UAbymd Vkp95l3v1sKPYD+sN2zsVNBa5wMAEYyl+4EwD0OFMUnOPJynkdlpg1vO2VamsqWXKz jGPXAn3JrH6i/RVWARdWGP81QupKLMNLZ0do68qc= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2395294AbfIWQOt (ORCPT ); Mon, 23 Sep 2019 12:14:49 -0400 Received: from mail.kernel.org ([198.145.29.99]:59014 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2395236AbfIWQOs (ORCPT ); Mon, 23 Sep 2019 12:14:48 -0400 Received: from localhost.localdomain (unknown [194.230.155.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id BDF392089F; Mon, 23 Sep 2019 16:14:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569255288; bh=Gx9Sv2CF5OTZ8trzCLgiPyHqEt/kwqhbnPXiX7vSKz0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eFkWh0ZyAyKn0SZZEtgiznSGxr4BKJrN4TzxQN9S+UAeWu0zt7pfITee7a9iKJJFV l3Whu42Bscx77qLGDXx8OhuB1mVNquw9Kvxzd/XfSXXpKqu8vdKIGnhyczrDPhSv+Z CAebRLdmzMfoEBfBQ5/ngLippU8mFOvjLhT6WvM4= From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , Marek Szyprowski , Andrzej Hajda , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: Sylwester Nawrocki Subject: [RFT v4 6/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos5250 Date: Mon, 23 Sep 2019 18:14:09 +0200 Message-Id: <20190923161411.9236-6-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190923161411.9236-1-krzk@kernel.org> References: <20190923161411.9236-1-krzk@kernel.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Multi Core Timer node has interrupts routed to two different parents - GIC and combiner. This was modeled with a interrupt-map within a subnode but can be expressed in an easier and more common way, directly in the node itself. Signed-off-by: Krzysztof Kozlowski Tested-by: Marek Szyprowski --- Not tested. Changes since v3: 1. Use interrupts-extended instead of interrupts-map. --- arch/arm/boot/dts/exynos5250.dtsi | 23 ++++++----------------- 1 file changed, 6 insertions(+), 17 deletions(-) diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 7a01349317a3..a549eafd2c64 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -236,25 +236,14 @@ timer@101c0000 { compatible = "samsung,exynos4210-mct"; reg = <0x101C0000 0x800>; - interrupt-controller; - #interrupt-cells = <2>; - interrupt-parent = <&mct_map>; - interrupts = <0 0>, <1 0>, <2 0>, <3 0>, - <4 0>, <5 0>; clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; clock-names = "fin_pll", "mct"; - - mct_map: mct-map { - #interrupt-cells = <2>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = <0x0 0 &combiner 23 3>, - <0x1 0 &combiner 23 4>, - <0x2 0 &combiner 25 2>, - <0x3 0 &combiner 25 3>, - <0x4 0 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>, - <0x5 0 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>; - }; + interrupts-extended = <&combiner 23 3>, + <&combiner 23 4>, + <&combiner 25 2>, + <&combiner 25 3>, + <&gic 0 120 IRQ_TYPE_LEVEL_HIGH>, + <&gic 0 121 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_0: pinctrl@11400000 { From patchwork Mon Sep 23 16:14:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 11157277 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B3D1E1747 for ; Mon, 23 Sep 2019 16:15:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 904EC2168B for ; Mon, 23 Sep 2019 16:15:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569255301; bh=055AApEoZHnhqgk+jRGaMDM2ewIZ2IZaWqUX6PpZBOs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=zxviC4qHaOsa4vWxxeu2sqxYTcqGSD7J8yoxMj99pcJKVFZWekn8saI8YV+9u0xZg AGV3hCXmup9U9EOfq0e7RjiDKYB2wjjFOTxFcuYXEMFrGBiPPwQWwN7Zq8E7ec7Mkr LwYL3G42pSKDmsOFsoV8uEFpqwi+stqIQljEX2j8= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2395510AbfIWQOx (ORCPT ); Mon, 23 Sep 2019 12:14:53 -0400 Received: from mail.kernel.org ([198.145.29.99]:59134 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2395236AbfIWQOw (ORCPT ); Mon, 23 Sep 2019 12:14:52 -0400 Received: from localhost.localdomain (unknown [194.230.155.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 9B95021BE5; Mon, 23 Sep 2019 16:14:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569255291; bh=055AApEoZHnhqgk+jRGaMDM2ewIZ2IZaWqUX6PpZBOs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=080ytc1/zsczrnAZzkk/jf+vyHuy1mflRjgCtER/h6Ys3Ydv1bhSixWAn+HLLDF5f fXj2G5bKxZYkwqKEmrIhd8NE2wUw106stvVZm3hSJu/CDv+5kT0WAyysLz/KgI2KUR XEyVj5JdthFCujY/OeJbz5nMHC9pM1t57MKCanVo= From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , Marek Szyprowski , Andrzej Hajda , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: Sylwester Nawrocki Subject: [PATCH v4 7/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos54xx Date: Mon, 23 Sep 2019 18:14:10 +0200 Message-Id: <20190923161411.9236-7-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190923161411.9236-1-krzk@kernel.org> References: <20190923161411.9236-1-krzk@kernel.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Multi Core Timer node has interrupts routed to two different parents - GIC and combiner. This was modeled with a interrupt-map within a subnode but can be expressed in an easier and more common way, directly in the node itself. Tested on Odroid XU (Exynos5410), Odroid HC1 (Exynos5422) and Arndale Octa (Exynos5420). Signed-off-by: Krzysztof Kozlowski --- Changes since v3: 1. Use interrupts-extended instead of interrupts-map. --- arch/arm/boot/dts/exynos54xx.dtsi | 33 +++++++++++-------------------- 1 file changed, 12 insertions(+), 21 deletions(-) diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi index 247d23872384..aca1b4831e38 100644 --- a/arch/arm/boot/dts/exynos54xx.dtsi +++ b/arch/arm/boot/dts/exynos54xx.dtsi @@ -67,27 +67,18 @@ mct: timer@101c0000 { compatible = "samsung,exynos4210-mct"; reg = <0x101c0000 0xb00>; - interrupt-parent = <&mct_map>; - interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>, - <8>, <9>, <10>, <11>; - - mct_map: mct-map { - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = <0 &combiner 23 3>, - <1 &combiner 23 4>, - <2 &combiner 25 2>, - <3 &combiner 25 3>, - <4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>, - <5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>, - <6 &gic 0 122 IRQ_TYPE_LEVEL_HIGH>, - <7 &gic 0 123 IRQ_TYPE_LEVEL_HIGH>, - <8 &gic 0 128 IRQ_TYPE_LEVEL_HIGH>, - <9 &gic 0 129 IRQ_TYPE_LEVEL_HIGH>, - <10 &gic 0 130 IRQ_TYPE_LEVEL_HIGH>, - <11 &gic 0 131 IRQ_TYPE_LEVEL_HIGH>; - }; + interrupts-extended = <&combiner 23 3>, + <&combiner 23 4>, + <&combiner 25 2>, + <&combiner 25 3>, + <&gic 0 120 IRQ_TYPE_LEVEL_HIGH>, + <&gic 0 121 IRQ_TYPE_LEVEL_HIGH>, + <&gic 0 122 IRQ_TYPE_LEVEL_HIGH>, + <&gic 0 123 IRQ_TYPE_LEVEL_HIGH>, + <&gic 0 128 IRQ_TYPE_LEVEL_HIGH>, + <&gic 0 129 IRQ_TYPE_LEVEL_HIGH>, + <&gic 0 130 IRQ_TYPE_LEVEL_HIGH>, + <&gic 0 131 IRQ_TYPE_LEVEL_HIGH>; }; watchdog: watchdog@101d0000 { From patchwork Mon Sep 23 16:14:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 11157273 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7A71B112B for ; Mon, 23 Sep 2019 16:14:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 591C421928 for ; Mon, 23 Sep 2019 16:14:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569255297; bh=qXqV0J88N2dypvGBO7A/lZfZUOS9/+hk7Rbjthl+2/U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=PPRz5kOTJ0JnZZOU7Sz+AIlA7xcYcARzZDd6gXCg/C697mIQVpf0I/IOLzFdlmkda 7j8IimSMM7Ce4bCrLwkGwiK09ZYgqNhsIR6RS4NLfJ2vDGlCqpbWCJenpkGsO0kKvQ qUqRFtfhrPKMSyIDbHs41E+b/ZW8QobT+pN4OYjo= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2437658AbfIWQO4 (ORCPT ); Mon, 23 Sep 2019 12:14:56 -0400 Received: from mail.kernel.org ([198.145.29.99]:59196 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2395236AbfIWQO4 (ORCPT ); Mon, 23 Sep 2019 12:14:56 -0400 Received: from localhost.localdomain (unknown [194.230.155.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 48A7F20B7C; Mon, 23 Sep 2019 16:14:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569255295; bh=qXqV0J88N2dypvGBO7A/lZfZUOS9/+hk7Rbjthl+2/U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HSgzdn01o5ejN576RO+vqEPDnxHhjrna19PWbCUd2zXNLjFC1QnsYCWkiYH8VT0rb 2Grlxp+4Rad0kYSiRLsC6HLh7IpYUr+SPtegbvff5omkvf5pTvDqJ+8d1QPyxCEPfP dRqokgYw+O0yLG7WzUkTjBcF8HpkwBNkHVAtI/4U= From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , Marek Szyprowski , Andrzej Hajda , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: Sylwester Nawrocki Subject: [PATCH v4 8/8] ARM: dts: exynos: Use defines for MCT interrupt GIC SPI/PPI specifier Date: Mon, 23 Sep 2019 18:14:11 +0200 Message-Id: <20190923161411.9236-8-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190923161411.9236-1-krzk@kernel.org> References: <20190923161411.9236-1-krzk@kernel.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Replace hard-coded number with appropriate define for GIC SPI or PPI specifier in interrupt. This makes code easier to read. No expected functionality change. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos4210.dtsi | 8 ++++---- arch/arm/boot/dts/exynos4412.dtsi | 4 ++-- arch/arm/boot/dts/exynos5250.dtsi | 4 ++-- arch/arm/boot/dts/exynos54xx.dtsi | 16 ++++++++-------- 4 files changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 5fa33d43821e..aac3b7a20a37 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -111,12 +111,12 @@ reg = <0x10050000 0x800>; clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; clock-names = "fin_pll", "mct"; - interrupts-extended = <&gic 0 57 IRQ_TYPE_LEVEL_HIGH>, - <&gic 0 69 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, <&combiner 12 6>, <&combiner 12 7>, - <&gic 0 42 IRQ_TYPE_LEVEL_HIGH>, - <&gic 0 48 IRQ_TYPE_LEVEL_HIGH>; + <&gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; }; watchdog: watchdog@10060000 { diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index 9b5fb4e54d7c..96a5ef3a2864 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -248,11 +248,11 @@ reg = <0x10050000 0x800>; clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; clock-names = "fin_pll", "mct"; - interrupts-extended = <&gic 0 57 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, <&combiner 12 5>, <&combiner 12 6>, <&combiner 12 7>, - <&gic 1 12 IRQ_TYPE_LEVEL_HIGH>; + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_HIGH>; }; watchdog: watchdog@10060000 { diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index a549eafd2c64..f01e3156191d 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -242,8 +242,8 @@ <&combiner 23 4>, <&combiner 25 2>, <&combiner 25 3>, - <&gic 0 120 IRQ_TYPE_LEVEL_HIGH>, - <&gic 0 121 IRQ_TYPE_LEVEL_HIGH>; + <&gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_0: pinctrl@11400000 { diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi index aca1b4831e38..06ae40a2f1e9 100644 --- a/arch/arm/boot/dts/exynos54xx.dtsi +++ b/arch/arm/boot/dts/exynos54xx.dtsi @@ -71,14 +71,14 @@ <&combiner 23 4>, <&combiner 25 2>, <&combiner 25 3>, - <&gic 0 120 IRQ_TYPE_LEVEL_HIGH>, - <&gic 0 121 IRQ_TYPE_LEVEL_HIGH>, - <&gic 0 122 IRQ_TYPE_LEVEL_HIGH>, - <&gic 0 123 IRQ_TYPE_LEVEL_HIGH>, - <&gic 0 128 IRQ_TYPE_LEVEL_HIGH>, - <&gic 0 129 IRQ_TYPE_LEVEL_HIGH>, - <&gic 0 130 IRQ_TYPE_LEVEL_HIGH>, - <&gic 0 131 IRQ_TYPE_LEVEL_HIGH>; + <&gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; }; watchdog: watchdog@101d0000 {