From patchwork Sun Sep 29 06:24:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xingyu Chen X-Patchwork-Id: 11165617 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D490F912 for ; Sun, 29 Sep 2019 06:24:48 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A130021882 for ; Sun, 29 Sep 2019 06:24:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="b2JIP5A4" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A130021882 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=amlogic.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=AEvpVIsHiNKdpvteEtytVbJEufx6rnFg5c95xZHo6ak=; b=b2JIP5A4/N7hFI ZqxnjkkwF7iFRTa8YLv6G7wv0s9X5ejPCy7h60tCaWYENfMLv85WDW50EA9gt46SFO6kQ0/2XFstE MKlrspOxJKUuQqyBaWd1SDh44+aniGZabeWQ/0ipOcMklF34QFXSiJdWp6kDI8be4vyaVwmr2xCRU m7HymbHXFm835j3Dj14DI5alyH/wCT0tNBSDImwRd6hrZb5ox1mRKmzcVkueBfXRsbfQJFXgxTC+N OJEI3t1yg+SpoPhbDOaOVu5BXwxe39nWIB3rL31OGHokeJJ/Rg4V3sIlQsvGOqvWd4U8V2ozT1cXy q3/t1KH6iTYvAMy/zdiw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.2 #3 (Red Hat Linux)) id 1iESdT-0006ZC-Qd; Sun, 29 Sep 2019 06:24:47 +0000 Received: from mail-sz.amlogic.com ([211.162.65.117]) by bombadil.infradead.org with esmtps (Exim 4.92.2 #3 (Red Hat Linux)) id 1iESd5-0006CX-2T; Sun, 29 Sep 2019 06:24:24 +0000 Received: from droid12-sz.software.amlogic (10.28.8.22) by mail-sz.amlogic.com (10.28.11.5) with Microsoft SMTP Server id 15.1.1591.10; Sun, 29 Sep 2019 14:24:19 +0800 From: Xingyu Chen To: Philipp Zabel , Kevin Hilman , Neil Armstrong Subject: [PATCH v3 1/3] arm64: dts: meson: add reset controller for Meson-A1 SoC Date: Sun, 29 Sep 2019 14:24:13 +0800 Message-ID: <1569738255-3941-2-git-send-email-xingyu.chen@amlogic.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1569738255-3941-1-git-send-email-xingyu.chen@amlogic.com> References: <1569738255-3941-1-git-send-email-xingyu.chen@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.28.8.22] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190928_232423_115792_12747A9E X-CRM114-Status: UNSURE ( 7.05 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Hanjie Lin , Jianxin Pan , linux-kernel@vger.kernel.org, Rob Herring , linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, Xingyu Chen , Jerome Brunet Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add the reset controller device of Meson-A1 SoC family Signed-off-by: Xingyu Chen Reviewed-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi index 7210ad0..1c588ab 100644 --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi @@ -74,6 +74,12 @@ #size-cells = <2>; ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x1000000>; + reset: reset-controller@0 { + compatible = "amlogic,meson-a1-reset"; + reg = <0x0 0x0 0x0 0x8c>; + #reset-cells = <1>; + }; + uart_AO: serial@1c00 { compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; From patchwork Sun Sep 29 06:24:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xingyu Chen X-Patchwork-Id: 11165619 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D4BB0912 for ; Sun, 29 Sep 2019 06:25:00 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9863A20863 for ; Sun, 29 Sep 2019 06:25:00 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="a1s0hkGY" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9863A20863 Authentication-Results: mail.kernel.org; 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Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.2 #3 (Red Hat Linux)) id 1iESdf-0006mU-PS; Sun, 29 Sep 2019 06:24:59 +0000 Received: from mail-sz.amlogic.com ([211.162.65.117]) by bombadil.infradead.org with esmtps (Exim 4.92.2 #3 (Red Hat Linux)) id 1iESd6-0006CX-KJ; Sun, 29 Sep 2019 06:24:26 +0000 Received: from droid12-sz.software.amlogic (10.28.8.22) by mail-sz.amlogic.com (10.28.11.5) with Microsoft SMTP Server id 15.1.1591.10; Sun, 29 Sep 2019 14:24:19 +0800 From: Xingyu Chen To: Philipp Zabel , Kevin Hilman , Neil Armstrong Subject: [PATCH v3 2/3] dt-bindings: reset: add bindings for the Meson-A1 SoC Reset Controller Date: Sun, 29 Sep 2019 14:24:14 +0800 Message-ID: <1569738255-3941-3-git-send-email-xingyu.chen@amlogic.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1569738255-3941-1-git-send-email-xingyu.chen@amlogic.com> References: <1569738255-3941-1-git-send-email-xingyu.chen@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.28.8.22] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190928_232424_705913_D39949CB X-CRM114-Status: GOOD ( 10.49 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Hanjie Lin , Jianxin Pan , linux-kernel@vger.kernel.org, Rob Herring , linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, Xingyu Chen , Jerome Brunet Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add DT bindings for the Meson-A1 SoC Reset Controller include file, and also slightly update documentation. Signed-off-by: Xingyu Chen Reviewed-by: Rob Herring --- .../bindings/reset/amlogic,meson-reset.yaml | 1 + include/dt-bindings/reset/amlogic,meson-a1-reset.h | 74 ++++++++++++++++++++++ 2 files changed, 75 insertions(+) create mode 100644 include/dt-bindings/reset/amlogic,meson-a1-reset.h diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml index 00917d8..b3f57d8 100644 --- a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml +++ b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml @@ -16,6 +16,7 @@ properties: - amlogic,meson8b-reset # Reset Controller on Meson8b and compatible SoCs - amlogic,meson-gxbb-reset # Reset Controller on GXBB and compatible SoCs - amlogic,meson-axg-reset # Reset Controller on AXG and compatible SoCs + - amlogic,meson-a1-reset # Reset Controller on A1 and compatible SoCs reg: maxItems: 1 diff --git a/include/dt-bindings/reset/amlogic,meson-a1-reset.h b/include/dt-bindings/reset/amlogic,meson-a1-reset.h new file mode 100644 index 00000000..f1a3a79 --- /dev/null +++ b/include/dt-bindings/reset/amlogic,meson-a1-reset.h @@ -0,0 +1,74 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) + * + * Copyright (c) 2019 Amlogic, Inc. All rights reserved. + * Author: Xingyu Chen + * + */ + +#ifndef _DT_BINDINGS_AMLOGIC_MESON_A1_RESET_H +#define _DT_BINDINGS_AMLOGIC_MESON_A1_RESET_H + +/* RESET0 */ +/* 0 */ +#define RESET_AM2AXI_VAD 1 +/* 2-3 */ +#define RESET_PSRAM 4 +#define RESET_PAD_CTRL 5 +/* 6 */ +#define RESET_TEMP_SENSOR 7 +#define RESET_AM2AXI_DEV 8 +/* 9 */ +#define RESET_SPICC_A 10 +#define RESET_MSR_CLK 11 +#define RESET_AUDIO 12 +#define RESET_ANALOG_CTRL 13 +#define RESET_SAR_ADC 14 +#define RESET_AUDIO_VAD 15 +#define RESET_CEC 16 +#define RESET_PWM_EF 17 +#define RESET_PWM_CD 18 +#define RESET_PWM_AB 19 +/* 20 */ +#define RESET_IR_CTRL 21 +#define RESET_I2C_S_A 22 +/* 23 */ +#define RESET_I2C_M_D 24 +#define RESET_I2C_M_C 25 +#define RESET_I2C_M_B 26 +#define RESET_I2C_M_A 27 +#define RESET_I2C_PROD_AHB 28 +#define RESET_I2C_PROD 29 +/* 30-31 */ + +/* RESET1 */ +#define RESET_ACODEC 32 +#define RESET_DMA 33 +#define RESET_SD_EMMC_A 34 +/* 35 */ +#define RESET_USBCTRL 36 +/* 37 */ +#define RESET_USBPHY 38 +/* 39-41 */ +#define RESET_RSA 42 +#define RESET_DMC 43 +/* 44 */ +#define RESET_IRQ_CTRL 45 +/* 46 */ +#define RESET_NIC_VAD 47 +#define RESET_NIC_AXI 48 +#define RESET_RAMA 49 +#define RESET_RAMB 50 +/* 51-52 */ +#define RESET_ROM 53 +#define RESET_SPIFC 54 +#define RESET_GIC 55 +#define RESET_UART_C 56 +#define RESET_UART_B 57 +#define RESET_UART_A 58 +#define RESET_OSC_RING 59 +/* 60-63 */ + +/* RESET2 */ +/* 64-95 */ + +#endif From patchwork Sun Sep 29 06:24:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xingyu Chen X-Patchwork-Id: 11165623 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8BB0413BD for ; Sun, 29 Sep 2019 06:25:28 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6A0BB20863 for ; Sun, 29 Sep 2019 06:25:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="lZlxTEj/" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6A0BB20863 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=amlogic.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; 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Sun, 29 Sep 2019 06:24:27 +0000 Received: from droid12-sz.software.amlogic (10.28.8.22) by mail-sz.amlogic.com (10.28.11.5) with Microsoft SMTP Server id 15.1.1591.10; Sun, 29 Sep 2019 14:24:20 +0800 From: Xingyu Chen To: Philipp Zabel , Kevin Hilman , Neil Armstrong Subject: [PATCH v3 3/3] reset: add support for the Meson-A1 SoC Reset Controller Date: Sun, 29 Sep 2019 14:24:15 +0800 Message-ID: <1569738255-3941-4-git-send-email-xingyu.chen@amlogic.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1569738255-3941-1-git-send-email-xingyu.chen@amlogic.com> References: <1569738255-3941-1-git-send-email-xingyu.chen@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.28.8.22] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190928_232426_510967_55EB357F X-CRM114-Status: GOOD ( 11.14 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Hanjie Lin , Jianxin Pan , linux-kernel@vger.kernel.org, Rob Herring , linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, Xingyu Chen , Jerome Brunet Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The number of RESET registers and offset of RESET_LEVEL register for Meson-A1 are different from previous SoCs, In order to describe these differences, we introduce the struct meson_reset_param. Reviewed-by: Kevin Hilman Reviewed-by: Neil Armstrong Signed-off-by: Xingyu Chen --- drivers/reset/reset-meson.c | 35 ++++++++++++++++++++++++++++------- 1 file changed, 28 insertions(+), 7 deletions(-) diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c index 7d05d76..94d7ba8 100644 --- a/drivers/reset/reset-meson.c +++ b/drivers/reset/reset-meson.c @@ -15,12 +15,16 @@ #include #include -#define REG_COUNT 8 #define BITS_PER_REG 32 -#define LEVEL_OFFSET 0x7c + +struct meson_reset_param { + int reg_count; + int level_offset; +}; struct meson_reset { void __iomem *reg_base; + const struct meson_reset_param *param; struct reset_controller_dev rcdev; spinlock_t lock; }; @@ -46,10 +50,12 @@ static int meson_reset_level(struct reset_controller_dev *rcdev, container_of(rcdev, struct meson_reset, rcdev); unsigned int bank = id / BITS_PER_REG; unsigned int offset = id % BITS_PER_REG; - void __iomem *reg_addr = data->reg_base + LEVEL_OFFSET + (bank << 2); + void __iomem *reg_addr; unsigned long flags; u32 reg; + reg_addr = data->reg_base + data->param->level_offset + (bank << 2); + spin_lock_irqsave(&data->lock, flags); reg = readl(reg_addr); @@ -81,10 +87,21 @@ static const struct reset_control_ops meson_reset_ops = { .deassert = meson_reset_deassert, }; +static const struct meson_reset_param meson8b_param = { + .reg_count = 8, + .level_offset = 0x7c, +}; + +static const struct meson_reset_param meson_a1_param = { + .reg_count = 3, + .level_offset = 0x40, +}; + static const struct of_device_id meson_reset_dt_ids[] = { - { .compatible = "amlogic,meson8b-reset" }, - { .compatible = "amlogic,meson-gxbb-reset" }, - { .compatible = "amlogic,meson-axg-reset" }, + { .compatible = "amlogic,meson8b-reset", .data = &meson8b_param}, + { .compatible = "amlogic,meson-gxbb-reset", .data = &meson8b_param}, + { .compatible = "amlogic,meson-axg-reset", .data = &meson8b_param}, + { .compatible = "amlogic,meson-a1-reset", .data = &meson_a1_param}, { /* sentinel */ }, }; @@ -102,12 +119,16 @@ static int meson_reset_probe(struct platform_device *pdev) if (IS_ERR(data->reg_base)) return PTR_ERR(data->reg_base); + data->param = of_device_get_match_data(&pdev->dev); + if (!data->param) + return -ENODEV; + platform_set_drvdata(pdev, data); spin_lock_init(&data->lock); data->rcdev.owner = THIS_MODULE; - data->rcdev.nr_resets = REG_COUNT * BITS_PER_REG; + data->rcdev.nr_resets = data->param->reg_count * BITS_PER_REG; data->rcdev.ops = &meson_reset_ops; data->rcdev.of_node = pdev->dev.of_node;