From patchwork Mon Sep 30 08:18:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 11166157 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D5EF516C1 for ; Mon, 30 Sep 2019 08:19:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BE6F52196E for ; Mon, 30 Sep 2019 08:19:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729833AbfI3ITO (ORCPT ); Mon, 30 Sep 2019 04:19:14 -0400 Received: from relmlor2.renesas.com ([210.160.252.172]:28812 "EHLO relmlie6.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1729232AbfI3ITO (ORCPT ); Mon, 30 Sep 2019 04:19:14 -0400 X-IronPort-AV: E=Sophos;i="5.64,565,1559487600"; d="scan'208";a="27675616" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 30 Sep 2019 17:19:11 +0900 Received: from be1yocto.ree.adwin.renesas.com (unknown [172.29.43.62]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id A2337400A10D; Mon, 30 Sep 2019 17:19:09 +0900 (JST) From: Biju Das To: Rob Herring , Mark Rutland Cc: Biju Das , Simon Horman , Geert Uytterhoeven , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Chris Paterson , Fabrizio Castro Subject: [PATCH v2 1/5] arm64: dts: renesas: r8a774b1: Add SYS-DMAC device nodes Date: Mon, 30 Sep 2019 09:18:43 +0100 Message-Id: <1569831527-1250-2-git-send-email-biju.das@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1569831527-1250-1-git-send-email-biju.das@bp.renesas.com> References: <1569831527-1250-1-git-send-email-biju.das@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Add sys-dmac[0-2] device nodes for RZ/G2N (R8A774B1) SoC. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven --- V1-->V2 * Fixed the conflict with latest devel branch. --- arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 102 ++++++++++++++++++++++++++++++ 1 file changed, 102 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi index fc7aec6..ac3c411 100644 --- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi @@ -252,6 +252,108 @@ /* placeholder */ }; + dmac0: dma-controller@e6700000 { + compatible = "renesas,dmac-r8a774b1", + "renesas,rcar-dmac"; + reg = <0 0xe6700000 0 0x10000>; + interrupts = ; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&cpg CPG_MOD 219>; + clock-names = "fck"; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 219>; + #dma-cells = <1>; + dma-channels = <16>; + }; + + dmac1: dma-controller@e7300000 { + compatible = "renesas,dmac-r8a774b1", + "renesas,rcar-dmac"; + reg = <0 0xe7300000 0 0x10000>; + interrupts = ; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&cpg CPG_MOD 218>; + clock-names = "fck"; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 218>; + #dma-cells = <1>; + dma-channels = <16>; + }; + + dmac2: dma-controller@e7310000 { + compatible = "renesas,dmac-r8a774b1", + "renesas,rcar-dmac"; + reg = <0 0xe7310000 0 0x10000>; + interrupts = ; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&cpg CPG_MOD 217>; + clock-names = "fck"; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 217>; + #dma-cells = <1>; + dma-channels = <16>; + }; + avb: ethernet@e6800000 { reg = <0 0xe6800000 0 0x800>; /* placeholder */ From patchwork Mon Sep 30 08:18:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 11166159 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0001316C1 for ; Mon, 30 Sep 2019 08:19:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D2539218DE for ; Mon, 30 Sep 2019 08:19:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729966AbfI3ITQ (ORCPT ); Mon, 30 Sep 2019 04:19:16 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:11364 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1729232AbfI3ITQ (ORCPT ); Mon, 30 Sep 2019 04:19:16 -0400 X-IronPort-AV: E=Sophos;i="5.64,565,1559487600"; d="scan'208";a="27894423" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 30 Sep 2019 17:19:14 +0900 Received: from be1yocto.ree.adwin.renesas.com (unknown [172.29.43.62]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 5440A400A10D; Mon, 30 Sep 2019 17:19:12 +0900 (JST) From: Biju Das To: Rob Herring , Mark Rutland Cc: Biju Das , Simon Horman , Geert Uytterhoeven , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Chris Paterson , Fabrizio Castro Subject: [PATCH v2 2/5] arm64: dts: renesas: r8a774b1: Add SCIF and HSCIF nodes Date: Mon, 30 Sep 2019 09:18:44 +0100 Message-Id: <1569831527-1250-3-git-send-email-biju.das@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1569831527-1250-1-git-send-email-biju.das@bp.renesas.com> References: <1569831527-1250-1-git-send-email-biju.das@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Add the device nodes for RZ/G2N SCIF and HSCIF serial ports, including clocks, power domains and DMAs. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven --- V1-->V2 * No change --- arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 173 +++++++++++++++++++++++++++++- 1 file changed, 171 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi index ac3c411..e6c8cca 100644 --- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi @@ -237,8 +237,91 @@ }; hscif0: serial@e6540000 { + compatible = "renesas,hscif-r8a774b1", + "renesas,rcar-gen3-hscif", + "renesas,hscif"; reg = <0 0xe6540000 0 0x60>; - /* placeholder */ + interrupts = ; + clocks = <&cpg CPG_MOD 520>, + <&cpg CPG_CORE R8A774B1_CLK_S3D1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x31>, <&dmac1 0x30>, + <&dmac2 0x31>, <&dmac2 0x30>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 520>; + status = "disabled"; + }; + + hscif1: serial@e6550000 { + compatible = "renesas,hscif-r8a774b1", + "renesas,rcar-gen3-hscif", + "renesas,hscif"; + reg = <0 0xe6550000 0 0x60>; + interrupts = ; + clocks = <&cpg CPG_MOD 519>, + <&cpg CPG_CORE R8A774B1_CLK_S3D1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x33>, <&dmac1 0x32>, + <&dmac2 0x33>, <&dmac2 0x32>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 519>; + status = "disabled"; + }; + + hscif2: serial@e6560000 { + compatible = "renesas,hscif-r8a774b1", + "renesas,rcar-gen3-hscif", + "renesas,hscif"; + reg = <0 0xe6560000 0 0x60>; + interrupts = ; + clocks = <&cpg CPG_MOD 518>, + <&cpg CPG_CORE R8A774B1_CLK_S3D1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x35>, <&dmac1 0x34>, + <&dmac2 0x35>, <&dmac2 0x34>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 518>; + status = "disabled"; + }; + + hscif3: serial@e66a0000 { + compatible = "renesas,hscif-r8a774b1", + "renesas,rcar-gen3-hscif", + "renesas,hscif"; + reg = <0 0xe66a0000 0 0x60>; + interrupts = ; + clocks = <&cpg CPG_MOD 517>, + <&cpg CPG_CORE R8A774B1_CLK_S3D1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x37>, <&dmac0 0x36>; + dma-names = "tx", "rx"; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 517>; + status = "disabled"; + }; + + hscif4: serial@e66b0000 { + compatible = "renesas,hscif-r8a774b1", + "renesas,rcar-gen3-hscif", + "renesas,hscif"; + reg = <0 0xe66b0000 0 0x60>; + interrupts = ; + clocks = <&cpg CPG_MOD 516>, + <&cpg CPG_CORE R8A774B1_CLK_S3D1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x39>, <&dmac0 0x38>; + dma-names = "tx", "rx"; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 516>; + status = "disabled"; }; hsusb: usb@e6590000 { @@ -374,20 +457,106 @@ /* placeholder */ }; + scif0: serial@e6e60000 { + compatible = "renesas,scif-r8a774b1", + "renesas,rcar-gen3-scif", "renesas,scif"; + reg = <0 0xe6e60000 0 0x40>; + interrupts = ; + clocks = <&cpg CPG_MOD 207>, + <&cpg CPG_CORE R8A774B1_CLK_S3D1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x51>, <&dmac1 0x50>, + <&dmac2 0x51>, <&dmac2 0x50>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 207>; + status = "disabled"; + }; + + scif1: serial@e6e68000 { + compatible = "renesas,scif-r8a774b1", + "renesas,rcar-gen3-scif", "renesas,scif"; + reg = <0 0xe6e68000 0 0x40>; + interrupts = ; + clocks = <&cpg CPG_MOD 206>, + <&cpg CPG_CORE R8A774B1_CLK_S3D1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x53>, <&dmac1 0x52>, + <&dmac2 0x53>, <&dmac2 0x52>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 206>; + status = "disabled"; + }; + scif2: serial@e6e88000 { compatible = "renesas,scif-r8a774b1", "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e88000 0 64>; + reg = <0 0xe6e88000 0 0x40>; interrupts = ; clocks = <&cpg CPG_MOD 310>, <&cpg CPG_CORE R8A774B1_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x13>, <&dmac1 0x12>, + <&dmac2 0x13>, <&dmac2 0x12>; + dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; resets = <&cpg 310>; status = "disabled"; }; + scif3: serial@e6c50000 { + compatible = "renesas,scif-r8a774b1", + "renesas,rcar-gen3-scif", "renesas,scif"; + reg = <0 0xe6c50000 0 0x40>; + interrupts = ; + clocks = <&cpg CPG_MOD 204>, + <&cpg CPG_CORE R8A774B1_CLK_S3D1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x57>, <&dmac0 0x56>; + dma-names = "tx", "rx"; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 204>; + status = "disabled"; + }; + + scif4: serial@e6c40000 { + compatible = "renesas,scif-r8a774b1", + "renesas,rcar-gen3-scif", "renesas,scif"; + reg = <0 0xe6c40000 0 0x40>; + interrupts = ; + clocks = <&cpg CPG_MOD 203>, + <&cpg CPG_CORE R8A774B1_CLK_S3D1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x59>, <&dmac0 0x58>; + dma-names = "tx", "rx"; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 203>; + status = "disabled"; + }; + + scif5: serial@e6f30000 { + compatible = "renesas,scif-r8a774b1", + "renesas,rcar-gen3-scif", "renesas,scif"; + reg = <0 0xe6f30000 0 0x40>; + interrupts = ; + clocks = <&cpg CPG_MOD 202>, + <&cpg CPG_CORE R8A774B1_CLK_S3D1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, + <&dmac2 0x5b>, <&dmac2 0x5a>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 202>; + status = "disabled"; + }; + rcar_sound: sound@ec500000 { reg = <0 0xec500000 0 0x1000>, /* SCU */ <0 0xec5a0000 0 0x100>, /* ADG */ From patchwork Mon Sep 30 08:18:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 11166161 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6040F13B1 for ; Mon, 30 Sep 2019 08:19:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 488D2206BB for ; Mon, 30 Sep 2019 08:19:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729973AbfI3ITT (ORCPT ); Mon, 30 Sep 2019 04:19:19 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:11364 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1729232AbfI3ITS (ORCPT ); Mon, 30 Sep 2019 04:19:18 -0400 X-IronPort-AV: E=Sophos;i="5.64,565,1559487600"; d="scan'208";a="27894432" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 30 Sep 2019 17:19:17 +0900 Received: from be1yocto.ree.adwin.renesas.com (unknown [172.29.43.62]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 05BD2400A11F; Mon, 30 Sep 2019 17:19:14 +0900 (JST) From: Biju Das To: Rob Herring , Mark Rutland Cc: Biju Das , Simon Horman , Geert Uytterhoeven , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Chris Paterson , Fabrizio Castro Subject: [PATCH v2 3/5] arm64: dts: renesas: r8a774b1: Add GPIO device nodes Date: Mon, 30 Sep 2019 09:18:45 +0100 Message-Id: <1569831527-1250-4-git-send-email-biju.das@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1569831527-1250-1-git-send-email-biju.das@bp.renesas.com> References: <1569831527-1250-1-git-send-email-biju.das@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Add GPIO device nodes to the DT of the r8a774b1 SoC. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven --- V1-->V2 * No change --- arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 64 +++++++++++++++++++++++++++---- 1 file changed, 56 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi index e6c8cca..641af27 100644 --- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi @@ -132,75 +132,123 @@ }; gpio0: gpio@e6050000 { + compatible = "renesas,gpio-r8a774b1", + "renesas,rcar-gen3-gpio"; reg = <0 0xe6050000 0 0x50>; + interrupts = ; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 0 16>; #interrupt-cells = <2>; interrupt-controller; - /* placeholder */ + clocks = <&cpg CPG_MOD 912>; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 912>; }; gpio1: gpio@e6051000 { + compatible = "renesas,gpio-r8a774b1", + "renesas,rcar-gen3-gpio"; reg = <0 0xe6051000 0 0x50>; + interrupts = ; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 32 29>; #interrupt-cells = <2>; interrupt-controller; - /* placeholder */ + clocks = <&cpg CPG_MOD 911>; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 911>; }; gpio2: gpio@e6052000 { + compatible = "renesas,gpio-r8a774b1", + "renesas,rcar-gen3-gpio"; reg = <0 0xe6052000 0 0x50>; + interrupts = ; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 64 15>; #interrupt-cells = <2>; interrupt-controller; - /* placeholder */ + clocks = <&cpg CPG_MOD 910>; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 910>; }; gpio3: gpio@e6053000 { + compatible = "renesas,gpio-r8a774b1", + "renesas,rcar-gen3-gpio"; reg = <0 0xe6053000 0 0x50>; + interrupts = ; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 96 16>; #interrupt-cells = <2>; interrupt-controller; - /* placeholder */ + clocks = <&cpg CPG_MOD 909>; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 909>; }; gpio4: gpio@e6054000 { + compatible = "renesas,gpio-r8a774b1", + "renesas,rcar-gen3-gpio"; reg = <0 0xe6054000 0 0x50>; + interrupts = ; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 128 18>; #interrupt-cells = <2>; interrupt-controller; - /* placeholder */ + clocks = <&cpg CPG_MOD 908>; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 908>; }; gpio5: gpio@e6055000 { + compatible = "renesas,gpio-r8a774b1", + "renesas,rcar-gen3-gpio"; reg = <0 0xe6055000 0 0x50>; + interrupts = ; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 160 26>; #interrupt-cells = <2>; interrupt-controller; - /* placeholder */ + clocks = <&cpg CPG_MOD 907>; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 907>; }; gpio6: gpio@e6055400 { + compatible = "renesas,gpio-r8a774b1", + "renesas,rcar-gen3-gpio"; reg = <0 0xe6055400 0 0x50>; + interrupts = ; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 192 32>; #interrupt-cells = <2>; interrupt-controller; - /* placeholder */ + clocks = <&cpg CPG_MOD 906>; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 906>; }; gpio7: gpio@e6055800 { + compatible = "renesas,gpio-r8a774b1", + "renesas,rcar-gen3-gpio"; reg = <0 0xe6055800 0 0x50>; + interrupts = ; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 224 4>; #interrupt-cells = <2>; interrupt-controller; - /* placeholder */ + clocks = <&cpg CPG_MOD 905>; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 905>; }; pfc: pin-controller@e6060000 { From patchwork Mon Sep 30 08:18:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 11166163 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F265616C1 for ; Mon, 30 Sep 2019 08:19:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DB9E5206BB for ; Mon, 30 Sep 2019 08:19:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729232AbfI3ITV (ORCPT ); Mon, 30 Sep 2019 04:19:21 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:11364 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1729981AbfI3ITV (ORCPT ); Mon, 30 Sep 2019 04:19:21 -0400 X-IronPort-AV: E=Sophos;i="5.64,565,1559487600"; d="scan'208";a="27894439" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 30 Sep 2019 17:19:19 +0900 Received: from be1yocto.ree.adwin.renesas.com (unknown [172.29.43.62]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id AB304400A10D; Mon, 30 Sep 2019 17:19:17 +0900 (JST) From: Biju Das To: Rob Herring , Mark Rutland Cc: Biju Das , Simon Horman , Geert Uytterhoeven , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Chris Paterson , Fabrizio Castro Subject: [PATCH v2 4/5] arm64: dts: renesas: r8a774b1: Add Ethernet AVB node Date: Mon, 30 Sep 2019 09:18:46 +0100 Message-Id: <1569831527-1250-5-git-send-email-biju.das@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1569831527-1250-1-git-send-email-biju.das@bp.renesas.com> References: <1569831527-1250-1-git-send-email-biju.das@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org This patch adds the SoC specific part of the Ethernet AVB device tree node. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven --- V1-->V2 * Fixed the conflict with latest devel branch. --- arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 42 ++++++++++++++++++++++++++++++- 1 file changed, 41 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi index 641af27..f42f646 100644 --- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi @@ -486,8 +486,48 @@ }; avb: ethernet@e6800000 { + compatible = "renesas,etheravb-r8a774b1", + "renesas,etheravb-rcar-gen3"; reg = <0 0xe6800000 0 0x800>; - /* placeholder */ + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15", + "ch16", "ch17", "ch18", "ch19", + "ch20", "ch21", "ch22", "ch23", + "ch24"; + clocks = <&cpg CPG_MOD 812>; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 812>; + phy-mode = "rgmii"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; }; can0: can@e6c30000 { From patchwork Mon Sep 30 08:18:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 11166165 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BC5DB16C1 for ; Mon, 30 Sep 2019 08:19:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A49AE218DE for ; Mon, 30 Sep 2019 08:19:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729854AbfI3ITY (ORCPT ); Mon, 30 Sep 2019 04:19:24 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:11364 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1729981AbfI3ITY (ORCPT ); Mon, 30 Sep 2019 04:19:24 -0400 X-IronPort-AV: E=Sophos;i="5.64,565,1559487600"; d="scan'208";a="27894452" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 30 Sep 2019 17:19:22 +0900 Received: from be1yocto.ree.adwin.renesas.com (unknown [172.29.43.62]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 61A3E400A880; Mon, 30 Sep 2019 17:19:20 +0900 (JST) From: Biju Das To: Rob Herring , Mark Rutland Cc: Biju Das , Simon Horman , Geert Uytterhoeven , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Chris Paterson , Fabrizio Castro Subject: [PATCH v2 5/5] arm64: dts: renesas: Add HiHope RZ/G2N sub board support Date: Mon, 30 Sep 2019 09:18:47 +0100 Message-Id: <1569831527-1250-6-git-send-email-biju.das@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1569831527-1250-1-git-send-email-biju.das@bp.renesas.com> References: <1569831527-1250-1-git-send-email-biju.das@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org The HiHope RZ/G2N sub board sits below the HiHope RZ/G2N main board. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven --- V1-->V2 * No change --- arch/arm64/boot/dts/renesas/Makefile | 1 + arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-ex.dts | 15 +++++++++++++++ 2 files changed, 16 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-ex.dts diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile index 3a6a0fb..72234e1 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m.dtb dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-ex.dtb dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n.dtb +dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-ex.dtb dtb-$(CONFIG_ARCH_R8A774C0) += r8a774c0-cat874.dtb r8a774c0-ek874.dtb dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-kf.dtb diff --git a/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-ex.dts b/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-ex.dts new file mode 100644 index 0000000..ab47c0b --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-ex.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the HiHope RZ/G2N sub board + * + * Copyright (C) 2019 Renesas Electronics Corp. + */ + +#include "r8a774b1-hihope-rzg2n.dts" +#include "hihope-rzg2-ex.dtsi" + +/ { + model = "HopeRun HiHope RZ/G2N with sub board"; + compatible = "hoperun,hihope-rzg2-ex", "hoperun,hihope-rzg2n", + "renesas,r8a774b1"; +};