From patchwork Tue Oct 1 09:01:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11168285 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D98F215AB for ; Tue, 1 Oct 2019 09:02:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B850821920 for ; Tue, 1 Oct 2019 09:02:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="M0h6gfuI" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729864AbfJAJCQ (ORCPT ); Tue, 1 Oct 2019 05:02:16 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:34338 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729787AbfJAJCQ (ORCPT ); Tue, 1 Oct 2019 05:02:16 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9192DTV062246; Tue, 1 Oct 2019 04:02:13 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1569920534; bh=1LIrEVB/cTTEe3Y4N3QDV4IeJar+cAiaCmpmr/BpVyo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=M0h6gfuInet0nNxPDCo5zklZZrBpA8j4Dke47zXYfUmfU7mbzky2QEF4Bhjd+e99U DwqTpiPRGGBIUVBRzI22YRPB/WJ0ZWWI6W1FMs/syHJRkysaoD8IgHFSmQWIPzc2LW Y0opig6I0YSs0eOkG3sMl4IAjxkWEZI1d+5gnPx0= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9192DQa073793 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 1 Oct 2019 04:02:13 -0500 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Tue, 1 Oct 2019 04:02:03 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Tue, 1 Oct 2019 04:02:03 -0500 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x919290J032920; Tue, 1 Oct 2019 04:02:11 -0500 From: Tero Kristo To: , , CC: Subject: [PATCH 1/4] clk: debug: add support for setting clk_rate from debugfs Date: Tue, 1 Oct 2019 12:01:59 +0300 Message-ID: <20191001090202.26346-2-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001090202.26346-1-t-kristo@ti.com> References: <20191001090202.26346-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Debugfs entries for clock drivers don't allow writing to the nodes by default. Add support for writing to clk_rate nodes via debugfs, this basically adds a nice debugging capability for testing clk_set_rate functionality directly from userspace. As this can be considered dangerous, add a separate Kconfig entry for enabling this feature, and make it default as not enabled. Signed-off-by: Tero Kristo --- drivers/clk/Kconfig | 9 +++++++++ drivers/clk/clk.c | 27 +++++++++++++++++++++++++++ 2 files changed, 36 insertions(+) diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 801fa1cd0321..4815ed5248c5 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -23,6 +23,15 @@ config COMMON_CLK menu "Common Clock Framework" depends on COMMON_CLK +config COMMON_CLK_DEBUGFS_WRITE_ACCESS + bool "Clock debugfs write access enable" + depends on DEBUG_FS + default n + ---help--- + Enables write access to debugfs entries. This is very useful + for debugging purposes but can be dangerous, thus the default + setting is n. + config COMMON_CLK_WM831X tristate "Clock driver for WM831x/2x PMICs" depends on MFD_WM831X diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index ca99e9db6575..b0e82193a63d 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -3093,6 +3093,28 @@ static int clk_duty_cycle_show(struct seq_file *s, void *data) } DEFINE_SHOW_ATTRIBUTE(clk_duty_cycle); +#ifdef CONFIG_COMMON_CLK_DEBUGFS_WRITE_ACCESS +static int clk_dbg_rate_get(void *data, u64 *val) +{ + struct clk_core *core = data; + + *val = core->rate; + + return 0; +} + +static int clk_dbg_rate_set(void *data, u64 val) +{ + struct clk_core *core = data; + + clk_core_set_rate_nolock(core, val); + + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(clk_dbg_option_rate, clk_dbg_rate_get, clk_dbg_rate_set, "%llu\n"); +#endif + static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry) { struct dentry *root; @@ -3103,7 +3125,12 @@ static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry) root = debugfs_create_dir(core->name, pdentry); core->dentry = root; +#ifdef CONFIG_COMMON_CLK_DEBUGFS_WRITE_ACCESS + debugfs_create_file("clk_rate", 0644, root, core, + &clk_dbg_option_rate); +#else debugfs_create_ulong("clk_rate", 0444, root, &core->rate); +#endif debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy); debugfs_create_u32("clk_phase", 0444, root, &core->phase); debugfs_create_file("clk_flags", 0444, root, core, &clk_flags_fops); From patchwork Tue Oct 1 09:02:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11168287 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6747B13B1 for ; Tue, 1 Oct 2019 09:02:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4592D21920 for ; Tue, 1 Oct 2019 09:02:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="ZzPGefN4" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729787AbfJAJCR (ORCPT ); Tue, 1 Oct 2019 05:02:17 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:41696 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733127AbfJAJCQ (ORCPT ); Tue, 1 Oct 2019 05:02:16 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9192F4k053846; Tue, 1 Oct 2019 04:02:15 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1569920535; bh=OSpD6Z2wdlHG3EnRLjFKGmXz6KYhmI40Pfo2js+5Ad0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ZzPGefN4g73n156KLZrsHxNfNl1g1xoKjQup36SXryg6xzdB6tilP9WQzVvhzttS0 j33JiXGZYqKSoi6yPKDkdT9WY4WHG22J0E4Wq4DB9t4Mt9/iDL2YIO8VAxHoTGn4zY t+9LARuPFlCr3lgNzIyzAjr9Dtp8ONLgOU4N7UPs= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9192Foc122212 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 1 Oct 2019 04:02:15 -0500 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Tue, 1 Oct 2019 04:02:04 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Tue, 1 Oct 2019 04:02:04 -0500 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x919290K032920; Tue, 1 Oct 2019 04:02:13 -0500 From: Tero Kristo To: , , CC: Subject: [PATCH 2/4] clk: debug: add support for enable/disable/prep/un-prep from debugfs Date: Tue, 1 Oct 2019 12:02:00 +0300 Message-ID: <20191001090202.26346-3-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001090202.26346-1-t-kristo@ti.com> References: <20191001090202.26346-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The enable/prepare count variables can now be used to enable/disable/ prepare and un-prepare specific clocks. This is very useful for debugging purposes, but can be considered dangerous. Thus, it is protected by the same Kconfig option as the clk_rate modification option. Signed-off-by: Tero Kristo --- drivers/clk/clk.c | 59 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index b0e82193a63d..e0ceecf727c5 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -3113,6 +3113,58 @@ static int clk_dbg_rate_set(void *data, u64 val) } DEFINE_SIMPLE_ATTRIBUTE(clk_dbg_option_rate, clk_dbg_rate_get, clk_dbg_rate_set, "%llu\n"); + +static int clk_dbg_prepare_get(void *data, u64 *val) +{ + struct clk_core *core = data; + + *val = core->prepare_count; + + return 0; +} + +static int clk_dbg_prepare_set(void *data, u64 val) +{ + struct clk_core *core = data; + + if (val == 1) + return clk_core_prepare(core); + + if (val == -1) { + clk_core_unprepare(core); + return 0; + } + + pr_err("1: prepare, -1: unprepare\n"); + return -EINVAL; +} +DEFINE_SIMPLE_ATTRIBUTE(clk_dbg_option_prepare, clk_dbg_prepare_get, clk_dbg_prepare_set, "%llu\n"); + +static int clk_dbg_enable_get(void *data, u64 *val) +{ + struct clk_core *core = data; + + *val = core->enable_count; + + return 0; +} + +static int clk_dbg_enable_set(void *data, u64 val) +{ + struct clk_core *core = data; + + if (val == 1) + return clk_core_enable(core); + + if (val == -1) { + clk_core_disable(core); + return 0; + } + + pr_err("1: enable, -1: disable\n"); + return -EINVAL; +} +DEFINE_SIMPLE_ATTRIBUTE(clk_dbg_option_enable, clk_dbg_enable_get, clk_dbg_enable_set, "%llu\n"); #endif static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry) @@ -3134,8 +3186,15 @@ static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry) debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy); debugfs_create_u32("clk_phase", 0444, root, &core->phase); debugfs_create_file("clk_flags", 0444, root, core, &clk_flags_fops); +#ifdef CONFIG_COMMON_CLK_DEBUGFS_WRITE_ACCESS + debugfs_create_file("clk_prepare_count", 0644, + root, core, &clk_dbg_option_prepare); + debugfs_create_file("clk_enable_count", 0644, + core->dentry, core, &clk_dbg_option_enable); +#else debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count); debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count); +#endif debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count); debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count); debugfs_create_file("clk_duty_cycle", 0444, root, core, From patchwork Tue Oct 1 09:02:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11168289 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1FD4913B1 for ; Tue, 1 Oct 2019 09:02:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id F085F21906 for ; Tue, 1 Oct 2019 09:02:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="tnvp5I27" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733228AbfJAJCS (ORCPT ); Tue, 1 Oct 2019 05:02:18 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:34350 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733127AbfJAJCS (ORCPT ); Tue, 1 Oct 2019 05:02:18 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9192GEO062263; Tue, 1 Oct 2019 04:02:16 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1569920536; bh=r1ENYMRLgVUpW/RmGm9KhNJH01/oep4AIMwLVQcLhxc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=tnvp5I27XwX3UtkjpYt44OzuSzD3fZ/rXwVBZYTSykXJnp41j0ilHRI9+7QF/DHCN ljmAtjp2eHPSiOGlUVK+YbuPEx3COeckXWTfhuNF4tBTeLYiMjdu9F17XGeiJ73Wog Na/ZgMYJDZAsyPte4CM5gF9caw3IMu8vqYc8WQ8g= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9192GsQ107618 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 1 Oct 2019 04:02:16 -0500 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Tue, 1 Oct 2019 04:02:16 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Tue, 1 Oct 2019 04:02:06 -0500 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x919290L032920; Tue, 1 Oct 2019 04:02:15 -0500 From: Tero Kristo To: , , CC: Subject: [PATCH 3/4] clk: ti: mux: add debugfs support for read/write of parent ID Date: Tue, 1 Oct 2019 12:02:01 +0300 Message-ID: <20191001090202.26346-4-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001090202.26346-1-t-kristo@ti.com> References: <20191001090202.26346-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add parent_id node under debugfs for mux clocks, that allow both read/write operations. This can be used to read the current parent ID, or force a change of current parent of a mux clock. Signed-off-by: Tero Kristo --- drivers/clk/ti/mux.c | 46 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/drivers/clk/ti/mux.c b/drivers/clk/ti/mux.c index 0069e7cf3ebc..f036ecc78034 100644 --- a/drivers/clk/ti/mux.c +++ b/drivers/clk/ti/mux.c @@ -21,6 +21,8 @@ #include #include #include +#include + #include "clock.h" #undef pr_fmt @@ -118,12 +120,48 @@ static void clk_mux_restore_context(struct clk_hw *hw) ti_clk_mux_set_parent(hw, mux->saved_parent); } +#ifdef CONFIG_COMMON_CLK_DEBUGFS_WRITE_ACCESS +static int dbg_pid_get(void *data, u64 *val) +{ + struct clk_hw *hw = data; + + *val = ti_clk_mux_get_parent(hw); + + return 0; +} + +static int dbg_pid_set(void *data, u64 val) +{ + struct clk_hw *hw = data; + struct clk_hw *parent = clk_hw_get_parent_by_index(hw, val); + + if (!parent) + return -EINVAL; + + clk_hw_reparent(hw, parent); + + return ti_clk_mux_set_parent(hw, val); +} + +DEFINE_SIMPLE_ATTRIBUTE(mux_parent_id_fops, dbg_pid_get, dbg_pid_set, "%llu\n"); + +static void clk_mux_debug_init(struct clk_hw *hw, struct dentry *dentry) +{ + debugfs_create_file("parent_id", 0644, dentry, hw, &mux_parent_id_fops); +} +#else +static void clk_mux_debug_init(struct clk_hw *hw, struct dentry *dentry) +{ +} +#endif + const struct clk_ops ti_clk_mux_ops = { .get_parent = ti_clk_mux_get_parent, .set_parent = ti_clk_mux_set_parent, .determine_rate = __clk_mux_determine_rate, .save_context = clk_mux_save_context, .restore_context = clk_mux_restore_context, + .debug_init = clk_mux_debug_init, }; static struct clk *_register_mux(struct device *dev, const char *name, From patchwork Tue Oct 1 09:02:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11168291 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D6D9415AB for ; Tue, 1 Oct 2019 09:02:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B5E3D21920 for ; Tue, 1 Oct 2019 09:02:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="hpBlqfjR" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733254AbfJAJCU (ORCPT ); Tue, 1 Oct 2019 05:02:20 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:51716 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733127AbfJAJCU (ORCPT ); Tue, 1 Oct 2019 05:02:20 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9192I6N100560; Tue, 1 Oct 2019 04:02:18 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1569920538; bh=CklcykHhMCVqUFfGHjw+eIZ1P4HYWotwka0v5GHMZC0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=hpBlqfjRVdi2YRAuvwXZxHLVjgtugeQQ62GCyLcIhEyyPayESgqpSJI6VhtwqXWIr TZpabXviEABo98qC7C3pmiwyW2G3yGpDio8BHaCI7UDVDPxB8k+alhqdAAkZKiqcZQ jeQ7+J+mtgV8dJIdjdfIGOvSV3tYInb9MSNj6ZGs= Received: from DFLE106.ent.ti.com (dfle106.ent.ti.com [10.64.6.27]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9192Ipl122278 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 1 Oct 2019 04:02:18 -0500 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Tue, 1 Oct 2019 04:02:17 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Tue, 1 Oct 2019 04:02:17 -0500 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x919290M032920; Tue, 1 Oct 2019 04:02:16 -0500 From: Tero Kristo To: , , CC: Subject: [PATCH 4/4] clk: keystone: sci-clk: add debugfs support for read/write of parent ID Date: Tue, 1 Oct 2019 12:02:02 +0300 Message-ID: <20191001090202.26346-5-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001090202.26346-1-t-kristo@ti.com> References: <20191001090202.26346-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add parent_id node under debugfs for TI SCI clocks, that allow both read/write operations. This can be used to read the current parent ID, or force a change of current parent of a multi-parent clock. Signed-off-by: Tero Kristo --- drivers/clk/keystone/sci-clk.c | 45 ++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/drivers/clk/keystone/sci-clk.c b/drivers/clk/keystone/sci-clk.c index 7edf8c8432b6..39255b13bdc1 100644 --- a/drivers/clk/keystone/sci-clk.c +++ b/drivers/clk/keystone/sci-clk.c @@ -24,6 +24,7 @@ #include #include #include +#include #define SCI_CLK_SSC_ENABLE BIT(0) #define SCI_CLK_ALLOW_FREQ_CHANGE BIT(1) @@ -254,6 +255,41 @@ static int sci_clk_set_parent(struct clk_hw *hw, u8 index) index + 1 + clk->clk_id); } +#ifdef CONFIG_COMMON_CLK_DEBUGFS_WRITE_ACCESS +static int dbg_pid_get(void *data, u64 *val) +{ + struct clk_hw *hw = data; + + *val = sci_clk_get_parent(hw); + + return 0; +} + +static int dbg_pid_set(void *data, u64 val) +{ + struct clk_hw *hw = data; + struct clk_hw *parent = clk_hw_get_parent_by_index(hw, val); + + if (!parent) + return -EINVAL; + + clk_hw_reparent(hw, parent); + + return sci_clk_set_parent(hw, val); +} + +DEFINE_SIMPLE_ATTRIBUTE(sci_parent_id_fops, dbg_pid_get, dbg_pid_set, "%llu\n"); + +static void sci_clk_debug_init(struct clk_hw *hw, struct dentry *dentry) +{ + debugfs_create_file("parent_id", 0644, dentry, hw, &sci_parent_id_fops); +} +#else +static void sci_clk_debug_init(struct clk_hw *hw, struct dentry *dentry) +{ +} +#endif + static const struct clk_ops sci_clk_ops = { .prepare = sci_clk_prepare, .unprepare = sci_clk_unprepare, @@ -263,6 +307,7 @@ static const struct clk_ops sci_clk_ops = { .set_rate = sci_clk_set_rate, .get_parent = sci_clk_get_parent, .set_parent = sci_clk_set_parent, + .debug_init = sci_clk_debug_init, }; /**