From patchwork Wed Oct 2 11:25:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhou Yanjie X-Patchwork-Id: 11170855 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8196615AB for ; Wed, 2 Oct 2019 11:26:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5F1EE21924 for ; Wed, 2 Oct 2019 11:26:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=zoho.com header.i=zhouyanjie@zoho.com header.b="DsHgUQ3f" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728143AbfJBL0g (ORCPT ); Wed, 2 Oct 2019 07:26:36 -0400 Received: from sender4-pp-o94.zoho.com ([136.143.188.94]:25404 "EHLO sender4-pp-o94.zoho.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728142AbfJBL0g (ORCPT ); Wed, 2 Oct 2019 07:26:36 -0400 ARC-Seal: i=1; a=rsa-sha256; t=1570015546; cv=none; d=zoho.com; s=zohoarc; b=S+Diuivf9rBULn+rSoS7mERM4LMaiizJjZz4mrCMSESe6Zcw4qpUyhWIfm2eUKmeh2s+8jJ7LNo8roGUwKhJRJ/Q9GNA31En6GsO3ntUL/0IR13hST0vfNWHPhSA09ZtUoiShopwGTcqbyyeXPzYxg7xpw2BED+LVI7Vmo4PfDo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570015546; h=Cc:Date:From:In-Reply-To:Message-ID:References:Subject:To:ARC-Authentication-Results; bh=0cOK+cCuE1Fm3ThR/+IxH46twN3ONpZGwZBDUH3l7AU=; b=O9WwAiGi5zY/yn6vaFx01n6Ty3bLJBUcuofY53Vb7ajLyvDa67jYWTTgYV6TtdcGHyLoJ2iLZhMxW1R7slws8YfnEyA5RldtgWMzv86/GtW9vTorNm7GzQKrIFlgw54314D5UM8R+FZ3gP+oqLCJr3PYL59mcvV5McFs/54T3e4= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass header.i=zoho.com; spf=pass smtp.mailfrom=zhouyanjie@zoho.com; dmarc=pass header.from= header.from= DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=zapps768; d=zoho.com; h=from:to:cc:subject:date:message-id:in-reply-to:references; b=neZnW3dofdATJogiikKQhWOECZC2bwnmjJOdX7Vemsv7xOzi1Zkf2DD67veTsd7Vbq8M2CNnm4eL epMg/8G0r3fAu2pFljEvbnq10C2+mMgsC1cUOnFVQQLhqVDTAkIH DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1570015546; s=zm2019; d=zoho.com; i=zhouyanjie@zoho.com; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; l=2678; bh=0cOK+cCuE1Fm3ThR/+IxH46twN3ONpZGwZBDUH3l7AU=; b=DsHgUQ3fq/Deg+zaEyD5fzc95KDi21lAzR87TXoaFrHSA6mZTCsOGbsg0gINUdAv gXzFia1xOa2wmlqSRMdE5HVfkuEhYygrDUn95bEaNtDFIxuhjnq3Pp/23623HdngLx3 7JeZ7tgFY+6kaCSwafSMQuJi6fzWkOCcTnV0bt9E= Received: from zhouyanjie-virtual-machine.localdomain (171.221.113.164 [171.221.113.164]) by mx.zohomail.com with SMTPS id 1570015546320105.9573534034023; Wed, 2 Oct 2019 04:25:46 -0700 (PDT) From: Zhou Yanjie To: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org, tglx@linutronix.de, paul.burton@mips.com, gregkh@linuxfoundation.org, jason@lakedaemon.net, syq@debian.org, marc.zyngier@arm.com, rfontana@redhat.com, armijn@tjaldur.nl, allison@lohutok.net, paul@crapouillou.net Subject: [PATCH 1/5 v5] irqchip: ingenic: Drop redundant irq_suspend / irq_resume functions Date: Wed, 2 Oct 2019 19:25:21 +0800 Message-Id: <1570015525-27018-2-git-send-email-zhouyanjie@zoho.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1570015525-27018-1-git-send-email-zhouyanjie@zoho.com> References: <1548517123-60058-1-git-send-email-zhouyanjie@zoho.com> <1570015525-27018-1-git-send-email-zhouyanjie@zoho.com> X-ZohoMailClient: External Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Paul Cercueil The same behaviour can be obtained by using the IRQCHIP_MASK_ON_SUSPEND flag on the IRQ chip. Signed-off-by: Paul Cercueil --- drivers/irqchip/irq-ingenic.c | 24 +----------------------- include/linux/irqchip/ingenic.h | 14 -------------- 2 files changed, 1 insertion(+), 37 deletions(-) delete mode 100644 include/linux/irqchip/ingenic.h diff --git a/drivers/irqchip/irq-ingenic.c b/drivers/irqchip/irq-ingenic.c index f126255..06fa810 100644 --- a/drivers/irqchip/irq-ingenic.c +++ b/drivers/irqchip/irq-ingenic.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include @@ -50,26 +49,6 @@ static irqreturn_t intc_cascade(int irq, void *data) return IRQ_HANDLED; } -static void intc_irq_set_mask(struct irq_chip_generic *gc, uint32_t mask) -{ - struct irq_chip_regs *regs = &gc->chip_types->regs; - - writel(mask, gc->reg_base + regs->enable); - writel(~mask, gc->reg_base + regs->disable); -} - -void ingenic_intc_irq_suspend(struct irq_data *data) -{ - struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); - intc_irq_set_mask(gc, gc->wake_active); -} - -void ingenic_intc_irq_resume(struct irq_data *data) -{ - struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); - intc_irq_set_mask(gc, gc->mask_cache); -} - static struct irqaction intc_cascade_action = { .handler = intc_cascade, .name = "SoC intc cascade interrupt", @@ -127,8 +106,7 @@ static int __init ingenic_intc_of_init(struct device_node *node, ct->chip.irq_mask = irq_gc_mask_disable_reg; ct->chip.irq_mask_ack = irq_gc_mask_disable_reg; ct->chip.irq_set_wake = irq_gc_set_wake; - ct->chip.irq_suspend = ingenic_intc_irq_suspend; - ct->chip.irq_resume = ingenic_intc_irq_resume; + ct->chip.flags = IRQCHIP_MASK_ON_SUSPEND; irq_setup_generic_chip(gc, IRQ_MSK(32), 0, 0, IRQ_NOPROBE | IRQ_LEVEL); diff --git a/include/linux/irqchip/ingenic.h b/include/linux/irqchip/ingenic.h deleted file mode 100644 index 1465588..0000000 --- a/include/linux/irqchip/ingenic.h +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (C) 2010, Lars-Peter Clausen - */ - -#ifndef __LINUX_IRQCHIP_INGENIC_H__ -#define __LINUX_IRQCHIP_INGENIC_H__ - -#include - -extern void ingenic_intc_irq_suspend(struct irq_data *data); -extern void ingenic_intc_irq_resume(struct irq_data *data); - -#endif From patchwork Wed Oct 2 11:25:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhou Yanjie X-Patchwork-Id: 11170865 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8448D13B1 for ; Wed, 2 Oct 2019 11:27:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 62D8721920 for ; Wed, 2 Oct 2019 11:27:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=zoho.com header.i=zhouyanjie@zoho.com header.b="G/fOF/Ce" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728203AbfJBL1C (ORCPT ); Wed, 2 Oct 2019 07:27:02 -0400 Received: from sender4-pp-o94.zoho.com ([136.143.188.94]:25423 "EHLO sender4-pp-o94.zoho.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727538AbfJBL1B (ORCPT ); Wed, 2 Oct 2019 07:27:01 -0400 ARC-Seal: i=1; a=rsa-sha256; t=1570015553; cv=none; d=zoho.com; s=zohoarc; b=ZRH2LD3NKPXYJOHAfc+0hpiTR/BIapgirHyhUkaJ2oi2mX9TMEb0r463o5c1DdSE/xI7633E5HGqwqt5lcp+vWzZwGk3vTG1PhjnFBbSAurcIqQuIh0xiDpv6Eku3EmnvVMHS7pQukkuh+WB5R76tFoXvlfByJ+IegFpLrWsSiM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570015553; h=Cc:Date:From:In-Reply-To:Message-ID:References:Subject:To:ARC-Authentication-Results; bh=RD+GgwISDkeJ0+9zJglsbMp0cCqSbix3YRD8dlXbAd4=; b=UdmMl+4cCIYn5Ef3KCrPGDLlx9e7Tnn5j31lAAmhOM2mdqV3siR+vG5yXi6Ly6CcckeXq/UI/M7CNxUAfA1AdxJVNo2aHuflr+4qq+FG6TbNRIXzDBFyKB3/xjdQDnj+fSeznzA1ln8KHAEv35qI11rt7nfNtI2Dh1xGcpOje0o= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass header.i=zoho.com; spf=pass smtp.mailfrom=zhouyanjie@zoho.com; dmarc=pass header.from= header.from= DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=zapps768; d=zoho.com; h=from:to:cc:subject:date:message-id:in-reply-to:references; b=vLkjGjtGHs9whOE1YYrXTas5p2kpIk44yA0ibhSlq9NNlCocrwwaXyYrJZr+FbxkEFa0IhPQCba6 0/kYk/s6YKii+q7CuElr/8pPBeHCZCZ1gZqs4aA4lKQGF0yxmyIg DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1570015553; s=zm2019; d=zoho.com; i=zhouyanjie@zoho.com; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; l=1394; bh=RD+GgwISDkeJ0+9zJglsbMp0cCqSbix3YRD8dlXbAd4=; b=G/fOF/CeHi2AQShAHP4BpJFgIUtB3y3w4z3lo6tV1KkY71oBssVBSNgfL+whT00P Fp/VFISRYF0h7kemxzrtn2l3WDoiZz1TFYTzNvHY49xUxVggYRbSaALhZ8VztZ2K80p PLb+7Xn6296ylSI8eJUQa4PZhxgkswGSTX17dR44= Received: from zhouyanjie-virtual-machine.localdomain (171.221.113.164 [171.221.113.164]) by mx.zohomail.com with SMTPS id 1570015550669586.2947400949221; Wed, 2 Oct 2019 04:25:50 -0700 (PDT) From: Zhou Yanjie To: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org, tglx@linutronix.de, paul.burton@mips.com, gregkh@linuxfoundation.org, jason@lakedaemon.net, syq@debian.org, marc.zyngier@arm.com, rfontana@redhat.com, armijn@tjaldur.nl, allison@lohutok.net, paul@crapouillou.net Subject: [PATCH 2/5 v5] irqchip: ingenic: Error out if IRQ domain creation failed Date: Wed, 2 Oct 2019 19:25:22 +0800 Message-Id: <1570015525-27018-3-git-send-email-zhouyanjie@zoho.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1570015525-27018-1-git-send-email-zhouyanjie@zoho.com> References: <1548517123-60058-1-git-send-email-zhouyanjie@zoho.com> <1570015525-27018-1-git-send-email-zhouyanjie@zoho.com> X-ZohoMailClient: External Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Paul Cercueil If we cannot create the IRQ domain, the driver should fail to probe instead of succeeding with just a warning message. Signed-off-by: Paul Cercueil --- drivers/irqchip/irq-ingenic.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/irqchip/irq-ingenic.c b/drivers/irqchip/irq-ingenic.c index 06fa810..d97a3a5 100644 --- a/drivers/irqchip/irq-ingenic.c +++ b/drivers/irqchip/irq-ingenic.c @@ -87,6 +87,14 @@ static int __init ingenic_intc_of_init(struct device_node *node, goto out_unmap_irq; } + domain = irq_domain_add_legacy(node, num_chips * 32, + JZ4740_IRQ_BASE, 0, + &irq_domain_simple_ops, NULL); + if (!domain) { + err = -ENOMEM; + goto out_unmap_base; + } + for (i = 0; i < num_chips; i++) { /* Mask all irqs */ writel(0xffffffff, intc->base + (i * CHIP_SIZE) + @@ -112,14 +120,11 @@ static int __init ingenic_intc_of_init(struct device_node *node, IRQ_NOPROBE | IRQ_LEVEL); } - domain = irq_domain_add_legacy(node, num_chips * 32, JZ4740_IRQ_BASE, 0, - &irq_domain_simple_ops, NULL); - if (!domain) - pr_warn("unable to register IRQ domain\n"); - setup_irq(parent_irq, &intc_cascade_action); return 0; +out_unmap_base: + iounmap(intc->base); out_unmap_irq: irq_dispose_mapping(parent_irq); out_free: From patchwork Wed Oct 2 11:25:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhou Yanjie X-Patchwork-Id: 11170869 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6C56A15AB for ; Wed, 2 Oct 2019 11:27:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4B13321920 for ; Wed, 2 Oct 2019 11:27:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=zoho.com header.i=zhouyanjie@zoho.com header.b="qnXBzJnJ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728093AbfJBL1Z (ORCPT ); Wed, 2 Oct 2019 07:27:25 -0400 Received: from sender4-pp-o94.zoho.com ([136.143.188.94]:25435 "EHLO sender4-pp-o94.zoho.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727538AbfJBL1Y (ORCPT ); Wed, 2 Oct 2019 07:27:24 -0400 ARC-Seal: i=1; a=rsa-sha256; t=1570015557; cv=none; d=zoho.com; s=zohoarc; b=CJMxdoixGk2BPmuK+/owkNhdyGHehsHJXcg2de6MvNHiXAkM1oxG8wzJLQYRzL+MF19/0y/JWqYZUl37D+5rOPu+Bw51LmyMQlHGOp/Oj7+M3IJsQpa2+ryIBc2GcOIt2ojiKh4gNebMW2QzG0MdYX3pvsFhIKFQtaLIxL19yhY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570015557; h=Cc:Date:From:In-Reply-To:Message-ID:References:Subject:To:ARC-Authentication-Results; bh=3meDoWWBVuJInFW9uh+2hvam4yAKHNM65vA+K8EDZus=; b=PTZ4qCjxDRPpw7IlRlMDU0UG7wY5V6vN98V79OiyprqTAd7vBXFrxwSnf4qxr6nwrvHV1pS30ZNuKZG7r3gSl5uqAl7eI5lQv+LNRdbJBPF55PgBgMioIrNtXCdd/AhaJJzb/0je9fsDeyJLOTYGkWaueKssHjPfgPys0JSZ2EM= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass header.i=zoho.com; spf=pass smtp.mailfrom=zhouyanjie@zoho.com; dmarc=pass header.from= header.from= DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=zapps768; d=zoho.com; h=from:to:cc:subject:date:message-id:in-reply-to:references; b=ZU0CxYEwFQXRzCu0bxOQsIF8sC6xKptS2pJmVkktHc0cW3upto8IwikvrVSLBgi1IoZd3Z5EEvVf xpZkHSZw/AVCDlgtIupgataHa7nhMPwG7uLgeALvVyXxd/tc+ajI DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1570015557; s=zm2019; d=zoho.com; i=zhouyanjie@zoho.com; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; l=1409; bh=3meDoWWBVuJInFW9uh+2hvam4yAKHNM65vA+K8EDZus=; b=qnXBzJnJSzKsSUm6fK+YfkWwP8enLgX/Fu6PAjjem0TiVjBPpy2u7KGRDHDnkIZf ovWia6tIBt6prv1grVBiLTPJ16/300ZuHtisPTDC/LITbq2vNf6DMpv1bG0BpGueU8D lLtaU3cmrbea5qqseynYsAdq3MF5wELKW6b7hqiQ= Received: from zhouyanjie-virtual-machine.localdomain (171.221.113.164 [171.221.113.164]) by mx.zohomail.com with SMTPS id 1570015555747460.1002529000531; Wed, 2 Oct 2019 04:25:55 -0700 (PDT) From: Zhou Yanjie To: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org, tglx@linutronix.de, paul.burton@mips.com, gregkh@linuxfoundation.org, jason@lakedaemon.net, syq@debian.org, marc.zyngier@arm.com, rfontana@redhat.com, armijn@tjaldur.nl, allison@lohutok.net, paul@crapouillou.net Subject: [PATCH 3/5 v5] irqchip: ingenic: Get virq number from IRQ domain Date: Wed, 2 Oct 2019 19:25:23 +0800 Message-Id: <1570015525-27018-4-git-send-email-zhouyanjie@zoho.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1570015525-27018-1-git-send-email-zhouyanjie@zoho.com> References: <1548517123-60058-1-git-send-email-zhouyanjie@zoho.com> <1570015525-27018-1-git-send-email-zhouyanjie@zoho.com> X-ZohoMailClient: External Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Paul Cercueil Get the virq number from the IRQ domain instead of calculating it from the hardcoded irq base. Signed-off-by: Paul Cercueil --- drivers/irqchip/irq-ingenic.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-ingenic.c b/drivers/irqchip/irq-ingenic.c index d97a3a5..82a079f 100644 --- a/drivers/irqchip/irq-ingenic.c +++ b/drivers/irqchip/irq-ingenic.c @@ -21,6 +21,7 @@ struct ingenic_intc_data { void __iomem *base; + struct irq_domain *domain; unsigned num_chips; }; @@ -34,6 +35,7 @@ struct ingenic_intc_data { static irqreturn_t intc_cascade(int irq, void *data) { struct ingenic_intc_data *intc = irq_get_handler_data(irq); + struct irq_domain *domain = intc->domain; uint32_t irq_reg; unsigned i; @@ -43,7 +45,8 @@ static irqreturn_t intc_cascade(int irq, void *data) if (!irq_reg) continue; - generic_handle_irq(__fls(irq_reg) + (i * 32) + JZ4740_IRQ_BASE); + irq = irq_find_mapping(domain, __fls(irq_reg) + (i * 32)); + generic_handle_irq(irq); } return IRQ_HANDLED; @@ -95,6 +98,8 @@ static int __init ingenic_intc_of_init(struct device_node *node, goto out_unmap_base; } + intc->domain = domain; + for (i = 0; i < num_chips; i++) { /* Mask all irqs */ writel(0xffffffff, intc->base + (i * CHIP_SIZE) + From patchwork Wed Oct 2 11:25:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhou Yanjie X-Patchwork-Id: 11170871 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D06B813B1 for ; Wed, 2 Oct 2019 11:27:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id ACE3921924 for ; Wed, 2 Oct 2019 11:27:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=zoho.com header.i=zhouyanjie@zoho.com header.b="CnxptNsf" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726150AbfJBL16 (ORCPT ); Wed, 2 Oct 2019 07:27:58 -0400 Received: from sender4-pp-o94.zoho.com ([136.143.188.94]:25448 "EHLO sender4-pp-o94.zoho.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726069AbfJBL16 (ORCPT ); Wed, 2 Oct 2019 07:27:58 -0400 ARC-Seal: i=1; a=rsa-sha256; t=1570015561; cv=none; d=zoho.com; s=zohoarc; b=K2dn0GWrxPKHo0hnxxHagYqHNulXSy8XtwqmuspkmoolVmo4dMXQnJhXfBvhN1o3CedvFY6uLkuQLgQmW0lOghWYk3GFsgar3WhhdWhoCtlUb6YgqqhmnnF5JVT/2Inyhv6cE0T1aiTvUsZ/ObS3cH7G7s3pHZITABtilGGc2Co= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570015561; h=Cc:Date:From:In-Reply-To:Message-ID:References:Subject:To:ARC-Authentication-Results; bh=CI4uRK7HCSNx6oDvbDAdR5UB/+8QBJQFbkkP6LQKjiU=; b=HEhMqYRy/MDhWy4IP6jVjN2BtWbQUqoio2goF68SVbvFTLY690mW0PcT7f2NxQ517Klv58fZ6Nb5ckZoMAf20SaZiROj6nZ5EAvpM/iZPqn1WSO++WRsmlRt0EhICt72uCp+/bFKy153Iivd6+V7Bn7fFVtLUG9bzyEERnW6VU8= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass header.i=zoho.com; spf=pass smtp.mailfrom=zhouyanjie@zoho.com; dmarc=pass header.from= header.from= DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=zapps768; d=zoho.com; h=from:to:cc:subject:date:message-id:in-reply-to:references; b=OadQJZbMoERVtdBiQycOwm7tqmpIrfruXwqVOFA9Hvqyl4xkspGnC4tBwTCTaSyIjdWBRea+2uE+ nHbeoc0V6sA+1Hzwn/L1wQd+udEzq0om64phmjK81/lyOOnccCl0 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1570015561; s=zm2019; d=zoho.com; i=zhouyanjie@zoho.com; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; l=2649; bh=CI4uRK7HCSNx6oDvbDAdR5UB/+8QBJQFbkkP6LQKjiU=; b=CnxptNsfcxxKhI78mckJ5Exu23du32Wk5jkUksHZTjGna/qGp7Jmb1UFCPmPmXCH fd4onI/VG+LFMDS3W/8xz9bozyJ2tz8G56XTSTwTGnsogOl0YzqWQj0/w/oblv61UCT HKwXpZXx4lRtuwTdBy/Kz0un1onzNjnbABKFXDd4= Received: from zhouyanjie-virtual-machine.localdomain (171.221.113.164 [171.221.113.164]) by mx.zohomail.com with SMTPS id 1570015560564920.0535606410725; Wed, 2 Oct 2019 04:26:00 -0700 (PDT) From: Zhou Yanjie To: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org, tglx@linutronix.de, paul.burton@mips.com, gregkh@linuxfoundation.org, jason@lakedaemon.net, syq@debian.org, marc.zyngier@arm.com, rfontana@redhat.com, armijn@tjaldur.nl, allison@lohutok.net, paul@crapouillou.net Subject: [PATCH 4/5 v5] irqchip: ingenic: Alloc generic chips from IRQ domain Date: Wed, 2 Oct 2019 19:25:24 +0800 Message-Id: <1570015525-27018-5-git-send-email-zhouyanjie@zoho.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1570015525-27018-1-git-send-email-zhouyanjie@zoho.com> References: <1548517123-60058-1-git-send-email-zhouyanjie@zoho.com> <1570015525-27018-1-git-send-email-zhouyanjie@zoho.com> X-ZohoMailClient: External Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Paul Cercueil By creating the generic chips from the IRQ domain, we don't rely on the JZ4740_IRQ_BASE macro. It also makes the code a bit cleaner. Signed-off-by: Paul Cercueil --- drivers/irqchip/irq-ingenic.c | 30 +++++++++++++++++------------- 1 file changed, 17 insertions(+), 13 deletions(-) diff --git a/drivers/irqchip/irq-ingenic.c b/drivers/irqchip/irq-ingenic.c index 82a079f..06ab3ad 100644 --- a/drivers/irqchip/irq-ingenic.c +++ b/drivers/irqchip/irq-ingenic.c @@ -36,12 +36,14 @@ static irqreturn_t intc_cascade(int irq, void *data) { struct ingenic_intc_data *intc = irq_get_handler_data(irq); struct irq_domain *domain = intc->domain; + struct irq_chip_generic *gc; uint32_t irq_reg; unsigned i; for (i = 0; i < intc->num_chips; i++) { - irq_reg = readl(intc->base + (i * CHIP_SIZE) + - JZ_REG_INTC_PENDING); + gc = irq_get_domain_generic_chip(domain, i * 32); + + irq_reg = irq_reg_readl(gc, JZ_REG_INTC_PENDING); if (!irq_reg) continue; @@ -92,7 +94,7 @@ static int __init ingenic_intc_of_init(struct device_node *node, domain = irq_domain_add_legacy(node, num_chips * 32, JZ4740_IRQ_BASE, 0, - &irq_domain_simple_ops, NULL); + &irq_generic_chip_ops, NULL); if (!domain) { err = -ENOMEM; goto out_unmap_base; @@ -100,17 +102,17 @@ static int __init ingenic_intc_of_init(struct device_node *node, intc->domain = domain; - for (i = 0; i < num_chips; i++) { - /* Mask all irqs */ - writel(0xffffffff, intc->base + (i * CHIP_SIZE) + - JZ_REG_INTC_SET_MASK); + err = irq_alloc_domain_generic_chips(domain, 32, 1, "INTC", + handle_level_irq, 0, + IRQ_NOPROBE | IRQ_LEVEL, 0); + if (err) + goto out_domain_remove; - gc = irq_alloc_generic_chip("INTC", 1, - JZ4740_IRQ_BASE + (i * 32), - intc->base + (i * CHIP_SIZE), - handle_level_irq); + for (i = 0; i < num_chips; i++) { + gc = irq_get_domain_generic_chip(domain, i * 32); gc->wake_enabled = IRQ_MSK(32); + gc->reg_base = intc->base + (i * CHIP_SIZE); ct = gc->chip_types; ct->regs.enable = JZ_REG_INTC_CLEAR_MASK; @@ -121,13 +123,15 @@ static int __init ingenic_intc_of_init(struct device_node *node, ct->chip.irq_set_wake = irq_gc_set_wake; ct->chip.flags = IRQCHIP_MASK_ON_SUSPEND; - irq_setup_generic_chip(gc, IRQ_MSK(32), 0, 0, - IRQ_NOPROBE | IRQ_LEVEL); + /* Mask all irqs */ + irq_reg_writel(gc, IRQ_MSK(32), JZ_REG_INTC_SET_MASK); } setup_irq(parent_irq, &intc_cascade_action); return 0; +out_domain_remove: + irq_domain_remove(domain); out_unmap_base: iounmap(intc->base); out_unmap_irq: From patchwork Wed Oct 2 11:25:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhou Yanjie X-Patchwork-Id: 11170875 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6094915AB for ; Wed, 2 Oct 2019 11:28:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3FF9521920 for ; Wed, 2 Oct 2019 11:28:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=zoho.com header.i=zhouyanjie@zoho.com header.b="MugC4L9H" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726069AbfJBL2T (ORCPT ); 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dmarc=pass header.from= header.from= DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=zapps768; d=zoho.com; h=from:to:cc:subject:date:message-id:in-reply-to:references; b=UdcQap6U/7QfvHXSuSsc7qvHYCVpJmC6JV2Y+brfxtCAYWP7AOBb1bXmlkbwgM622BU/vksASMWH 6hwUkJLSqh/fGtduAVPglm79sorvs49Bzk+OBbHnYm+tnFFhWPN/ DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1570015567; s=zm2019; d=zoho.com; i=zhouyanjie@zoho.com; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; l=2275; bh=eeeCKiM3IXSUywHWZMkuZdPCtxOgvU9X1AipnfM1nB0=; b=MugC4L9HPgwp0qqRGcntvU0KrqTnc9oLHrWSO+bksJ96UxV2XgPwV9Ci1Q9RoxOV Nn+8r60xb8NtCvC/YajNaMB2q17IOkFtz1GkN65hlVzpz9Pv9fviEWooayK9Rt3C4jw BfCugmNEVS4uM2G2c/synkP2P2Sj9iauQQfLve8M= Received: from zhouyanjie-virtual-machine.localdomain (171.221.113.164 [171.221.113.164]) by mx.zohomail.com with SMTPS id 157001556560418.841606277967458; Wed, 2 Oct 2019 04:26:05 -0700 (PDT) From: Zhou Yanjie To: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org, tglx@linutronix.de, paul.burton@mips.com, gregkh@linuxfoundation.org, jason@lakedaemon.net, syq@debian.org, marc.zyngier@arm.com, rfontana@redhat.com, armijn@tjaldur.nl, allison@lohutok.net, paul@crapouillou.net Subject: [PATCH 5/5 v5] irqchip: Ingenic: Add process for more than one irq at the same time. Date: Wed, 2 Oct 2019 19:25:25 +0800 Message-Id: <1570015525-27018-6-git-send-email-zhouyanjie@zoho.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1570015525-27018-1-git-send-email-zhouyanjie@zoho.com> References: <1548517123-60058-1-git-send-email-zhouyanjie@zoho.com> <1570015525-27018-1-git-send-email-zhouyanjie@zoho.com> X-ZohoMailClient: External Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Add process for the situation that more than one irq is coming to a single chip at the same time. The original code will only respond to the lowest setted bit in JZ_REG_INTC_PENDING, and then exit the interrupt dispatch function. After exiting the interrupt dispatch function, since the second interrupt has not yet responded, the interrupt dispatch function is again entered to process the second interrupt. This creates additional unnecessary overhead, and the more interrupts that occur at the same time, the more overhead is added. The improved method in this patch is to check whether there are still unresponsive interrupts after processing the lowest setted bit interrupt. If there are any, the processing will be processed according to the bit in JZ_REG_INTC_PENDING, and the interrupt dispatch function will be exited until all processing is completed. Signed-off-by: Zhou Yanjie Reviewed-by: Paul Cercueil --- drivers/irqchip/irq-ingenic.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/irqchip/irq-ingenic.c b/drivers/irqchip/irq-ingenic.c index 06ab3ad..c1be3d5 100644 --- a/drivers/irqchip/irq-ingenic.c +++ b/drivers/irqchip/irq-ingenic.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-or-later /* * Copyright (C) 2009-2010, Lars-Peter Clausen - * JZ4740 platform IRQ support + * Ingenic XBurst platform IRQ support */ #include @@ -37,18 +37,23 @@ static irqreturn_t intc_cascade(int irq, void *data) struct ingenic_intc_data *intc = irq_get_handler_data(irq); struct irq_domain *domain = intc->domain; struct irq_chip_generic *gc; - uint32_t irq_reg; + uint32_t pending; unsigned i; for (i = 0; i < intc->num_chips; i++) { gc = irq_get_domain_generic_chip(domain, i * 32); - irq_reg = irq_reg_readl(gc, JZ_REG_INTC_PENDING); - if (!irq_reg) + pending = irq_reg_readl(gc, JZ_REG_INTC_PENDING); + if (!pending) continue; - irq = irq_find_mapping(domain, __fls(irq_reg) + (i * 32)); - generic_handle_irq(irq); + while (pending) { + int bit = __fls(pending); + + irq = irq_find_mapping(domain, bit + (i * 32)); + generic_handle_irq(irq); + pending &= ~BIT(bit); + } } return IRQ_HANDLED;