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Thu, 3 Oct 2019 19:03:18 +0000 Received: from SN6PR2101MB1135.namprd21.prod.outlook.com ([fe80::7d4a:b5b3:1062:e62]) by SN6PR2101MB1135.namprd21.prod.outlook.com ([fe80::7d4a:b5b3:1062:e62%5]) with mapi id 15.20.2327.004; Thu, 3 Oct 2019 19:03:18 +0000 From: Michael Kelley To: "will@kernel.org" , "catalin.marinas@arm.com" , "mark.rutland@arm.com" , "maz@kernel.org" , "linux-arm-kernel@lists.infradead.org" , "gregkh@linuxfoundation.org" , "linux-kernel@vger.kernel.org" , "linux-hyperv@vger.kernel.org" , "devel@linuxdriverproject.org" , "olaf@aepfle.de" , "apw@canonical.com" , vkuznets , "jasowang@redhat.com" , "marcelo.cerri@canonical.com" , KY Srinivasan Subject: [PATCH v5 1/8] arm64: hyperv: Add core Hyper-V include files Thread-Topic: [PATCH v5 1/8] arm64: hyperv: Add core Hyper-V include files Thread-Index: AQHVeh03QWoMMlV2DUKv1u83oDZ/pA== Date: Thu, 3 Oct 2019 19:03:17 +0000 Message-ID: <1570129355-16005-2-git-send-email-mikelley@microsoft.com> References: <1570129355-16005-1-git-send-email-mikelley@microsoft.com> In-Reply-To: <1570129355-16005-1-git-send-email-mikelley@microsoft.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: MWHPR10CA0006.namprd10.prod.outlook.com (2603:10b6:301::16) To SN6PR2101MB1135.namprd21.prod.outlook.com (2603:10b6:805:4::24) authentication-results: spf=none (sender IP is ) smtp.mailfrom=mikelley@microsoft.com; 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DIR:OUT; SFP:1102; SCL:1; SRVR:SN6PR2101MB1102; H:SN6PR2101MB1135.namprd21.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: microsoft.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: bPF1o61n1xKd0ieHXI+tsd6ZWSqYuee62ayKVsFbTBHOGSZ27kWfC1ZSGboIkZOpA5VQLnDAendnxMprm94Z8+TLh0ePgSAiD63clYZ66Pf6R5iZIRfvAI+KYklUALwVgz2Or/xWcYidqZKPPBwpFHZecacQV+ZXqZBigZFfZLCODoGrq3iVyP4NlmwBDDAPG+Ow5tzbgAm0iz2kTBXPU2NNqksHWy8xlz0DgBIykWpjYudhtKQma6JtTkyH1ymTepoaNDBdlB6HjBNzkXNnzQmjYX+YGzrmdOb1cdrZzyO3hIUmgW7FbiSwdf10r1QkfTB2yvLtGlgzFhMtVm9DdVp2jZim1212P9ohBkS0Ac1k+kqdAXqTiB6Yqzh8WKwSZjr1p0Wn8EMD++N0Z9cleQipJs4gqMqq7axCdDRzXKk= MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4e12fb30-46e9-4b66-5683-08d7483459a6 X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Oct 2019 19:03:17.9255 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: SHeH5xBhEvHMEHbRg5+Jg0S4lN7FXswJVOZfTY2d+qSD5vi+5+HvXOStWLo+nRQrUhXFC3DgDq+ARYO3l1laeg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR2101MB1102 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191003_120322_020473_2F136518 X-CRM114-Status: GOOD ( 17.79 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a01:111:f400:fe46:0:0:0:730 listed in] [list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sunil Muthuswamy , "boqun.feng" , Michael Kelley Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org hyperv-tlfs.h defines Hyper-V interfaces from the Hyper-V Top Level Functional Spec (TLFS). The TLFS is distinctly oriented to x86/x64, and Hyper-V has not separated out the architecture-dependent parts into x86/x64 vs. ARM64. So hyperv-tlfs.h includes information for ARM64 that is not yet formally published. The TLFS is available here: docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/reference/tlfs mshyperv.h defines Linux-specific structures and routines for interacting with Hyper-V on ARM64, and #includes the architecture- independent part of mshyperv.h in include/asm-generic. Signed-off-by: Michael Kelley --- MAINTAINERS | 2 + arch/arm64/include/asm/hyperv-tlfs.h | 408 +++++++++++++++++++++++++++++++++++ arch/arm64/include/asm/mshyperv.h | 105 +++++++++ 3 files changed, 515 insertions(+) create mode 100644 arch/arm64/include/asm/hyperv-tlfs.h create mode 100644 arch/arm64/include/asm/mshyperv.h diff --git a/MAINTAINERS b/MAINTAINERS index f04f081..d464067 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7564,6 +7564,8 @@ F: arch/x86/include/asm/trace/hyperv.h F: arch/x86/include/asm/hyperv-tlfs.h F: arch/x86/kernel/cpu/mshyperv.c F: arch/x86/hyperv +F: arch/arm64/include/asm/hyperv-tlfs.h +F: arch/arm64/include/asm/mshyperv.h F: drivers/clocksource/hyperv_timer.c F: drivers/hid/hid-hyperv.c F: drivers/hv/ diff --git a/arch/arm64/include/asm/hyperv-tlfs.h b/arch/arm64/include/asm/hyperv-tlfs.h new file mode 100644 index 0000000..fe167c4 --- /dev/null +++ b/arch/arm64/include/asm/hyperv-tlfs.h @@ -0,0 +1,408 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +/* + * This file contains definitions from the Hyper-V Hypervisor Top-Level + * Functional Specification (TLFS): + * https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/reference/tlfs + * + * Copyright (C) 2019, Microsoft, Inc. + * + * Author : Michael Kelley + */ + +#ifndef _ASM_HYPERV_TLFS_H +#define _ASM_HYPERV_TLFS_H + +#include + +/* + * All data structures defined in the TLFS that are shared between Hyper-V + * and a guest VM use Little Endian byte ordering. This matches the default + * byte ordering of Linux running on ARM64, so no special handling is required. + */ + + +/* + * While not explicitly listed in the TLFS, Hyper-V always runs with a page + * size of 4096. These definitions are used when communicating with Hyper-V + * using guest physical pages and guest physical page addresses, since the + * guest page size may not be 4096 on ARM64. + */ +#define HV_HYP_PAGE_SHIFT 12 +#define HV_HYP_PAGE_SIZE (1 << HV_HYP_PAGE_SHIFT) +#define HV_HYP_PAGE_MASK (~(HV_HYP_PAGE_SIZE - 1)) + +/* + * These Hyper-V registers provide information equivalent to the CPUID + * instruction on x86/x64. + */ +#define HV_REGISTER_HYPERVISOR_VERSION 0x00000100 /*CPUID 0x40000002 */ +#define HV_REGISTER_PRIVILEGES_AND_FEATURES 0x00000200 /*CPUID 0x40000003 */ +#define HV_REGISTER_FEATURES 0x00000201 /*CPUID 0x40000004 */ +#define HV_REGISTER_IMPLEMENTATION_LIMITS 0x00000202 /*CPUID 0x40000005 */ +#define HV_ARM64_REGISTER_INTERFACE_VERSION 0x00090006 /*CPUID 0x40000001 */ + +/* + * Feature identification. HvRegisterPrivilegesAndFeaturesInfo returns a + * 128-bit value with flags indicating which features are available to the + * partition based upon the current partition privileges. The 128-bit + * value is broken up with different portions stored in different 32-bit + * fields in the ms_hyperv structure. + */ + +/* Partition Reference Counter available*/ +#define HV_MSR_TIME_REF_COUNT_AVAILABLE BIT(1) + +/* + * Synthetic Timers available + */ +#define HV_MSR_SYNTIMER_AVAILABLE BIT(3) + +/* Frequency MSRs available */ +#define HV_FEATURE_FREQUENCY_MSRS_AVAILABLE BIT(8) + +/* Reference TSC available */ +#define HV_MSR_REFERENCE_TSC_AVAILABLE BIT(9) + +/* Crash MSR available */ +#define HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE BIT(10) + + +/* + * This group of flags is in the high order 64-bits of the returned + * 128-bit value. + */ + +/* STIMER direct mode is available */ +#define HV_STIMER_DIRECT_MODE_AVAILABLE BIT(19) + +/* + * Implementation recommendations in register + * HvRegisterFeaturesInfo. Indicates which behaviors the hypervisor + * recommends the OS implement for optimal performance. + */ + +/* + * Recommend not using Auto EOI + */ +#define HV_DEPRECATING_AEOI_RECOMMENDED BIT(9) + +/* + * Synthetic register definitions equivalent to MSRs on x86/x64 + */ +#define HV_REGISTER_CRASH_P0 0x00000210 +#define HV_REGISTER_CRASH_P1 0x00000211 +#define HV_REGISTER_CRASH_P2 0x00000212 +#define HV_REGISTER_CRASH_P3 0x00000213 +#define HV_REGISTER_CRASH_P4 0x00000214 +#define HV_REGISTER_CRASH_CTL 0x00000215 + +#define HV_REGISTER_GUEST_OSID 0x00090002 +#define HV_REGISTER_VPINDEX 0x00090003 +#define HV_REGISTER_TIME_REFCOUNT 0x00090004 +#define HV_REGISTER_REFERENCE_TSC 0x00090017 + +#define HV_REGISTER_SINT0 0x000A0000 +#define HV_REGISTER_SINT1 0x000A0001 +#define HV_REGISTER_SINT2 0x000A0002 +#define HV_REGISTER_SINT3 0x000A0003 +#define HV_REGISTER_SINT4 0x000A0004 +#define HV_REGISTER_SINT5 0x000A0005 +#define HV_REGISTER_SINT6 0x000A0006 +#define HV_REGISTER_SINT7 0x000A0007 +#define HV_REGISTER_SINT8 0x000A0008 +#define HV_REGISTER_SINT9 0x000A0009 +#define HV_REGISTER_SINT10 0x000A000A +#define HV_REGISTER_SINT11 0x000A000B +#define HV_REGISTER_SINT12 0x000A000C +#define HV_REGISTER_SINT13 0x000A000D +#define HV_REGISTER_SINT14 0x000A000E +#define HV_REGISTER_SINT15 0x000A000F +#define HV_REGISTER_SCONTROL 0x000A0010 +#define HV_REGISTER_SVERSION 0x000A0011 +#define HV_REGISTER_SIFP 0x000A0012 +#define HV_REGISTER_SIPP 0x000A0013 +#define HV_REGISTER_EOM 0x000A0014 +#define HV_REGISTER_SIRBP 0x000A0015 + +#define HV_REGISTER_STIMER0_CONFIG 0x000B0000 +#define HV_REGISTER_STIMER0_COUNT 0x000B0001 +#define HV_REGISTER_STIMER1_CONFIG 0x000B0002 +#define HV_REGISTER_STIMER1_COUNT 0x000B0003 +#define HV_REGISTER_STIMER2_CONFIG 0x000B0004 +#define HV_REGISTER_STIMER2_COUNT 0x000B0005 +#define HV_REGISTER_STIMER3_CONFIG 0x000B0006 +#define HV_REGISTER_STIMER3_COUNT 0x000B0007 + +/* + * Crash notification flags. + */ +#define HV_CRASH_CTL_CRASH_NOTIFY_MSG BIT_ULL(62) +#define HV_CRASH_CTL_CRASH_NOTIFY BIT_ULL(63) + +/* + * The guest OS needs to register the guest ID with the hypervisor. + * The guest ID is a 64 bit entity and the structure of this ID is + * specified in the Hyper-V TLFS. + */ +#define HV_LINUX_VENDOR_ID 0x8100 + +/* Declare the various hypercall operations. */ +#define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE 0x0002 +#define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST 0x0003 +#define HVCALL_NOTIFY_LONG_SPIN_WAIT 0x0008 +#define HVCALL_SEND_IPI 0x000b +#define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX 0x0013 +#define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX 0x0014 +#define HVCALL_SEND_IPI_EX 0x0015 +#define HVCALL_GET_VP_REGISTERS 0x0050 +#define HVCALL_SET_VP_REGISTERS 0x0051 +#define HVCALL_POST_MESSAGE 0x005c +#define HVCALL_SIGNAL_EVENT 0x005d +#define HVCALL_RETARGET_INTERRUPT 0x007e +#define HVCALL_START_VIRTUAL_PROCESSOR 0x0099 + +/* Declare standard hypercall field values. */ +#define HV_PARTITION_ID_SELF ((u64)-1) +#define HV_VP_INDEX_SELF ((u32)-2) + +#define HV_HYPERCALL_FAST_BIT BIT(16) +#define HV_HYPERCALL_REP_COUNT_1 BIT_ULL(32) +#define HV_HYPERCALL_RESULT_MASK GENMASK_ULL(15, 0) + +/* Define the hypercall status result */ + +union hv_hypercall_status { + u64 as_uint64; + struct { + u16 status; + u16 reserved; + u16 reps_completed; /* Low 12 bits */ + u16 reserved2; + }; +}; + +/* hypercall status code */ +#define HV_STATUS_SUCCESS 0 +#define HV_STATUS_INVALID_HYPERCALL_CODE 2 +#define HV_STATUS_INVALID_HYPERCALL_INPUT 3 +#define HV_STATUS_INVALID_ALIGNMENT 4 +#define HV_STATUS_INSUFFICIENT_MEMORY 11 +#define HV_STATUS_INVALID_CONNECTION_ID 18 +#define HV_STATUS_INSUFFICIENT_BUFFERS 19 + +/* Define output layout for Get VP Register hypercall */ +struct hv_get_vp_register_output { + u64 registervaluelow; + u64 registervaluehigh; +}; + +#define HV_FLUSH_ALL_PROCESSORS BIT(0) +#define HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES BIT(1) +#define HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY BIT(2) +#define HV_FLUSH_USE_EXTENDED_RANGE_FORMAT BIT(3) + +enum HV_GENERIC_SET_FORMAT { + HV_GENERIC_SET_SPARSE_4K, + HV_GENERIC_SET_ALL, +}; + +/* + * The Hyper-V TimeRefCount register and the TSC + * page provide a guest VM clock with 100ns tick rate + */ +#define HV_CLOCK_HZ (NSEC_PER_SEC/100) + +/* + * The fields in this structure are set by Hyper-V and read + * by the Linux guest. They should be accessed with READ_ONCE() + * so the compiler doesn't optimize in a way that will cause + * problems. The union pads the size out to the page size + * used in communication with Hyper-V. + */ +struct ms_hyperv_tsc_page { + union { + struct { + u32 tsc_sequence; + u32 reserved1; + u64 tsc_scale; + s64 tsc_offset; + } __packed; + u8 reserved2[HV_HYP_PAGE_SIZE]; + }; +}; + +/* Define the number of synthetic interrupt sources. */ +#define HV_SYNIC_SINT_COUNT (16) +/* Define the expected SynIC version. */ +#define HV_SYNIC_VERSION_1 (0x1) + +#define HV_SYNIC_CONTROL_ENABLE (1ULL << 0) +#define HV_SYNIC_SIMP_ENABLE (1ULL << 0) +#define HV_SYNIC_SIEFP_ENABLE (1ULL << 0) +#define HV_SYNIC_SINT_MASKED (1ULL << 16) +#define HV_SYNIC_SINT_AUTO_EOI (1ULL << 17) +#define HV_SYNIC_SINT_VECTOR_MASK (0xFF) + +#define HV_SYNIC_STIMER_COUNT (4) + +/* Define synthetic interrupt controller message constants. */ +#define HV_MESSAGE_SIZE (256) +#define HV_MESSAGE_PAYLOAD_BYTE_COUNT (240) +#define HV_MESSAGE_PAYLOAD_QWORD_COUNT (30) + +/* Define hypervisor message types. */ +enum hv_message_type { + HVMSG_NONE = 0x00000000, + + /* Memory access messages. */ + HVMSG_UNMAPPED_GPA = 0x80000000, + HVMSG_GPA_INTERCEPT = 0x80000001, + + /* Timer notification messages. */ + HVMSG_TIMER_EXPIRED = 0x80000010, + + /* Error messages. */ + HVMSG_INVALID_VP_REGISTER_VALUE = 0x80000020, + HVMSG_UNRECOVERABLE_EXCEPTION = 0x80000021, + HVMSG_UNSUPPORTED_FEATURE = 0x80000022, + + /* Trace buffer complete messages. */ + HVMSG_EVENTLOG_BUFFERCOMPLETE = 0x80000040, +}; + +/* Define synthetic interrupt controller message flags. */ +union hv_message_flags { + __u8 asu8; + struct { + __u8 msg_pending:1; + __u8 reserved:7; + } __packed; +}; + +/* Define port identifier type. */ +union hv_port_id { + __u32 asu32; + struct { + __u32 id:24; + __u32 reserved:8; + } __packed u; +}; + +/* Define synthetic interrupt controller message header. */ +struct hv_message_header { + __u32 message_type; + __u8 payload_size; + union hv_message_flags message_flags; + __u8 reserved[2]; + union { + __u64 sender; + union hv_port_id port; + }; +} __packed; + +/* Define synthetic interrupt controller message format. */ +struct hv_message { + struct hv_message_header header; + union { + __u64 payload[HV_MESSAGE_PAYLOAD_QWORD_COUNT]; + } u; +} __packed; + +/* Define the synthetic interrupt message page layout. */ +struct hv_message_page { + struct hv_message sint_message[HV_SYNIC_SINT_COUNT]; +} __packed; + +/* Define timer message payload structure. */ +struct hv_timer_message_payload { + __u32 timer_index; + __u32 reserved; + __u64 expiration_time; /* When the timer expired */ + __u64 delivery_time; /* When the message was delivered */ +} __packed; + +#define HV_STIMER_ENABLE (1ULL << 0) +#define HV_STIMER_PERIODIC (1ULL << 1) +#define HV_STIMER_LAZY (1ULL << 2) +#define HV_STIMER_AUTOENABLE (1ULL << 3) +#define HV_STIMER_SINT(config) (__u8)(((config) >> 16) & 0x0F) + + +/* Define synthetic interrupt controller flag constants. */ +#define HV_EVENT_FLAGS_COUNT (256 * 8) +#define HV_EVENT_FLAGS_LONG_COUNT (256 / sizeof(unsigned long)) + +/* + * Timer configuration register. + */ +union hv_stimer_config { + u64 as_uint64; + struct { + u64 enable:1; + u64 periodic:1; + u64 lazy:1; + u64 auto_enable:1; + u64 apic_vector:8; + u64 direct_mode:1; + u64 reserved_z0:3; + u64 sintx:4; + u64 reserved_z1:44; + } __packed; +}; + + +/* Define the synthetic interrupt controller event flags format. */ +union hv_synic_event_flags { + unsigned long flags[HV_EVENT_FLAGS_LONG_COUNT]; +}; + +/* Define SynIC control register. */ +union hv_synic_scontrol { + u64 as_uint64; + struct { + u64 enable:1; + u64 reserved:63; + } __packed; +}; + +/* Define synthetic interrupt source. */ +union hv_synic_sint { + u64 as_uint64; + struct { + u64 vector:8; + u64 reserved1:8; + u64 masked:1; + u64 auto_eoi:1; + u64 reserved2:46; + } __packed; +}; + +/* Define the format of the SIMP register */ +union hv_synic_simp { + u64 as_uint64; + struct { + u64 simp_enabled:1; + u64 preserved:11; + u64 base_simp_gpa:52; + } __packed; +}; + +/* Define the format of the SIEFP register */ +union hv_synic_siefp { + u64 as_uint64; + struct { + u64 siefp_enabled:1; + u64 preserved:11; + u64 base_siefp_gpa:52; + } __packed; +}; + +struct hv_vpset { + u64 format; + u64 valid_bank_mask; + u64 bank_contents[]; +} __packed; + + +#endif diff --git a/arch/arm64/include/asm/mshyperv.h b/arch/arm64/include/asm/mshyperv.h new file mode 100644 index 0000000..a8468a6 --- /dev/null +++ b/arch/arm64/include/asm/mshyperv.h @@ -0,0 +1,105 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +/* + * Linux-specific definitions for managing interactions with Microsoft's + * Hyper-V hypervisor. The definitions in this file are specific to + * the ARM64 architecture. See include/asm-generic/mshyperv.h for + * definitions are that architecture independent. + * + * Definitions that are specified in the Hyper-V Top Level Functional + * Spec (TLFS) should not go in this file, but should instead go in + * hyperv-tlfs.h. + * + * Copyright (C) 2019, Microsoft, Inc. + * + * Author : Michael Kelley + */ + +#ifndef _ASM_MSHYPERV_H +#define _ASM_MSHYPERV_H + +#include +#include +#include +#include +#include +#include + +/* + * Define the IRQ numbers/vectors used by Hyper-V VMbus interrupts + * and by STIMER0 Direct Mode interrupts. Hyper-V should be supplying + * these values through ACPI, but there are no other interrupting + * devices in a Hyper-V VM on ARM64, so it's OK to hard code for now. + * The "CALLBACK_VECTOR" terminology is a left-over from the x86/x64 + * world that is used in architecture independent Hyper-V code. + */ +#define HYPERVISOR_CALLBACK_VECTOR 16 +#define HV_STIMER0_IRQNR 17 + +extern u64 hv_do_hvc(u64 control, ...); +extern u64 hv_do_hvc_fast_get(u64 control, u64 input1, u64 input2, u64 input3, + struct hv_get_vp_register_output *output); + +/* + * Declare calls to get and set Hyper-V VP register values on ARM64, which + * requires a hypercall. + */ +extern void hv_set_vpreg(u32 reg, u64 value); +extern u64 hv_get_vpreg(u32 reg); +extern void hv_get_vpreg_128(u32 reg, struct hv_get_vp_register_output *result); + +/* + * Use the Hyper-V provided stimer0 as the timer that is made + * available to the architecture independent Hyper-V drivers. + */ +#define hv_init_timer(timer, tick) \ + hv_set_vpreg(HV_REGISTER_STIMER0_COUNT + (2*timer), tick) +#define hv_init_timer_config(timer, val) \ + hv_set_vpreg(HV_REGISTER_STIMER0_CONFIG + (2*timer), val) +#define hv_get_current_tick(tick) \ + (tick = hv_get_vpreg(HV_REGISTER_TIME_REFCOUNT)) + +#define hv_get_simp(val) (val = hv_get_vpreg(HV_REGISTER_SIPP)) +#define hv_set_simp(val) hv_set_vpreg(HV_REGISTER_SIPP, val) + +#define hv_get_siefp(val) (val = hv_get_vpreg(HV_REGISTER_SIFP)) +#define hv_set_siefp(val) hv_set_vpreg(HV_REGISTER_SIFP, val) + +#define hv_get_synic_state(val) (val = hv_get_vpreg(HV_REGISTER_SCONTROL)) +#define hv_set_synic_state(val) hv_set_vpreg(HV_REGISTER_SCONTROL, val) + +#define hv_get_vp_index(index) (index = hv_get_vpreg(HV_REGISTER_VPINDEX)) + +#define hv_signal_eom() hv_set_vpreg(HV_REGISTER_EOM, 0) + +/* + * Hyper-V SINT registers are numbered sequentially, so we can just + * add the SINT number to the register number of SINT0 + */ +#define hv_get_synint_state(sint_num, val) \ + (val = hv_get_vpreg(HV_REGISTER_SINT0 + sint_num)) +#define hv_set_synint_state(sint_num, val) \ + hv_set_vpreg(HV_REGISTER_SINT0 + sint_num, val) + +#define hv_get_crash_ctl(val) \ + (val = hv_get_vpreg(HV_REGISTER_CRASH_CTL)) +#define hv_get_time_ref_count(val) \ + (val = hv_get_vpreg(HV_REGISTER_TIME_REFCOUNT)) +#define hv_get_reference_tsc(val) \ + (val = hv_get_vpreg(HV_REGISTER_REFERENCE_TSC)) +#define hv_set_reference_tsc(val) \ + hv_set_vpreg(HV_REGISTER_REFERENCE_TSC, val) +#define hv_set_clocksource_vdso(val) \ + ((val).archdata.vdso_direct = false) + +#if IS_ENABLED(CONFIG_HYPERV) +#define hv_enable_stimer0_percpu_irq(irq) enable_percpu_irq(irq, 0) +#define hv_disable_stimer0_percpu_irq(irq) disable_percpu_irq(irq) +#endif + +/* ARM64 specific code to read the hardware clock */ +#define hv_get_raw_timer() arch_timer_read_counter() + +#include + +#endif From patchwork Thu Oct 3 19:03:19 2019 Content-Type: text/plain; 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Thu, 3 Oct 2019 19:03:19 +0000 Received: from SN6PR2101MB1135.namprd21.prod.outlook.com ([fe80::7d4a:b5b3:1062:e62]) by SN6PR2101MB1135.namprd21.prod.outlook.com ([fe80::7d4a:b5b3:1062:e62%5]) with mapi id 15.20.2327.004; Thu, 3 Oct 2019 19:03:19 +0000 From: Michael Kelley To: "will@kernel.org" , "catalin.marinas@arm.com" , "mark.rutland@arm.com" , "maz@kernel.org" , "linux-arm-kernel@lists.infradead.org" , "gregkh@linuxfoundation.org" , "linux-kernel@vger.kernel.org" , "linux-hyperv@vger.kernel.org" , "devel@linuxdriverproject.org" , "olaf@aepfle.de" , "apw@canonical.com" , vkuznets , "jasowang@redhat.com" , "marcelo.cerri@canonical.com" , KY Srinivasan Subject: [PATCH v5 2/8] arm64: hyperv: Add hypercall and register access functions Thread-Topic: [PATCH v5 2/8] arm64: hyperv: Add hypercall and register access functions Thread-Index: AQHVeh04cQzJKhhbwkS/Ne3BJTUZjg== Date: Thu, 3 Oct 2019 19:03:19 +0000 Message-ID: <1570129355-16005-3-git-send-email-mikelley@microsoft.com> References: <1570129355-16005-1-git-send-email-mikelley@microsoft.com> In-Reply-To: <1570129355-16005-1-git-send-email-mikelley@microsoft.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: MWHPR10CA0006.namprd10.prod.outlook.com (2603:10b6:301::16) To SN6PR2101MB1135.namprd21.prod.outlook.com (2603:10b6:805:4::24) authentication-results: spf=none (sender IP is ) smtp.mailfrom=mikelley@microsoft.com; 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DIR:OUT; SFP:1102; SCL:1; SRVR:SN6PR2101MB1102; H:SN6PR2101MB1135.namprd21.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: microsoft.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: eXercmZBXSlkVEn2pNBagd6PCH/DdTMzvoY0TSIMVjY5jATbv74d6tVlThiRJy9QO1/yqNfArUitjcgUFHcy/KKqMU8wXF09SnYqt7+j2ZXhPVvYn+Jdfmt5INtf+jiOauGRf+ykgDTzihLPA2NsU6ULwkxoqGPnkYKG7sRby+KEGNSnAa2Xmz87gnSM5/8/OIph+nVckbKOor7TJMX6ki6GMHpCUrVHueRupqy/6y39K0WK24bMrl/FqrSSmg/KCTd4xoAGGmXa220clQP5nOxil2pAf/yo9APtvtvxvrz6/jY7+d/4APSRW/W3nfhzEJiMquG1IuPK7TixCPK7feLpumUzFFb8gpaGOb/WU2fmdnUSnGipoawT9f6GFEki8V2nqyk4no/sI3v2w7hYaDSpRnvip7csJYscclZwtV4= MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7b1b85bd-5045-447d-d5ca-08d748345a84 X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Oct 2019 19:03:19.1797 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 1bTvm187cp3B7WItL1G3LLYckOZMGJze9gLX+LNmHorZThTwXPq6Zc6hCpHzJ8S0lvLeXSzhNbYA4XLSoEq34A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR2101MB1102 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191003_120325_427947_96578C74 X-CRM114-Status: GOOD ( 18.15 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a01:111:f400:fe46:0:0:0:730 listed in] [list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sunil Muthuswamy , "boqun.feng" , Michael Kelley Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add ARM64-specific code to make Hyper-V hypercalls and to access virtual processor synthetic registers via hypercalls. Hypercalls use a Hyper-V specific calling sequence with a non-zero immediate value per Section 2.9 of the SMC Calling Convention spec. This code is architecture dependent and is mostly driven by architecture independent code in the VMbus driver and the Hyper-V timer clocksource driver. This code is built only when CONFIG_HYPERV is enabled. Signed-off-by: Michael Kelley --- MAINTAINERS | 1 + arch/arm64/Kbuild | 1 + arch/arm64/hyperv/Makefile | 2 + arch/arm64/hyperv/hv_hvc.S | 44 +++++++++++++++ arch/arm64/hyperv/hv_init.c | 133 ++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 181 insertions(+) create mode 100644 arch/arm64/hyperv/Makefile create mode 100644 arch/arm64/hyperv/hv_hvc.S create mode 100644 arch/arm64/hyperv/hv_init.c diff --git a/MAINTAINERS b/MAINTAINERS index d464067..84f76f9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7566,6 +7566,7 @@ F: arch/x86/kernel/cpu/mshyperv.c F: arch/x86/hyperv F: arch/arm64/include/asm/hyperv-tlfs.h F: arch/arm64/include/asm/mshyperv.h +F: arch/arm64/hyperv F: drivers/clocksource/hyperv_timer.c F: drivers/hid/hid-hyperv.c F: drivers/hv/ diff --git a/arch/arm64/Kbuild b/arch/arm64/Kbuild index d646582..2469421 100644 --- a/arch/arm64/Kbuild +++ b/arch/arm64/Kbuild @@ -3,4 +3,5 @@ obj-y += kernel/ mm/ obj-$(CONFIG_NET) += net/ obj-$(CONFIG_KVM) += kvm/ obj-$(CONFIG_XEN) += xen/ +obj-$(CONFIG_HYPERV) += hyperv/ obj-$(CONFIG_CRYPTO) += crypto/ diff --git a/arch/arm64/hyperv/Makefile b/arch/arm64/hyperv/Makefile new file mode 100644 index 0000000..6bd8439 --- /dev/null +++ b/arch/arm64/hyperv/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +obj-y := hv_init.o hv_hvc.o diff --git a/arch/arm64/hyperv/hv_hvc.S b/arch/arm64/hyperv/hv_hvc.S new file mode 100644 index 0000000..09324ac --- /dev/null +++ b/arch/arm64/hyperv/hv_hvc.S @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +/* + * Microsoft Hyper-V hypervisor invocation routines + * + * Copyright (C) 2018, Microsoft, Inc. + * + * Author : Michael Kelley + */ + +#include + + .text +/* + * Do the HVC instruction. For Hyper-V the argument is always 1. + * x0 contains the hypercall control value, while additional registers + * vary depending on the hypercall, and whether the hypercall arguments + * are in memory or in registers (a "fast" hypercall per the Hyper-V + * TLFS). When the arguments are in memory x1 is the guest physical + * address of the input arguments, and x2 is the guest physical + * address of the output arguments. When the arguments are in + * registers, the register values depends on the hypercall. Note + * that this version cannot return any values in registers. + */ +ENTRY(hv_do_hvc) + hvc #1 + ret +ENDPROC(hv_do_hvc) + +/* + * This variant of HVC invocation is for hv_get_vpreg and + * hv_get_vpreg_128. The input parameters are passed in registers + * along with a pointer in x4 to where the output result should + * be stored. The output is returned in x15 and x16. x18 is used as + * scratch space to avoid buildng a stack frame, as Hyper-V does + * not preserve registers x0-x17. + */ +ENTRY(hv_do_hvc_fast_get) + mov x18, x4 + hvc #1 + str x15,[x18] + str x16,[x18,#8] + ret +ENDPROC(hv_do_hvc_fast_get) diff --git a/arch/arm64/hyperv/hv_init.c b/arch/arm64/hyperv/hv_init.c new file mode 100644 index 0000000..6808bc8 --- /dev/null +++ b/arch/arm64/hyperv/hv_init.c @@ -0,0 +1,133 @@ +// SPDX-License-Identifier: GPL-2.0 + +/* + * Initialization of the interface with Microsoft's Hyper-V hypervisor, + * and various low level utility routines for interacting with Hyper-V. + * + * Copyright (C) 2019, Microsoft, Inc. + * + * Author : Michael Kelley + */ + + +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * hv_do_hypercall- Invoke the specified hypercall + */ +u64 hv_do_hypercall(u64 control, void *input, void *output) +{ + u64 input_address; + u64 output_address; + + input_address = input ? virt_to_phys(input) : 0; + output_address = output ? virt_to_phys(output) : 0; + return hv_do_hvc(control, input_address, output_address); +} +EXPORT_SYMBOL_GPL(hv_do_hypercall); + +/* + * hv_do_fast_hypercall8 -- Invoke the specified hypercall + * with arguments in registers instead of physical memory. + * Avoids the overhead of virt_to_phys for simple hypercalls. + */ + +u64 hv_do_fast_hypercall8(u16 code, u64 input) +{ + u64 control; + + control = (u64)code | HV_HYPERCALL_FAST_BIT; + return hv_do_hvc(control, input); +} +EXPORT_SYMBOL_GPL(hv_do_fast_hypercall8); + + +/* + * Set a single VP register to a 64-bit value. + */ +void hv_set_vpreg(u32 msr, u64 value) +{ + union hv_hypercall_status status; + + status.as_uint64 = hv_do_hvc( + HVCALL_SET_VP_REGISTERS | HV_HYPERCALL_FAST_BIT | + HV_HYPERCALL_REP_COUNT_1, + HV_PARTITION_ID_SELF, + HV_VP_INDEX_SELF, + msr, + 0, + value, + 0); + + /* + * Something is fundamentally broken in the hypervisor if + * setting a VP register fails. There's really no way to + * continue as a guest VM, so panic. + */ + BUG_ON(status.status != HV_STATUS_SUCCESS); +} +EXPORT_SYMBOL_GPL(hv_set_vpreg); + + +/* + * Get the value of a single VP register, and only the low order 64 bits. + */ +u64 hv_get_vpreg(u32 msr) +{ + union hv_hypercall_status status; + struct hv_get_vp_register_output output; + + status.as_uint64 = hv_do_hvc_fast_get( + HVCALL_GET_VP_REGISTERS | HV_HYPERCALL_FAST_BIT | + HV_HYPERCALL_REP_COUNT_1, + HV_PARTITION_ID_SELF, + HV_VP_INDEX_SELF, + msr, + &output); + + /* + * Something is fundamentally broken in the hypervisor if + * getting a VP register fails. There's really no way to + * continue as a guest VM, so panic. + */ + BUG_ON(status.status != HV_STATUS_SUCCESS); + + return output.registervaluelow; +} +EXPORT_SYMBOL_GPL(hv_get_vpreg); + +/* + * Get the value of a single VP register that is 128 bits in size. This is a + * separate call in order to avoid complicating the calling sequence for + * the much more frequently used 64-bit version. + */ +void hv_get_vpreg_128(u32 msr, struct hv_get_vp_register_output *result) +{ + union hv_hypercall_status status; + + status.as_uint64 = hv_do_hvc_fast_get( + HVCALL_GET_VP_REGISTERS | HV_HYPERCALL_FAST_BIT | + HV_HYPERCALL_REP_COUNT_1, + HV_PARTITION_ID_SELF, + HV_VP_INDEX_SELF, + msr, + result); + + /* + * Something is fundamentally broken in the hypervisor if + * getting a VP register fails. There's really no way to + * continue as a guest VM, so panic. + */ + BUG_ON(status.status != HV_STATUS_SUCCESS); + + return; + +} +EXPORT_SYMBOL_GPL(hv_get_vpreg_128); From patchwork Thu Oct 3 19:03:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Michael Kelley (LINUX)" X-Patchwork-Id: 11173131 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B9ECF1902 for ; Thu, 3 Oct 2019 19:04:23 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8499220873 for ; Thu, 3 Oct 2019 19:04:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="pVt4K8Tl"; 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Thu, 3 Oct 2019 19:03:20 +0000 Received: from SN6PR2101MB1135.namprd21.prod.outlook.com ([fe80::7d4a:b5b3:1062:e62]) by SN6PR2101MB1135.namprd21.prod.outlook.com ([fe80::7d4a:b5b3:1062:e62%5]) with mapi id 15.20.2327.004; Thu, 3 Oct 2019 19:03:20 +0000 From: Michael Kelley To: "will@kernel.org" , "catalin.marinas@arm.com" , "mark.rutland@arm.com" , "maz@kernel.org" , "linux-arm-kernel@lists.infradead.org" , "gregkh@linuxfoundation.org" , "linux-kernel@vger.kernel.org" , "linux-hyperv@vger.kernel.org" , "devel@linuxdriverproject.org" , "olaf@aepfle.de" , "apw@canonical.com" , vkuznets , "jasowang@redhat.com" , "marcelo.cerri@canonical.com" , KY Srinivasan Subject: [PATCH v5 3/8] arm64: hyperv: Add memory alloc/free functions for Hyper-V size pages Thread-Topic: [PATCH v5 3/8] arm64: hyperv: Add memory alloc/free functions for Hyper-V size pages Thread-Index: AQHVeh04u6bhiCxFnkCG7X+tKP68gQ== Date: Thu, 3 Oct 2019 19:03:20 +0000 Message-ID: <1570129355-16005-4-git-send-email-mikelley@microsoft.com> References: <1570129355-16005-1-git-send-email-mikelley@microsoft.com> In-Reply-To: <1570129355-16005-1-git-send-email-mikelley@microsoft.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: MWHPR10CA0006.namprd10.prod.outlook.com (2603:10b6:301::16) To SN6PR2101MB1135.namprd21.prod.outlook.com (2603:10b6:805:4::24) authentication-results: spf=none (sender IP is ) smtp.mailfrom=mikelley@microsoft.com; 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These are for use when pages need to be shared with Hyper-V. Separate functions are needed as the page size used by Hyper-V may not be the same as the guest page size. Free operations are rarely done, so no attempt is made to combine freed pages into larger chunks. This code is built only when CONFIG_HYPERV is enabled. Signed-off-by: Michael Kelley --- arch/arm64/hyperv/hv_init.c | 68 ++++++++++++++++++++++++++++++++++++++++++ include/asm-generic/mshyperv.h | 5 ++++ 2 files changed, 73 insertions(+) diff --git a/arch/arm64/hyperv/hv_init.c b/arch/arm64/hyperv/hv_init.c index 6808bc8..9c294f6 100644 --- a/arch/arm64/hyperv/hv_init.c +++ b/arch/arm64/hyperv/hv_init.c @@ -15,10 +15,78 @@ #include #include #include +#include +#include +#include #include #include #include + +/* + * Functions for allocating and freeing memory with size and + * alignment HV_HYP_PAGE_SIZE. These functions are needed because + * the guest page size may not be the same as the Hyper-V page + * size. And while kalloc() could allocate the memory, it does not + * guarantee the required alignment. So a separate small memory + * allocator is needed. The free function is rarely used, so it + * does not try to combine freed pages into larger chunks. + * + * These functions are used by arm64 specific code as well as + * arch independent Hyper-V drivers. + */ + +static DEFINE_SPINLOCK(free_list_lock); +static struct list_head free_list = LIST_HEAD_INIT(free_list); + +void *hv_alloc_hyperv_page(void) +{ + int i; + struct list_head *hv_page; + unsigned long addr; + + BUILD_BUG_ON(HV_HYP_PAGE_SIZE > PAGE_SIZE); + + spin_lock(&free_list_lock); + if (list_empty(&free_list)) { + spin_unlock(&free_list_lock); + addr = __get_free_page(GFP_KERNEL); + spin_lock(&free_list_lock); + for (i = 0; i < PAGE_SIZE; i += HV_HYP_PAGE_SIZE) + list_add_tail((struct list_head *)(addr + i), + &free_list); + } + hv_page = free_list.next; + list_del(hv_page); + spin_unlock(&free_list_lock); + + return hv_page; +} +EXPORT_SYMBOL_GPL(hv_alloc_hyperv_page); + +void *hv_alloc_hyperv_zeroed_page(void) +{ + void *memp; + + memp = hv_alloc_hyperv_page(); + memset(memp, 0, HV_HYP_PAGE_SIZE); + + return memp; +} +EXPORT_SYMBOL_GPL(hv_alloc_hyperv_zeroed_page); + + +void hv_free_hyperv_page(unsigned long addr) +{ + if (!addr) + return; + spin_lock(&free_list_lock); + list_add((struct list_head *)addr, &free_list); + spin_unlock(&free_list_lock); +} +EXPORT_SYMBOL_GPL(hv_free_hyperv_page); + + /* * hv_do_hypercall- Invoke the specified hypercall */ diff --git a/include/asm-generic/mshyperv.h b/include/asm-generic/mshyperv.h index 18d8e2d..f9f3b66 100644 --- a/include/asm-generic/mshyperv.h +++ b/include/asm-generic/mshyperv.h @@ -99,6 +99,11 @@ static inline void vmbus_signal_eom(struct hv_message *msg, u32 old_msg_type) void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs)); void hv_remove_crash_handler(void); +void *hv_alloc_hyperv_page(void); +void *hv_alloc_hyperv_zeroed_page(void); +void hv_free_hyperv_page(unsigned long addr); + + #if IS_ENABLED(CONFIG_HYPERV) /* * Hypervisor's notion of virtual processor ID is different from From patchwork Thu Oct 3 19:03:21 2019 Content-Type: text/plain; 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Thu, 3 Oct 2019 19:03:22 +0000 Received: from SN6PR2101MB1135.namprd21.prod.outlook.com ([fe80::7d4a:b5b3:1062:e62]) by SN6PR2101MB1135.namprd21.prod.outlook.com ([fe80::7d4a:b5b3:1062:e62%5]) with mapi id 15.20.2327.004; Thu, 3 Oct 2019 19:03:22 +0000 From: Michael Kelley To: "will@kernel.org" , "catalin.marinas@arm.com" , "mark.rutland@arm.com" , "maz@kernel.org" , "linux-arm-kernel@lists.infradead.org" , "gregkh@linuxfoundation.org" , "linux-kernel@vger.kernel.org" , "linux-hyperv@vger.kernel.org" , "devel@linuxdriverproject.org" , "olaf@aepfle.de" , "apw@canonical.com" , vkuznets , "jasowang@redhat.com" , "marcelo.cerri@canonical.com" , KY Srinivasan Subject: [PATCH v5 4/8] arm64: hyperv: Add interrupt handlers for VMbus and stimer Thread-Topic: [PATCH v5 4/8] arm64: hyperv: Add interrupt handlers for VMbus and stimer Thread-Index: AQHVeh05WFNaFLrFzkGv1RMX856zSg== Date: Thu, 3 Oct 2019 19:03:21 +0000 Message-ID: <1570129355-16005-5-git-send-email-mikelley@microsoft.com> References: <1570129355-16005-1-git-send-email-mikelley@microsoft.com> In-Reply-To: <1570129355-16005-1-git-send-email-mikelley@microsoft.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: MWHPR10CA0006.namprd10.prod.outlook.com (2603:10b6:301::16) To SN6PR2101MB1135.namprd21.prod.outlook.com (2603:10b6:805:4::24) authentication-results: spf=none (sender IP is ) smtp.mailfrom=mikelley@microsoft.com; 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This code is architecture dependent and is mostly driven by architecture independent code in the VMbus driver and the Hyper-V timer clocksource driver. This code is built only when CONFIG_HYPERV is enabled. Signed-off-by: Michael Kelley --- arch/arm64/hyperv/Makefile | 2 +- arch/arm64/hyperv/mshyperv.c | 139 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 140 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/hyperv/mshyperv.c diff --git a/arch/arm64/hyperv/Makefile b/arch/arm64/hyperv/Makefile index 6bd8439..988eda5 100644 --- a/arch/arm64/hyperv/Makefile +++ b/arch/arm64/hyperv/Makefile @@ -1,2 +1,2 @@ # SPDX-License-Identifier: GPL-2.0 -obj-y := hv_init.o hv_hvc.o +obj-y := hv_init.o hv_hvc.o mshyperv.o diff --git a/arch/arm64/hyperv/mshyperv.c b/arch/arm64/hyperv/mshyperv.c new file mode 100644 index 0000000..ae6ece6 --- /dev/null +++ b/arch/arm64/hyperv/mshyperv.c @@ -0,0 +1,139 @@ +// SPDX-License-Identifier: GPL-2.0 + +/* + * Core routines for interacting with Microsoft's Hyper-V hypervisor, + * including setting up VMbus and STIMER interrupts, and handling + * crashes and kexecs. These interactions are through a set of + * static "handler" variables set by the architecture independent + * VMbus and STIMER drivers. + * + * Copyright (C) 2019, Microsoft, Inc. + * + * Author : Michael Kelley + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +static void (*vmbus_handler)(void); +static void (*hv_stimer0_handler)(void); + +static int vmbus_irq; +static long __percpu *vmbus_evt; +static long __percpu *stimer0_evt; + +irqreturn_t hyperv_vector_handler(int irq, void *dev_id) +{ + vmbus_handler(); + return IRQ_HANDLED; +} + +/* Must be done just once */ +void hv_setup_vmbus_irq(void (*handler)(void)) +{ + int result; + + vmbus_handler = handler; + vmbus_irq = acpi_register_gsi(NULL, HYPERVISOR_CALLBACK_VECTOR, + ACPI_LEVEL_SENSITIVE, ACPI_ACTIVE_HIGH); + if (vmbus_irq <= 0) { + pr_err("Can't register Hyper-V VMBus GSI. Error %d", + vmbus_irq); + vmbus_irq = 0; + return; + } + vmbus_evt = alloc_percpu(long); + result = request_percpu_irq(vmbus_irq, hyperv_vector_handler, + "Hyper-V VMbus", vmbus_evt); + if (result) { + pr_err("Can't request Hyper-V VMBus IRQ %d. Error %d", + vmbus_irq, result); + free_percpu(vmbus_evt); + acpi_unregister_gsi(vmbus_irq); + vmbus_irq = 0; + } +} +EXPORT_SYMBOL_GPL(hv_setup_vmbus_irq); + +/* Must be done just once */ +void hv_remove_vmbus_irq(void) +{ + if (vmbus_irq) { + free_percpu_irq(vmbus_irq, vmbus_evt); + free_percpu(vmbus_evt); + acpi_unregister_gsi(vmbus_irq); + } +} +EXPORT_SYMBOL_GPL(hv_remove_vmbus_irq); + +/* Must be done by each CPU */ +void hv_enable_vmbus_irq(void) +{ + enable_percpu_irq(vmbus_irq, 0); +} +EXPORT_SYMBOL_GPL(hv_enable_vmbus_irq); + +/* Must be done by each CPU */ +void hv_disable_vmbus_irq(void) +{ + disable_percpu_irq(vmbus_irq); +} +EXPORT_SYMBOL_GPL(hv_disable_vmbus_irq); + +/* Routines to do per-architecture handling of STIMER0 when in Direct Mode */ + +static irqreturn_t hv_stimer0_vector_handler(int irq, void *dev_id) +{ + if (hv_stimer0_handler) + hv_stimer0_handler(); + return IRQ_HANDLED; +} + +int hv_setup_stimer0_irq(int *irq, int *vector, void (*handler)(void)) +{ + int localirq; + int result; + + localirq = acpi_register_gsi(NULL, HV_STIMER0_IRQNR, + ACPI_LEVEL_SENSITIVE, ACPI_ACTIVE_HIGH); + if (localirq <= 0) { + pr_err("Can't register Hyper-V stimer0 GSI. Error %d", + localirq); + *irq = 0; + return -1; + } + stimer0_evt = alloc_percpu(long); + result = request_percpu_irq(localirq, hv_stimer0_vector_handler, + "Hyper-V stimer0", stimer0_evt); + if (result) { + pr_err("Can't request Hyper-V stimer0 IRQ %d. Error %d", + localirq, result); + free_percpu(stimer0_evt); + acpi_unregister_gsi(localirq); + *irq = 0; + return -1; + } + + hv_stimer0_handler = handler; + *vector = HV_STIMER0_IRQNR; + *irq = localirq; + return 0; +} +EXPORT_SYMBOL_GPL(hv_setup_stimer0_irq); + +void hv_remove_stimer0_irq(int irq) +{ + hv_stimer0_handler = NULL; + if (irq) { + free_percpu_irq(irq, stimer0_evt); + free_percpu(stimer0_evt); + acpi_unregister_gsi(irq); + } +} +EXPORT_SYMBOL_GPL(hv_remove_stimer0_irq); From patchwork Thu Oct 3 19:03:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Michael Kelley (LINUX)" X-Patchwork-Id: 11173135 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E728814DB for ; Thu, 3 Oct 2019 19:05:13 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BA85B20873 for ; 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Thu, 3 Oct 2019 19:03:23 +0000 Received: from SN6PR2101MB1135.namprd21.prod.outlook.com ([fe80::7d4a:b5b3:1062:e62]) by SN6PR2101MB1135.namprd21.prod.outlook.com ([fe80::7d4a:b5b3:1062:e62%5]) with mapi id 15.20.2327.004; Thu, 3 Oct 2019 19:03:23 +0000 From: Michael Kelley To: "will@kernel.org" , "catalin.marinas@arm.com" , "mark.rutland@arm.com" , "maz@kernel.org" , "linux-arm-kernel@lists.infradead.org" , "gregkh@linuxfoundation.org" , "linux-kernel@vger.kernel.org" , "linux-hyperv@vger.kernel.org" , "devel@linuxdriverproject.org" , "olaf@aepfle.de" , "apw@canonical.com" , vkuznets , "jasowang@redhat.com" , "marcelo.cerri@canonical.com" , KY Srinivasan Subject: [PATCH v5 5/8] arm64: hyperv: Add kexec and panic handlers Thread-Topic: [PATCH v5 5/8] arm64: hyperv: Add kexec and panic handlers Thread-Index: AQHVeh061lwHwOE2YkCeV8m8JkvvYw== Date: Thu, 3 Oct 2019 19:03:23 +0000 Message-ID: <1570129355-16005-6-git-send-email-mikelley@microsoft.com> References: <1570129355-16005-1-git-send-email-mikelley@microsoft.com> In-Reply-To: <1570129355-16005-1-git-send-email-mikelley@microsoft.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: MWHPR10CA0006.namprd10.prod.outlook.com (2603:10b6:301::16) To SN6PR2101MB1135.namprd21.prod.outlook.com (2603:10b6:805:4::24) authentication-results: spf=none (sender IP is ) smtp.mailfrom=mikelley@microsoft.com; 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These functions are called from architecture independent code in the VMbus driver. This code is built only when CONFIG_HYPERV is enabled. Signed-off-by: Michael Kelley --- arch/arm64/hyperv/hv_init.c | 61 ++++++++++++++++++++++++++++++++++++++++++++ arch/arm64/hyperv/mshyperv.c | 26 +++++++++++++++++++ 2 files changed, 87 insertions(+) diff --git a/arch/arm64/hyperv/hv_init.c b/arch/arm64/hyperv/hv_init.c index 9c294f6..67350ec 100644 --- a/arch/arm64/hyperv/hv_init.c +++ b/arch/arm64/hyperv/hv_init.c @@ -199,3 +199,64 @@ void hv_get_vpreg_128(u32 msr, struct hv_get_vp_register_output *result) } EXPORT_SYMBOL_GPL(hv_get_vpreg_128); + +void hyperv_report_panic(struct pt_regs *regs, long err) +{ + static bool panic_reported; + u64 guest_id; + + /* + * We prefer to report panic on 'die' chain as we have proper + * registers to report, but if we miss it (e.g. on BUG()) we need + * to report it on 'panic'. + */ + if (panic_reported) + return; + panic_reported = true; + + guest_id = hv_get_vpreg(HV_REGISTER_GUEST_OSID); + + /* + * Hyper-V provides the ability to store only 5 values. + * Pick the passed in error value, the guest_id, and the PC. + * The first two general registers are added arbitrarily. + */ + hv_set_vpreg(HV_REGISTER_CRASH_P0, err); + hv_set_vpreg(HV_REGISTER_CRASH_P1, guest_id); + hv_set_vpreg(HV_REGISTER_CRASH_P2, regs->pc); + hv_set_vpreg(HV_REGISTER_CRASH_P3, regs->regs[0]); + hv_set_vpreg(HV_REGISTER_CRASH_P4, regs->regs[1]); + + /* + * Let Hyper-V know there is crash data available + */ + hv_set_vpreg(HV_REGISTER_CRASH_CTL, HV_CRASH_CTL_CRASH_NOTIFY); +} +EXPORT_SYMBOL_GPL(hyperv_report_panic); + +/* + * hyperv_report_panic_msg - report panic message to Hyper-V + * @pa: physical address of the panic page containing the message + * @size: size of the message in the page + */ +void hyperv_report_panic_msg(phys_addr_t pa, size_t size) +{ + /* + * P3 to contain the physical address of the panic page & P4 to + * contain the size of the panic data in that page. Rest of the + * registers are no-op when the NOTIFY_MSG flag is set. + */ + hv_set_vpreg(HV_REGISTER_CRASH_P0, 0); + hv_set_vpreg(HV_REGISTER_CRASH_P1, 0); + hv_set_vpreg(HV_REGISTER_CRASH_P2, 0); + hv_set_vpreg(HV_REGISTER_CRASH_P3, pa); + hv_set_vpreg(HV_REGISTER_CRASH_P4, size); + + /* + * Let Hyper-V know there is crash data available along with + * the panic message. + */ + hv_set_vpreg(HV_REGISTER_CRASH_CTL, + (HV_CRASH_CTL_CRASH_NOTIFY | HV_CRASH_CTL_CRASH_NOTIFY_MSG)); +} +EXPORT_SYMBOL_GPL(hyperv_report_panic_msg); diff --git a/arch/arm64/hyperv/mshyperv.c b/arch/arm64/hyperv/mshyperv.c index ae6ece6..c58940d 100644 --- a/arch/arm64/hyperv/mshyperv.c +++ b/arch/arm64/hyperv/mshyperv.c @@ -23,6 +23,8 @@ static void (*vmbus_handler)(void); static void (*hv_stimer0_handler)(void); +static void (*hv_kexec_handler)(void); +static void (*hv_crash_handler)(struct pt_regs *regs); static int vmbus_irq; static long __percpu *vmbus_evt; @@ -137,3 +139,27 @@ void hv_remove_stimer0_irq(int irq) } } EXPORT_SYMBOL_GPL(hv_remove_stimer0_irq); + +void hv_setup_kexec_handler(void (*handler)(void)) +{ + hv_kexec_handler = handler; +} +EXPORT_SYMBOL_GPL(hv_setup_kexec_handler); + +void hv_remove_kexec_handler(void) +{ + hv_kexec_handler = NULL; +} +EXPORT_SYMBOL_GPL(hv_remove_kexec_handler); + +void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs)) +{ + hv_crash_handler = handler; +} +EXPORT_SYMBOL_GPL(hv_setup_crash_handler); + +void hv_remove_crash_handler(void) +{ + hv_crash_handler = NULL; +} +EXPORT_SYMBOL_GPL(hv_remove_crash_handler); From patchwork Thu Oct 3 19:03:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Michael Kelley (LINUX)" X-Patchwork-Id: 11173137 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EA9C014DB for ; Thu, 3 Oct 2019 19:05:39 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B390320873 for ; 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Thu, 3 Oct 2019 19:03:24 +0000 Received: from SN6PR2101MB1135.namprd21.prod.outlook.com ([fe80::7d4a:b5b3:1062:e62]) by SN6PR2101MB1135.namprd21.prod.outlook.com ([fe80::7d4a:b5b3:1062:e62%5]) with mapi id 15.20.2327.004; Thu, 3 Oct 2019 19:03:24 +0000 From: Michael Kelley To: "will@kernel.org" , "catalin.marinas@arm.com" , "mark.rutland@arm.com" , "maz@kernel.org" , "linux-arm-kernel@lists.infradead.org" , "gregkh@linuxfoundation.org" , "linux-kernel@vger.kernel.org" , "linux-hyperv@vger.kernel.org" , "devel@linuxdriverproject.org" , "olaf@aepfle.de" , "apw@canonical.com" , vkuznets , "jasowang@redhat.com" , "marcelo.cerri@canonical.com" , KY Srinivasan Subject: [PATCH v5 6/8] arm64: hyperv: Initialize hypervisor on boot Thread-Topic: [PATCH v5 6/8] arm64: hyperv: Initialize hypervisor on boot Thread-Index: AQHVeh07F4j1ZPUHt0GkW4RJu5gxXQ== Date: Thu, 3 Oct 2019 19:03:24 +0000 Message-ID: <1570129355-16005-7-git-send-email-mikelley@microsoft.com> References: <1570129355-16005-1-git-send-email-mikelley@microsoft.com> In-Reply-To: <1570129355-16005-1-git-send-email-mikelley@microsoft.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: MWHPR10CA0006.namprd10.prod.outlook.com (2603:10b6:301::16) To SN6PR2101MB1135.namprd21.prod.outlook.com (2603:10b6:805:4::24) authentication-results: spf=none (sender IP is ) smtp.mailfrom=mikelley@microsoft.com; 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Provide functions and data structures indicating hypervisor status that are needed by VMbus driver. This code is built only when CONFIG_HYPERV is enabled. Signed-off-by: Michael Kelley --- arch/arm64/hyperv/hv_init.c | 153 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 153 insertions(+) diff --git a/arch/arm64/hyperv/hv_init.c b/arch/arm64/hyperv/hv_init.c index 67350ec..86e4621 100644 --- a/arch/arm64/hyperv/hv_init.c +++ b/arch/arm64/hyperv/hv_init.c @@ -13,15 +13,48 @@ #include #include #include +#include #include +#include +#include #include #include #include #include +#include +#include +#include +#include #include #include #include +#include +#include +static bool hyperv_initialized; + +struct ms_hyperv_info ms_hyperv __ro_after_init; +EXPORT_SYMBOL_GPL(ms_hyperv); + +u32 *hv_vp_index; +EXPORT_SYMBOL_GPL(hv_vp_index); + +u32 hv_max_vp_index; +EXPORT_SYMBOL_GPL(hv_max_vp_index); + +static int hv_cpu_init(unsigned int cpu) +{ + u64 msr_vp_index; + + hv_get_vp_index(msr_vp_index); + + hv_vp_index[smp_processor_id()] = msr_vp_index; + + if (msr_vp_index > hv_max_vp_index) + hv_max_vp_index = msr_vp_index; + + return 0; +} /* * Functions for allocating and freeing memory with size and @@ -88,6 +121,120 @@ void hv_free_hyperv_page(unsigned long addr) /* + * This function is invoked via the ACPI clocksource probe mechanism. We + * don't actually use any values from the ACPI GTDT table, but we set up + * the Hyper-V synthetic clocksource and do other initialization for + * interacting with Hyper-V the first time. Using early_initcall to invoke + * this function is too late because interrupts are already enabled at that + * point, and hv_init_clocksource() must run before interrupts are enabled. + * + * 1. Setup the guest ID. + * 2. Get features and hints info from Hyper-V + * 3. Setup per-cpu VP indices. + * 4. Initialize the Hyper-V clocksource. + */ + +static int __init hyperv_init(struct acpi_table_header *table) +{ + struct hv_get_vp_register_output result; + u32 a, b, c, d; + u64 guest_id; + int i; + + /* + * If we're in a VM on Hyper-V, the ACPI hypervisor_id field will + * have the string "MsHyperV". + */ + if (strncmp((char *)&acpi_gbl_FADT.hypervisor_id, "MsHyperV", 8)) + return -EINVAL; + + /* Setup the guest ID */ + guest_id = generate_guest_id(0, LINUX_VERSION_CODE, 0); + hv_set_vpreg(HV_REGISTER_GUEST_OSID, guest_id); + + /* Get the features and hints from Hyper-V */ + hv_get_vpreg_128(HV_REGISTER_PRIVILEGES_AND_FEATURES, &result); + ms_hyperv.features = lower_32_bits(result.registervaluelow); + ms_hyperv.misc_features = upper_32_bits(result.registervaluehigh); + + hv_get_vpreg_128(HV_REGISTER_FEATURES, &result); + ms_hyperv.hints = lower_32_bits(result.registervaluelow); + + pr_info("Hyper-V: Features 0x%x, hints 0x%x\n", + ms_hyperv.features, ms_hyperv.hints); + + /* + * Direct mode is the only option for STIMERs provided Hyper-V + * on ARM64, so Hyper-V doesn't actually set the flag. But add + * the flag so the architecture independent code in + * drivers/clocksource/hyperv_timer.c will correctly use that mode. + */ + ms_hyperv.misc_features |= HV_STIMER_DIRECT_MODE_AVAILABLE; + + /* + * Hyper-V on ARM64 doesn't support AutoEOI. Add the hint + * that tells architecture independent code not to use this + * feature. + */ + ms_hyperv.hints |= HV_DEPRECATING_AEOI_RECOMMENDED; + + /* Get information about the Hyper-V host version */ + hv_get_vpreg_128(HV_REGISTER_HYPERVISOR_VERSION, &result); + a = lower_32_bits(result.registervaluelow); + b = upper_32_bits(result.registervaluelow); + c = lower_32_bits(result.registervaluehigh); + d = upper_32_bits(result.registervaluehigh); + pr_info("Hyper-V: Host Build %d.%d.%d.%d-%d-%d\n", + b >> 16, b & 0xFFFF, a, d & 0xFFFFFF, c, d >> 24); + + /* Allocate and initialize percpu VP index array */ + hv_vp_index = kmalloc_array(num_possible_cpus(), sizeof(*hv_vp_index), + GFP_KERNEL); + if (!hv_vp_index) + return -ENOMEM; + + for (i = 0; i < num_possible_cpus(); i++) + hv_vp_index[i] = VP_INVAL; + + if (cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "arm64/hyperv_init:online", + hv_cpu_init, NULL) < 0) + goto free_vp_index; + + hv_init_clocksource(); + + hyperv_initialized = true; + return 0; + +free_vp_index: + kfree(hv_vp_index); + hv_vp_index = NULL; + return -EINVAL; +} +TIMER_ACPI_DECLARE(hyperv, ACPI_SIG_GTDT, hyperv_init); + + +/* + * Called from hv_init_clocksource() to do ARM64 + * specific initialization of the sched clock + */ +void __init hv_setup_sched_clock(void *sched_clock) +{ + sched_clock_register(sched_clock, 64, HV_CLOCK_HZ); +} + +/* + * This routine is called before kexec/kdump, it does the required cleanup. + */ +void hyperv_cleanup(void) +{ + /* Reset our OS id */ + hv_set_vpreg(HV_REGISTER_GUEST_OSID, 0); + +} +EXPORT_SYMBOL_GPL(hyperv_cleanup); + + +/* * hv_do_hypercall- Invoke the specified hypercall */ u64 hv_do_hypercall(u64 control, void *input, void *output) @@ -260,3 +407,9 @@ void hyperv_report_panic_msg(phys_addr_t pa, size_t size) (HV_CRASH_CTL_CRASH_NOTIFY | HV_CRASH_CTL_CRASH_NOTIFY_MSG)); } EXPORT_SYMBOL_GPL(hyperv_report_panic_msg); + +bool hv_is_hyperv_initialized(void) +{ + return hyperv_initialized; +} +EXPORT_SYMBOL_GPL(hv_is_hyperv_initialized); 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Thu, 3 Oct 2019 19:03:26 +0000 Received: from SN6PR2101MB1135.namprd21.prod.outlook.com ([fe80::7d4a:b5b3:1062:e62]) by SN6PR2101MB1135.namprd21.prod.outlook.com ([fe80::7d4a:b5b3:1062:e62%5]) with mapi id 15.20.2327.004; Thu, 3 Oct 2019 19:03:25 +0000 From: Michael Kelley To: "will@kernel.org" , "catalin.marinas@arm.com" , "mark.rutland@arm.com" , "maz@kernel.org" , "linux-arm-kernel@lists.infradead.org" , "gregkh@linuxfoundation.org" , "linux-kernel@vger.kernel.org" , "linux-hyperv@vger.kernel.org" , "devel@linuxdriverproject.org" , "olaf@aepfle.de" , "apw@canonical.com" , vkuznets , "jasowang@redhat.com" , "marcelo.cerri@canonical.com" , KY Srinivasan Subject: [PATCH v5 7/8] Drivers: hv: vmbus: Add hooks for per-CPU IRQ Thread-Topic: [PATCH v5 7/8] Drivers: hv: vmbus: Add hooks for per-CPU IRQ Thread-Index: AQHVeh08iAhZ6pKxjEa5CJwraGxfEg== Date: Thu, 3 Oct 2019 19:03:25 +0000 Message-ID: <1570129355-16005-8-git-send-email-mikelley@microsoft.com> References: <1570129355-16005-1-git-send-email-mikelley@microsoft.com> In-Reply-To: <1570129355-16005-1-git-send-email-mikelley@microsoft.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: MWHPR10CA0006.namprd10.prod.outlook.com (2603:10b6:301::16) To SN6PR2101MB1135.namprd21.prod.outlook.com (2603:10b6:805:4::24) authentication-results: spf=none (sender IP is ) smtp.mailfrom=mikelley@microsoft.com; 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DIR:OUT; SFP:1102; SCL:1; SRVR:SN6PR2101MB1102; H:SN6PR2101MB1135.namprd21.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: microsoft.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: wTKWdd4+zIZW68WoSUIFCAH4CX3c95fs0vD++DfW9lEyCMrZ836qCjEgkfvFp73/POLLOdJDxFB3xhxpSqLn5XZ4k7YIEJWYczn09KuTQ+ql6DzzFbHxxZq0jk8VUFKQ8ZXmiTN2nwtBatUeoCt9w2mgBg232nFSMi381bJJWBmT696fmojWzkcBOlBEoDC22Jgj4Pidkffuff03oYMYwnsXthNWTqhqVPL20+WtFSkMFd+Na9O+1vNZgsSOWo5IRAUCsARBlWXWwSmIyDxCZsZpSWHnW9wMCiLPK0nQs9mdzJFmIGGrMD/myaXeIn6AeNhO+7Pjy46aAeHafpJYiTMOT2XGw1E+6jTMwec+20sbckU3i4bL2mmJeFfLXK0OE5/cz1tugFtQPOgd1BkeJRrpVi7URiMbdZdxPigBUd0= MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7fcbe12f-f681-4eda-bdb5-08d748345e70 X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Oct 2019 19:03:25.8119 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: kvb6bKShAQ8AYQreZle1EiX41AC5wMxkNFWlo0hUqcayzNRfxVudKyVqV9NbDtLHexlcwjOWCs6lUs5xGb1W2w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR2101MB1102 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191003_120338_236621_83C5F366 X-CRM114-Status: GOOD ( 10.14 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a01:111:f400:fe46:0:0:0:730 listed in] [list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sunil Muthuswamy , "boqun.feng" , Michael Kelley Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add hooks to enable/disable a per-CPU IRQ for VMbus. These hooks are in the architecture independent setup and shutdown paths for Hyper-V, and are needed by Linux guests on Hyper-V on ARM64. The x86/x64 implementation is null because VMbus interrupts on x86/x64 don't use an IRQ. Signed-off-by: Michael Kelley --- arch/x86/include/asm/mshyperv.h | 4 ++++ drivers/hv/hv.c | 3 +++ 2 files changed, 7 insertions(+) diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h index f4138ae..583e1ce 100644 --- a/arch/x86/include/asm/mshyperv.h +++ b/arch/x86/include/asm/mshyperv.h @@ -56,6 +56,10 @@ typedef int (*hyperv_fill_flush_list_func)( #endif void hyperv_vector_handler(struct pt_regs *regs); +/* On x86/x64, there isn't a real IRQ to be enabled/disable */ +static inline void hv_enable_vmbus_irq(void) {} +static inline void hv_disable_vmbus_irq(void) {} + /* * Routines for stimer0 Direct Mode handling. * On x86/x64, there are no percpu actions to take. diff --git a/drivers/hv/hv.c b/drivers/hv/hv.c index fcc5279..51d8f8a 100644 --- a/drivers/hv/hv.c +++ b/drivers/hv/hv.c @@ -180,6 +180,7 @@ void hv_synic_enable_regs(unsigned int cpu) hv_set_siefp(siefp.as_uint64); /* Setup the shared SINT. */ + hv_enable_vmbus_irq(); hv_get_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64); shared_sint.vector = HYPERVISOR_CALLBACK_VECTOR; @@ -241,6 +242,8 @@ void hv_synic_disable_regs(unsigned int cpu) hv_get_synic_state(sctrl.as_uint64); sctrl.enable = 0; hv_set_synic_state(sctrl.as_uint64); + + hv_disable_vmbus_irq(); } int hv_synic_cleanup(unsigned int cpu) From patchwork Thu Oct 3 19:03:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Michael Kelley (LINUX)" X-Patchwork-Id: 11173141 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AE0E316B1 for ; Thu, 3 Oct 2019 19:06:30 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 89F892133F for ; Thu, 3 Oct 2019 19:06:30 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Thu, 3 Oct 2019 19:03:27 +0000 Received: from SN6PR2101MB1135.namprd21.prod.outlook.com ([fe80::7d4a:b5b3:1062:e62]) by SN6PR2101MB1135.namprd21.prod.outlook.com ([fe80::7d4a:b5b3:1062:e62%5]) with mapi id 15.20.2327.004; Thu, 3 Oct 2019 19:03:27 +0000 From: Michael Kelley To: "will@kernel.org" , "catalin.marinas@arm.com" , "mark.rutland@arm.com" , "maz@kernel.org" , "linux-arm-kernel@lists.infradead.org" , "gregkh@linuxfoundation.org" , "linux-kernel@vger.kernel.org" , "linux-hyperv@vger.kernel.org" , "devel@linuxdriverproject.org" , "olaf@aepfle.de" , "apw@canonical.com" , vkuznets , "jasowang@redhat.com" , "marcelo.cerri@canonical.com" , KY Srinivasan Subject: [PATCH v5 8/8] Drivers: hv: Enable Hyper-V code to be built on ARM64 Thread-Topic: [PATCH v5 8/8] Drivers: hv: Enable Hyper-V code to be built on ARM64 Thread-Index: AQHVeh08eOd/te/qYEO1LtepLr1Yuw== Date: Thu, 3 Oct 2019 19:03:27 +0000 Message-ID: <1570129355-16005-9-git-send-email-mikelley@microsoft.com> References: <1570129355-16005-1-git-send-email-mikelley@microsoft.com> In-Reply-To: <1570129355-16005-1-git-send-email-mikelley@microsoft.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: MWHPR10CA0006.namprd10.prod.outlook.com (2603:10b6:301::16) To SN6PR2101MB1135.namprd21.prod.outlook.com (2603:10b6:805:4::24) authentication-results: spf=none (sender IP is ) smtp.mailfrom=mikelley@microsoft.com; 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X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a01:111:f400:fe46:0:0:0:71a listed in] [list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sunil Muthuswamy , "boqun.feng" , Michael Kelley Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Update drivers/hv/Kconfig so CONFIG_HYPERV can be selected on ARM64, causing the Hyper-V specific code to be built. Signed-off-by: Michael Kelley --- drivers/hv/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/hv/Kconfig b/drivers/hv/Kconfig index 79e5356..1113e49 100644 --- a/drivers/hv/Kconfig +++ b/drivers/hv/Kconfig @@ -4,7 +4,8 @@ menu "Microsoft Hyper-V guest support" config HYPERV tristate "Microsoft Hyper-V client drivers" - depends on X86 && ACPI && X86_LOCAL_APIC && HYPERVISOR_GUEST + depends on ACPI && \ + ((X86 && X86_LOCAL_APIC && HYPERVISOR_GUEST) || ARM64) select PARAVIRT select X86_HV_CALLBACK_VECTOR help