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03 Oct 2019 18:16:11 -0700 IronPort-SDR: qKeZmEpKTEzSQldkunuCDSObARUFEHemYXMJy0fLs8vX3FTw8wVQI9evPWDF+kEbIkPFPamW/U //+xq2haZX6adORa+igaX42fIvmmBOu79Mj3i2nAZrAYMvkuE3VFBoRbAHwV58FzvEXmWf+JIt fb94+Pq0OFFedR10EnzbhjzwcPtGu61jyeQdMJ6AK5qOXaqcEjPLZyAJSWjC1RyXkXIjMLJsbx mBy84UX7KzP0GpO5Cb4SNIlZRpRN7w7Q46xegvYi9NaPV736UHyL8f4dJnQaq6NYVo5fTvHcKA G+I= WDCIronportException: Internal Received: from jedi-01.sdcorp.global.sandisk.com (HELO jedi-01.int.fusionio.com) ([10.11.143.218]) by uls-op-cesaip02.wdc.com with ESMTP; 03 Oct 2019 18:20:02 -0700 From: Atish Patra To: linux-kernel@vger.kernel.org Subject: [v1 PATCH 1/2] RISC-V: Remove unsupported isa string info print Date: Thu, 3 Oct 2019 18:19:59 -0700 Message-Id: <20191004012000.2661-2-atish.patra@wdc.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191004012000.2661-1-atish.patra@wdc.com> References: <20191004012000.2661-1-atish.patra@wdc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191003_182007_813322_90E0AB50 X-CRM114-Status: GOOD ( 15.18 ) X-Spam-Score: -2.5 (--) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-2.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [216.71.154.45 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Albert Ou , Richard Fontana , Greg Kroah-Hartman , Palmer Dabbelt , Johan Hovold , Alexandre Ghiti , Atish Patra , Thomas Gleixner , Paul Walmsley , Anup Patel , Andrew Morton , linux-riscv@lists.infradead.org Sender: "linux-riscv" Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org /proc/cpuinfo should just print all the isa string as an information instead of determining what is supported or not. ELF hwcap can be used by the userspace to figure out that. Simplify the isa string printing by removing the unsupported isa string print and all related code. The relevant discussion can be found at http://lists.infradead.org/pipermail/linux-riscv/2019-September/006702.html Signed-off-by: Atish Patra Reviewed-by: Christoph Hellwig --- arch/riscv/kernel/cpu.c | 45 +++-------------------------------------- 1 file changed, 3 insertions(+), 42 deletions(-) diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c index 7da3c6a93abd..40a3c442ac5f 100644 --- a/arch/riscv/kernel/cpu.c +++ b/arch/riscv/kernel/cpu.c @@ -46,51 +46,12 @@ int riscv_of_processor_hartid(struct device_node *node) #ifdef CONFIG_PROC_FS -static void print_isa(struct seq_file *f, const char *orig_isa) +static void print_isa(struct seq_file *f, const char *isa) { - static const char *ext = "mafdcsu"; - const char *isa = orig_isa; - const char *e; - - /* - * Linux doesn't support rv32e or rv128i, and we only support booting - * kernels on harts with the same ISA that the kernel is compiled for. - */ -#if defined(CONFIG_32BIT) - if (strncmp(isa, "rv32i", 5) != 0) - return; -#elif defined(CONFIG_64BIT) - if (strncmp(isa, "rv64i", 5) != 0) - return; -#endif - - /* Print the base ISA, as we already know it's legal. */ + /* Print the entire ISA as it is */ seq_puts(f, "isa\t\t: "); - seq_write(f, isa, 5); - isa += 5; - - /* - * Check the rest of the ISA string for valid extensions, printing those - * we find. RISC-V ISA strings define an order, so we only print the - * extension bits when they're in order. Hide the supervisor (S) - * extension from userspace as it's not accessible from there. - */ - for (e = ext; *e != '\0'; ++e) { - if (isa[0] == e[0]) { - if (isa[0] != 's') - seq_write(f, isa, 1); - - isa++; - } - } + seq_write(f, isa, strlen(isa)); seq_puts(f, "\n"); - - /* - * If we were given an unsupported ISA in the device tree then print - * a bit of info describing what went wrong. - */ - if (isa[0] != '\0') - pr_info("unsupported ISA \"%s\" in device tree\n", orig_isa); } static void print_mmu(struct seq_file *f, const char *mmu_type) From patchwork Fri Oct 4 01:20:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Atish Patra X-Patchwork-Id: 11173607 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2A38515AB for ; Fri, 4 Oct 2019 01:20:25 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 087A720865 for ; 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03 Oct 2019 18:16:11 -0700 IronPort-SDR: u7A02DRehnzLmOmcpmq6YlaRr85A14SoW78LuIuz2ZMnPLX71NoDXU2MhZSFN9a4c5AdptRds/ A71A4ILtiUrOQNQiGtRWu8PdN5+yGmW8BoadSqeO67X5Xiz4lmNIs4w4P7lDJ5+D2E06I2yFqq acM/NrAGFyQASXoRMIkvWPtOjulMpgDT8Iq729lqnp3fvSTtz7B/X1cXpTGX33yb9ldGPtCMvf UJnWi1cWmYzzsB+K+Ua5WQvYbVatVjtIWZEeOGgFMtb81XG8MdpQ7TBF8arAGEHi53zBFBPEsX caI= WDCIronportException: Internal Received: from jedi-01.sdcorp.global.sandisk.com (HELO jedi-01.int.fusionio.com) ([10.11.143.218]) by uls-op-cesaip02.wdc.com with ESMTP; 03 Oct 2019 18:20:03 -0700 From: Atish Patra To: linux-kernel@vger.kernel.org Subject: [v1 PATCH 2/2] RISC-V: Consolidate isa correctness check Date: Thu, 3 Oct 2019 18:20:00 -0700 Message-Id: <20191004012000.2661-3-atish.patra@wdc.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191004012000.2661-1-atish.patra@wdc.com> References: <20191004012000.2661-1-atish.patra@wdc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191003_182007_957186_9131D382 X-CRM114-Status: GOOD ( 16.11 ) X-Spam-Score: -2.5 (--) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-2.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [216.71.154.45 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Albert Ou , Richard Fontana , Greg Kroah-Hartman , Palmer Dabbelt , Johan Hovold , Alexandre Ghiti , Atish Patra , Thomas Gleixner , Paul Walmsley , Anup Patel , Andrew Morton , linux-riscv@lists.infradead.org Sender: "linux-riscv" Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org Currently, isa string is read and checked for correctness at multiple places. Consolidate them into one function and use it only during early bootup. In case of a incorrect isa string, the cpu shouldn't boot at all. Signed-off-by: Atish Patra --- arch/riscv/include/asm/processor.h | 1 + arch/riscv/kernel/cpu.c | 40 ++++++++++++++++++++++-------- arch/riscv/kernel/cpufeature.c | 4 +-- arch/riscv/kernel/smpboot.c | 4 +++ 4 files changed, 36 insertions(+), 13 deletions(-) diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h index f539149d04c2..189bf98f9a3f 100644 --- a/arch/riscv/include/asm/processor.h +++ b/arch/riscv/include/asm/processor.h @@ -74,6 +74,7 @@ static inline void wait_for_interrupt(void) } struct device_node; +int riscv_read_check_isa(struct device_node *node, const char **isa); int riscv_of_processor_hartid(struct device_node *node); extern void riscv_fill_hwcap(void); diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c index 40a3c442ac5f..95ef5c91823d 100644 --- a/arch/riscv/kernel/cpu.c +++ b/arch/riscv/kernel/cpu.c @@ -8,13 +8,42 @@ #include #include +int riscv_read_check_isa(struct device_node *node, const char **isa) +{ + u32 hart; + + if (of_property_read_u32(node, "reg", &hart)) { + pr_warn("Found CPU without hart ID\n"); + return -ENODEV; + } + + if (of_property_read_string(node, "riscv,isa", isa)) { + pr_warn("CPU with hartid=%d has no \"riscv,isa\" property\n", + hart); + return -ENODEV; + } + + /* + * Linux doesn't support rv32e or rv128i, and we only support booting + * kernels on harts with the same ISA that the kernel is compiled for. + */ +#if defined(CONFIG_32BIT) + if (strncmp(*isa, "rv32i", 5) != 0) + return -ENODEV; +#elif defined(CONFIG_64BIT) + if (strncmp(*isa, "rv64i", 5) != 0) + return -ENODEV; +#endif + + return 0; +} + /* * Returns the hart ID of the given device tree node, or -ENODEV if the node * isn't an enabled and valid RISC-V hart node. */ int riscv_of_processor_hartid(struct device_node *node) { - const char *isa; u32 hart; if (!of_device_is_compatible(node, "riscv")) { @@ -32,15 +61,6 @@ int riscv_of_processor_hartid(struct device_node *node) return -ENODEV; } - if (of_property_read_string(node, "riscv,isa", &isa)) { - pr_warn("CPU with hartid=%d has no \"riscv,isa\" property\n", hart); - return -ENODEV; - } - if (isa[0] != 'r' || isa[1] != 'v') { - pr_warn("CPU with hartid=%d has an invalid ISA of \"%s\"\n", hart, isa); - return -ENODEV; - } - return hart; } diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index b1ade9a49347..eaad5aa07403 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -38,10 +38,8 @@ void riscv_fill_hwcap(void) if (riscv_of_processor_hartid(node) < 0) continue; - if (of_property_read_string(node, "riscv,isa", &isa)) { - pr_warn("Unable to find \"riscv,isa\" devicetree entry\n"); + if (riscv_read_check_isa(node, &isa) < 0) continue; - } for (i = 0; i < strlen(isa); ++i) this_hwcap |= isa2hwcap[(unsigned char)(isa[i])]; diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c index 18ae6da5115e..15ee71297abf 100644 --- a/arch/riscv/kernel/smpboot.c +++ b/arch/riscv/kernel/smpboot.c @@ -60,12 +60,16 @@ void __init setup_smp(void) int hart; bool found_boot_cpu = false; int cpuid = 1; + const char *isa; for_each_of_cpu_node(dn) { hart = riscv_of_processor_hartid(dn); if (hart < 0) continue; + if (riscv_read_check_isa(dn, &isa) < 0) + continue; + if (hart == cpuid_to_hartid_map(0)) { BUG_ON(found_boot_cpu); found_boot_cpu = 1;