From patchwork Tue Oct 8 12:38:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaofei Tan X-Patchwork-Id: 11179563 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 811B615AB for ; Tue, 8 Oct 2019 12:41:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 512C721721 for ; Tue, 8 Oct 2019 12:41:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730719AbfJHMl6 (ORCPT ); Tue, 8 Oct 2019 08:41:58 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:36700 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730605AbfJHMl6 (ORCPT ); Tue, 8 Oct 2019 08:41:58 -0400 Received: from DGGEMS413-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 3E56188A22D7603D3A75; Tue, 8 Oct 2019 20:41:53 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS413-HUB.china.huawei.com (10.3.19.213) with Microsoft SMTP Server id 14.3.439.0; Tue, 8 Oct 2019 20:41:43 +0800 From: Xiaofei Tan To: , CC: Xiaofei Tan , , , Subject: [PATCH 1/5] rasdaemon: optimize sqlite3 DB record of register fields for hip08 Date: Tue, 8 Oct 2019 20:38:54 +0800 Message-ID: <1570538338-230884-2-git-send-email-tanxiaofei@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1570538338-230884-1-git-send-email-tanxiaofei@huawei.com> References: <1570538338-230884-1-git-send-email-tanxiaofei@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-edac-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org Optimize sqlite3 DB record of register fields for hip08 by combining all register fields to one text field, which will include register name. This will make the record easier to read. For example, from: INSERT INTO hip08_oem_type2_event VALUES(1,1,1,0,0,'SMMU',2,'corrected', 273058,0,-1,0,1308622858,0,0,0,0,133,0,0,NULL); change to: INSERT INTO hip08_oem_type2_event VALUES(1,1,1,0,0,'SMMU',2,'corrected', 'ERR_FR_0=0x42aa2 ERR_FR_1=0x0 ERR_CTRL_0=0xffffffff ERR_CTRL_1=0x0 ERR_STATUS_0=0x4e00000a ERR_STATUS_1=0x0 ERR_ADDR_0=0x0, ERR_ADDR_1=0x0 ERR_MISC0_0=0x0 ERR_MISC0_1=0x90 ERR_MISC1_0=0x0 ERR_MISC1_1=0x0'); Signed-off-by: Xiaofei Tan --- non-standard-hisi_hip08.c | 167 +++++++++++----------------------------------- 1 file changed, 40 insertions(+), 127 deletions(-) diff --git a/non-standard-hisi_hip08.c b/non-standard-hisi_hip08.c index ae543d6..393053d 100644 --- a/non-standard-hisi_hip08.c +++ b/non-standard-hisi_hip08.c @@ -147,12 +147,7 @@ enum { hip08_oem_type1_field_module_id, hip08_oem_type1_field_sub_module_id, hip08_oem_type1_field_err_sev, - hip08_oem_type1_field_err_misc_0, - hip08_oem_type1_field_err_misc_1, - hip08_oem_type1_field_err_misc_2, - hip08_oem_type1_field_err_misc_3, - hip08_oem_type1_field_err_misc_4, - hip08_oem_type1_field_err_addr, + hip08_oem_type1_field_regs_dump, }; enum { @@ -164,18 +159,7 @@ enum { hip08_oem_type2_field_module_id, hip08_oem_type2_field_sub_module_id, hip08_oem_type2_field_err_sev, - hip08_oem_type2_field_err_fr_0, - hip08_oem_type2_field_err_fr_1, - hip08_oem_type2_field_err_ctrl_0, - hip08_oem_type2_field_err_ctrl_1, - hip08_oem_type2_field_err_status_0, - hip08_oem_type2_field_err_status_1, - hip08_oem_type2_field_err_addr_0, - hip08_oem_type2_field_err_addr_1, - hip08_oem_type2_field_err_misc0_0, - hip08_oem_type2_field_err_misc0_1, - hip08_oem_type2_field_err_misc1_0, - hip08_oem_type2_field_err_misc1_1, + hip08_oem_type2_field_regs_dump, }; enum { @@ -189,7 +173,7 @@ enum { hip08_pcie_local_field_port_id, hip08_pcie_local_field_err_sev, hip08_pcie_local_field_err_type, - hip08_pcie_local_field_err_misc, + hip08_pcie_local_field_regs_dump, }; /* helper functions */ @@ -299,12 +283,7 @@ static const struct db_fields hip08_oem_type1_event_fields[] = { { .name = "module_id", .type = "TEXT" }, { .name = "sub_module_id", .type = "INTEGER" }, { .name = "err_severity", .type = "TEXT" }, - { .name = "err_misc_0", .type = "INTEGER" }, - { .name = "err_misc_1", .type = "INTEGER" }, - { .name = "err_misc_2", .type = "INTEGER" }, - { .name = "err_misc_3", .type = "INTEGER" }, - { .name = "err_misc_4", .type = "INTEGER" }, - { .name = "err_addr", .type = "INTEGER" }, + { .name = "regs_dump", .type = "TEXT" }, }; static const struct db_table_descriptor hip08_oem_type1_event_tab = { @@ -322,18 +301,7 @@ static const struct db_fields hip08_oem_type2_event_fields[] = { { .name = "module_id", .type = "TEXT" }, { .name = "sub_module_id", .type = "INTEGER" }, { .name = "err_severity", .type = "TEXT" }, - { .name = "err_fr_0", .type = "INTEGER" }, - { .name = "err_fr_1", .type = "INTEGER" }, - { .name = "err_ctrl_0", .type = "INTEGER" }, - { .name = "err_ctrl_1", .type = "INTEGER" }, - { .name = "err_status_0", .type = "INTEGER" }, - { .name = "err_status_1", .type = "INTEGER" }, - { .name = "err_addr_0", .type = "INTEGER" }, - { .name = "err_addr_1", .type = "INTEGER" }, - { .name = "err_misc0_0", .type = "INTEGER" }, - { .name = "err_misc0_1", .type = "INTEGER" }, - { .name = "err_misc1_0", .type = "INTEGER" }, - { .name = "err_misc1_1", .type = "INTEGER" }, + { .name = "regs_dump", .type = "TEXT" }, }; static const struct db_table_descriptor hip08_oem_type2_event_tab = { @@ -353,39 +321,7 @@ static const struct db_fields hip08_pcie_local_event_fields[] = { { .name = "port_id", .type = "INTEGER" }, { .name = "err_severity", .type = "TEXT" }, { .name = "err_type", .type = "INTEGER" }, - { .name = "err_misc0", .type = "INTEGER" }, - { .name = "err_misc1", .type = "INTEGER" }, - { .name = "err_misc2", .type = "INTEGER" }, - { .name = "err_misc3", .type = "INTEGER" }, - { .name = "err_misc4", .type = "INTEGER" }, - { .name = "err_misc5", .type = "INTEGER" }, - { .name = "err_misc6", .type = "INTEGER" }, - { .name = "err_misc7", .type = "INTEGER" }, - { .name = "err_misc8", .type = "INTEGER" }, - { .name = "err_misc9", .type = "INTEGER" }, - { .name = "err_misc10", .type = "INTEGER" }, - { .name = "err_misc11", .type = "INTEGER" }, - { .name = "err_misc12", .type = "INTEGER" }, - { .name = "err_misc13", .type = "INTEGER" }, - { .name = "err_misc14", .type = "INTEGER" }, - { .name = "err_misc15", .type = "INTEGER" }, - { .name = "err_misc16", .type = "INTEGER" }, - { .name = "err_misc17", .type = "INTEGER" }, - { .name = "err_misc18", .type = "INTEGER" }, - { .name = "err_misc19", .type = "INTEGER" }, - { .name = "err_misc20", .type = "INTEGER" }, - { .name = "err_misc21", .type = "INTEGER" }, - { .name = "err_misc22", .type = "INTEGER" }, - { .name = "err_misc23", .type = "INTEGER" }, - { .name = "err_misc24", .type = "INTEGER" }, - { .name = "err_misc25", .type = "INTEGER" }, - { .name = "err_misc26", .type = "INTEGER" }, - { .name = "err_misc27", .type = "INTEGER" }, - { .name = "err_misc28", .type = "INTEGER" }, - { .name = "err_misc29", .type = "INTEGER" }, - { .name = "err_misc30", .type = "INTEGER" }, - { .name = "err_misc31", .type = "INTEGER" }, - { .name = "err_misc32", .type = "INTEGER" }, + { .name = "regs_dump", .type = "TEXT" }, }; static const struct db_table_descriptor hip08_pcie_local_event_tab = { @@ -526,49 +462,42 @@ static int decode_hip08_oem_type1_error(struct ras_events *ras, trace_seq_printf(s, "\nHISI HIP08: OEM Type-1 Error\n"); trace_seq_printf(s, "%s\n", buf); + p = buf; trace_seq_printf(s, "Reg Dump:\n"); if (err->val_bits & HISI_OEM_TYPE1_VALID_ERR_MISC_0) { trace_seq_printf(s, "ERR_MISC0=0x%x\n", err->err_misc_0); - record_vendor_data(dec_tab, hisi_oem_data_type_int, - hip08_oem_type1_field_err_misc_0, - err->err_misc_0, NULL); + p += sprintf(p, "ERR_MISC0=0x%x ", err->err_misc_0); } if (err->val_bits & HISI_OEM_TYPE1_VALID_ERR_MISC_1) { trace_seq_printf(s, "ERR_MISC1=0x%x\n", err->err_misc_1); - record_vendor_data(dec_tab, hisi_oem_data_type_int, - hip08_oem_type1_field_err_misc_1, - err->err_misc_1, NULL); + p += sprintf(p, "ERR_MISC1=0x%x ", err->err_misc_1); } if (err->val_bits & HISI_OEM_TYPE1_VALID_ERR_MISC_2) { trace_seq_printf(s, "ERR_MISC2=0x%x\n", err->err_misc_2); - record_vendor_data(dec_tab, hisi_oem_data_type_int, - hip08_oem_type1_field_err_misc_2, - err->err_misc_2, NULL); + p += sprintf(p, "ERR_MISC2=0x%x ", err->err_misc_2); } if (err->val_bits & HISI_OEM_TYPE1_VALID_ERR_MISC_3) { trace_seq_printf(s, "ERR_MISC3=0x%x\n", err->err_misc_3); - record_vendor_data(dec_tab, hisi_oem_data_type_int, - hip08_oem_type1_field_err_misc_3, - err->err_misc_3, NULL); + p += sprintf(p, "ERR_MISC3=0x%x ", err->err_misc_3); } if (err->val_bits & HISI_OEM_TYPE1_VALID_ERR_MISC_4) { trace_seq_printf(s, "ERR_MISC4=0x%x\n", err->err_misc_4); - record_vendor_data(dec_tab, hisi_oem_data_type_int, - hip08_oem_type1_field_err_misc_4, - err->err_misc_4, NULL); + p += sprintf(p, "ERR_MISC4=0x%x ", err->err_misc_4); } if (err->val_bits & HISI_OEM_TYPE1_VALID_ERR_ADDR) { trace_seq_printf(s, "ERR_ADDR=0x%p\n", (void *)err->err_addr); - record_vendor_data(dec_tab, hisi_oem_data_type_int64, - hip08_oem_type1_field_err_addr, - err->err_addr, NULL); + p += sprintf(p, "ERR_ADDR=0x%p ", (void *)err->err_addr); } + *(--p) = '\0'; + record_vendor_data(dec_tab, hisi_oem_data_type_text, + hip08_oem_type1_field_regs_dump, 0, buf); + step_vendor_data_tab(dec_tab, "hip08_oem_type1_event_tab"); return 0; @@ -652,73 +581,54 @@ static int decode_hip08_oem_type2_error(struct ras_events *ras, trace_seq_printf(s, "\nHISI HIP08: OEM Type-2 Error\n"); trace_seq_printf(s, "%s\n", buf); + p = buf; trace_seq_printf(s, "Reg Dump:\n"); if (err->val_bits & HISI_OEM_TYPE2_VALID_ERR_FR) { trace_seq_printf(s, "ERR_FR_0=0x%x\n", err->err_fr_0); trace_seq_printf(s, "ERR_FR_1=0x%x\n", err->err_fr_1); - record_vendor_data(dec_tab, hisi_oem_data_type_int, - hip08_oem_type2_field_err_fr_0, - err->err_fr_0, NULL); - record_vendor_data(dec_tab, hisi_oem_data_type_int, - hip08_oem_type2_field_err_fr_1, - err->err_fr_1, NULL); + p += sprintf(p, "ERR_FR_0=0x%x ERR_FR_1=0x%x ", + err->err_fr_0, err->err_fr_1); } if (err->val_bits & HISI_OEM_TYPE2_VALID_ERR_CTRL) { trace_seq_printf(s, "ERR_CTRL_0=0x%x\n", err->err_ctrl_0); trace_seq_printf(s, "ERR_CTRL_1=0x%x\n", err->err_ctrl_1); - record_vendor_data(dec_tab, hisi_oem_data_type_int, - hip08_oem_type2_field_err_ctrl_0, - err->err_ctrl_0, NULL); - record_vendor_data(dec_tab, hisi_oem_data_type_int, - hip08_oem_type2_field_err_ctrl_1, - err->err_ctrl_1, NULL); + p += sprintf(p, "ERR_CTRL_0=0x%x ERR_CTRL_1=0x%x ", + err->err_ctrl_0, err->err_ctrl_1); } if (err->val_bits & HISI_OEM_TYPE2_VALID_ERR_STATUS) { trace_seq_printf(s, "ERR_STATUS_0=0x%x\n", err->err_status_0); trace_seq_printf(s, "ERR_STATUS_1=0x%x\n", err->err_status_1); - record_vendor_data(dec_tab, hisi_oem_data_type_int, - hip08_oem_type2_field_err_status_0, - err->err_status_0, NULL); - record_vendor_data(dec_tab, hisi_oem_data_type_int, - hip08_oem_type2_field_err_status_1, - err->err_status_1, NULL); + p += sprintf(p, "ERR_STATUS_0=0x%x ERR_STATUS_1=0x%x ", + err->err_status_0, err->err_status_1); } if (err->val_bits & HISI_OEM_TYPE2_VALID_ERR_ADDR) { trace_seq_printf(s, "ERR_ADDR_0=0x%x\n", err->err_addr_0); trace_seq_printf(s, "ERR_ADDR_1=0x%x\n", err->err_addr_1); - record_vendor_data(dec_tab, hisi_oem_data_type_int, - hip08_oem_type2_field_err_addr_0, - err->err_addr_0, NULL); - record_vendor_data(dec_tab, hisi_oem_data_type_int, - hip08_oem_type2_field_err_addr_1, - err->err_addr_1, NULL); + p += sprintf(p, "ERR_ADDR_0=0x%x ERR_ADDR_1=0x%x ", + err->err_addr_0, err->err_addr_1); } if (err->val_bits & HISI_OEM_TYPE2_VALID_ERR_MISC_0) { trace_seq_printf(s, "ERR_MISC0_0=0x%x\n", err->err_misc0_0); trace_seq_printf(s, "ERR_MISC0_1=0x%x\n", err->err_misc0_1); - record_vendor_data(dec_tab, hisi_oem_data_type_int, - hip08_oem_type2_field_err_misc0_0, - err->err_misc0_0, NULL); - record_vendor_data(dec_tab, hisi_oem_data_type_int, - hip08_oem_type2_field_err_misc0_1, - err->err_misc0_1, NULL); + p += sprintf(p, "ERR_MISC0_0=0x%x ERR_MISC0_1=0x%x ", + err->err_misc0_0, err->err_misc0_1); } if (err->val_bits & HISI_OEM_TYPE2_VALID_ERR_MISC_1) { trace_seq_printf(s, "ERR_MISC1_0=0x%x\n", err->err_misc1_0); trace_seq_printf(s, "ERR_MISC1_1=0x%x\n", err->err_misc1_1); - record_vendor_data(dec_tab, hisi_oem_data_type_int, - hip08_oem_type2_field_err_misc1_0, - err->err_misc1_0, NULL); - record_vendor_data(dec_tab, hisi_oem_data_type_int, - hip08_oem_type2_field_err_misc1_1, - err->err_misc1_1, NULL); + p += sprintf(p, "ERR_MISC1_0=0x%x ERR_MISC1_1=0x%x ", + err->err_misc1_0, err->err_misc1_1); } + *(--p) = '\0'; + record_vendor_data(dec_tab, hisi_oem_data_type_text, + hip08_oem_type2_field_regs_dump, 0, buf); + step_vendor_data_tab(dec_tab, "hip08_oem_type2_event_tab"); return 0; @@ -816,17 +726,20 @@ static int decode_hip08_pcie_local_error(struct ras_events *ras, trace_seq_printf(s, "\nHISI HIP08: PCIe local error\n"); trace_seq_printf(s, "%s\n", buf); + p = buf; trace_seq_printf(s, "Reg Dump:\n"); for (i = 0; i < 33; i++) { if (err->val_bits & BIT(HISI_PCIE_LOCAL_VALID_ERR_MISC + i)) { trace_seq_printf(s, "ERR_MISC_%d=0x%x\n", i, err->err_misc[i]); - record_vendor_data(dec_tab, hisi_oem_data_type_int, - (hip08_pcie_local_field_err_misc + i), - err->err_misc[i], NULL); + p += sprintf(p, "ERR_MISC_%d=0x%x ", i, err->err_misc[i]); } } + *(--p) = '\0'; + record_vendor_data(dec_tab, hisi_oem_data_type_text, + hip08_pcie_local_field_regs_dump, 0, buf); + step_vendor_data_tab(dec_tab, "hip08_pcie_local_event_tab"); return 0; From patchwork Tue Oct 8 12:38:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaofei Tan X-Patchwork-Id: 11179561 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ACB0014DB for ; Tue, 8 Oct 2019 12:41:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8E0CD2173B for ; Tue, 8 Oct 2019 12:41:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730878AbfJHMl4 (ORCPT ); Tue, 8 Oct 2019 08:41:56 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:36692 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730719AbfJHMl4 (ORCPT ); Tue, 8 Oct 2019 08:41:56 -0400 Received: from DGGEMS413-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 39C0BAF65C89AD05B3BB; Tue, 8 Oct 2019 20:41:53 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS413-HUB.china.huawei.com (10.3.19.213) with Microsoft SMTP Server id 14.3.439.0; Tue, 8 Oct 2019 20:41:45 +0800 From: Xiaofei Tan To: , CC: Xiaofei Tan , , , Subject: [PATCH 2/5] rasdaemon: add underscore(_) for some logging item names for hip08 Date: Tue, 8 Oct 2019 20:38:55 +0800 Message-ID: <1570538338-230884-3-git-send-email-tanxiaofei@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1570538338-230884-1-git-send-email-tanxiaofei@huawei.com> References: <1570538338-230884-1-git-send-email-tanxiaofei@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-edac-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org Add underscore(_) for some logging item names for hip08. Then we can match and catch specific fields of the log easily if needed. Signed-off-by: Xiaofei Tan --- non-standard-hisi_hip08.c | 48 +++++++++++++++++++++++------------------------ 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/non-standard-hisi_hip08.c b/non-standard-hisi_hip08.c index 393053d..9de7be8 100644 --- a/non-standard-hisi_hip08.c +++ b/non-standard-hisi_hip08.c @@ -264,11 +264,11 @@ static char *oem_type2_sub_module_id(char *p, uint8_t module_id, static char *pcie_local_sub_module_name(uint8_t id) { switch (id) { - case HISI_PCIE_SUB_MODULE_ID_AP: return "AP Layer"; - case HISI_PCIE_SUB_MODULE_ID_TL: return "TL Layer"; - case HISI_PCIE_SUB_MODULE_ID_MAC: return "MAC Layer"; - case HISI_PCIE_SUB_MODULE_ID_DL: return "DL Layer"; - case HISI_PCIE_SUB_MODULE_ID_SDI: return "SDI Layer"; + case HISI_PCIE_SUB_MODULE_ID_AP: return "AP_Layer"; + case HISI_PCIE_SUB_MODULE_ID_TL: return "TL_Layer"; + case HISI_PCIE_SUB_MODULE_ID_MAC: return "MAC_Layer"; + case HISI_PCIE_SUB_MODULE_ID_DL: return "DL_Layer"; + case HISI_PCIE_SUB_MODULE_ID_SDI: return "SDI_Layer"; } return "unknown"; } @@ -411,26 +411,26 @@ static int decode_hip08_oem_type1_error(struct ras_events *ras, #endif p += sprintf(p, "[ "); - p += sprintf(p, "Table version=%d ", err->version); + p += sprintf(p, "table_version=%d ", err->version); record_vendor_data(dec_tab, hisi_oem_data_type_int, hip08_oem_type1_field_version, err->version, NULL); if (err->val_bits & HISI_OEM_VALID_SOC_ID) { - p += sprintf(p, "SOC ID=%d ", err->soc_id); + p += sprintf(p, "SOC_ID=%d ", err->soc_id); record_vendor_data(dec_tab, hisi_oem_data_type_int, hip08_oem_type1_field_soc_id, err->soc_id, NULL); } if (err->val_bits & HISI_OEM_VALID_SOCKET_ID) { - p += sprintf(p, "socket ID=%d ", err->socket_id); + p += sprintf(p, "socket_ID=%d ", err->socket_id); record_vendor_data(dec_tab, hisi_oem_data_type_int, hip08_oem_type1_field_socket_id, err->socket_id, NULL); } if (err->val_bits & HISI_OEM_VALID_NIMBUS_ID) { - p += sprintf(p, "nimbus ID=%d ", err->nimbus_id); + p += sprintf(p, "nimbus_ID=%d ", err->nimbus_id); record_vendor_data(dec_tab, hisi_oem_data_type_int, hip08_oem_type1_field_nimbus_id, err->nimbus_id, NULL); @@ -451,7 +451,7 @@ static int decode_hip08_oem_type1_error(struct ras_events *ras, } if (err->val_bits & HISI_OEM_VALID_ERR_SEVERITY) { - p += sprintf(p, "error severity=%s ", + p += sprintf(p, "error_severity=%s ", err_severity(err->err_severity)); record_vendor_data(dec_tab, hisi_oem_data_type_text, hip08_oem_type1_field_err_sev, @@ -528,26 +528,26 @@ static int decode_hip08_oem_type2_error(struct ras_events *ras, } #endif p += sprintf(p, "[ "); - p += sprintf(p, "Table version=%d ", err->version); + p += sprintf(p, "table_version=%d ", err->version); record_vendor_data(dec_tab, hisi_oem_data_type_int, hip08_oem_type2_field_version, err->version, NULL); if (err->val_bits & HISI_OEM_VALID_SOC_ID) { - p += sprintf(p, "SOC ID=%d ", err->soc_id); + p += sprintf(p, "SOC_ID=%d ", err->soc_id); record_vendor_data(dec_tab, hisi_oem_data_type_int, hip08_oem_type2_field_soc_id, err->soc_id, NULL); } if (err->val_bits & HISI_OEM_VALID_SOCKET_ID) { - p += sprintf(p, "socket ID=%d ", err->socket_id); + p += sprintf(p, "socket_ID=%d ", err->socket_id); record_vendor_data(dec_tab, hisi_oem_data_type_int, hip08_oem_type2_field_socket_id, err->socket_id, NULL); } if (err->val_bits & HISI_OEM_VALID_NIMBUS_ID) { - p += sprintf(p, "nimbus ID=%d ", err->nimbus_id); + p += sprintf(p, "nimbus_ID=%d ", err->nimbus_id); record_vendor_data(dec_tab, hisi_oem_data_type_int, hip08_oem_type2_field_nimbus_id, err->nimbus_id, NULL); @@ -570,7 +570,7 @@ static int decode_hip08_oem_type2_error(struct ras_events *ras, } if (err->val_bits & HISI_OEM_VALID_ERR_SEVERITY) { - p += sprintf(p, "error severity=%s ", + p += sprintf(p, "error_severity=%s ", err_severity(err->err_severity)); record_vendor_data(dec_tab, hisi_oem_data_type_text, hip08_oem_type2_field_err_sev, @@ -660,33 +660,33 @@ static int decode_hip08_pcie_local_error(struct ras_events *ras, } #endif p += sprintf(p, "[ "); - p += sprintf(p, "Table version=%d ", err->version); + p += sprintf(p, "table_version=%d ", err->version); record_vendor_data(dec_tab, hisi_oem_data_type_int, hip08_pcie_local_field_version, err->version, NULL); if (err->val_bits & HISI_PCIE_LOCAL_VALID_SOC_ID) { - p += sprintf(p, "SOC ID=%d ", err->soc_id); + p += sprintf(p, "SOC_ID=%d ", err->soc_id); record_vendor_data(dec_tab, hisi_oem_data_type_int, hip08_pcie_local_field_soc_id, err->soc_id, NULL); } if (err->val_bits & HISI_PCIE_LOCAL_VALID_SOCKET_ID) { - p += sprintf(p, "socket ID=%d ", err->socket_id); + p += sprintf(p, "socket_ID=%d ", err->socket_id); record_vendor_data(dec_tab, hisi_oem_data_type_int, hip08_pcie_local_field_socket_id, err->socket_id, NULL); } if (err->val_bits & HISI_PCIE_LOCAL_VALID_NIMBUS_ID) { - p += sprintf(p, "nimbus ID=%d ", err->nimbus_id); + p += sprintf(p, "nimbus_ID=%d ", err->nimbus_id); record_vendor_data(dec_tab, hisi_oem_data_type_int, hip08_pcie_local_field_nimbus_id, err->nimbus_id, NULL); } if (err->val_bits & HISI_PCIE_LOCAL_VALID_SUB_MODULE_ID) { - p += sprintf(p, "sub module=%s ", + p += sprintf(p, "submodule=%s ", pcie_local_sub_module_name(err->sub_module_id)); record_vendor_data(dec_tab, hisi_oem_data_type_text, hip08_pcie_local_field_sub_module_id, @@ -694,21 +694,21 @@ static int decode_hip08_pcie_local_error(struct ras_events *ras, } if (err->val_bits & HISI_PCIE_LOCAL_VALID_CORE_ID) { - p += sprintf(p, "core ID=core%d ", err->core_id); + p += sprintf(p, "core_ID=core%d ", err->core_id); record_vendor_data(dec_tab, hisi_oem_data_type_int, hip08_pcie_local_field_core_id, err->core_id, NULL); } if (err->val_bits & HISI_PCIE_LOCAL_VALID_PORT_ID) { - p += sprintf(p, "port ID=port%d ", err->port_id); + p += sprintf(p, "port_ID=port%d ", err->port_id); record_vendor_data(dec_tab, hisi_oem_data_type_int, hip08_pcie_local_field_port_id, err->port_id, NULL); } if (err->val_bits & HISI_PCIE_LOCAL_VALID_ERR_SEVERITY) { - p += sprintf(p, "error severity=%s ", + p += sprintf(p, "error_severity=%s ", err_severity(err->err_severity)); record_vendor_data(dec_tab, hisi_oem_data_type_text, hip08_pcie_local_field_err_sev, @@ -716,7 +716,7 @@ static int decode_hip08_pcie_local_error(struct ras_events *ras, } if (err->val_bits & HISI_PCIE_LOCAL_VALID_ERR_TYPE) { - p += sprintf(p, "error type=0x%x ", err->err_type); + p += sprintf(p, "error_type=0x%x ", err->err_type); record_vendor_data(dec_tab, hisi_oem_data_type_int, hip08_pcie_local_field_err_type, err->err_type, NULL); From patchwork Tue Oct 8 12:38:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaofei Tan X-Patchwork-Id: 11179565 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3EB0715AB for ; Tue, 8 Oct 2019 12:42:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2A00C2173B for ; Tue, 8 Oct 2019 12:42:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730890AbfJHMmB (ORCPT ); Tue, 8 Oct 2019 08:42:01 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:3272 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730605AbfJHMmA (ORCPT ); Tue, 8 Oct 2019 08:42:00 -0400 Received: from DGGEMS413-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 49AA22F73986B259C67F; Tue, 8 Oct 2019 20:41:58 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS413-HUB.china.huawei.com (10.3.19.213) with Microsoft SMTP Server id 14.3.439.0; Tue, 8 Oct 2019 20:41:48 +0800 From: Xiaofei Tan To: , CC: Xiaofei Tan , , , Subject: [PATCH 3/5] rasdaemon: change submodule ID of sqlite3 DB field to text for hip08 Date: Tue, 8 Oct 2019 20:38:56 +0800 Message-ID: <1570538338-230884-4-git-send-email-tanxiaofei@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1570538338-230884-1-git-send-email-tanxiaofei@huawei.com> References: <1570538338-230884-1-git-send-email-tanxiaofei@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-edac-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org Change submodule ID of sqlite3 DB field from integer to text for hip08 to make it easier to understand by user. For example, from: INSERT INTO hip08_oem_type2_event VALUES(1,1,1,0,0,'SMMU',2, 'corrected',''); change to: INSERT INTO hip08_oem_type2_event VALUES(1,1,1,0,0,'SMMU','MGMT_SMMU', 'corrected',''); Signed-off-by: Xiaofei Tan --- non-standard-hisi_hip08.c | 113 +++++++++++++++++++++++++++------------------- 1 file changed, 67 insertions(+), 46 deletions(-) diff --git a/non-standard-hisi_hip08.c b/non-standard-hisi_hip08.c index 9de7be8..002f4bf 100644 --- a/non-standard-hisi_hip08.c +++ b/non-standard-hisi_hip08.c @@ -46,8 +46,8 @@ /* HISI OEM format2 error definitions */ #define HISI_OEM_MODULE_ID_SMMU 0 #define HISI_OEM_MODULE_ID_HHA 1 -#define HISI_OEM_MODULE_ID_HLLC 2 -#define HISI_OEM_MODULE_ID_PA 3 +#define HISI_OEM_MODULE_ID_PA 2 +#define HISI_OEM_MODULE_ID_HLLC 3 #define HISI_OEM_MODULE_ID_DDRC 4 #define HISI_OEM_TYPE2_VALID_ERR_FR BIT(6) @@ -217,48 +217,61 @@ static char *oem_type2_module_name(uint8_t module_id) return "unknown module"; } -static char *oem_type2_sub_module_id(char *p, uint8_t module_id, - uint8_t sub_module_id) +static const char *smmu_submodule_name[] = { + "HAC_SMMU", + "PCIE_SMMU", + "MGMT_SMMU", + "NIC_SMMU", +}; + +static const char *hllc_submodule_name[] = { + "HLLC0", + "HLLC1", + "HLLC2", +}; + +static const char *hha_submodule_name[] = { + "TA_HHA0", + "TA_HHA1", + "TB_HHA0", + "TB_HHA1" +}; + +static const char *ddrc_submodule_name[] = { + "TA_DDRC0", + "TA_DDRC1", + "TA_DDRC2", + "TA_DDRC3", + "TB_DDRC0", + "TB_DDRC1", + "TB_DDRC2", + "TB_DDRC3", +}; + +static const char *oem_type2_sub_module_name(uint8_t module_id, uint8_t sub_module_id) { switch (module_id) { case HISI_OEM_MODULE_ID_SMMU: + if (sub_module_id < sizeof(smmu_submodule_name)/sizeof(char *)) + return smmu_submodule_name[sub_module_id]; + break; case HISI_OEM_MODULE_ID_HLLC: - case HISI_OEM_MODULE_ID_PA: - p += sprintf(p, "%d ", sub_module_id); + if (sub_module_id < sizeof(hllc_submodule_name)/sizeof(char *)) + return hllc_submodule_name[sub_module_id]; break; - + case HISI_OEM_MODULE_ID_PA: + return "PA"; case HISI_OEM_MODULE_ID_HHA: - if (sub_module_id == 0) - p += sprintf(p, "TA HHA0 "); - else if (sub_module_id == 1) - p += sprintf(p, "TA HHA1 "); - else if (sub_module_id == 2) - p += sprintf(p, "TB HHA0 "); - else if (sub_module_id == 3) - p += sprintf(p, "TB HHA1 "); + if (sub_module_id < sizeof(hha_submodule_name)/sizeof(char *)) + return hha_submodule_name[sub_module_id]; break; - case HISI_OEM_MODULE_ID_DDRC: - if (sub_module_id == 0) - p += sprintf(p, "TA DDRC0 "); - else if (sub_module_id == 1) - p += sprintf(p, "TA DDRC1 "); - else if (sub_module_id == 2) - p += sprintf(p, "TA DDRC2 "); - else if (sub_module_id == 3) - p += sprintf(p, "TA DDRC3 "); - else if (sub_module_id == 4) - p += sprintf(p, "TB DDRC0 "); - else if (sub_module_id == 5) - p += sprintf(p, "TB DDRC1 "); - else if (sub_module_id == 6) - p += sprintf(p, "TB DDRC2 "); - else if (sub_module_id == 7) - p += sprintf(p, "TB DDRC3 "); + if (sub_module_id < sizeof(ddrc_submodule_name)/sizeof(char *)) + return ddrc_submodule_name[sub_module_id]; break; } - return p; + return "unknown"; } static char *pcie_local_sub_module_name(uint8_t id) @@ -281,7 +294,7 @@ static const struct db_fields hip08_oem_type1_event_fields[] = { { .name = "socket_id", .type = "INTEGER" }, { .name = "nimbus_id", .type = "INTEGER" }, { .name = "module_id", .type = "TEXT" }, - { .name = "sub_module_id", .type = "INTEGER" }, + { .name = "sub_module_id", .type = "TEXT" }, { .name = "err_severity", .type = "TEXT" }, { .name = "regs_dump", .type = "TEXT" }, }; @@ -299,7 +312,7 @@ static const struct db_fields hip08_oem_type2_event_fields[] = { { .name = "socket_id", .type = "INTEGER" }, { .name = "nimbus_id", .type = "INTEGER" }, { .name = "module_id", .type = "TEXT" }, - { .name = "sub_module_id", .type = "INTEGER" }, + { .name = "sub_module_id", .type = "TEXT" }, { .name = "err_severity", .type = "TEXT" }, { .name = "regs_dump", .type = "TEXT" }, }; @@ -437,17 +450,23 @@ static int decode_hip08_oem_type1_error(struct ras_events *ras, } if (err->val_bits & HISI_OEM_VALID_MODULE_ID) { - p += sprintf(p, "module=%s-", + p += sprintf(p, "module=%s ", oem_type1_module_name(err->module_id)); record_vendor_data(dec_tab, hisi_oem_data_type_text, hip08_oem_type1_field_module_id, 0, oem_type1_module_name(err->module_id)); - if (err->val_bits & HISI_OEM_VALID_SUB_MODULE_ID) { - p += sprintf(p, "%d ", err->sub_module_id); - record_vendor_data(dec_tab, hisi_oem_data_type_int, - hip08_oem_type1_field_sub_module_id, - err->sub_module_id, NULL); - } + } + + if (err->val_bits & HISI_OEM_VALID_SUB_MODULE_ID) { + char submodule_name[64]; + + sprintf(submodule_name, "%s%d", + oem_type1_module_name(err->module_id), + err->sub_module_id); + p += sprintf(p, "submodule=%s ", submodule_name); + record_vendor_data(dec_tab, hisi_oem_data_type_text, + hip08_oem_type1_field_sub_module_id, + 0, submodule_name); } if (err->val_bits & HISI_OEM_VALID_ERR_SEVERITY) { @@ -562,11 +581,13 @@ static int decode_hip08_oem_type2_error(struct ras_events *ras, } if (err->val_bits & HISI_OEM_VALID_SUB_MODULE_ID) { - p = oem_type2_sub_module_id(p, err->module_id, - err->sub_module_id); - record_vendor_data(dec_tab, hisi_oem_data_type_int, + const char *str = oem_type2_sub_module_name(err->module_id, + err->sub_module_id); + + p += sprintf(p, "submodule=%s ", str); + record_vendor_data(dec_tab, hisi_oem_data_type_text, hip08_oem_type2_field_sub_module_id, - err->sub_module_id, NULL); + 0, str); } if (err->val_bits & HISI_OEM_VALID_ERR_SEVERITY) { From patchwork Tue Oct 8 12:38:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaofei Tan X-Patchwork-Id: 11179567 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1361014DB for ; Tue, 8 Oct 2019 12:42:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EA12420815 for ; Tue, 8 Oct 2019 12:42:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730605AbfJHMmE (ORCPT ); Tue, 8 Oct 2019 08:42:04 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:3274 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730883AbfJHMmE (ORCPT ); Tue, 8 Oct 2019 08:42:04 -0400 Received: from DGGEMS413-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 4E8F7542217A6AE6E34C; Tue, 8 Oct 2019 20:41:58 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS413-HUB.china.huawei.com (10.3.19.213) with Microsoft SMTP Server id 14.3.439.0; Tue, 8 Oct 2019 20:41:50 +0800 From: Xiaofei Tan To: , CC: Xiaofei Tan , , , Subject: [PATCH 4/5] rasdaemon: add timestamp for hip08 OEM error records in sqlite3 DB Date: Tue, 8 Oct 2019 20:38:57 +0800 Message-ID: <1570538338-230884-5-git-send-email-tanxiaofei@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1570538338-230884-1-git-send-email-tanxiaofei@huawei.com> References: <1570538338-230884-1-git-send-email-tanxiaofei@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-edac-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org This patch does two things: 1.Add timestamp for hip08 OEM error records in sqlite3 DB. 2.Add suffix "_v2" for hip08 OEM event names to keep compatibility with old sqlite3 DB. Signed-off-by: Xiaofei Tan --- non-standard-hisi_hip07.c | 9 ++++++--- non-standard-hisi_hip08.c | 41 ++++++++++++++++++++++++++++++++--------- ras-non-standard-handler.c | 3 +-- ras-non-standard-handler.h | 2 +- 4 files changed, 40 insertions(+), 15 deletions(-) diff --git a/non-standard-hisi_hip07.c b/non-standard-hisi_hip07.c index 7f58fb3..09ddcb2 100644 --- a/non-standard-hisi_hip07.c +++ b/non-standard-hisi_hip07.c @@ -89,11 +89,13 @@ static char *sas_axi_err_type(int etype) static int decode_hip07_sas_error(struct ras_events *ras, struct ras_ns_dec_tab *dec_tab, - struct trace_seq *s, const void *error) + struct trace_seq *s, + struct ras_non_standard_event *event) { char buf[1024]; char *p = buf; - const struct hisi_sas_err_sec *err = error; + const struct hisi_sas_err_sec *err = + (struct hisi_sas_err_sec *)event->error; if (err->val_bits == 0) { trace_seq_printf(s, "%s: no valid error data\n", @@ -124,7 +126,8 @@ static int decode_hip07_sas_error(struct ras_events *ras, static int decode_hip07_hns_error(struct ras_events *ras, struct ras_ns_dec_tab *dec_tab, - struct trace_seq *s, const void *error) + struct trace_seq *s, + struct ras_non_standard_event *event) { return 0; } diff --git a/non-standard-hisi_hip08.c b/non-standard-hisi_hip08.c index 002f4bf..61e19b7 100644 --- a/non-standard-hisi_hip08.c +++ b/non-standard-hisi_hip08.c @@ -140,6 +140,7 @@ enum hisi_oem_data_type { enum { hip08_oem_type1_field_id, + hip08_oem_type1_field_timestamp, hip08_oem_type1_field_version, hip08_oem_type1_field_soc_id, hip08_oem_type1_field_socket_id, @@ -152,6 +153,7 @@ enum { enum { hip08_oem_type2_field_id, + hip08_oem_type2_field_timestamp, hip08_oem_type2_field_version, hip08_oem_type2_field_soc_id, hip08_oem_type2_field_socket_id, @@ -164,6 +166,7 @@ enum { enum { hip08_pcie_local_field_id, + hip08_pcie_local_field_timestamp, hip08_pcie_local_field_version, hip08_pcie_local_field_soc_id, hip08_pcie_local_field_socket_id, @@ -289,6 +292,7 @@ static char *pcie_local_sub_module_name(uint8_t id) #ifdef HAVE_SQLITE3 static const struct db_fields hip08_oem_type1_event_fields[] = { { .name = "id", .type = "INTEGER PRIMARY KEY" }, + { .name = "timestamp", .type = "TEXT" }, { .name = "version", .type = "INTEGER" }, { .name = "soc_id", .type = "INTEGER" }, { .name = "socket_id", .type = "INTEGER" }, @@ -300,13 +304,14 @@ static const struct db_fields hip08_oem_type1_event_fields[] = { }; static const struct db_table_descriptor hip08_oem_type1_event_tab = { - .name = "hip08_oem_type1_event", + .name = "hip08_oem_type1_event_v2", .fields = hip08_oem_type1_event_fields, .num_fields = ARRAY_SIZE(hip08_oem_type1_event_fields), }; static const struct db_fields hip08_oem_type2_event_fields[] = { { .name = "id", .type = "INTEGER PRIMARY KEY" }, + { .name = "timestamp", .type = "TEXT" }, { .name = "version", .type = "INTEGER" }, { .name = "soc_id", .type = "INTEGER" }, { .name = "socket_id", .type = "INTEGER" }, @@ -318,13 +323,14 @@ static const struct db_fields hip08_oem_type2_event_fields[] = { }; static const struct db_table_descriptor hip08_oem_type2_event_tab = { - .name = "hip08_oem_type2_event", + .name = "hip08_oem_type2_event_v2", .fields = hip08_oem_type2_event_fields, .num_fields = ARRAY_SIZE(hip08_oem_type2_event_fields), }; static const struct db_fields hip08_pcie_local_event_fields[] = { { .name = "id", .type = "INTEGER PRIMARY KEY" }, + { .name = "timestamp", .type = "TEXT" }, { .name = "version", .type = "INTEGER" }, { .name = "soc_id", .type = "INTEGER" }, { .name = "socket_id", .type = "INTEGER" }, @@ -338,7 +344,7 @@ static const struct db_fields hip08_pcie_local_event_fields[] = { }; static const struct db_table_descriptor hip08_pcie_local_event_tab = { - .name = "hip08_pcie_local_event", + .name = "hip08_pcie_local_event_v2", .fields = hip08_pcie_local_event_fields, .num_fields = ARRAY_SIZE(hip08_pcie_local_event_fields), }; @@ -399,9 +405,11 @@ static int step_vendor_data_tab(struct ras_ns_dec_tab *dec_tab, char *name) /* error data decoding functions */ static int decode_hip08_oem_type1_error(struct ras_events *ras, struct ras_ns_dec_tab *dec_tab, - struct trace_seq *s, const void *error) + struct trace_seq *s, + struct ras_non_standard_event *event) { - const struct hisi_oem_type1_err_sec *err = error; + const struct hisi_oem_type1_err_sec *err = + (struct hisi_oem_type1_err_sec*)event->error; char buf[1024]; char *p = buf; @@ -422,6 +430,9 @@ static int decode_hip08_oem_type1_error(struct ras_events *ras, } } #endif + record_vendor_data(dec_tab, hisi_oem_data_type_text, + hip08_oem_type1_field_timestamp, + 0, event->timestamp); p += sprintf(p, "[ "); p += sprintf(p, "table_version=%d ", err->version); @@ -524,9 +535,11 @@ static int decode_hip08_oem_type1_error(struct ras_events *ras, static int decode_hip08_oem_type2_error(struct ras_events *ras, struct ras_ns_dec_tab *dec_tab, - struct trace_seq *s, const void *error) + struct trace_seq *s, + struct ras_non_standard_event *event) { - const struct hisi_oem_type2_err_sec *err = error; + const struct hisi_oem_type2_err_sec *err = + (struct hisi_oem_type2_err_sec *)event->error; char buf[1024]; char *p = buf; @@ -546,6 +559,10 @@ static int decode_hip08_oem_type2_error(struct ras_events *ras, } } #endif + record_vendor_data(dec_tab, hisi_oem_data_type_text, + hip08_oem_type2_field_timestamp, + 0, event->timestamp); + p += sprintf(p, "[ "); p += sprintf(p, "table_version=%d ", err->version); record_vendor_data(dec_tab, hisi_oem_data_type_int, @@ -657,9 +674,11 @@ static int decode_hip08_oem_type2_error(struct ras_events *ras, static int decode_hip08_pcie_local_error(struct ras_events *ras, struct ras_ns_dec_tab *dec_tab, - struct trace_seq *s, const void *error) + struct trace_seq *s, + struct ras_non_standard_event *event) { - const struct hisi_pcie_local_err_sec *err = error; + const struct hisi_pcie_local_err_sec *err = + (struct hisi_pcie_local_err_sec *)event->error; char buf[1024]; char *p = buf; uint32_t i; @@ -680,6 +699,10 @@ static int decode_hip08_pcie_local_error(struct ras_events *ras, } } #endif + record_vendor_data(dec_tab, hisi_oem_data_type_text, + hip08_pcie_local_field_timestamp, + 0, event->timestamp); + p += sprintf(p, "[ "); p += sprintf(p, "table_version=%d ", err->version); record_vendor_data(dec_tab, hisi_oem_data_type_int, diff --git a/ras-non-standard-handler.c b/ras-non-standard-handler.c index 4eda80b..1b5d67a 100644 --- a/ras-non-standard-handler.c +++ b/ras-non-standard-handler.c @@ -166,8 +166,7 @@ int ras_non_standard_event_handler(struct trace_seq *s, for (i = 0; dec_tab[i].decode; i++) { if (uuid_le_cmp(ev.sec_type, dec_tab[i].sec_type) == 0) { - dec_tab[i].decode(ras, &dec_tab[i], - s, ev.error); + dec_tab[i].decode(ras, &dec_tab[i], s, &ev); dec_done = true; break; } diff --git a/ras-non-standard-handler.h b/ras-non-standard-handler.h index a7e48a3..fd9dd92 100644 --- a/ras-non-standard-handler.h +++ b/ras-non-standard-handler.h @@ -23,7 +23,7 @@ typedef struct ras_ns_dec_tab { const char *sec_type; int (*decode)(struct ras_events *ras, struct ras_ns_dec_tab *dec_tab, - struct trace_seq *s, const void *err); + struct trace_seq *s, struct ras_non_standard_event *event); #ifdef HAVE_SQLITE3 #include sqlite3_stmt *stmt_dec_record; From patchwork Tue Oct 8 12:38:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaofei Tan X-Patchwork-Id: 11179569 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A1E1314DB for ; Tue, 8 Oct 2019 12:42:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8266A2070B for ; Tue, 8 Oct 2019 12:42:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730883AbfJHMmH (ORCPT ); Tue, 8 Oct 2019 08:42:07 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:3273 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730888AbfJHMmH (ORCPT ); Tue, 8 Oct 2019 08:42:07 -0400 Received: from DGGEMS413-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 5354BA25EE8FDDB1A11B; Tue, 8 Oct 2019 20:41:58 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS413-HUB.china.huawei.com (10.3.19.213) with Microsoft SMTP Server id 14.3.439.0; Tue, 8 Oct 2019 20:41:52 +0800 From: Xiaofei Tan To: , CC: Xiaofei Tan , , , Subject: [PATCH 5/5] rasdaemon: support three more modules for OEM type1 error for hip08 Date: Tue, 8 Oct 2019 20:38:58 +0800 Message-ID: <1570538338-230884-6-git-send-email-tanxiaofei@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1570538338-230884-1-git-send-email-tanxiaofei@huawei.com> References: <1570538338-230884-1-git-send-email-tanxiaofei@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-edac-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org Support three more modules for OEM type1 error for hip08. They are RDE, GIC and USB. Signed-off-by: Xiaofei Tan --- non-standard-hisi_hip08.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/non-standard-hisi_hip08.c b/non-standard-hisi_hip08.c index 61e19b7..1774ec7 100644 --- a/non-standard-hisi_hip08.c +++ b/non-standard-hisi_hip08.c @@ -26,8 +26,11 @@ #define HISI_OEM_MODULE_ID_POE 5 #define HISI_OEM_MODULE_ID_DISP 8 #define HISI_OEM_MODULE_ID_LPC 9 +#define HISI_OEM_MODULE_ID_GIC 13 +#define HISI_OEM_MODULE_ID_RDE 14 #define HISI_OEM_MODULE_ID_SAS 15 #define HISI_OEM_MODULE_ID_SATA 16 +#define HISI_OEM_MODULE_ID_USB 17 #define HISI_OEM_VALID_SOC_ID BIT(0) #define HISI_OEM_VALID_SOCKET_ID BIT(1) @@ -202,8 +205,11 @@ static char *oem_type1_module_name(uint8_t module_id) case HISI_OEM_MODULE_ID_POE: return "POE"; case HISI_OEM_MODULE_ID_DISP: return "DISP"; case HISI_OEM_MODULE_ID_LPC: return "LPC"; + case HISI_OEM_MODULE_ID_GIC: return "GIC"; + case HISI_OEM_MODULE_ID_RDE: return "RDE"; case HISI_OEM_MODULE_ID_SAS: return "SAS"; case HISI_OEM_MODULE_ID_SATA: return "SATA"; + case HISI_OEM_MODULE_ID_USB: return "USB"; } return "unknown"; }