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a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector2-amdcloud-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=vrxrustGCN75leJlc9bS6aBW7tddQEq8xRC+9wW2m/w=; b=mYjzhxzzOz/c/RZ4M+ydleFqNbAL7jr6oaWhF8vT5Gw1gFcud8ZQLBklczzqcID5OLpvEWBZp8Mdbo7OwS/liZ8ORhd2T1BA1qjNf/Pukrow7K3GqADf2gg1ddzGQvyJb+x6FLLcadqF/w4lw+0+ud65i2XMG5a9SOr8eL/SrbA= X-Mailman-Original-Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Rodrigo.Siqueira@amd.com; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" LT-tunable PHY Repeaters can operate in two different modes: transparent (default) and non-transparent. The value 0x55 specifies the transparent mode, and 0xaa represents the non-transparent; this commit adds these two values as definitions. Cc: Abdoulaye Berthe Cc: Harry Wentland Cc: Leo Li Cc: Jani Nikula Cc: Manasi Navare Cc: Ville Syrjälä Signed-off-by: Abdoulaye Berthe Signed-off-by: Rodrigo Siqueira Reviewed-by: Ville Syrjälä Reviewed-by: Harry Wentland --- include/drm/drm_dp_helper.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index bf62b43aaf2b..cfadeeef8492 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -1034,6 +1034,10 @@ #define DP_SYMBOL_ERROR_COUNT_LANE3_PHY_REPEATER1 0xf003b /* 1.3 */ #define DP_FEC_STATUS_PHY_REPEATER1 0xf0290 /* 1.4 */ +/* Repeater modes */ +#define DP_PHY_REPEATER_MODE_TRANSPARENT 0x55 /* 1.3 */ +#define DP_PHY_REPEATER_MODE_NON_TRANSPARENT 0xaa /* 1.3 */ + /* DP HDCP message start offsets in DPCD address space */ #define DP_HDCP_2_2_AKE_INIT_OFFSET DP_HDCP_2_2_REG_RTX_OFFSET #define DP_HDCP_2_2_AKE_SEND_CERT_OFFSET DP_HDCP_2_2_REG_CERT_RX_OFFSET