From patchwork Wed Oct 16 10:32:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uma Shankar X-Patchwork-Id: 11192809 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 047591668 for ; Wed, 16 Oct 2019 10:03:39 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E0C0920650 for ; Wed, 16 Oct 2019 10:03:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E0C0920650 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6C3276E90C; Wed, 16 Oct 2019 10:03:38 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 22ABE6E90F for ; Wed, 16 Oct 2019 10:03:37 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Oct 2019 03:03:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,303,1566889200"; d="scan'208";a="189633911" Received: from linuxpresi1-desktop.iind.intel.com ([10.223.74.143]) by orsmga008.jf.intel.com with ESMTP; 16 Oct 2019 03:03:34 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org Date: Wed, 16 Oct 2019 16:02:44 +0530 Message-Id: <20191016103249.32121-2-uma.shankar@intel.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191016103249.32121-1-uma.shankar@intel.com> References: <20191016103249.32121-1-uma.shankar@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [v1 1/6] drm/i915/display: Add HDR Capability detection for LSPCON X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" LSPCON firmware exposes HDR capability through LPCON_CAPABILITIES DPCD register. LSPCON implementations capable of supporting HDR set HDR_CAPABILITY bit in LSPCON_CAPABILITIES to 1. This patch reads the same, detects the HDR capability and adds this to intel_lspcon struct. Signed-off-by: Uma Shankar --- .../drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_lspcon.c | 32 +++++++++++++++++++ 2 files changed, 33 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 40390d855815..560af086259a 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1268,6 +1268,7 @@ struct intel_lspcon { bool active; enum drm_lspcon_mode mode; enum lspcon_vendor vendor; + bool hdr_supported; }; struct intel_digital_port { diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c index f8f1308643a9..a1d0127b7f57 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.c +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c @@ -35,6 +35,8 @@ #define LSPCON_VENDOR_PARADE_OUI 0x001CF8 #define LSPCON_VENDOR_MCA_OUI 0x0060AD +#define DPCD_MCA_LSPCON_HDR_STATUS 0x70003 + /* AUX addresses to write MCA AVI IF */ #define LSPCON_MCA_AVI_IF_WRITE_OFFSET 0x5C0 #define LSPCON_MCA_AVI_IF_CTRL 0x5DF @@ -104,6 +106,31 @@ static bool lspcon_detect_vendor(struct intel_lspcon *lspcon) return true; } +static bool lspcon_detect_hdr_capability(struct intel_lspcon *lspcon) +{ + struct intel_dp *dp = lspcon_to_intel_dp(lspcon); + u8 hdr_caps; + int ret; + + /* Enable HDR for MCA based LSPCON devices */ + if (lspcon->vendor == LSPCON_VENDOR_MCA) + ret = drm_dp_dpcd_read(&dp->aux, DPCD_MCA_LSPCON_HDR_STATUS, + &hdr_caps, 1); + else + return false; + + if (ret < 0) { + DRM_DEBUG_KMS("hdr capability detection failed\n"); + lspcon->hdr_supported = false; + return false; + } else if (hdr_caps & 0x1) { + DRM_DEBUG_KMS("lspcon capable of HDR\n"); + lspcon->hdr_supported = true; + } + + return true; +} + static enum drm_lspcon_mode lspcon_get_current_mode(struct intel_lspcon *lspcon) { enum drm_lspcon_mode current_mode; @@ -581,6 +608,11 @@ bool lspcon_init(struct intel_digital_port *intel_dig_port) return false; } + if (!lspcon_detect_hdr_capability(lspcon)) { + DRM_ERROR("LSPCON hdr detection failed\n"); + return false; + } + connector->ycbcr_420_allowed = true; lspcon->active = true; DRM_DEBUG_KMS("Success: LSPCON init\n"); From patchwork Wed Oct 16 10:32:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uma Shankar X-Patchwork-Id: 11192811 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1FF9417E1 for ; Wed, 16 Oct 2019 10:03:42 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 085D220650 for ; Wed, 16 Oct 2019 10:03:42 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 085D220650 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8E62C6E90F; Wed, 16 Oct 2019 10:03:41 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id F23326E90F for ; Wed, 16 Oct 2019 10:03:39 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Oct 2019 03:03:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,303,1566889200"; d="scan'208";a="189633925" Received: from linuxpresi1-desktop.iind.intel.com ([10.223.74.143]) by orsmga008.jf.intel.com with ESMTP; 16 Oct 2019 03:03:37 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org Date: Wed, 16 Oct 2019 16:02:45 +0530 Message-Id: <20191016103249.32121-3-uma.shankar@intel.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191016103249.32121-1-uma.shankar@intel.com> References: <20191016103249.32121-1-uma.shankar@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [v1 2/6] drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Gen9 hardware supports HDMI2.0 through LSPCON chips. Extending HDR support for MCA LSPCON based GEN9 devices. SOC will drive LSPCON as DP and send HDR metadata as standard DP SDP packets. LSPCON will be set to operate in PCON mode, will receive the metadata and create Dynamic Range and Mastering Infoframe (DRM packets) and send it to HDR capable HDMI sink devices. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_hdmi.c | 33 +++++++++++++++++++ drivers/gpu/drm/i915/display/intel_lspcon.c | 36 ++++++++++++++------- drivers/gpu/drm/i915/display/intel_lspcon.h | 4 +++ 3 files changed, 62 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index 92d1cbbbee2b..460e10fb1782 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -576,6 +576,39 @@ static u32 hsw_infoframes_enabled(struct intel_encoder *encoder, return val & mask; } +void lspcon_drm_write_infoframe(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + unsigned int type, + const void *frame, ssize_t len) +{ + const u32 *data = frame; + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + i915_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(cpu_transcoder); + int data_size; + int i; + u32 val = I915_READ(ctl_reg); + + data_size = hsw_dip_data_size(dev_priv, type); + + val &= ~hsw_infoframe_enable(type); + I915_WRITE(ctl_reg, val); + + for (i = 0; i < len; i += 4) { + I915_WRITE(hsw_dip_data_reg(dev_priv, cpu_transcoder, + type, i >> 2), *data); + data++; + } + /* Write every possible data byte to force correct ECC calculation. */ + for (; i < data_size; i += 4) + I915_WRITE(hsw_dip_data_reg(dev_priv, cpu_transcoder, + type, i >> 2), 0); + + val |= hsw_infoframe_enable(type); + I915_WRITE(ctl_reg, val); + POSTING_READ(ctl_reg); +} + static const u8 infoframe_type_to_idx[] = { HDMI_PACKET_TYPE_GENERAL_CONTROL, HDMI_PACKET_TYPE_GAMUT_METADATA, diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c index a1d0127b7f57..51ad5f02e700 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.c +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c @@ -460,27 +460,41 @@ void lspcon_write_infoframe(struct intel_encoder *encoder, unsigned int type, const void *frame, ssize_t len) { - bool ret; + bool ret = true; struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); struct intel_lspcon *lspcon = enc_to_intel_lspcon(&encoder->base); - /* LSPCON only needs AVI IF */ - if (type != HDMI_INFOFRAME_TYPE_AVI) + if (!(type == HDMI_INFOFRAME_TYPE_AVI || + type == HDMI_PACKET_TYPE_GAMUT_METADATA)) return; - if (lspcon->vendor == LSPCON_VENDOR_MCA) - ret = _lspcon_write_avi_infoframe_mca(&intel_dp->aux, - frame, len); - else - ret = _lspcon_write_avi_infoframe_parade(&intel_dp->aux, - frame, len); + /* + * Supporting HDR on MCA LSPCON + * Todo: Add support for Parade later + */ + if (type == HDMI_PACKET_TYPE_GAMUT_METADATA && + lspcon->vendor != LSPCON_VENDOR_MCA) + return; + + if (lspcon->vendor == LSPCON_VENDOR_MCA) { + if (type == HDMI_INFOFRAME_TYPE_AVI) + ret = _lspcon_write_avi_infoframe_mca(&intel_dp->aux, + frame, len); + else if (type == HDMI_PACKET_TYPE_GAMUT_METADATA) + lspcon_drm_write_infoframe(encoder, crtc_state, + HDMI_PACKET_TYPE_GAMUT_METADATA, + frame, VIDEO_DIP_DATA_SIZE); + } else { + ret = _lspcon_write_avi_infoframe_parade(&intel_dp->aux, frame, + len); + } if (!ret) { - DRM_ERROR("Failed to write AVI infoframes\n"); + DRM_ERROR("Failed to write infoframes\n"); return; } - DRM_DEBUG_DRIVER("AVI infoframes updated successfully\n"); + DRM_DEBUG_DRIVER("Infoframes updated successfully\n"); } void lspcon_read_infoframe(struct intel_encoder *encoder, diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h b/drivers/gpu/drm/i915/display/intel_lspcon.h index 37cfddf8a9c5..65878904f672 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.h +++ b/drivers/gpu/drm/i915/display/intel_lspcon.h @@ -35,4 +35,8 @@ u32 lspcon_infoframes_enabled(struct intel_encoder *encoder, void lspcon_ycbcr420_config(struct drm_connector *connector, struct intel_crtc_state *crtc_state); +void lspcon_drm_write_infoframe(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + unsigned int type, + const void *frame, ssize_t len); #endif /* __INTEL_LSPCON_H__ */ From patchwork Wed Oct 16 10:32:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uma Shankar X-Patchwork-Id: 11192813 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 53CBB1575 for ; Wed, 16 Oct 2019 10:03:45 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3BA0020650 for ; Wed, 16 Oct 2019 10:03:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3BA0020650 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C8C0E6E910; Wed, 16 Oct 2019 10:03:44 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id A2C0B6E910 for ; Wed, 16 Oct 2019 10:03:43 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Oct 2019 03:03:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,303,1566889200"; d="scan'208";a="189633938" Received: from linuxpresi1-desktop.iind.intel.com ([10.223.74.143]) by orsmga008.jf.intel.com with ESMTP; 16 Oct 2019 03:03:39 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org Date: Wed, 16 Oct 2019 16:02:46 +0530 Message-Id: <20191016103249.32121-4-uma.shankar@intel.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191016103249.32121-1-uma.shankar@intel.com> References: <20191016103249.32121-1-uma.shankar@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [v1 3/6] drm/i915/display: Attach HDR property for capable Gen9 devices X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Attach HDR property for Gen9 devices with MCA LSPCON chips. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_lspcon.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c index 51ad5f02e700..c32452360eeb 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.c +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c @@ -627,6 +627,11 @@ bool lspcon_init(struct intel_digital_port *intel_dig_port) return false; } + if (lspcon->vendor == LSPCON_VENDOR_MCA && lspcon->hdr_supported) + drm_object_attach_property(&connector->base, + connector->dev->mode_config.hdr_output_metadata_property, + 0); + connector->ycbcr_420_allowed = true; lspcon->active = true; DRM_DEBUG_KMS("Success: LSPCON init\n"); From patchwork Wed Oct 16 10:32:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uma Shankar X-Patchwork-Id: 11192815 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2B8C11575 for ; Wed, 16 Oct 2019 10:03:47 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 13F4820650 for ; Wed, 16 Oct 2019 10:03:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 13F4820650 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B19C96E911; Wed, 16 Oct 2019 10:03:46 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 349A16E911 for ; Wed, 16 Oct 2019 10:03:46 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Oct 2019 03:03:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,303,1566889200"; d="scan'208";a="189633950" Received: from linuxpresi1-desktop.iind.intel.com ([10.223.74.143]) by orsmga008.jf.intel.com with ESMTP; 16 Oct 2019 03:03:43 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org Date: Wed, 16 Oct 2019 16:02:47 +0530 Message-Id: <20191016103249.32121-5-uma.shankar@intel.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191016103249.32121-1-uma.shankar@intel.com> References: <20191016103249.32121-1-uma.shankar@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [v1 4/6] drm/i915/display: Set HDR Infoframe for HDR capable LSPCON devices X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Send Dynamic Range and Mastering Infoframe (DRM for HDR metadata) as SDP packet to LSPCON following the DP spec. LSPCON receives the same and sends it to HDMI sink. Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic_state_helper.c | 1 + drivers/gpu/drm/drm_atomic_uapi.c | 1 + drivers/gpu/drm/i915/display/intel_ddi.c | 10 ++++++++++ drivers/gpu/drm/i915/display/intel_dp.c | 2 +- drivers/gpu/drm/i915/display/intel_lspcon.h | 3 +++ include/drm/drm_connector.h | 1 + 6 files changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c b/drivers/gpu/drm/drm_atomic_state_helper.c index d0a937fb0c56..e78b3a1626fd 100644 --- a/drivers/gpu/drm/drm_atomic_state_helper.c +++ b/drivers/gpu/drm/drm_atomic_state_helper.c @@ -416,6 +416,7 @@ __drm_atomic_helper_connector_duplicate_state(struct drm_connector *connector, if (state->hdr_output_metadata) drm_property_blob_get(state->hdr_output_metadata); + state->hdr_metadata_changed = false; /* Don't copy over a writeback job, they are used only once */ state->writeback_job = NULL; diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index 0d466d3b0809..5beabcd42d30 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -734,6 +734,7 @@ static int drm_atomic_connector_set_property(struct drm_connector *connector, val, sizeof(struct hdr_output_metadata), -1, &replaced); + state->hdr_metadata_changed |= replaced; return ret; } else if (property == config->aspect_ratio_property) { state->picture_aspect_ratio = val; diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 80f8e2698be0..bfb680d3f4cf 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3847,6 +3847,8 @@ static void intel_enable_ddi_dp(struct intel_encoder *encoder, { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); + struct intel_lspcon *lspcon = + enc_to_intel_lspcon(&encoder->base); enum port port = encoder->port; if (port == PORT_A && INTEL_GEN(dev_priv) < 9) @@ -3856,6 +3858,12 @@ static void intel_enable_ddi_dp(struct intel_encoder *encoder, intel_psr_enable(intel_dp, crtc_state); intel_dp_vsc_enable(intel_dp, crtc_state, conn_state); intel_dp_hdr_metadata_enable(intel_dp, crtc_state, conn_state); + + /* Set the infoframe for NON modeset cases as well */ + if (lspcon->active && lspcon->hdr_supported && + conn_state->hdr_metadata_changed) + intel_dp_setup_hdr_metadata_infoframe_sdp(intel_dp, crtc_state, + conn_state); intel_edp_drrs_enable(intel_dp, crtc_state); if (crtc_state->has_audio) @@ -4027,6 +4035,8 @@ static void intel_ddi_update_pipe(struct intel_encoder *encoder, { struct intel_connector *connector = to_intel_connector(conn_state->connector); + struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); + struct intel_hdcp *hdcp = &connector->hdcp; bool content_protection_type_changed = (conn_state->hdcp_content_type != hdcp->content_type && diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index dd5dc1e38495..d92777bd3bed 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4624,7 +4624,7 @@ intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp, crtc_state, DP_SDP_VSC, &vsc_sdp, sizeof(vsc_sdp)); } -static void +void intel_dp_setup_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state) diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h b/drivers/gpu/drm/i915/display/intel_lspcon.h index 65878904f672..2a175ea7eac2 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.h +++ b/drivers/gpu/drm/i915/display/intel_lspcon.h @@ -39,4 +39,7 @@ void lspcon_drm_write_infoframe(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, unsigned int type, const void *frame, ssize_t len); +void intel_dp_setup_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state); #endif /* __INTEL_LSPCON_H__ */ diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h index 5f8c3389d46f..1f0b4fcf0bd3 100644 --- a/include/drm/drm_connector.h +++ b/include/drm/drm_connector.h @@ -661,6 +661,7 @@ struct drm_connector_state { * DRM blob property for HDR output metadata */ struct drm_property_blob *hdr_output_metadata; + u8 hdr_metadata_changed : 1; }; /** From patchwork Wed Oct 16 10:32:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uma Shankar X-Patchwork-Id: 11192817 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AC0E71575 for ; Wed, 16 Oct 2019 10:03:50 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 91CE421848 for ; Wed, 16 Oct 2019 10:03:50 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 91CE421848 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CDC1A6E912; Wed, 16 Oct 2019 10:03:49 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id AB1256E912 for ; Wed, 16 Oct 2019 10:03:48 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Oct 2019 03:03:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,303,1566889200"; d="scan'208";a="189633958" Received: from linuxpresi1-desktop.iind.intel.com ([10.223.74.143]) by orsmga008.jf.intel.com with ESMTP; 16 Oct 2019 03:03:46 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org Date: Wed, 16 Oct 2019 16:02:48 +0530 Message-Id: <20191016103249.32121-6-uma.shankar@intel.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191016103249.32121-1-uma.shankar@intel.com> References: <20191016103249.32121-1-uma.shankar@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [v1 5/6] drm/i915/display: Enable BT2020 for HDR on LSPCON devices X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Enable Colorspace as BT2020 if driving HDR content.Sending Colorimetry data for HDR using AVI infoframe. LSPCON firmware expects this and though SOC drives DP, for HDMI panel AVI infoframe is sent to the LSPCON device which transfers the same to HDMI sink. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_lspcon.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c index c32452360eeb..8565bf73c4cd 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.c +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c @@ -505,6 +505,11 @@ void lspcon_read_infoframe(struct intel_encoder *encoder, /* FIXME implement this */ } +/* HDMI HDR Colorspace Spec Definitions */ +#define NORMAL_COLORIMETRY_MASK 0x3 +#define EXTENDED_COLORIMETRY_MASK 0x7 +#define HDMI_COLORIMETRY_BT2020_YCC ((3 << 0) | (6 << 2) | (0 << 5)) + void lspcon_set_infoframes(struct intel_encoder *encoder, bool enable, const struct intel_crtc_state *crtc_state, @@ -549,6 +554,19 @@ void lspcon_set_infoframes(struct intel_encoder *encoder, HDMI_QUANTIZATION_RANGE_LIMITED : HDMI_QUANTIZATION_RANGE_FULL); + /* + * Set BT2020 colorspace if driving HDR data + * ToDo: Make this generic and expose all colorspaces for lspcon + */ + if (lspcon->active && conn_state->hdr_metadata_changed) { + frame.avi.colorimetry = + HDMI_COLORIMETRY_BT2020_YCC & + NORMAL_COLORIMETRY_MASK; + frame.avi.extended_colorimetry = + (HDMI_COLORIMETRY_BT2020_YCC >> 2) & + EXTENDED_COLORIMETRY_MASK; + } + ret = hdmi_infoframe_pack(&frame, buf, sizeof(buf)); if (ret < 0) { DRM_ERROR("Failed to pack AVI IF\n"); From patchwork Wed Oct 16 10:32:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uma Shankar X-Patchwork-Id: 11192819 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C50151575 for ; Wed, 16 Oct 2019 10:03:52 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AD20920650 for ; Wed, 16 Oct 2019 10:03:52 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AD20920650 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 39C116E917; Wed, 16 Oct 2019 10:03:52 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1B9CA6E913 for ; Wed, 16 Oct 2019 10:03:51 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Oct 2019 03:03:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,303,1566889200"; d="scan'208";a="189633966" Received: from linuxpresi1-desktop.iind.intel.com ([10.223.74.143]) by orsmga008.jf.intel.com with ESMTP; 16 Oct 2019 03:03:48 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org Date: Wed, 16 Oct 2019 16:02:49 +0530 Message-Id: <20191016103249.32121-7-uma.shankar@intel.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191016103249.32121-1-uma.shankar@intel.com> References: <20191016103249.32121-1-uma.shankar@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [v1 6/6] drm/i915/display: Reduce blanking to support 4k60@10bpp for LSPCON X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Blanking needs to be reduced to incorporate DP and HDMI timing/link bandwidth limitations for CEA modes (4k@60 at 10 bpp). DP can drive 17.28Gbs while 4k modes (VIC97 etc) at 10 bpp required 17.8 Gbps. This will cause mode to blank out. Reduced Htotal by shortening the back porch and front porch within permissible limits. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_dp.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index d92777bd3bed..a12b6916023d 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -597,8 +597,10 @@ intel_dp_mode_valid(struct drm_connector *connector, { struct intel_dp *intel_dp = intel_attached_dp(connector); struct intel_connector *intel_connector = to_intel_connector(connector); + struct intel_encoder *intel_encoder = intel_attached_encoder(connector); struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode; struct drm_i915_private *dev_priv = to_i915(connector->dev); + struct intel_lspcon *lspcon = enc_to_intel_lspcon(&intel_encoder->base); int target_clock = mode->clock; int max_rate, mode_rate, max_lanes, max_link_clock; int max_dotclk; @@ -620,6 +622,21 @@ intel_dp_mode_valid(struct drm_connector *connector, target_clock = fixed_mode->clock; } + /* + * Reducing Blanking to incorporate DP and HDMI timing/link bandwidth + * limitations for CEA modes (4k@60 at 10 bpp). DP can drive 17.28Gbs + * while 4k modes (VIC97 etc) at 10 bpp required 17.8 Gbps. This will + * cause mode to blank out. Reduced Htotal by shortening the back porch + * and front porch within permissible limits. + */ + if (lspcon->active && lspcon->hdr_supported && + mode->clock > 570000) { + mode->clock = 570000; + mode->htotal -= 180; + mode->hsync_start -= 72; + mode->hsync_end -= 72; + } + max_link_clock = intel_dp_max_link_rate(intel_dp); max_lanes = intel_dp_max_lane_count(intel_dp);