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Thu, 17 Oct 2019 03:17:02 -0700 Received: from [10.140.6.35] (helo=xhdsaipava40.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1iL2q5-00079h-VS; Thu, 17 Oct 2019 03:17:02 -0700 Received: by xhdsaipava40.xilinx.com (Postfix, from userid 14131) id 8DD3C13C017A; Thu, 17 Oct 2019 15:48:03 +0530 (IST) From: Sai Pavan Boddu To: Alistair Francis Subject: [QEMU][PATCH v2] ssi: xilinx_spips: Skip update of cs and fifo releated to spips in gqspi Date: Thu, 17 Oct 2019 15:47:54 +0530 Message-Id: <1571307474-16222-1-git-send-email-sai.pavan.boddu@xilinx.com> X-Mailer: git-send-email 2.7.4 X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(4636009)(136003)(346002)(376002)(39860400002)(396003)(189003)(199004)(48376002)(14444005)(186003)(70586007)(50226002)(81156014)(81166006)(8676002)(478600001)(47776003)(6266002)(36756003)(70206006)(8936002)(316002)(51416003)(305945005)(4326008)(486006)(6916009)(6666004)(5660300002)(50466002)(356004)(26005)(103686004)(476003)(2906002)(126002)(426003)(42186006)(106002)(336012)(2616005)(15650500001)(16586007); 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Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1PR02MB3677 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 40.107.71.67 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, Peter Maydell , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" GQSPI handles chip selects and fifos in a different way compared to spips. So skip update of cs and fifos related to spips in gqspi mode. Signed-off-by: Sai Pavan Boddu --- Changes for V2: Just skip update of spips cs and fifos Update commit message accordingly hw/ssi/xilinx_spips.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index a309c71..27154b0 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -1022,6 +1022,13 @@ static void xilinx_spips_write(void *opaque, hwaddr addr, } s->regs[addr] = (s->regs[addr] & ~mask) | (value & mask); no_reg_update: + /* In GQSPI mode skip update of CS and fifo's related to spips */ + if (object_dynamic_cast(OBJECT(s), TYPE_XLNX_ZYNQMP_QSPIPS)) { + XlnxZynqMPQSPIPS *ss = XLNX_ZYNQMP_QSPIPS(s); + if (ARRAY_FIELD_EX32(ss->regs, GQSPI_SELECT, GENERIC_QSPI_EN)) { + return; + } + } xilinx_spips_update_cs_lines(s); xilinx_spips_check_flush(s); xilinx_spips_update_cs_lines(s);