From patchwork Thu Oct 17 14:18:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 11196143 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9876413BD for ; Thu, 17 Oct 2019 14:20:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7F89821835 for ; Thu, 17 Oct 2019 14:20:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389074AbfJQOUX (ORCPT ); Thu, 17 Oct 2019 10:20:23 -0400 Received: from relay11.mail.gandi.net ([217.70.178.231]:36737 "EHLO relay11.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2394836AbfJQOUX (ORCPT ); Thu, 17 Oct 2019 10:20:23 -0400 Received: from localhost (aclermont-ferrand-651-1-259-53.w86-207.abo.wanadoo.fr [86.207.98.53]) (Authenticated sender: gregory.clement@bootlin.com) by relay11.mail.gandi.net (Postfix) with ESMTPSA id 905F2100008; Thu, 17 Oct 2019 14:20:21 +0000 (UTC) From: Gregory CLEMENT To: Mark Brown , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nicolas Ferre , Alexandre Belloni , Ludovic Desroches , linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , Gregory CLEMENT Subject: [PATCH 1/7] spi: atmel: Remove and fix erroneous comments Date: Thu, 17 Oct 2019 16:18:40 +0200 Message-Id: <20191017141846.7523-2-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191017141846.7523-1-gregory.clement@bootlin.com> References: <20191017141846.7523-1-gregory.clement@bootlin.com> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Since CSAAT functionality support has been added. Some comments become wrong. Fix them to match the current driver behavior. Signed-off-by: Gregory CLEMENT --- drivers/spi/spi-atmel.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index e34ab587b980..7a17c3e2a8ee 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -312,11 +312,9 @@ static bool atmel_spi_is_v2(struct atmel_spi *as) * transmitted") Not so! Workaround uses nCSx pins as GPIOs; or newer * controllers have CSAAT and friends. * - * Since the CSAAT functionality is a bit weird on newer controllers as - * well, we use GPIO to control nCSx pins on all controllers, updating - * MR.PCS to avoid confusing the controller. Using GPIOs also lets us - * support active-high chipselects despite the controller's belief that - * only active-low devices/systems exists. + * Even controller newer than ar91rm9200, using GPIOs can make sens as + * it lets us support active-high chipselects despite the controller's + * belief that only active-low devices/systems exists. * * However, at91rm9200 has a second erratum whereby nCS0 doesn't work * right when driven with GPIO. ("Mode Fault does not allow more than one @@ -1193,8 +1191,6 @@ static int atmel_spi_setup(struct spi_device *spi) if (!as->use_cs_gpios) csr |= SPI_BIT(CSAAT); - /* DLYBS is mostly irrelevant since we manage chipselect using GPIOs. - */ csr |= SPI_BF(DLYBS, 0); word_delay_csr = atmel_word_delay_csr(spi, as); From patchwork Thu Oct 17 14:18:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 11196155 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5168713BD for ; Thu, 17 Oct 2019 14:20:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 303F821D7A for ; Thu, 17 Oct 2019 14:20:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2395000AbfJQOU0 (ORCPT ); Thu, 17 Oct 2019 10:20:26 -0400 Received: from relay7-d.mail.gandi.net ([217.70.183.200]:37963 "EHLO relay7-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2394917AbfJQOUZ (ORCPT ); Thu, 17 Oct 2019 10:20:25 -0400 X-Originating-IP: 86.207.98.53 Received: from localhost (aclermont-ferrand-651-1-259-53.w86-207.abo.wanadoo.fr [86.207.98.53]) (Authenticated sender: gregory.clement@bootlin.com) by relay7-d.mail.gandi.net (Postfix) with ESMTPSA id 038FE20019; Thu, 17 Oct 2019 14:20:22 +0000 (UTC) From: Gregory CLEMENT To: Mark Brown , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nicolas Ferre , Alexandre Belloni , Ludovic Desroches , linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , Gregory CLEMENT , stable@vger.kernel.org Subject: [PATCH 2/7] spi: atmel: Fix CS high support Date: Thu, 17 Oct 2019 16:18:41 +0200 Message-Id: <20191017141846.7523-3-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191017141846.7523-1-gregory.clement@bootlin.com> References: <20191017141846.7523-1-gregory.clement@bootlin.com> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Until a few years ago, this driver was only used with CS GPIO. The only exception is CS0 on AT91RM9200 which has to use internal CS. A limitation of the internal CS is that they don't support CS High. So by using the CS GPIO the CS high configuration was available except for the particular case CS0 on RM9200. When the support for the internal chip-select was added, the check of the CS high support was not updated. Due to this the driver accepts this configuration for all the SPI controller v2 (used by all SoCs excepting the AT91RM9200) whereas the hardware doesn't support it for infernal CS. This patch fixes the test to match the hardware capabilities. Fixes: 4820303480a1 ("spi: atmel: add support for the internal chip-select of the spi controller") Cc: Signed-off-by: Gregory CLEMENT --- drivers/spi/spi-atmel.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 7a17c3e2a8ee..6e08ae539bc0 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -1176,10 +1176,8 @@ static int atmel_spi_setup(struct spi_device *spi) as = spi_master_get_devdata(spi->master); /* see notes above re chipselect */ - if (!atmel_spi_is_v2(as) - && spi->chip_select == 0 - && (spi->mode & SPI_CS_HIGH)) { - dev_dbg(&spi->dev, "setup: can't be active-high\n"); + if (!as->use_cs_gpios && (spi->mode & SPI_CS_HIGH)) { + dev_warn(&spi->dev, "setup: non GPIO CS can't be active-high\n"); return -EINVAL; } From patchwork Thu Oct 17 14:18:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 11196159 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D45CB18A6 for ; Thu, 17 Oct 2019 14:20:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BC4642089C for ; Thu, 17 Oct 2019 14:20:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2502773AbfJQOUu (ORCPT ); Thu, 17 Oct 2019 10:20:50 -0400 Received: from relay6-d.mail.gandi.net ([217.70.183.198]:33249 "EHLO relay6-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2394992AbfJQOU1 (ORCPT ); Thu, 17 Oct 2019 10:20:27 -0400 X-Originating-IP: 86.207.98.53 Received: from localhost (aclermont-ferrand-651-1-259-53.w86-207.abo.wanadoo.fr [86.207.98.53]) (Authenticated sender: gregory.clement@bootlin.com) by relay6-d.mail.gandi.net (Postfix) with ESMTPSA id 2CC1FC000E; Thu, 17 Oct 2019 14:20:24 +0000 (UTC) From: Gregory CLEMENT To: Mark Brown , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nicolas Ferre , Alexandre Belloni , Ludovic Desroches , linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , Gregory CLEMENT Subject: [PATCH 3/7] spi: atmel: Configure GPIO per CS instead of by controller Date: Thu, 17 Oct 2019 16:18:42 +0200 Message-Id: <20191017141846.7523-4-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191017141846.7523-1-gregory.clement@bootlin.com> References: <20191017141846.7523-1-gregory.clement@bootlin.com> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Instead of setting up the GPIO configuration for the whole controller, do it at CS level. It will allow to mix internal CS and GPIO CS, which is not possible with the current implementation. Signed-off-by: Gregory CLEMENT --- drivers/spi/spi-atmel.c | 32 ++++++++------------------------ 1 file changed, 8 insertions(+), 24 deletions(-) diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 6e08ae539bc0..b511df6a4846 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -275,7 +275,6 @@ struct atmel_spi { bool use_dma; bool use_pdc; - bool use_cs_gpios; bool keep_cs; bool cs_active; @@ -348,7 +347,7 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi) } mr = spi_readl(as, MR); - if (as->use_cs_gpios) + if (asd->npcs_pin) gpiod_set_value(asd->npcs_pin, 1); } else { u32 cpol = (spi->mode & SPI_CPOL) ? SPI_BIT(CPOL) : 0; @@ -365,7 +364,7 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi) mr = spi_readl(as, MR); mr = SPI_BFINS(PCS, ~(1 << spi->chip_select), mr); - if (as->use_cs_gpios && spi->chip_select != 0) + if (asd->npcs_pin && spi->chip_select != 0) gpiod_set_value(asd->npcs_pin, 1); spi_writel(as, MR, mr); } @@ -389,7 +388,7 @@ static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi) dev_dbg(&spi->dev, "DEactivate NPCS, mr %08x\n", mr); - if (!as->use_cs_gpios) + if (!asd->npcs_pin) spi_writel(as, CR, SPI_BIT(LASTXFER)); else if (atmel_spi_is_v2(as) || spi->chip_select != 0) gpiod_set_value(asd->npcs_pin, 0); @@ -1176,7 +1175,7 @@ static int atmel_spi_setup(struct spi_device *spi) as = spi_master_get_devdata(spi->master); /* see notes above re chipselect */ - if (!as->use_cs_gpios && (spi->mode & SPI_CS_HIGH)) { + if (!spi->cs_gpiod && (spi->mode & SPI_CS_HIGH)) { dev_warn(&spi->dev, "setup: non GPIO CS can't be active-high\n"); return -EINVAL; } @@ -1186,9 +1185,9 @@ static int atmel_spi_setup(struct spi_device *spi) csr |= SPI_BIT(CPOL); if (!(spi->mode & SPI_CPHA)) csr |= SPI_BIT(NCPHA); - if (!as->use_cs_gpios) - csr |= SPI_BIT(CSAAT); + if (!spi->cs_gpiod) + csr |= SPI_BIT(CSAAT); csr |= SPI_BF(DLYBS, 0); word_delay_csr = atmel_word_delay_csr(spi, as); @@ -1206,20 +1205,8 @@ static int atmel_spi_setup(struct spi_device *spi) if (!asd) return -ENOMEM; - /* - * If use_cs_gpios is true this means that we have "cs-gpios" - * defined in the device tree node so we should have - * gotten the GPIO lines from the device tree inside the - * SPI core. Warn if this is not the case but continue since - * CS GPIOs are after all optional. - */ - if (as->use_cs_gpios) { - if (!spi->cs_gpiod) { - dev_err(&spi->dev, - "host claims to use CS GPIOs but no CS found in DT by the SPI core\n"); - } + if (spi->cs_gpiod) asd->npcs_pin = spi->cs_gpiod; - } spi->controller_state = asd; } @@ -1551,13 +1538,10 @@ static int atmel_spi_probe(struct platform_device *pdev) * discovered by the SPI core when registering the SPI master * and assigned to each SPI device. */ - as->use_cs_gpios = true; if (atmel_spi_is_v2(as) && pdev->dev.of_node && - !of_get_property(pdev->dev.of_node, "cs-gpios", NULL)) { - as->use_cs_gpios = false; + !of_get_property(pdev->dev.of_node, "cs-gpios", NULL)) master->num_chipselect = 4; - } as->use_dma = false; as->use_pdc = false; From patchwork Thu Oct 17 14:18:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 11196157 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 783D71668 for ; Thu, 17 Oct 2019 14:20:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 604C721D7C for ; Thu, 17 Oct 2019 14:20:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2437657AbfJQOU1 (ORCPT ); Thu, 17 Oct 2019 10:20:27 -0400 Received: from relay7-d.mail.gandi.net ([217.70.183.200]:48009 "EHLO relay7-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2394998AbfJQOU1 (ORCPT ); Thu, 17 Oct 2019 10:20:27 -0400 X-Originating-IP: 86.207.98.53 Received: from localhost (aclermont-ferrand-651-1-259-53.w86-207.abo.wanadoo.fr [86.207.98.53]) (Authenticated sender: gregory.clement@bootlin.com) by relay7-d.mail.gandi.net (Postfix) with ESMTPSA id 4201F20009; Thu, 17 Oct 2019 14:20:25 +0000 (UTC) From: Gregory CLEMENT To: Mark Brown , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nicolas Ferre , Alexandre Belloni , Ludovic Desroches , linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , Gregory CLEMENT Subject: [PATCH 4/7] spi: atmel: Remove useless private field Date: Thu, 17 Oct 2019 16:18:43 +0200 Message-Id: <20191017141846.7523-5-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191017141846.7523-1-gregory.clement@bootlin.com> References: <20191017141846.7523-1-gregory.clement@bootlin.com> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Since the conversion to GPIO descriptor, the GPIO used as chip select, can be directly access from the spi_device struct. So there is no need to keep the field npcs_pin. Signed-off-by: Gregory CLEMENT --- drivers/spi/spi-atmel.c | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-) diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index b511df6a4846..19600de40422 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -284,7 +284,6 @@ struct atmel_spi { /* Controller-specific per-slave state */ struct atmel_spi_device { - struct gpio_desc *npcs_pin; u32 csr; }; @@ -347,8 +346,8 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi) } mr = spi_readl(as, MR); - if (asd->npcs_pin) - gpiod_set_value(asd->npcs_pin, 1); + if (spi->cs_gpiod) + gpiod_set_value(spi->cs_gpiod, 1); } else { u32 cpol = (spi->mode & SPI_CPOL) ? SPI_BIT(CPOL) : 0; int i; @@ -364,8 +363,8 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi) mr = spi_readl(as, MR); mr = SPI_BFINS(PCS, ~(1 << spi->chip_select), mr); - if (asd->npcs_pin && spi->chip_select != 0) - gpiod_set_value(asd->npcs_pin, 1); + if (spi->cs_gpiod && spi->chip_select != 0) + gpiod_set_value(spi->cs_gpiod, 1); spi_writel(as, MR, mr); } @@ -374,7 +373,6 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi) static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi) { - struct atmel_spi_device *asd = spi->controller_state; u32 mr; /* only deactivate *this* device; sometimes transfers to @@ -388,10 +386,10 @@ static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi) dev_dbg(&spi->dev, "DEactivate NPCS, mr %08x\n", mr); - if (!asd->npcs_pin) + if (!spi->cs_gpiod) spi_writel(as, CR, SPI_BIT(LASTXFER)); else if (atmel_spi_is_v2(as) || spi->chip_select != 0) - gpiod_set_value(asd->npcs_pin, 0); + gpiod_set_value(spi->cs_gpiod, 0); } static void atmel_spi_lock(struct atmel_spi *as) __acquires(&as->lock) @@ -1205,9 +1203,6 @@ static int atmel_spi_setup(struct spi_device *spi) if (!asd) return -ENOMEM; - if (spi->cs_gpiod) - asd->npcs_pin = spi->cs_gpiod; - spi->controller_state = asd; } From patchwork Thu Oct 17 14:18:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 11196151 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EC8EB13BD for ; Thu, 17 Oct 2019 14:20:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D47F92089C for ; Thu, 17 Oct 2019 14:20:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2440067AbfJQOUj (ORCPT ); Thu, 17 Oct 2019 10:20:39 -0400 Received: from relay6-d.mail.gandi.net ([217.70.183.198]:53657 "EHLO relay6-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2395006AbfJQOU2 (ORCPT ); Thu, 17 Oct 2019 10:20:28 -0400 X-Originating-IP: 86.207.98.53 Received: from localhost (aclermont-ferrand-651-1-259-53.w86-207.abo.wanadoo.fr [86.207.98.53]) (Authenticated sender: gregory.clement@bootlin.com) by relay6-d.mail.gandi.net (Postfix) with ESMTPSA id 63028C001B; Thu, 17 Oct 2019 14:20:26 +0000 (UTC) From: Gregory CLEMENT To: Mark Brown , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nicolas Ferre , Alexandre Belloni , Ludovic Desroches , linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , Gregory CLEMENT Subject: [PATCH 5/7] spi: atmel: Remove platform data support Date: Thu, 17 Oct 2019 16:18:44 +0200 Message-Id: <20191017141846.7523-6-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191017141846.7523-1-gregory.clement@bootlin.com> References: <20191017141846.7523-1-gregory.clement@bootlin.com> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org This driver is now only used through the device tree. Simplify code by explicitly depend on device tree. Signed-off-by: Gregory CLEMENT --- drivers/spi/Kconfig | 1 + drivers/spi/spi-atmel.c | 16 ++-------------- 2 files changed, 3 insertions(+), 14 deletions(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 6f7fdcbb9151..6c0c1f55bd71 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -80,6 +80,7 @@ config SPI_ARMADA_3700 config SPI_ATMEL tristate "Atmel SPI Controller" depends on ARCH_AT91 || COMPILE_TEST + depends on OF help This selects a driver for the Atmel SPI Controller, present on many AT91 ARM chips. diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 19600de40422..1ff5b20eabf7 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -1500,7 +1500,7 @@ static int atmel_spi_probe(struct platform_device *pdev) master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16); master->dev.of_node = pdev->dev.of_node; master->bus_num = pdev->id; - master->num_chipselect = master->dev.of_node ? 0 : 4; + master->num_chipselect = 4; master->setup = atmel_spi_setup; master->flags = (SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX); master->transfer_one_message = atmel_spi_transfer_one_message; @@ -1528,16 +1528,6 @@ static int atmel_spi_probe(struct platform_device *pdev) atmel_get_caps(as); - /* - * If there are chip selects in the device tree, those will be - * discovered by the SPI core when registering the SPI master - * and assigned to each SPI device. - */ - if (atmel_spi_is_v2(as) && - pdev->dev.of_node && - !of_get_property(pdev->dev.of_node, "cs-gpios", NULL)) - master->num_chipselect = 4; - as->use_dma = false; as->use_pdc = false; if (as->caps.has_dma_support) { @@ -1745,20 +1735,18 @@ static const struct dev_pm_ops atmel_spi_pm_ops = { #define ATMEL_SPI_PM_OPS NULL #endif -#if defined(CONFIG_OF) static const struct of_device_id atmel_spi_dt_ids[] = { { .compatible = "atmel,at91rm9200-spi" }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, atmel_spi_dt_ids); -#endif static struct platform_driver atmel_spi_driver = { .driver = { .name = "atmel_spi", .pm = ATMEL_SPI_PM_OPS, - .of_match_table = of_match_ptr(atmel_spi_dt_ids), + .of_match_table = atmel_spi_dt_ids, }, .probe = atmel_spi_probe, .remove = atmel_spi_remove, From patchwork Thu Oct 17 14:18:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 11196145 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4097514ED for ; Thu, 17 Oct 2019 14:20:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1F49A2089C for ; Thu, 17 Oct 2019 14:20:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2394998AbfJQOUa (ORCPT ); Thu, 17 Oct 2019 10:20:30 -0400 Received: from relay7-d.mail.gandi.net ([217.70.183.200]:33953 "EHLO relay7-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2437677AbfJQOUa (ORCPT ); Thu, 17 Oct 2019 10:20:30 -0400 X-Originating-IP: 86.207.98.53 Received: from localhost (aclermont-ferrand-651-1-259-53.w86-207.abo.wanadoo.fr [86.207.98.53]) (Authenticated sender: gregory.clement@bootlin.com) by relay7-d.mail.gandi.net (Postfix) with ESMTPSA id 8B5BF20016; Thu, 17 Oct 2019 14:20:27 +0000 (UTC) From: Gregory CLEMENT To: Mark Brown , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nicolas Ferre , Alexandre Belloni , Ludovic Desroches , linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , Gregory CLEMENT Subject: [PATCH 6/7] spi: atmel: Improve and fix GPIO CS usage Date: Thu, 17 Oct 2019 16:18:45 +0200 Message-Id: <20191017141846.7523-7-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191017141846.7523-1-gregory.clement@bootlin.com> References: <20191017141846.7523-1-gregory.clement@bootlin.com> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org In the previous implementation of this driver, the index of the GPIO used as CS was linked to the offset of the CS register used to configure the transfer. With this new implementation the first CS register not used by internal CS is associated to all the GPIO CS. It allows to not be anymore limited to have only 4 CS managed, now it is possible to have in the same time until 3 internal CS and no more limit for the CS GPIO. Signed-off-by: Gregory CLEMENT --- drivers/spi/spi-atmel.c | 74 ++++++++++++++++++++++++++++++++++++----- 1 file changed, 66 insertions(+), 8 deletions(-) diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 1ff5b20eabf7..ac5e2ddf9e1b 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -280,6 +280,8 @@ struct atmel_spi { bool cs_active; u32 fifo_size; + u8 native_cs_free; + u8 native_cs_for_gpio; }; /* Controller-specific per-slave state */ @@ -324,23 +326,29 @@ static bool atmel_spi_is_v2(struct atmel_spi *as) static void cs_activate(struct atmel_spi *as, struct spi_device *spi) { struct atmel_spi_device *asd = spi->controller_state; + int chip_select; u32 mr; + if (spi->cs_gpiod) + chip_select = as->native_cs_for_gpio; + else + chip_select = spi->chip_select; + if (atmel_spi_is_v2(as)) { - spi_writel(as, CSR0 + 4 * spi->chip_select, asd->csr); + spi_writel(as, CSR0 + 4 * chip_select, asd->csr); /* For the low SPI version, there is a issue that PDC transfer * on CS1,2,3 needs SPI_CSR0.BITS config as SPI_CSR1,2,3.BITS */ spi_writel(as, CSR0, asd->csr); if (as->caps.has_wdrbt) { spi_writel(as, MR, - SPI_BF(PCS, ~(0x01 << spi->chip_select)) + SPI_BF(PCS, ~(0x01 << chip_select)) | SPI_BIT(WDRBT) | SPI_BIT(MODFDIS) | SPI_BIT(MSTR)); } else { spi_writel(as, MR, - SPI_BF(PCS, ~(0x01 << spi->chip_select)) + SPI_BF(PCS, ~(0x01 << chip_select)) | SPI_BIT(MODFDIS) | SPI_BIT(MSTR)); } @@ -362,7 +370,7 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi) } mr = spi_readl(as, MR); - mr = SPI_BFINS(PCS, ~(1 << spi->chip_select), mr); + mr = SPI_BFINS(PCS, ~(1 << chip_select), mr); if (spi->cs_gpiod && spi->chip_select != 0) gpiod_set_value(spi->cs_gpiod, 1); spi_writel(as, MR, mr); @@ -373,13 +381,19 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi) static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi) { + int chip_select; u32 mr; + if (spi->cs_gpiod) + chip_select = as->native_cs_for_gpio; + else + chip_select = spi->chip_select; + /* only deactivate *this* device; sometimes transfers to * another device may be active when this routine is called. */ mr = spi_readl(as, MR); - if (~SPI_BFEXT(PCS, mr) & (1 << spi->chip_select)) { + if (~SPI_BFEXT(PCS, mr) & (1 << chip_select)) { mr = SPI_BFINS(PCS, 0xf, mr); spi_writel(as, MR, mr); } @@ -815,6 +829,12 @@ static int atmel_spi_set_xfer_speed(struct atmel_spi *as, { u32 scbr, csr; unsigned long bus_hz; + int chip_select; + + if (spi->cs_gpiod) + chip_select = as->native_cs_for_gpio; + else + chip_select = spi->chip_select; /* v1 chips start out at half the peripheral bus speed. */ bus_hz = as->spi_clk; @@ -843,9 +863,9 @@ static int atmel_spi_set_xfer_speed(struct atmel_spi *as, xfer->speed_hz, scbr, bus_hz); return -EINVAL; } - csr = spi_readl(as, CSR0 + 4 * spi->chip_select); + csr = spi_readl(as, CSR0 + 4 * chip_select); csr = SPI_BFINS(SCBR, scbr, csr); - spi_writel(as, CSR0 + 4 * spi->chip_select, csr); + spi_writel(as, CSR0 + 4 * chip_select, csr); return 0; } @@ -1162,12 +1182,32 @@ static int atmel_word_delay_csr(struct spi_device *spi, struct atmel_spi *as) return (as->spi_clk / 1000000 * value) >> 5; } +static void initialize_native_cs_for_gpio(struct atmel_spi *as) +{ + int i; + struct spi_master *master = platform_get_drvdata(as->pdev); + + if (!as->native_cs_free) + return; /* already initialized */ + + if (!master->cs_gpiods) + return; /* No CS GPIO */ + + for (i = 0; i < 4; i++) + if (master->cs_gpiods[i]) + as->native_cs_free |= BIT(i); + + if (as->native_cs_free) + as->native_cs_for_gpio = ffs(as->native_cs_free); +} + static int atmel_spi_setup(struct spi_device *spi) { struct atmel_spi *as; struct atmel_spi_device *asd; u32 csr; unsigned int bits = spi->bits_per_word; + int chip_select; int word_delay_csr; as = spi_master_get_devdata(spi->master); @@ -1178,6 +1218,24 @@ static int atmel_spi_setup(struct spi_device *spi) return -EINVAL; } + /* Setup() is called during spi_register_controller(aka + * spi_register_master) but after all membmers of the cs_gpiod + * array have been filled, so we can looked for which native + * CS will be free for using with GPIO + */ + initialize_native_cs_for_gpio(as); + + if (spi->cs_gpiod && as->native_cs_free) { + dev_err(&spi->dev, + "No native CS available to support this GPIO CS\n"); + return -EBUSY; + } + + if (spi->cs_gpiod) + chip_select = as->native_cs_for_gpio; + else + chip_select = spi->chip_select; + csr = SPI_BF(BITS, bits - 8); if (spi->mode & SPI_CPOL) csr |= SPI_BIT(CPOL); @@ -1213,7 +1271,7 @@ static int atmel_spi_setup(struct spi_device *spi) bits, spi->mode, spi->chip_select, csr); if (!atmel_spi_is_v2(as)) - spi_writel(as, CSR0 + 4 * spi->chip_select, csr); + spi_writel(as, CSR0 + 4 * chip_select, csr); return 0; } From patchwork Thu Oct 17 14:18:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 11196147 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6C7C41668 for ; Thu, 17 Oct 2019 14:20:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4A8032089C for ; Thu, 17 Oct 2019 14:20:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2440046AbfJQOUb (ORCPT ); Thu, 17 Oct 2019 10:20:31 -0400 Received: from relay4-d.mail.gandi.net ([217.70.183.196]:50449 "EHLO relay4-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2440027AbfJQOUb (ORCPT ); Thu, 17 Oct 2019 10:20:31 -0400 X-Originating-IP: 86.207.98.53 Received: from localhost (aclermont-ferrand-651-1-259-53.w86-207.abo.wanadoo.fr [86.207.98.53]) (Authenticated sender: gregory.clement@bootlin.com) by relay4-d.mail.gandi.net (Postfix) with ESMTPSA id B2D26E000A; Thu, 17 Oct 2019 14:20:28 +0000 (UTC) From: Gregory CLEMENT To: Mark Brown , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nicolas Ferre , Alexandre Belloni , Ludovic Desroches , linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , Gregory CLEMENT Subject: [PATCH 7/7] spi: atmel: Improve CS0 case support on AT91RM9200 Date: Thu, 17 Oct 2019 16:18:46 +0200 Message-Id: <20191017141846.7523-8-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191017141846.7523-1-gregory.clement@bootlin.com> References: <20191017141846.7523-1-gregory.clement@bootlin.com> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Thanks to the recent change in this driver, it is now possible to prevent using the CS0 with GPIO during setup. It then allows to remove the special handling of this case in the cs_activate() and cs_deactivate() functions. Signed-off-by: Gregory CLEMENT --- drivers/spi/spi-atmel.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index ac5e2ddf9e1b..d88e2aa64839 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -371,7 +371,7 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi) mr = spi_readl(as, MR); mr = SPI_BFINS(PCS, ~(1 << chip_select), mr); - if (spi->cs_gpiod && spi->chip_select != 0) + if (spi->cs_gpiod) gpiod_set_value(spi->cs_gpiod, 1); spi_writel(as, MR, mr); } @@ -402,7 +402,7 @@ static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi) if (!spi->cs_gpiod) spi_writel(as, CR, SPI_BIT(LASTXFER)); - else if (atmel_spi_is_v2(as) || spi->chip_select != 0) + else gpiod_set_value(spi->cs_gpiod, 0); } @@ -1193,7 +1193,16 @@ static void initialize_native_cs_for_gpio(struct atmel_spi *as) if (!master->cs_gpiods) return; /* No CS GPIO */ - for (i = 0; i < 4; i++) + /* + * On the first version of the controller (AT91RM9200), CS0 + * can't be used associated with GPIO + */ + if (atmel_spi_is_v2(as)) + i = 0; + else + i = 1; + + for (; i < 4; i++) if (master->cs_gpiods[i]) as->native_cs_free |= BIT(i);