From patchwork Mon Oct 21 06:55:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11201429 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2416C14ED for ; Mon, 21 Oct 2019 06:56:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 03091214D9 for ; Mon, 21 Oct 2019 06:56:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="UhV3fnE5"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="PTqiXrfi" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727255AbfJUG4I (ORCPT ); Mon, 21 Oct 2019 02:56:08 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:34712 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726480AbfJUG4H (ORCPT ); Mon, 21 Oct 2019 02:56:07 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 3C2F760159; Mon, 21 Oct 2019 06:56:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571640967; bh=mnS/WtBKi30gkw2o/gG63261keoEXJ/H73siZfUNDpQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UhV3fnE5fzczCoYOUC70TAYzNIyaHjo8YggT1LXt/P9NZgSV53eY55s2JmL33PJVR a0HwQDB7fWNts/lKSPMyEoUHJEzISWA6QTslzKCRvdA26Mp4thR6YAKg7MIPJgoiKS w0Z5tILONi7o9SwUYhXWFexyYZ3Hu0Ruck7uXS2o= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID,DKIM_SIGNED,SPF_NONE autolearn=no autolearn_force=no version=3.4.0 Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id F3AF560159; Mon, 21 Oct 2019 06:56:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571640966; bh=mnS/WtBKi30gkw2o/gG63261keoEXJ/H73siZfUNDpQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PTqiXrfiYCes5cjfyU/z6yk8ItJEqU7L3Iz9hVWJSggqVhVvBuNY2sXgYr/BAPl6+ pWB/J5T4f1Uqr1zvv1uzZEAfdrVLerbVGb0ySpiNUkjUVHLY3HWS2USD/T4mT8BGVF RCW5XL6j+3BqSy01N6EapOtdQsYu8j4Bzb5Ml7Do= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org F3AF560159 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rajendra Nayak , Vinod Koul Subject: [PATCH v2 01/13] dt-bindings: qcom: Add SC7180 bindings Date: Mon, 21 Oct 2019 12:25:10 +0530 Message-Id: <20191021065522.24511-2-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191021065522.24511-1-rnayak@codeaurora.org> References: <20191021065522.24511-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add a SoC string 'sc7180' for the qualcomm SC7180 SoC. Also add a new board type 'idp' Signed-off-by: Rajendra Nayak Reviewed-by: Vinod Koul --- v2: Added Vinod's Reviewed-by: Documentation/devicetree/bindings/arm/qcom.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index e39d8f02e33c..0a60ea051541 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -36,6 +36,7 @@ description: | mdm9615 ipq8074 sdm845 + sc7180 The 'board' element must be one of the following strings: @@ -46,6 +47,7 @@ description: | sbc hk01 qrd + idp The 'soc_version' and 'board_version' elements take the form of v. where the minor number may be omitted when it's zero, i.e. v1.0 is the same From patchwork Mon Oct 21 06:55:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11201431 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A3FB6139A for ; Mon, 21 Oct 2019 06:56:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6D9B320B7C for ; Mon, 21 Oct 2019 06:56:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="EW+RXNxC"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="PDiCu0KE" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727351AbfJUG4N (ORCPT ); Mon, 21 Oct 2019 02:56:13 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:34830 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726480AbfJUG4M (ORCPT ); Mon, 21 Oct 2019 02:56:12 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 4CF0A6076A; Mon, 21 Oct 2019 06:56:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571640971; bh=IC1OxMnAN5HXXH41kmB97JRZmkHq7ikb9+EBNXDKQdM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EW+RXNxCHOEpIggiDcQ8vMJbSe8//XLGp2wfWtLvJUZqfdd0gY7zICxEiVE68+fvl yZ4XBr1ZapyHdY//3t3UhqIC5C6K4Fcdo695fwfi70z+1dBfnc/2F+3Y+yynNMvpaX SLuCQpnDhFm05K9lGHYvLWRaDuoqhf9qL/c7rAmE= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID,DKIM_SIGNED,SPF_NONE autolearn=no autolearn_force=no version=3.4.0 Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 3CB6860610; Mon, 21 Oct 2019 06:56:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571640969; bh=IC1OxMnAN5HXXH41kmB97JRZmkHq7ikb9+EBNXDKQdM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PDiCu0KEkLxuM33J4IQjIkDfvO5wUAz5u/I4MWq/BBvaGxQY0NhPYyd+F459j8Ojb TfY1l2gqzNsOotIxBvj1ujisJUBXW6C24hbiFGSSzTQ8GxW8Uf6aQz0/CrB997WebC /YdqmomUm7cc7pm58k7cnnD85YmbJWhSyOXtfZeE= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 3CB6860610 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rajendra Nayak , Taniya Das Subject: [PATCH v2 02/13] arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc Date: Mon, 21 Oct 2019 12:25:11 +0530 Message-Id: <20191021065522.24511-3-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191021065522.24511-1-rnayak@codeaurora.org> References: <20191021065522.24511-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add skeletal sc7180 SoC dtsi and idp board dts files. Co-developed-by: Taniya Das Signed-off-by: Taniya Das Signed-off-by: Rajendra Nayak --- v2: * Sorted the nodes in alphabetical order * Dropped the bi_tcxo/bi_tcxo_ao nodes arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/sc7180-idp.dts | 47 ++++ arch/arm64/boot/dts/qcom/sc7180.dtsi | 300 ++++++++++++++++++++++++ 3 files changed, 348 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sc7180-idp.dts create mode 100644 arch/arm64/boot/dts/qcom/sc7180.dtsi diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 6498a1ec893f..7a5c2f7fe37f 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-asus-novago-tp370ql.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-hp-envy-x2.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-lenovo-miix-630.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-mtp.dtb +dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r2.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r3.dtb diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts new file mode 100644 index 000000000000..f8b7e098f5b4 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7180-idp.dts @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * SC7180 IDP board device tree source + * + * Copyright (c) 2019, The Linux Foundation. All rights reserved. + */ + +/dts-v1/; + +#include "sc7180.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SC7180 IDP"; + compatible = "qcom,sc7180-idp"; + + aliases { + serial0 = &uart2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&qupv3_id_0 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +/* PINCTRL - additions to nodes defined in sc7180.dtsi */ + +&qup_uart2_default { + pinconf-tx { + pins = "gpio44"; + drive-strength = <2>; + bias-disable; + }; + + pinconf-rx { + pins = "gpio45"; + drive-strength = <2>; + bias-pull-up; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi new file mode 100644 index 000000000000..82bf7cdce6b8 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -0,0 +1,300 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * SC7180 SoC device tree source + * + * Copyright (c) 2019, The Linux Foundation. All rights reserved. + */ + +#include +#include + +/ { + interrupt-parent = <&intc>; + + #address-cells = <2>; + #size-cells = <2>; + + chosen { }; + + clocks { + xo_board: xo-board { + compatible = "fixed-clock"; + clock-frequency = <38400000>; + clock-output-names = "xo_board"; + #clock-cells = <0>; + }; + + sleep_clk: sleep-clk { + compatible = "fixed-clock"; + clock-frequency = <32764>; + clock-output-names = "sleep_clk"; + #clock-cells = <0>; + }; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&L2_0>; + L2_0: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + L3_0: l3-cache { + compatible = "cache"; + }; + }; + }; + + CPU1: cpu@100 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x100>; + enable-method = "psci"; + next-level-cache = <&L2_100>; + L2_100: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU2: cpu@200 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x200>; + enable-method = "psci"; + next-level-cache = <&L2_200>; + L2_200: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU3: cpu@300 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x300>; + enable-method = "psci"; + next-level-cache = <&L2_300>; + L2_300: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU4: cpu@400 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x400>; + enable-method = "psci"; + next-level-cache = <&L2_400>; + L2_400: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU5: cpu@500 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x500>; + enable-method = "psci"; + next-level-cache = <&L2_500>; + L2_500: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU6: cpu@600 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x600>; + enable-method = "psci"; + next-level-cache = <&L2_600>; + L2_600: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU7: cpu@700 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x700>; + enable-method = "psci"; + next-level-cache = <&L2_700>; + L2_700: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + }; + + memory@80000000 { + device_type = "memory"; + /* We expect the bootloader to fill in the size */ + reg = <0 0x80000000 0 0>; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = ; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + soc: soc { + #address-cells = <2>; + #size-cells = <2>; + ranges = <0 0 0 0 0x10 0>; + dma-ranges = <0 0 0 0 0x10 0>; + compatible = "simple-bus"; + + gcc: clock-controller@100000 { + compatible = "qcom,gcc-sc7180"; + reg = <0 0x00100000 0 0x1f0000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + + qupv3_id_0: geniqup@ac0000 { + compatible = "qcom,geni-se-qup"; + reg = <0 0x00ac0000 0 0x6000>; + clock-names = "m-ahb", "s-ahb"; + clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, + <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + uart2: serial@a88000 { + compatible = "qcom,geni-debug-uart"; + reg = <0 0x00a88000 0 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_uart2_default>; + interrupts = ; + status = "disabled"; + }; + }; + + tlmm: pinctrl@3500000 { + compatible = "qcom,sc7180-pinctrl"; + reg = <0 0x03500000 0 0x300000>, + <0 0x03900000 0 0x300000>, + <0 0x03d00000 0 0x300000>; + reg-names = "west", "north", "south"; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&tlmm 0 0 120>; + + qup_uart2_default: qup-uart2-default { + pinmux { + pins = "gpio44", "gpio45"; + function = "qup12"; + }; + }; + }; + + intc: interrupt-controller@17a00000 { + compatible = "arm,gic-v3"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0 0x17a00000 0 0x10000>, /* GICD */ + <0 0x17a60000 0 0x100000>; /* GICR * 8 */ + interrupts = ; + + gic-its@17a40000 { + compatible = "arm,gic-v3-its"; + msi-controller; + #msi-cells = <1>; + reg = <0 0x17a40000 0 0x20000>; + status = "disabled"; + }; + }; + + timer@17c20000{ + #address-cells = <2>; + #size-cells = <2>; + ranges; + compatible = "arm,armv7-timer-mem"; + reg = <0 0x17c20000 0 0x1000>; + + frame@17c21000 { + frame-number = <0>; + interrupts = , + ; + reg = <0 0x17c21000 0 0x1000>, + <0 0x17c22000 0 0x1000>; + }; + + frame@17c23000 { + frame-number = <1>; + interrupts = ; + reg = <0 0x17c23000 0 0x1000>; + status = "disabled"; + }; + + frame@17c25000 { + frame-number = <2>; + interrupts = ; + reg = <0 0x17c25000 0 0x1000>; + status = "disabled"; + }; + + frame@17c27000 { + frame-number = <3>; + interrupts = ; + reg = <0 0x17c27000 0 0x1000>; + status = "disabled"; + }; + + frame@17c29000 { + frame-number = <4>; + interrupts = ; + reg = <0 0x17c29000 0 0x1000>; + status = "disabled"; + }; + + frame@17c2b000 { + frame-number = <5>; + interrupts = ; + reg = <0 0x17c2b000 0 0x1000>; + status = "disabled"; + }; + + frame@17c2d000 { + frame-number = <6>; + interrupts = ; + reg = <0 0x17c2d000 0 0x1000>; + status = "disabled"; + }; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; +}; From patchwork Mon Oct 21 06:55:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11201433 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5688A139A for ; Mon, 21 Oct 2019 06:56:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 344A3214D9 for ; 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Mon, 21 Oct 2019 06:56:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571640973; bh=M0XSthhFfWfi3Ks5ZtKfWZuTLFeAs8nLz1N9/9ijyDQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nxzez3bIK3BzEwrknQITZbJ20peGGURLtSIJvN5Z4vd958T8QojLxB5gk2PebTYAq nrAc0KjW/GY6aGFIohQByirVgK5PFBb4MLeo3gkR22GrRwjisH57/Nh14ytIr/PZfe 7NOmhRCMdfxgJQ7nd79UvXDIhr8UBeD4lmL+yRmo= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 7E4E460540 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rajendra Nayak , Joerg Roedel , Mark Rutland Subject: [PATCH v2 03/13] dt-bindings: arm-smmu: update binding for qcom sc7180 SoC Date: Mon, 21 Oct 2019 12:25:12 +0530 Message-Id: <20191021065522.24511-4-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191021065522.24511-1-rnayak@codeaurora.org> References: <20191021065522.24511-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the soc specific compatible for sc7180 smmu-500 Signed-off-by: Rajendra Nayak Cc: Joerg Roedel Cc: Mark Rutland --- v2: No change Documentation/devicetree/bindings/iommu/arm,smmu.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt index 3133f3ba7567..347869807cf2 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt @@ -30,6 +30,7 @@ conditions. Qcom SoCs implementing "arm,mmu-500" must also include, as below, SoC-specific compatibles: "qcom,sdm845-smmu-500", "arm,mmu-500" + "qcom,sc7180-smmu-500", "arm,mmu-500" - reg : Base address and size of the SMMU. From patchwork Mon Oct 21 06:55:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11201441 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A6A481951 for ; Mon, 21 Oct 2019 06:56:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 84C3D214AE for ; Mon, 21 Oct 2019 06:56:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="mR5ubwEv"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="CEk6UIXn" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727397AbfJUG4S (ORCPT ); Mon, 21 Oct 2019 02:56:18 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:35072 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726480AbfJUG4S (ORCPT ); Mon, 21 Oct 2019 02:56:18 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 1869760850; Mon, 21 Oct 2019 06:56:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571640977; bh=KcmqfQ8/cSsGGkMXZmT/oM5tHl4nhlithpZt6HoqqQg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mR5ubwEvo1cue2/M/GAIqDxc/IdM93VJo929NWEyaU55cBM9aAOJIomWGyMqeHsXi o/1ZbwFG2Gwaq94pCLVvMJmOtZSGL+nQYGh3wiBHI+QCJ269tQanza11YDA0u3JmLq tOK/M8w6QPoCCfhiFhsRnTkC3R/U/MquQBjsvW40= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID,DKIM_SIGNED,SPF_NONE,UPPERCASE_50_75 autolearn=no autolearn_force=no version=3.4.0 Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 0861D6081E; Mon, 21 Oct 2019 06:56:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571640976; bh=KcmqfQ8/cSsGGkMXZmT/oM5tHl4nhlithpZt6HoqqQg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CEk6UIXnXO+4o8e7iAsKjQyWhnaGYEumwxLfR4QplzNRESAIzg1uJgBZld/OmW23P +UTIR+eGC+ZKBbfgWDYS6gqD2C6T/23I69m2970K/jcIoST2XdPM8rEkTybAM7J/qV bgKEET+H8+xFxVJdhoLpTz7Y/wCGQN/nxDjmGqg8= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 0861D6081E Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Vivek Gautam , Rajendra Nayak Subject: [PATCH v2 04/13] arm64: dts: sc7180: Add device node for apps_smmu Date: Mon, 21 Oct 2019 12:25:13 +0530 Message-Id: <20191021065522.24511-5-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191021065522.24511-1-rnayak@codeaurora.org> References: <20191021065522.24511-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Vivek Gautam Adding device node for APPS SMMU that is connected to devices such as display, video, usb, mmc, etc. on SC7180 chipset. Signed-off-by: Vivek Gautam Signed-off-by: Rajendra Nayak --- v2: No change arch/arm64/boot/dts/qcom/sc7180.dtsi | 88 ++++++++++++++++++++++++++++ 1 file changed, 88 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 82bf7cdce6b8..c67d32242ca2 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -211,6 +211,94 @@ }; }; + apps_smmu: iommu@15000000 { + compatible = "qcom,sc7180-smmu-500", "arm,mmu-500"; + reg = <0 0x15000000 0 0x100000>; + #iommu-cells = <2>; + #global-interrupts = <1>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + intc: interrupt-controller@17a00000 { compatible = "arm,gic-v3"; #address-cells = <2>; From patchwork Mon Oct 21 06:55:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11201435 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AF6CA14ED for ; Mon, 21 Oct 2019 06:56:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8D9E4214AE for ; Mon, 21 Oct 2019 06:56:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="FJV78QP7"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="RIa8dVRY" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727417AbfJUG4V (ORCPT ); Mon, 21 Oct 2019 02:56:21 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:35190 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726480AbfJUG4V (ORCPT ); Mon, 21 Oct 2019 02:56:21 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 700FE60930; Mon, 21 Oct 2019 06:56:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571640980; bh=B8Tun+ms/ItaMfnpNX+5AmyDT3CYb/tuPINRTyt3ews=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FJV78QP7IR7jnxP+R6wj0uNzEEg6QXaA0opXt49CzkPe4ynoIYh0DbBrFolUU+ysT g8I2qLThaMUhLwNnLtnx4rlKuHWnINECTvM4T51HVE5CHlXYDKxU9vslRpVaLD+fpc mbenS28HzurgNmmgu+2PfH/OSgpUvIFXxPeWUhm0= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID,DKIM_SIGNED,SPF_NONE autolearn=no autolearn_force=no version=3.4.0 Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 46B9D602F0; Mon, 21 Oct 2019 06:56:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571640979; bh=B8Tun+ms/ItaMfnpNX+5AmyDT3CYb/tuPINRTyt3ews=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RIa8dVRYhMrInc5INF1tWOYGIxBJvCR0BLYH3YZ786/w1/bGr1kJ2tes6+gPzeaPx 36EC3kLsa6nbQr5/a8QzPbgqKI723/yDA5urImGzdk/jsTWXhSz89iDxWdGY+KmVav DclmkXerR+S6KJEFWDV5cJt2TsoB0J9MhRhgRHNY= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 46B9D602F0 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Maulik Shah , Rajendra Nayak Subject: [PATCH v2 05/13] arm64: dts: qcom: sc7180: Add cmd_db reserved area Date: Mon, 21 Oct 2019 12:25:14 +0530 Message-Id: <20191021065522.24511-6-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191021065522.24511-1-rnayak@codeaurora.org> References: <20191021065522.24511-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Maulik Shah Command_db provides mapping for resource key and address managed by remote processor. Add cmd_db reserved memory area. Signed-off-by: Maulik Shah Signed-off-by: Rajendra Nayak --- v2: No change arch/arm64/boot/dts/qcom/sc7180.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index c67d32242ca2..012ee5028bf6 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -32,6 +32,18 @@ }; }; + reserved_memory: reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + cmd_db: reserved-memory@80820000 { + reg = <0x0 0x80820000 0x0 0x20000>; + compatible = "qcom,cmd-db"; + no-map; + }; + }; + cpus { #address-cells = <2>; #size-cells = <0>; From patchwork Mon Oct 21 06:55:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11201439 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 61F86139A for ; Mon, 21 Oct 2019 06:56:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3FF94214D9 for ; Mon, 21 Oct 2019 06:56:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="RbLFGlsD"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="H6vwgunM" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727434AbfJUG4Z (ORCPT ); Mon, 21 Oct 2019 02:56:25 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:35310 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726480AbfJUG4Y (ORCPT ); Mon, 21 Oct 2019 02:56:24 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 14DE360A08; Mon, 21 Oct 2019 06:56:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571640984; bh=5ebcvipsQ3v3kdsn0W99SWFEJTliWn2K2fxIAJclb3o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RbLFGlsDuriJdcfsCeh1dkKMCqwNATaca0oKUwJbjpPGAlDxoJhn2UV9SvEgfAufF bwNu/78zt/o0RYO5G0/dNliXSoHJKZClQ1LkTA/Hg0LoOZZGlkELC3LWYPiKYMstrm IssTCOe54za+p7eedNzErsvyPC7cC1nUH32hv9q8= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID,DKIM_SIGNED,SPF_NONE autolearn=no autolearn_force=no version=3.4.0 Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 85DE660953; Mon, 21 Oct 2019 06:56:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571640983; bh=5ebcvipsQ3v3kdsn0W99SWFEJTliWn2K2fxIAJclb3o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=H6vwgunMBS2OtQJGG0gxj4pCpVuB8WZSKhtqj2kdQ9Jm4npvbRpqrAbtyz2QNsAZ6 9/EkoGB61nGA+Cj2BcPyaRGYHDn1PFRheXv7OdjZe0cl1r4Kc6QMz6g40EPARnAfJA l3ClJIu+BnZ/QZZ35Kx9FDa6yEJSK2Hunh5HS+cw= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 85DE660953 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Maulik Shah , Rajendra Nayak Subject: [PATCH v2 06/13] arm64: dts: qcom: sc7180: Add rpmh-rsc node Date: Mon, 21 Oct 2019 12:25:15 +0530 Message-Id: <20191021065522.24511-7-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191021065522.24511-1-rnayak@codeaurora.org> References: <20191021065522.24511-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Maulik Shah Add device bindings for the application processor's rsc. The rsc contains the TCS that are used for communicating with the hardened resource accelerators on Qualcomm Technologies, Inc. (QTI) SoCs. Signed-off-by: Maulik Shah Signed-off-by: Rajendra Nayak --- v2: No change arch/arm64/boot/dts/qcom/sc7180.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 012ee5028bf6..6b3f08133eff 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -7,6 +7,7 @@ #include #include +#include / { interrupt-parent = <&intc>; @@ -388,6 +389,24 @@ status = "disabled"; }; }; + + apps_rsc: rsc@18200000 { + label = "apps_rsc"; + compatible = "qcom,rpmh-rsc"; + reg = <0 0x18200000 0 0x10000>, + <0 0x18210000 0 0x10000>, + <0 0x18220000 0 0x10000>; + reg-names = "drv-0", "drv-1", "drv-2"; + interrupts = , + , + ; + qcom,tcs-offset = <0xd00>; + qcom,drv-id = <2>; + qcom,tcs-config = , + , + , + ; + }; }; timer { From patchwork Mon Oct 21 06:55:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11201437 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 364C314ED for ; Mon, 21 Oct 2019 06:56:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1486D214D9 for ; Mon, 21 Oct 2019 06:56:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="TKr9I8b9"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="Lp9cfQK1" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727301AbfJUG42 (ORCPT ); Mon, 21 Oct 2019 02:56:28 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:35396 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726480AbfJUG41 (ORCPT ); Mon, 21 Oct 2019 02:56:27 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 21C5260A0B; Mon, 21 Oct 2019 06:56:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571640987; bh=lC81Sx2wC/chbLXxJxSgeaUfBoRSdYaw0jsgeIo0ty8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TKr9I8b99ckgZQ8QpHj9fwWhWb1iXDCkxPhYixg2KxFk2cssqbUVFK5aHKrJdkv0b /SOFMtXGAgr4w5J/K6sHPc7Y70RiCm2OYVW3bDovSLeJbKcovCfiJcia48GV1YHhDF g5VdsASd52ncTmDx1f2WHsvqJocQLC+qFqVRDJT8= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID,DKIM_SIGNED,SPF_NONE autolearn=no autolearn_force=no version=3.4.0 Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id C993560A0A; Mon, 21 Oct 2019 06:56:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571640986; bh=lC81Sx2wC/chbLXxJxSgeaUfBoRSdYaw0jsgeIo0ty8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Lp9cfQK1dZYYYZhrYoHG3U9tTUdilD2zgxzVEsBGCz/eqdzYagdUU5oXzKpK1pnPT ipzSWHr9AB0pa9bQIEeSqHTQhzrqmQRisihOykgPOTOMqmnKElofAhsW9GeUMwQ0rl QVY7Zswn4xIxxuqvGV1okAuGDCNPKqDVjmyoIr6M= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org C993560A0A Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kiran Gunda , Rajendra Nayak Subject: [PATCH v2 07/13] arm64: dts: qcom: sc7180: Add SPMI PMIC arbiter device Date: Mon, 21 Oct 2019 12:25:16 +0530 Message-Id: <20191021065522.24511-8-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191021065522.24511-1-rnayak@codeaurora.org> References: <20191021065522.24511-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Kiran Gunda Add SPMI PMIC arbiter device to communicate with PMICs attached to SPMI bus. Signed-off-by: Kiran Gunda Signed-off-by: Rajendra Nayak --- v2: No change arch/arm64/boot/dts/qcom/sc7180.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 6b3f08133eff..51b8004aa6a7 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -224,6 +224,25 @@ }; }; + spmi_bus: spmi@c440000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0 0xc440000 0 0x1100>, + <0 0xc600000 0 0x2000000>, + <0 0xe600000 0 0x100000>, + <0 0xe700000 0 0xa0000>, + <0 0xc40a000 0 0x26000>; + reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; + interrupt-names = "periph_irq"; + interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; + qcom,ee = <0>; + qcom,channel = <0>; + #address-cells = <1>; + #size-cells = <1>; + interrupt-controller; + #interrupt-cells = <4>; + cell-index = <0>; + }; + apps_smmu: iommu@15000000 { compatible = "qcom,sc7180-smmu-500", "arm,mmu-500"; reg = <0 0x15000000 0 0x100000>; From patchwork Mon Oct 21 06:55:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11201443 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F324B14ED for ; Mon, 21 Oct 2019 06:56:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C6F9321721 for ; Mon, 21 Oct 2019 06:56:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="clkroPqa"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="N+W5bGkO" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727474AbfJUG4d (ORCPT ); Mon, 21 Oct 2019 02:56:33 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:35514 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726480AbfJUG4c (ORCPT ); Mon, 21 Oct 2019 02:56:32 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id DC47360610; Mon, 21 Oct 2019 06:56:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571640990; bh=Q/SbXN4t4P3qEsV5Q7KG/xDcIs4jorA6XRtE91+xWNU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=clkroPqaW8+G5vEbaaJAbbWozO8RDkjNdny8XmOhCxu+kftA1YaRY/I1OY6zhuHR+ E0+Ntp8G0QyeqGymDKwKXDgjfIbsMdUqz6CxxBUqMCkhOoWWQMxmijp4mLpULJPKUc wqz98jqJE7WhFFPnvYqp7VuIR9Siybxd83qfTCjQ= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID,DKIM_SIGNED,SPF_NONE autolearn=no autolearn_force=no version=3.4.0 Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 1863160610; Mon, 21 Oct 2019 06:56:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571640989; bh=Q/SbXN4t4P3qEsV5Q7KG/xDcIs4jorA6XRtE91+xWNU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=N+W5bGkOBhg1NTfxFFP2i2uRXCq9x2czBQGuWVUObkE2HcNrPcPSctSVmTQKy2psQ 44hrMgCr8RYi1LHmNPYxnA0trXsfnMNqrC6huEpJcptmMntE3dQT519nkr49+iCQgk qltoSJGBWldSw85wzJbtGgpdnFJwl9D269DpXZ0g= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 1863160610 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kiran Gunda , Rajendra Nayak Subject: [PATCH v2 08/13] arm64: dts: qcom: pm6150: Add PM6150/PM6150L PMIC peripherals Date: Mon, 21 Oct 2019 12:25:17 +0530 Message-Id: <20191021065522.24511-9-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191021065522.24511-1-rnayak@codeaurora.org> References: <20191021065522.24511-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Kiran Gunda Add PM6150/PM6150L peripherals such as PON, GPIOs, ADC and other PMIC infra modules. Signed-off-by: Kiran Gunda Signed-off-by: Rajendra Nayak --- v2: * Changed to BSD-3-Clause licence * Included headers in sc7180-idp.dts arch/arm64/boot/dts/qcom/pm6150.dtsi | 85 +++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/pm6150l.dtsi | 47 ++++++++++++++ arch/arm64/boot/dts/qcom/sc7180-idp.dts | 2 + 3 files changed, 134 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pm6150.dtsi create mode 100644 arch/arm64/boot/dts/qcom/pm6150l.dtsi diff --git a/arch/arm64/boot/dts/qcom/pm6150.dtsi b/arch/arm64/boot/dts/qcom/pm6150.dtsi new file mode 100644 index 000000000000..20eb928e5ce3 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pm6150.dtsi @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: BSD-3-Clause +// Copyright (c) 2019, The Linux Foundation. All rights reserved. + +#include +#include +#include +#include +#include + +&spmi_bus { + pm6150_lsid0: pmic@0 { + compatible = "qcom,pm6150", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm6150_pon: pon@800 { + compatible = "qcom,pm8998-pon"; + reg = <0x800>; + mode-bootloader = <0x2>; + mode-recovery = <0x1>; + + pwrkey { + compatible = "qcom,pm8941-pwrkey"; + interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + linux,code = ; + }; + }; + + pm6150_temp: temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pm6150_adc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pm6150_adc: adc@3100 { + compatible = "qcom,spmi-adc5"; + reg = <0x3100>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + + adc-chan@ADC5_DIE_TEMP { + reg = ; + label = "die_temp"; + }; + }; + + pm6150_gpio: gpios@c000 { + compatible = "qcom,pm6150-gpio", "qcom,spmi-gpio"; + reg = <0xc000 0xa00>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <0 0xc0 0 IRQ_TYPE_NONE>, + <0 0xc1 0 IRQ_TYPE_NONE>, + <0 0xc2 0 IRQ_TYPE_NONE>, + <0 0xc3 0 IRQ_TYPE_NONE>, + <0 0xc4 0 IRQ_TYPE_NONE>, + <0 0xc5 0 IRQ_TYPE_NONE>, + <0 0xc6 0 IRQ_TYPE_NONE>, + <0 0xc7 0 IRQ_TYPE_NONE>, + <0 0xc8 0 IRQ_TYPE_NONE>, + <0 0xc9 0 IRQ_TYPE_NONE>; + + interrupt-names = "pm6150_gpio1", "pm6150_gpio2", + "pm6150_gpio3", "pm6150_gpio4", + "pm6150_gpio5", "pm6150_gpio6", + "pm6150_gpio7", "pm6150_gpio8", + "pm6150_gpio9", "pm6150_gpio10"; + }; + }; + + pm6150_lsid1: pmic@1 { + compatible = "qcom,pm6150", "qcom,spmi-pmic"; + reg = <0x1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/pm6150l.dtsi b/arch/arm64/boot/dts/qcom/pm6150l.dtsi new file mode 100644 index 000000000000..b17bb1af9367 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pm6150l.dtsi @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: BSD-3-Clause +// Copyright (c) 2019, The Linux Foundation. All rights reserved. + +#include +#include + +&spmi_bus { + pm6150l_lsid4: pmic@4 { + compatible = "qcom,pm6150l", "qcom,spmi-pmic"; + reg = <0x4 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm6150l_gpios: gpios@c000 { + compatible = "qcom,pm6150l-gpio", "qcom,spmi-gpio"; + reg = <0xc000 0xc00>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <4 0xc0 0 IRQ_TYPE_NONE>, + <4 0xc1 0 IRQ_TYPE_NONE>, + <4 0xc2 0 IRQ_TYPE_NONE>, + <4 0xc3 0 IRQ_TYPE_NONE>, + <4 0xc4 0 IRQ_TYPE_NONE>, + <4 0xc5 0 IRQ_TYPE_NONE>, + <4 0xc6 0 IRQ_TYPE_NONE>, + <4 0xc7 0 IRQ_TYPE_NONE>, + <4 0xc8 0 IRQ_TYPE_NONE>, + <4 0xc9 0 IRQ_TYPE_NONE>, + <4 0xca 0 IRQ_TYPE_NONE>, + <4 0xcb 0 IRQ_TYPE_NONE>; + + interrupt-names = "pm6150l_gpio1", "pm6150l_gpio2", + "pm6150l_gpio3", "pm6150l_gpio4", + "pm6150l_gpio5", "pm6150l_gpio6", + "pm6150l_gpio7", "pm6150l_gpio8", + "pm6150l_gpio9", "pm6150l_gpio10", + "pm6150l_gpio11", "pm6150l_gpio12"; + }; + }; + + pm6150l_lsid5: pmic@5 { + compatible = "qcom,pm6150l", "qcom,spmi-pmic"; + reg = <0x5 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts index f8b7e098f5b4..1ba389f1fea9 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-idp.dts +++ b/arch/arm64/boot/dts/qcom/sc7180-idp.dts @@ -8,6 +8,8 @@ /dts-v1/; #include "sc7180.dtsi" +#include "pm6150.dtsi" +#include "pm6150l.dtsi" / { model = "Qualcomm Technologies, Inc. SC7180 IDP"; From patchwork Mon Oct 21 06:55:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11201445 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6AAAC1920 for ; Mon, 21 Oct 2019 06:56:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3EDB321871 for ; Mon, 21 Oct 2019 06:56:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="P1x2BSuX"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="gURkVTPY" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727488AbfJUG4g (ORCPT ); Mon, 21 Oct 2019 02:56:36 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:35642 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727470AbfJUG4g (ORCPT ); Mon, 21 Oct 2019 02:56:36 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 82D6160A64; Mon, 21 Oct 2019 06:56:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571640994; bh=t1G/+Re7oiOIDS+KaDEq8SxKJWgtrc6Uell+mQRZWqA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=P1x2BSuXgnundoTNBtNlROi0cGunWrQMeKuDmWk0PbOgqFjnZaUKbG29ZnbgPDdQB YMzdVQUj+8IQHJDvVn7kH6hxFhf+Zdsqp51CoQGYsgIE0QTkOiybNCFsEkg0/cYpbL nKk5AN78XSbAVHkv+0jd0pgWWE3LxIOn2acdn6Nw= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID,DKIM_SIGNED,SPF_NONE autolearn=no autolearn_force=no version=3.4.0 Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 5B2A260A24; Mon, 21 Oct 2019 06:56:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571640993; bh=t1G/+Re7oiOIDS+KaDEq8SxKJWgtrc6Uell+mQRZWqA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gURkVTPYmdYJXEeYW6GKWENJHfnM1P5WmI4lvG94EqPrlzzn+c89d7p0MGiTVBB9i 7Pw9eBtCnDhqbNDmaNmECxKDGqgBFdMaWnI56njCUykdYr07lVpX8haQbA0vGkJkRd imTx3MEeXNTQJcSv4nbVa+WLVxZhXtzD87AotlQQ= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 5B2A260A24 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kiran Gunda , Rajendra Nayak Subject: [PATCH v2 09/13] arm64: dts: qcom: sc7180-idp: Add RPMh regulators Date: Mon, 21 Oct 2019 12:25:18 +0530 Message-Id: <20191021065522.24511-10-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191021065522.24511-1-rnayak@codeaurora.org> References: <20191021065522.24511-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Kiran Gunda Add the rpmh regulators for the sc7180 idp platform. This platform consists of PMIC PM6150 and PM6150l Signed-off-by: Kiran Gunda Signed-off-by: Rajendra Nayak --- v2: Moved the contents of sc7180-regulators.dtsi into sc7180-idp.dts arch/arm64/boot/dts/qcom/sc7180-idp.dts | 207 ++++++++++++++++++++++++ 1 file changed, 207 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts index 1ba389f1fea9..505fc50b9f73 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-idp.dts +++ b/arch/arm64/boot/dts/qcom/sc7180-idp.dts @@ -7,6 +7,7 @@ /dts-v1/; +#include #include "sc7180.dtsi" #include "pm6150.dtsi" #include "pm6150l.dtsi" @@ -24,6 +25,212 @@ }; }; +&apps_rsc { + pm6150-rpmh-regulators { + compatible = "qcom,pm6150-rpmh-regulators"; + qcom,pmic-id = "a"; + + vreg_s1a_1p1: smps1 { + regulator-min-microvolt = <1128000>; + regulator-max-microvolt = <1128000>; + }; + + vreg_s4a_1p0: smps4 { + regulator-min-microvolt = <824000>; + regulator-max-microvolt = <1120000>; + }; + + vreg_s5a_2p0: smps5 { + regulator-min-microvolt = <1744000>; + regulator-max-microvolt = <2040000>; + }; + + vreg_l1a_1p2: ldo1 { + regulator-min-microvolt = <1178000>; + regulator-max-microvolt = <1256000>; + regulator-initial-mode = ; + }; + + vreg_l2a_1p0: ldo2 { + regulator-min-microvolt = <944000>; + regulator-max-microvolt = <1056000>; + regulator-initial-mode = ; + }; + + vreg_l3a_1p0: ldo3 { + regulator-min-microvolt = <968000>; + regulator-max-microvolt = <1064000>; + regulator-initial-mode = ; + }; + + vreg_l4a_0p8: ldo4 { + regulator-min-microvolt = <824000>; + regulator-max-microvolt = <928000>; + regulator-initial-mode = ; + }; + + vreg_l5a_2p7: ldo5 { + regulator-min-microvolt = <2496000>; + regulator-max-microvolt = <3000000>; + regulator-initial-mode = ; + }; + + vreg_l6a_0p6: ldo6 { + regulator-min-microvolt = <568000>; + regulator-max-microvolt = <648000>; + regulator-initial-mode = ; + }; + + vreg_l9a_0p6: ldo9 { + regulator-min-microvolt = <488000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = ; + }; + + vreg_l10a_1p8: ldo10 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1832000>; + regulator-initial-mode = ; + }; + + vreg_l11a_1p8: ldo11 { + regulator-min-microvolt = <1696000>; + regulator-max-microvolt = <1904000>; + regulator-initial-mode = ; + }; + + vreg_l12a_1p8: ldo12 { + regulator-min-microvolt = <1696000>; + regulator-max-microvolt = <1952000>; + regulator-initial-mode = ; + }; + + vreg_l13a_1p8: ldo13 { + regulator-min-microvolt = <1696000>; + regulator-max-microvolt = <1904000>; + regulator-initial-mode = ; + }; + + vreg_l14a_1p8: ldo14 { + regulator-min-microvolt = <1728000>; + regulator-max-microvolt = <1832000>; + regulator-initial-mode = ; + }; + + vreg_l15a_1p8: ldo15 { + regulator-min-microvolt = <1696000>; + regulator-max-microvolt = <1904000>; + regulator-initial-mode = ; + }; + + vreg_l16a_2p7: ldo16 { + regulator-min-microvolt = <2496000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = ; + }; + + vreg_l17a_3p0: ldo17 { + regulator-min-microvolt = <2920000>; + regulator-max-microvolt = <3232000>; + regulator-initial-mode = ; + }; + + vreg_l18a_2p8: ldo18 { + regulator-min-microvolt = <2496000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = ; + }; + + vreg_l19a_2p9: ldo19 { + regulator-min-microvolt = <2696000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = ; + }; + }; + + pm6150l-rpmh-regulators { + compatible = "qcom,pm6150l-rpmh-regulators"; + qcom,pmic-id = "c"; + + vreg_s8c_1p3: smps8 { + regulator-min-microvolt = <1120000>; + regulator-max-microvolt = <1408000>; + }; + + vreg_l1c_1p8: ldo1 { + regulator-min-microvolt = <1616000>; + regulator-max-microvolt = <1984000>; + regulator-initial-mode = ; + }; + + vreg_l2c_1p3: ldo2 { + regulator-min-microvolt = <1168000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = ; + }; + + vreg_l3c_1p2: ldo3 { + regulator-min-microvolt = <1144000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = ; + }; + + vreg_l4c_1p8: ldo4 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = ; + }; + + vreg_l5c_1p8: ldo5 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = ; + }; + + vreg_l6c_2p9: ldo6 { + regulator-min-microvolt = <2696000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = ; + }; + + vreg_l7c_3p0: ldo7 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3312000>; + regulator-initial-mode = ; + }; + + vreg_l8c_1p8: ldo8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1904000>; + regulator-initial-mode = ; + }; + + vreg_l9c_2p9: ldo9 { + regulator-min-microvolt = <2952000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = ; + }; + + vreg_l10c_3p3: ldo10 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3400000>; + regulator-initial-mode = ; + }; + + vreg_l11c_3p3: ldo11 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3400000>; + regulator-initial-mode = ; + }; + + vreg_bob: bob { + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3960000>; + regulator-initial-mode = ; + }; + }; +}; + &qupv3_id_0 { status = "okay"; }; From patchwork Mon Oct 21 06:55:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11201453 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 721911920 for ; Mon, 21 Oct 2019 06:56:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 502722089C for ; Mon, 21 Oct 2019 06:56:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="TgJl9Fp9"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="mlr/gz1r" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727516AbfJUG4i (ORCPT ); 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Mon, 21 Oct 2019 06:56:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571640996; bh=WncQ1C/iI5SjC4Fhj43a5JjEFCO8oImB2Yt/Jg6c/Nc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mlr/gz1rHMiMXq0H48yOpDD2vufJbzdd02fTVRtMlGSUZKWWqIj4p7eP6HMnAnxnP JU2r7wEfNrOGLMhYsBJvWI3MttnpmHQmw9s6ZQ9uYMDsBTSS7e+8zIH21RDpSkIOhd H5rkTekt8vbpMq2mnxGrV0RiEI5L8bb9EuiAoCdI= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org A253360A44 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Taniya Das , Rajendra Nayak Subject: [PATCH v2 10/13] arm64: dts: qcom: SC7180: Add node for rpmhcc clock driver Date: Mon, 21 Oct 2019 12:25:19 +0530 Message-Id: <20191021065522.24511-11-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191021065522.24511-1-rnayak@codeaurora.org> References: <20191021065522.24511-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Taniya Das Add node for rpmhcc clock driver. Signed-off-by: Taniya Das Signed-off-by: Rajendra Nayak --- v2: No change arch/arm64/boot/dts/qcom/sc7180.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 51b8004aa6a7..b3149a4de5ea 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -6,6 +6,7 @@ */ #include +#include #include #include @@ -175,6 +176,9 @@ gcc: clock-controller@100000 { compatible = "qcom,gcc-sc7180"; reg = <0 0x00100000 0 0x1f0000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>; + clock-names = "bi_tcxo", "bi_tcxo_ao"; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; @@ -425,6 +429,13 @@ , , ; + + rpmhcc: clock-controller { + compatible = "qcom,sc7180-rpmh-clk"; + clocks = <&xo_board>; + clock-names = "xo"; + #clock-cells = <1>; + }; }; }; From patchwork Mon Oct 21 06:55:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11201449 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 21E9F1920 for ; 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t=1571641000; bh=QJz5mLMctymDUFpwoA+/CVaFjoN2zDUGKGJwYNEauGI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hApDc/ME7WzJ2NjGShLTUJezb+YLZNtyjG7dLuj6OUut0vqDUR7unyFx9FSSPg8jo arE2+l2IMTdWm49mw95qxj2sbGHbb345LIh3eaFe9NNKKT2OB/pVqbT/djp96vrriv I0PVhC1FG5kwJ4mc6x+26cjq9xqi1y6LSlWPe0KM= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org E7C6260AE0 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Maulik Shah , Rajendra Nayak , Lina Iyer , Marc Zyngier Subject: [PATCH v2 11/13] drivers: irqchip: qcom-pdc: Add irqchip for sc7180 Date: Mon, 21 Oct 2019 12:25:20 +0530 Message-Id: <20191021065522.24511-12-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191021065522.24511-1-rnayak@codeaurora.org> References: <20191021065522.24511-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Maulik Shah Add sc7180 pdc irqchip Signed-off-by: Maulik Shah Signed-off-by: Rajendra Nayak Cc: Lina Iyer Cc: Marc Zyngier --- v2: No change drivers/irqchip/qcom-pdc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c index faa7d61b9d6c..954fb599fa9c 100644 --- a/drivers/irqchip/qcom-pdc.c +++ b/drivers/irqchip/qcom-pdc.c @@ -310,3 +310,4 @@ static int qcom_pdc_init(struct device_node *node, struct device_node *parent) } IRQCHIP_DECLARE(pdc_sdm845, "qcom,sdm845-pdc", qcom_pdc_init); +IRQCHIP_DECLARE(pdc_sc7180, "qcom,sc7180-pdc", qcom_pdc_init); From patchwork Mon Oct 21 06:55:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11201447 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 846B5139A for ; Mon, 21 Oct 2019 06:56:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 634B42086D for ; Mon, 21 Oct 2019 06:56:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="AyRjtxw1"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="VO9twppr" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727547AbfJUG4p (ORCPT ); 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Mon, 21 Oct 2019 06:56:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571641003; bh=Nj9rYTRREDQFN0Vgl0E6ZqlkrCh1kPQL2IP303YZx2s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VO9twpprfBWjDPCaCCQo3ICWRJqU8a6kC1JRWvM/dGOgz5zPJcDTwmWun9jeutD0k gbjztBeAAKhPEzhRqu1pAjBH9GHTY5BwxH+jiWVG+Aiv1sO/eZXnuMO8iA8sT6uFR6 pJ7D9c2gXgvMik+SU62hXxfXq8BLBuCOSh5we5f4= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org D069D60B6C Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rajendra Nayak , Lina Iyer , Marc Zyngier Subject: [PATCH v2 12/13] dt-bindings: qcom,pdc: Add compatible for sc7180 Date: Mon, 21 Oct 2019 12:25:21 +0530 Message-Id: <20191021065522.24511-13-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191021065522.24511-1-rnayak@codeaurora.org> References: <20191021065522.24511-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the compatible string for sc7180 SoC from Qualcomm. Signed-off-by: Rajendra Nayak Cc: Lina Iyer Cc: Marc Zyngier Acked-by: Rob Herring --- v2: No change .../devicetree/bindings/interrupt-controller/qcom,pdc.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt index 8e0797cb1487..f0542b339f40 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt @@ -19,6 +19,7 @@ Properties: Value type: Definition: Should contain "qcom,-pdc" - "qcom,sdm845-pdc": For SDM845 + - "qcom,sc7180-pdc": For SC7180 - reg: Usage: required From patchwork Mon Oct 21 06:55:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11201451 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C2C2614ED for ; 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t=1571641007; bh=bob/1CiuQOc9u/3L/o32Cbp9/DVQktJxQPr1R48mRgg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YipT4WCS1AoxA1VCfylD73zNjBmnvXsV3uwq2tD0h4v+w+V0TxAWjW+oRlpTIWTAA XxZdvLVNlCHzUB4cHEXQBwMzTH8K/OEMUboMkqESaoegjFDHl/mtHbbfePiOpK0kv6 oUgxXxx5jtZeezHl6PX4vNbj5DL9hISGyIykdFNw= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 6A42260B67 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Maulik Shah , Rajendra Nayak , Lina Iyer , Marc Zyngier Subject: [PATCH v2 13/13] arm64: dts: qcom: sc7180: Add pdc interrupt controller Date: Mon, 21 Oct 2019 12:25:22 +0530 Message-Id: <20191021065522.24511-14-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191021065522.24511-1-rnayak@codeaurora.org> References: <20191021065522.24511-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Maulik Shah Add pdc interrupt controller for sc7180 Signed-off-by: Maulik Shah Signed-off-by: Rajendra Nayak Cc: Lina Iyer Cc: Marc Zyngier --- v2: No change arch/arm64/boot/dts/qcom/sc7180.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index b3149a4de5ea..31b11dbcd1d4 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -184,6 +184,16 @@ #power-domain-cells = <1>; }; + pdc: interrupt-controller@b220000 { + compatible = "qcom,sc7180-pdc"; + reg = <0 0xb220000 0 0x30000>; + qcom,pdc-ranges = <0 480 15>, <17 497 98>, + <119 634 4>, <124 639 1>; + #interrupt-cells = <2>; + interrupt-parent = <&intc>; + interrupt-controller; + }; + qupv3_id_0: geniqup@ac0000 { compatible = "qcom,geni-se-qup"; reg = <0 0x00ac0000 0 0x6000>;