From patchwork Wed Oct 23 09:02:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11206049 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7535013B1 for ; Wed, 23 Oct 2019 09:03:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 528ED21925 for ; Wed, 23 Oct 2019 09:03:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="TKGm0J68"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="ijXsFS4I" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390670AbfJWJCp (ORCPT ); Wed, 23 Oct 2019 05:02:45 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:41682 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390380AbfJWJCp (ORCPT ); Wed, 23 Oct 2019 05:02:45 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 4D5186087F; Wed, 23 Oct 2019 09:02:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571821364; bh=H3K/p5Nd/IErHMiHrvlWQlFJ9DJTBQ5fShmQbLBtkxM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TKGm0J68Fwzlg22QjwzMe23LTxwXd5ayeI0pEz2QXIr3mkhgnJ8VTW9eyl6iKtUfw /GvrNBxwCGmz2OJpKV+jSg6XLHhfeIM561XPJ0Uc2L2nx3aMX7T+S5lAQev+P+0gDc javUy5HMiaLp23jhzLHAG4oinwwPV0B/JFfvKVcQ= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID,DKIM_SIGNED,SPF_NONE autolearn=no autolearn_force=no version=3.4.0 Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 48F9F602E0; Wed, 23 Oct 2019 09:02:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571821363; bh=H3K/p5Nd/IErHMiHrvlWQlFJ9DJTBQ5fShmQbLBtkxM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ijXsFS4Ii1aIJgX0Jd5STR7e+Op1vN/aPVV5QmKjsfOZM7y9bCG+BKQKd6BbkZ8+R n0ui0HnB1YdsRwh7oaZgD70hSoeG7rt0yKmSrzqCtP7SzkBYz7XkSEo3FZeJdTlqmB TRcU8mFgfuGF+40J3UgWGPScXuEfScaM5y+GMc9M= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 48F9F602E0 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mka@chromium.org, Rajendra Nayak , Vinod Koul Subject: [PATCH v3 01/11] dt-bindings: qcom: Add SC7180 bindings Date: Wed, 23 Oct 2019 14:32:09 +0530 Message-Id: <20191023090219.15603-2-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191023090219.15603-1-rnayak@codeaurora.org> References: <20191023090219.15603-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add a SoC string 'sc7180' for the qualcomm SC7180 SoC. Also add a new board type 'idp' Signed-off-by: Rajendra Nayak Reviewed-by: Vinod Koul --- Documentation/devicetree/bindings/arm/qcom.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index e39d8f02e33c..0a60ea051541 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -36,6 +36,7 @@ description: | mdm9615 ipq8074 sdm845 + sc7180 The 'board' element must be one of the following strings: @@ -46,6 +47,7 @@ description: | sbc hk01 qrd + idp The 'soc_version' and 'board_version' elements take the form of v. where the minor number may be omitted when it's zero, i.e. v1.0 is the same From patchwork Wed Oct 23 09:02:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11206027 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C842C13BD for ; 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t=1571821367; bh=ocbhmanUdxbnNDSUpI3OVkYyO45fxFMWeMxiAYccAwM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JyIHBfPSB3oLT0e9Cu9oU52porb0IdyrjqC4iqYbGzDDC6nAeTMcfLcKiBbLgDLF5 c+WR3urH258xrDGRAVyt3eHD6fd43ZYH/ldC7NX6xR6r6o7r4J935x3A1fHkbJ9cwl HRi6RKZ33kFg3YXxbc4t4fBnMMkaZaXTLyGmZ+es= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org F290B60B12 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mka@chromium.org, Rajendra Nayak , Taniya Das Subject: [PATCH v3 02/11] arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc Date: Wed, 23 Oct 2019 14:32:10 +0530 Message-Id: <20191023090219.15603-3-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191023090219.15603-1-rnayak@codeaurora.org> References: <20191023090219.15603-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add skeletal sc7180 SoC dtsi and idp board dts files Co-developed-by: Taniya Das Signed-off-by: Taniya Das Signed-off-by: Rajendra Nayak --- v3: Updated the qup and uart lables to be consistent with the naming convention followed in sdm845 as suggested by Matthias The patch has a dependency on gcc clock driver patches [1] to merge first [1] https://www.spinics.net/lists/linux-clk/msg41851.html arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/sc7180-idp.dts | 47 ++++ arch/arm64/boot/dts/qcom/sc7180.dtsi | 300 ++++++++++++++++++++++++ 3 files changed, 348 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sc7180-idp.dts create mode 100644 arch/arm64/boot/dts/qcom/sc7180.dtsi diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 6498a1ec893f..7a5c2f7fe37f 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-asus-novago-tp370ql.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-hp-envy-x2.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-lenovo-miix-630.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-mtp.dtb +dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r2.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r3.dtb diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts new file mode 100644 index 000000000000..5ee6eb3e2b99 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7180-idp.dts @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * SC7180 IDP board device tree source + * + * Copyright (c) 2019, The Linux Foundation. All rights reserved. + */ + +/dts-v1/; + +#include "sc7180.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SC7180 IDP"; + compatible = "qcom,sc7180-idp"; + + aliases { + serial0 = &uart10; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&qupv3_id_1 { + status = "okay"; +}; + +&uart10 { + status = "okay"; +}; + +/* PINCTRL - additions to nodes defined in sc7180.dtsi */ + +&qup_uart10_default { + pinconf-tx { + pins = "gpio44"; + drive-strength = <2>; + bias-disable; + }; + + pinconf-rx { + pins = "gpio45"; + drive-strength = <2>; + bias-pull-up; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi new file mode 100644 index 000000000000..084854341ddd --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -0,0 +1,300 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * SC7180 SoC device tree source + * + * Copyright (c) 2019, The Linux Foundation. All rights reserved. + */ + +#include +#include + +/ { + interrupt-parent = <&intc>; + + #address-cells = <2>; + #size-cells = <2>; + + chosen { }; + + clocks { + xo_board: xo-board { + compatible = "fixed-clock"; + clock-frequency = <38400000>; + clock-output-names = "xo_board"; + #clock-cells = <0>; + }; + + sleep_clk: sleep-clk { + compatible = "fixed-clock"; + clock-frequency = <32764>; + clock-output-names = "sleep_clk"; + #clock-cells = <0>; + }; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&L2_0>; + L2_0: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + L3_0: l3-cache { + compatible = "cache"; + }; + }; + }; + + CPU1: cpu@100 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x100>; + enable-method = "psci"; + next-level-cache = <&L2_100>; + L2_100: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU2: cpu@200 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x200>; + enable-method = "psci"; + next-level-cache = <&L2_200>; + L2_200: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU3: cpu@300 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x300>; + enable-method = "psci"; + next-level-cache = <&L2_300>; + L2_300: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU4: cpu@400 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x400>; + enable-method = "psci"; + next-level-cache = <&L2_400>; + L2_400: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU5: cpu@500 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x500>; + enable-method = "psci"; + next-level-cache = <&L2_500>; + L2_500: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU6: cpu@600 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x600>; + enable-method = "psci"; + next-level-cache = <&L2_600>; + L2_600: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU7: cpu@700 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x700>; + enable-method = "psci"; + next-level-cache = <&L2_700>; + L2_700: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + }; + + memory@80000000 { + device_type = "memory"; + /* We expect the bootloader to fill in the size */ + reg = <0 0x80000000 0 0>; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = ; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + soc: soc { + #address-cells = <2>; + #size-cells = <2>; + ranges = <0 0 0 0 0x10 0>; + dma-ranges = <0 0 0 0 0x10 0>; + compatible = "simple-bus"; + + gcc: clock-controller@100000 { + compatible = "qcom,gcc-sc7180"; + reg = <0 0x00100000 0 0x1f0000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + + qupv3_id_1: geniqup@ac0000 { + compatible = "qcom,geni-se-qup"; + reg = <0 0x00ac0000 0 0x6000>; + clock-names = "m-ahb", "s-ahb"; + clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, + <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + uart10: serial@a88000 { + compatible = "qcom,geni-debug-uart"; + reg = <0 0x00a88000 0 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_uart10_default>; + interrupts = ; + status = "disabled"; + }; + }; + + tlmm: pinctrl@3500000 { + compatible = "qcom,sc7180-pinctrl"; + reg = <0 0x03500000 0 0x300000>, + <0 0x03900000 0 0x300000>, + <0 0x03d00000 0 0x300000>; + reg-names = "west", "north", "south"; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&tlmm 0 0 120>; + + qup_uart10_default: qup-uart10-default { + pinmux { + pins = "gpio44", "gpio45"; + function = "qup12"; + }; + }; + }; + + intc: interrupt-controller@17a00000 { + compatible = "arm,gic-v3"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0 0x17a00000 0 0x10000>, /* GICD */ + <0 0x17a60000 0 0x100000>; /* GICR * 8 */ + interrupts = ; + + gic-its@17a40000 { + compatible = "arm,gic-v3-its"; + msi-controller; + #msi-cells = <1>; + reg = <0 0x17a40000 0 0x20000>; + status = "disabled"; + }; + }; + + timer@17c20000{ + #address-cells = <2>; + #size-cells = <2>; + ranges; + compatible = "arm,armv7-timer-mem"; + reg = <0 0x17c20000 0 0x1000>; + + frame@17c21000 { + frame-number = <0>; + interrupts = , + ; + reg = <0 0x17c21000 0 0x1000>, + <0 0x17c22000 0 0x1000>; + }; + + frame@17c23000 { + frame-number = <1>; + interrupts = ; + reg = <0 0x17c23000 0 0x1000>; + status = "disabled"; + }; + + frame@17c25000 { + frame-number = <2>; + interrupts = ; + reg = <0 0x17c25000 0 0x1000>; + status = "disabled"; + }; + + frame@17c27000 { + frame-number = <3>; + interrupts = ; + reg = <0 0x17c27000 0 0x1000>; + status = "disabled"; + }; + + frame@17c29000 { + frame-number = <4>; + interrupts = ; + reg = <0 0x17c29000 0 0x1000>; + status = "disabled"; + }; + + frame@17c2b000 { + frame-number = <5>; + interrupts = ; + reg = <0 0x17c2b000 0 0x1000>; + status = "disabled"; + }; + + frame@17c2d000 { + frame-number = <6>; + interrupts = ; + reg = <0 0x17c2d000 0 0x1000>; + status = "disabled"; + }; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; +}; From patchwork Wed Oct 23 09:02:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11206029 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E3CE313BD for ; Wed, 23 Oct 2019 09:02:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C117221872 for ; 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Wed, 23 Oct 2019 09:02:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571821370; bh=F0rUzHr644YUCpGYNrm4/b45IlRQL1QeDT//bfPmztk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YTtos7jR7aDIVDwYgV2ugZih/aMQasZOSwJRMqhHlmhKAMJ4ETtusJNP+SpwIJ/a+ y6YdO6z7h3TUGPtH9NHZR10c2VipggKu/tSPmEwUdtWGOHistIo5uJhmhkXSOYm3JN 6+T0xho92sE1eWoEAvFyfsSCNCFN/d58uPkTOeRE= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 998DB60B16 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mka@chromium.org, Rajendra Nayak , Joerg Roedel , Mark Rutland Subject: [PATCH v3 03/11] dt-bindings: arm-smmu: update binding for qcom sc7180 SoC Date: Wed, 23 Oct 2019 14:32:11 +0530 Message-Id: <20191023090219.15603-4-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191023090219.15603-1-rnayak@codeaurora.org> References: <20191023090219.15603-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the soc specific compatible for sc7180 smmu-500 Signed-off-by: Rajendra Nayak Cc: Joerg Roedel Cc: Mark Rutland --- Documentation/devicetree/bindings/iommu/arm,smmu.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt index 3133f3ba7567..347869807cf2 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt @@ -30,6 +30,7 @@ conditions. Qcom SoCs implementing "arm,mmu-500" must also include, as below, SoC-specific compatibles: "qcom,sdm845-smmu-500", "arm,mmu-500" + "qcom,sc7180-smmu-500", "arm,mmu-500" - reg : Base address and size of the SMMU. From patchwork Wed Oct 23 09:02:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11206031 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 722CE13B1 for ; Wed, 23 Oct 2019 09:03:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 46A7321928 for ; Wed, 23 Oct 2019 09:03:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="fi3JOjCq"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="V9wkg7lW" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390723AbfJWJC6 (ORCPT ); Wed, 23 Oct 2019 05:02:58 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:42074 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390717AbfJWJC6 (ORCPT ); Wed, 23 Oct 2019 05:02:58 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id D792C60D61; Wed, 23 Oct 2019 09:02:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571821377; bh=T+Jiv0pgpEgGW8NQYm0ZpQZMpgIL6IA8SsaPkemevV0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fi3JOjCqpxhrIGDPxLHRsjLZSYj7yBKVhI4kfN+vfR5wipVYkXzCK43hVho0Mvnym 1b+d+9lndJJpd+cbQlYD4Z2/irLqJYCvNexqCB/R1uKq8Aic+tq0hWFcAbGRJH1wsC VST/wX/nKJ+UQWXZ0hwV+9F1cPKu4SaH8vCKzXfg= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID,DKIM_SIGNED,SPF_NONE,UPPERCASE_50_75 autolearn=no autolearn_force=no version=3.4.0 Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id F142D60D61; Wed, 23 Oct 2019 09:02:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571821375; bh=T+Jiv0pgpEgGW8NQYm0ZpQZMpgIL6IA8SsaPkemevV0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=V9wkg7lWahtIBfkGrCnyKPj3/KVBL/uzGcdpLCuAO1cFa/cAUK8rOXyYSDT9VIBr5 ZBvpzijLtL8GeIjGgx+RHrx8LIFFKgc2NNuB7HxQPcz3TiZqutN2bO75X3CYd/Uf/T mtkbEppI4D4L1CVFom2snLguOUx/aaWgFdVuE7zM= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org F142D60D61 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mka@chromium.org, Vivek Gautam , Rajendra Nayak Subject: [PATCH v3 04/11] arm64: dts: sc7180: Add device node for apps_smmu Date: Wed, 23 Oct 2019 14:32:12 +0530 Message-Id: <20191023090219.15603-5-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191023090219.15603-1-rnayak@codeaurora.org> References: <20191023090219.15603-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Vivek Gautam Adding device node for APPS SMMU that is connected to devices such as display, video, usb, mmc, etc. on SC7180 chipset. Signed-off-by: Vivek Gautam Signed-off-by: Rajendra Nayak --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 88 ++++++++++++++++++++++++++++ 1 file changed, 88 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 084854341ddd..f17684148595 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -211,6 +211,94 @@ }; }; + apps_smmu: iommu@15000000 { + compatible = "qcom,sc7180-smmu-500", "arm,mmu-500"; + reg = <0 0x15000000 0 0x100000>; + #iommu-cells = <2>; + #global-interrupts = <1>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + intc: interrupt-controller@17a00000 { compatible = "arm,gic-v3"; #address-cells = <2>; From patchwork Wed Oct 23 09:02:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11206033 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 65BDF13B1 for ; Wed, 23 Oct 2019 09:03:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 43F0821928 for ; Wed, 23 Oct 2019 09:03:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="feKKXUTu"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="UA560UTm" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390733AbfJWJDE (ORCPT ); Wed, 23 Oct 2019 05:03:04 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:42192 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390578AbfJWJDB (ORCPT ); Wed, 23 Oct 2019 05:03:01 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 0FD8460D80; Wed, 23 Oct 2019 09:03:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571821381; bh=phfS9FhlsQb3RonpGhGkEqAm23lRcKIgdbFcLLixLXI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=feKKXUTu0nLtmW45FEVLeZaWGC21AWfOTZwDJyhXXZ44jDXbsSiJnnOwlBMWbnR4l QYFCgTBrOKAHa25LZxqdIeIDLYclbe1OwLsO/ERGYz/GhRPCnleCNb14amGzKE1p9T TDrRyfwD71xDuCVkRpfg1w2Q12MNLjAp4R+o6LJ8= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID,DKIM_SIGNED,SPF_NONE autolearn=no autolearn_force=no version=3.4.0 Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id B825960D83; Wed, 23 Oct 2019 09:02:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571821378; bh=phfS9FhlsQb3RonpGhGkEqAm23lRcKIgdbFcLLixLXI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UA560UTm3TdxUYm2cs6kehRhAimdIn8kKUK6OdSTxavJN2EksnwmEsDDTCv+Zx5KW kIwB/JwA1A5pBj0zHx1YX4VvVCE7LRp7MXa7TwYlzhhlnALw1gCjZWgMElLqhUSJAf NxLJrCuDUdG8FyrjayjikuNJoQDzCyl1Xozfcyb0= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org B825960D83 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mka@chromium.org, Maulik Shah , Rajendra Nayak Subject: [PATCH v3 05/11] arm64: dts: qcom: sc7180: Add cmd_db reserved area Date: Wed, 23 Oct 2019 14:32:13 +0530 Message-Id: <20191023090219.15603-6-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191023090219.15603-1-rnayak@codeaurora.org> References: <20191023090219.15603-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Maulik Shah Command_db provides mapping for resource key and address managed by remote processor. Add cmd_db reserved memory area. Signed-off-by: Maulik Shah Signed-off-by: Rajendra Nayak --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index f17684148595..dfa49ef2bce0 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -32,6 +32,18 @@ }; }; + reserved_memory: reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + cmd_db: reserved-memory@80820000 { + reg = <0x0 0x80820000 0x0 0x20000>; + compatible = "qcom,cmd-db"; + no-map; + }; + }; + cpus { #address-cells = <2>; #size-cells = <0>; From patchwork Wed Oct 23 09:02:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11206047 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BE68513B1 for ; Wed, 23 Oct 2019 09:03:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9BC0621925 for ; Wed, 23 Oct 2019 09:03:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="n0Qwk1Ki"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="AyfrT8bK" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390746AbfJWJDG (ORCPT ); Wed, 23 Oct 2019 05:03:06 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:42302 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390738AbfJWJDG (ORCPT ); Wed, 23 Oct 2019 05:03:06 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 9298B60930; Wed, 23 Oct 2019 09:03:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571821384; bh=p9AGsnE9tLIx2FtWxX4ho+pfZNr/2loGo5mvlgbdHtU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=n0Qwk1KiAnB/vTHd3NUOdK3s8ecArOxy+9WiDdwUGsInsw0sh4Mq3JOZ7qp2TuZa1 GBsw2FALVxnEZBM9CIRr9AaXSa94EsQ3/IOe141s0GlZxBaR6F5EgM5FouwqlmO4V5 TfsQKro83MZRNp6nR9vsmG0162P0KJlK+5xYksLU= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID,DKIM_SIGNED,SPF_NONE autolearn=no autolearn_force=no version=3.4.0 Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id AB74360D8F; Wed, 23 Oct 2019 09:02:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571821382; bh=p9AGsnE9tLIx2FtWxX4ho+pfZNr/2loGo5mvlgbdHtU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AyfrT8bKq/B9V+3naGQXEvbcoFkqtHJoRKITR7H6tTqsl587kHmsuxIhyWA+5aSGn dXtOKH8E+W+qBtSoqovHCdRAM7qDtRuTgN/nM8FmUhQbZwbGi0An93xXMTKiQTpOWg zmEYWVytdEzTj+Q+n6WUSZ2TPYHqhukV3v0wmCNE= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org AB74360D8F Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mka@chromium.org, Maulik Shah , Rajendra Nayak Subject: [PATCH v3 06/11] arm64: dts: qcom: sc7180: Add rpmh-rsc node Date: Wed, 23 Oct 2019 14:32:14 +0530 Message-Id: <20191023090219.15603-7-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191023090219.15603-1-rnayak@codeaurora.org> References: <20191023090219.15603-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Maulik Shah Add device bindings for the application processor's rsc. The rsc contains the TCS that are used for communicating with the hardened resource accelerators on Qualcomm Technologies, Inc. (QTI) SoCs. Signed-off-by: Maulik Shah Signed-off-by: Rajendra Nayak --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index dfa49ef2bce0..04808a07d7da 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -7,6 +7,7 @@ #include #include +#include / { interrupt-parent = <&intc>; @@ -388,6 +389,24 @@ status = "disabled"; }; }; + + apps_rsc: rsc@18200000 { + label = "apps_rsc"; + compatible = "qcom,rpmh-rsc"; + reg = <0 0x18200000 0 0x10000>, + <0 0x18210000 0 0x10000>, + <0 0x18220000 0 0x10000>; + reg-names = "drv-0", "drv-1", "drv-2"; + interrupts = , + , + ; + qcom,tcs-offset = <0xd00>; + qcom,drv-id = <2>; + qcom,tcs-config = , + , + , + ; + }; }; timer { From patchwork Wed Oct 23 09:02:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11206039 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 77C8F13B1 for ; Wed, 23 Oct 2019 09:03:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 56B8021929 for ; Wed, 23 Oct 2019 09:03:27 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="Bv1lKagg"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="WYkSAqYb" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390754AbfJWJDI (ORCPT ); Wed, 23 Oct 2019 05:03:08 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:42388 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390750AbfJWJDI (ORCPT ); Wed, 23 Oct 2019 05:03:08 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 71D3D60A74; Wed, 23 Oct 2019 09:03:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571821387; bh=16/3Qk33qTtXPZLtswsxSP4xNHGlzt5Ev3uNdsJNtYU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Bv1lKagg/BvQ2XTsYqFtwF+GhwG90Tn0QFIvs6cKtIKHQ990x8x2PPTOD2DAEGXg7 kGKHxtRiUnoB2Atx2mq5yFt5w60Aa3fk4APtFJmkeYrfMVfZJdd3gEay2kwz1sDBlE r5sMShV+tnbc6cz1pP3ucxtFQ40H35es3p/2UG8Q= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID,DKIM_SIGNED,SPF_NONE autolearn=no autolearn_force=no version=3.4.0 Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 94DE560D96; Wed, 23 Oct 2019 09:03:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571821386; bh=16/3Qk33qTtXPZLtswsxSP4xNHGlzt5Ev3uNdsJNtYU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WYkSAqYbhgNpcqyIe8uTBd4ic2RMa9u6JX1Wiu+QOwMG3GnJxbUy4SKsHeDYJDNJk rXE9OHy7PFKenE56GcujWnmY9f48VFZoeF4tPxy3+afuh+xR3Kw0ldi1AWbd2i0/2t bIvYETKbsGlgxtMlZ2+9QQFLLKb3hXlsjGbliAo0= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 94DE560D96 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mka@chromium.org, Kiran Gunda , Rajendra Nayak Subject: [PATCH v3 07/11] arm64: dts: qcom: sc7180: Add SPMI PMIC arbiter device Date: Wed, 23 Oct 2019 14:32:15 +0530 Message-Id: <20191023090219.15603-8-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191023090219.15603-1-rnayak@codeaurora.org> References: <20191023090219.15603-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Kiran Gunda Add SPMI PMIC arbiter device to communicate with PMICs attached to SPMI bus. Signed-off-by: Kiran Gunda Signed-off-by: Rajendra Nayak --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 04808a07d7da..6584ac6e6c7b 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -224,6 +224,25 @@ }; }; + spmi_bus: spmi@c440000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0 0xc440000 0 0x1100>, + <0 0xc600000 0 0x2000000>, + <0 0xe600000 0 0x100000>, + <0 0xe700000 0 0xa0000>, + <0 0xc40a000 0 0x26000>; + reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; + interrupt-names = "periph_irq"; + interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; + qcom,ee = <0>; + qcom,channel = <0>; + #address-cells = <1>; + #size-cells = <1>; + interrupt-controller; + #interrupt-cells = <4>; + cell-index = <0>; + }; + apps_smmu: iommu@15000000 { compatible = "qcom,sc7180-smmu-500", "arm,mmu-500"; reg = <0 0x15000000 0 0x100000>; From patchwork Wed Oct 23 09:02:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11206037 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 63F0D13BD for ; Wed, 23 Oct 2019 09:03:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 37BBB222C1 for ; Wed, 23 Oct 2019 09:03:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="FWNnyY7C"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="dGy/a5SJ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390784AbfJWJDR (ORCPT ); Wed, 23 Oct 2019 05:03:17 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:42526 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390773AbfJWJDN (ORCPT ); Wed, 23 Oct 2019 05:03:13 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 7542B60DB6; Wed, 23 Oct 2019 09:03:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571821392; bh=lJM/i8R82I+g6HCpZyypWkU2fNxaBTZzxjmpRV+iRdw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FWNnyY7CReT6dLKzhp+V6T/Ar3Y2XvhDubohmGeJz+f9oMfN6sT6VIW+XoPjhmtbC 9M1W05BQVRC9Wn8t4V5H3vbKu1U2/40msZGM0UDW1doR6ZIRubFL3nikWgRayPWULi q8C3BuduiuHhKiN3XgoEZDwkZB0UUHVjsjEnePbw= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID,DKIM_SIGNED,SPF_NONE autolearn=no autolearn_force=no version=3.4.0 Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 894BC60DA9; Wed, 23 Oct 2019 09:03:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571821390; bh=lJM/i8R82I+g6HCpZyypWkU2fNxaBTZzxjmpRV+iRdw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dGy/a5SJ/DsacPVQjXGeE/XaB0MaDDaA9UzX4G0jNASFgnWYMGJAWXKY8/vBGdzo2 v5b6ZScEHRzd0ezdnFnqerja7XdZEDawJuoeA6J6b7S9tc/xrEyeMJ3B920SvQDIw3 5IgFpyYbJb6FvJIhIUr4P4NZPHMJWFzt+NCGRza4= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 894BC60DA9 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mka@chromium.org, Kiran Gunda , Rajendra Nayak Subject: [PATCH v3 08/11] arm64: dts: qcom: pm6150: Add PM6150/PM6150L PMIC peripherals Date: Wed, 23 Oct 2019 14:32:16 +0530 Message-Id: <20191023090219.15603-9-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191023090219.15603-1-rnayak@codeaurora.org> References: <20191023090219.15603-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Kiran Gunda Add PM6150/PM6150L peripherals such as PON, GPIOs, ADC and other PMIC infra modules. Signed-off-by: Kiran Gunda Signed-off-by: Rajendra Nayak --- arch/arm64/boot/dts/qcom/pm6150.dtsi | 85 +++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/pm6150l.dtsi | 47 ++++++++++++++ arch/arm64/boot/dts/qcom/sc7180-idp.dts | 2 + 3 files changed, 134 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pm6150.dtsi create mode 100644 arch/arm64/boot/dts/qcom/pm6150l.dtsi diff --git a/arch/arm64/boot/dts/qcom/pm6150.dtsi b/arch/arm64/boot/dts/qcom/pm6150.dtsi new file mode 100644 index 000000000000..20eb928e5ce3 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pm6150.dtsi @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: BSD-3-Clause +// Copyright (c) 2019, The Linux Foundation. All rights reserved. + +#include +#include +#include +#include +#include + +&spmi_bus { + pm6150_lsid0: pmic@0 { + compatible = "qcom,pm6150", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm6150_pon: pon@800 { + compatible = "qcom,pm8998-pon"; + reg = <0x800>; + mode-bootloader = <0x2>; + mode-recovery = <0x1>; + + pwrkey { + compatible = "qcom,pm8941-pwrkey"; + interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + linux,code = ; + }; + }; + + pm6150_temp: temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pm6150_adc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pm6150_adc: adc@3100 { + compatible = "qcom,spmi-adc5"; + reg = <0x3100>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + + adc-chan@ADC5_DIE_TEMP { + reg = ; + label = "die_temp"; + }; + }; + + pm6150_gpio: gpios@c000 { + compatible = "qcom,pm6150-gpio", "qcom,spmi-gpio"; + reg = <0xc000 0xa00>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <0 0xc0 0 IRQ_TYPE_NONE>, + <0 0xc1 0 IRQ_TYPE_NONE>, + <0 0xc2 0 IRQ_TYPE_NONE>, + <0 0xc3 0 IRQ_TYPE_NONE>, + <0 0xc4 0 IRQ_TYPE_NONE>, + <0 0xc5 0 IRQ_TYPE_NONE>, + <0 0xc6 0 IRQ_TYPE_NONE>, + <0 0xc7 0 IRQ_TYPE_NONE>, + <0 0xc8 0 IRQ_TYPE_NONE>, + <0 0xc9 0 IRQ_TYPE_NONE>; + + interrupt-names = "pm6150_gpio1", "pm6150_gpio2", + "pm6150_gpio3", "pm6150_gpio4", + "pm6150_gpio5", "pm6150_gpio6", + "pm6150_gpio7", "pm6150_gpio8", + "pm6150_gpio9", "pm6150_gpio10"; + }; + }; + + pm6150_lsid1: pmic@1 { + compatible = "qcom,pm6150", "qcom,spmi-pmic"; + reg = <0x1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/pm6150l.dtsi b/arch/arm64/boot/dts/qcom/pm6150l.dtsi new file mode 100644 index 000000000000..b17bb1af9367 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pm6150l.dtsi @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: BSD-3-Clause +// Copyright (c) 2019, The Linux Foundation. All rights reserved. + +#include +#include + +&spmi_bus { + pm6150l_lsid4: pmic@4 { + compatible = "qcom,pm6150l", "qcom,spmi-pmic"; + reg = <0x4 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm6150l_gpios: gpios@c000 { + compatible = "qcom,pm6150l-gpio", "qcom,spmi-gpio"; + reg = <0xc000 0xc00>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <4 0xc0 0 IRQ_TYPE_NONE>, + <4 0xc1 0 IRQ_TYPE_NONE>, + <4 0xc2 0 IRQ_TYPE_NONE>, + <4 0xc3 0 IRQ_TYPE_NONE>, + <4 0xc4 0 IRQ_TYPE_NONE>, + <4 0xc5 0 IRQ_TYPE_NONE>, + <4 0xc6 0 IRQ_TYPE_NONE>, + <4 0xc7 0 IRQ_TYPE_NONE>, + <4 0xc8 0 IRQ_TYPE_NONE>, + <4 0xc9 0 IRQ_TYPE_NONE>, + <4 0xca 0 IRQ_TYPE_NONE>, + <4 0xcb 0 IRQ_TYPE_NONE>; + + interrupt-names = "pm6150l_gpio1", "pm6150l_gpio2", + "pm6150l_gpio3", "pm6150l_gpio4", + "pm6150l_gpio5", "pm6150l_gpio6", + "pm6150l_gpio7", "pm6150l_gpio8", + "pm6150l_gpio9", "pm6150l_gpio10", + "pm6150l_gpio11", "pm6150l_gpio12"; + }; + }; + + pm6150l_lsid5: pmic@5 { + compatible = "qcom,pm6150l", "qcom,spmi-pmic"; + reg = <0x5 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts index 5ee6eb3e2b99..be42ae9d2d9d 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-idp.dts +++ b/arch/arm64/boot/dts/qcom/sc7180-idp.dts @@ -8,6 +8,8 @@ /dts-v1/; #include "sc7180.dtsi" +#include "pm6150.dtsi" +#include "pm6150l.dtsi" / { model = "Qualcomm Technologies, Inc. SC7180 IDP"; From patchwork Wed Oct 23 09:02:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11206035 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F120213BD for ; Wed, 23 Oct 2019 09:03:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C4F7921925 for ; Wed, 23 Oct 2019 09:03:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="QOu9Z0Z5"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="T/7cjrZl" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390797AbfJWJDV (ORCPT ); Wed, 23 Oct 2019 05:03:21 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:42742 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390773AbfJWJDU (ORCPT ); Wed, 23 Oct 2019 05:03:20 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id A67CD60DA5; Wed, 23 Oct 2019 09:03:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571821398; bh=L/bqRs6IeB0+YKKRQRcrzGWRDgk5tz70lx3KMde4Z+E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QOu9Z0Z53tpKa06xDZnrfjiQFvYWpeI+DZCnfsfEKVrfrNVr59adspmC04yjYOINS bPySG2G6rYQMh0CsV6U7p/afEYQ9iIrMd4LDMF5vLRLwmfBvIQOYg8ftv4C247/LBa PoR6m5kQ97vjQx4ZfuvsqTUynwtGKL1d9PzEztn4= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID,DKIM_SIGNED,SPF_NONE autolearn=no autolearn_force=no version=3.4.0 Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 5BC4960A64; Wed, 23 Oct 2019 09:03:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571821394; bh=L/bqRs6IeB0+YKKRQRcrzGWRDgk5tz70lx3KMde4Z+E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=T/7cjrZl9DL6c4KQ5EssBc1p4qx0jq0XDxn2/Jo6PXrm9oQapIqkMO4bR7TeRTjwE wBILHO3+TubifxGgoVMhU0BzGPQ4LvQQZutluLVUdL3wlIfLHHKPSo2MqHkisovAmW bOcwCAgG1mm1K3zQfupFhkAW8H/2wwN9iKFnPwi8= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 5BC4960A64 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mka@chromium.org, Kiran Gunda , Rajendra Nayak Subject: [PATCH v3 09/11] arm64: dts: qcom: sc7180-idp: Add RPMh regulators Date: Wed, 23 Oct 2019 14:32:17 +0530 Message-Id: <20191023090219.15603-10-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191023090219.15603-1-rnayak@codeaurora.org> References: <20191023090219.15603-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Kiran Gunda Add the rpmh regulators for the sc7180 idp platform. This platform consists of PMIC PM6150 and PM6150l Signed-off-by: Kiran Gunda Signed-off-by: Rajendra Nayak --- arch/arm64/boot/dts/qcom/sc7180-idp.dts | 207 ++++++++++++++++++++++++ 1 file changed, 207 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts index be42ae9d2d9d..e0724ef3317d 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-idp.dts +++ b/arch/arm64/boot/dts/qcom/sc7180-idp.dts @@ -7,6 +7,7 @@ /dts-v1/; +#include #include "sc7180.dtsi" #include "pm6150.dtsi" #include "pm6150l.dtsi" @@ -24,6 +25,212 @@ }; }; +&apps_rsc { + pm6150-rpmh-regulators { + compatible = "qcom,pm6150-rpmh-regulators"; + qcom,pmic-id = "a"; + + vreg_s1a_1p1: smps1 { + regulator-min-microvolt = <1128000>; + regulator-max-microvolt = <1128000>; + }; + + vreg_s4a_1p0: smps4 { + regulator-min-microvolt = <824000>; + regulator-max-microvolt = <1120000>; + }; + + vreg_s5a_2p0: smps5 { + regulator-min-microvolt = <1744000>; + regulator-max-microvolt = <2040000>; + }; + + vreg_l1a_1p2: ldo1 { + regulator-min-microvolt = <1178000>; + regulator-max-microvolt = <1256000>; + regulator-initial-mode = ; + }; + + vreg_l2a_1p0: ldo2 { + regulator-min-microvolt = <944000>; + regulator-max-microvolt = <1056000>; + regulator-initial-mode = ; + }; + + vreg_l3a_1p0: ldo3 { + regulator-min-microvolt = <968000>; + regulator-max-microvolt = <1064000>; + regulator-initial-mode = ; + }; + + vreg_l4a_0p8: ldo4 { + regulator-min-microvolt = <824000>; + regulator-max-microvolt = <928000>; + regulator-initial-mode = ; + }; + + vreg_l5a_2p7: ldo5 { + regulator-min-microvolt = <2496000>; + regulator-max-microvolt = <3000000>; + regulator-initial-mode = ; + }; + + vreg_l6a_0p6: ldo6 { + regulator-min-microvolt = <568000>; + regulator-max-microvolt = <648000>; + regulator-initial-mode = ; + }; + + vreg_l9a_0p6: ldo9 { + regulator-min-microvolt = <488000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = ; + }; + + vreg_l10a_1p8: ldo10 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1832000>; + regulator-initial-mode = ; + }; + + vreg_l11a_1p8: ldo11 { + regulator-min-microvolt = <1696000>; + regulator-max-microvolt = <1904000>; + regulator-initial-mode = ; + }; + + vreg_l12a_1p8: ldo12 { + regulator-min-microvolt = <1696000>; + regulator-max-microvolt = <1952000>; + regulator-initial-mode = ; + }; + + vreg_l13a_1p8: ldo13 { + regulator-min-microvolt = <1696000>; + regulator-max-microvolt = <1904000>; + regulator-initial-mode = ; + }; + + vreg_l14a_1p8: ldo14 { + regulator-min-microvolt = <1728000>; + regulator-max-microvolt = <1832000>; + regulator-initial-mode = ; + }; + + vreg_l15a_1p8: ldo15 { + regulator-min-microvolt = <1696000>; + regulator-max-microvolt = <1904000>; + regulator-initial-mode = ; + }; + + vreg_l16a_2p7: ldo16 { + regulator-min-microvolt = <2496000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = ; + }; + + vreg_l17a_3p0: ldo17 { + regulator-min-microvolt = <2920000>; + regulator-max-microvolt = <3232000>; + regulator-initial-mode = ; + }; + + vreg_l18a_2p8: ldo18 { + regulator-min-microvolt = <2496000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = ; + }; + + vreg_l19a_2p9: ldo19 { + regulator-min-microvolt = <2696000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = ; + }; + }; + + pm6150l-rpmh-regulators { + compatible = "qcom,pm6150l-rpmh-regulators"; + qcom,pmic-id = "c"; + + vreg_s8c_1p3: smps8 { + regulator-min-microvolt = <1120000>; + regulator-max-microvolt = <1408000>; + }; + + vreg_l1c_1p8: ldo1 { + regulator-min-microvolt = <1616000>; + regulator-max-microvolt = <1984000>; + regulator-initial-mode = ; + }; + + vreg_l2c_1p3: ldo2 { + regulator-min-microvolt = <1168000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = ; + }; + + vreg_l3c_1p2: ldo3 { + regulator-min-microvolt = <1144000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = ; + }; + + vreg_l4c_1p8: ldo4 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = ; + }; + + vreg_l5c_1p8: ldo5 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = ; + }; + + vreg_l6c_2p9: ldo6 { + regulator-min-microvolt = <2696000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = ; + }; + + vreg_l7c_3p0: ldo7 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3312000>; + regulator-initial-mode = ; + }; + + vreg_l8c_1p8: ldo8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1904000>; + regulator-initial-mode = ; + }; + + vreg_l9c_2p9: ldo9 { + regulator-min-microvolt = <2952000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = ; + }; + + vreg_l10c_3p3: ldo10 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3400000>; + regulator-initial-mode = ; + }; + + vreg_l11c_3p3: ldo11 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3400000>; + regulator-initial-mode = ; + }; + + vreg_bob: bob { + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3960000>; + regulator-initial-mode = ; + }; + }; +}; + &qupv3_id_1 { status = "okay"; }; From patchwork Wed Oct 23 09:02:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11206045 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3652413BD for ; Wed, 23 Oct 2019 09:03:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 141DC21925 for ; Wed, 23 Oct 2019 09:03:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="S7Uvw58D"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="HCypB5ra" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390810AbfJWJD1 (ORCPT ); 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Wed, 23 Oct 2019 09:03:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1571821398; bh=K9tw6jZeprl7ON7Tri7gB4VhamKN0dWIXfEJAxWnyxE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HCypB5ra7Vqr86JzaAO6mWH8HDLqgA+pTELaOGO0JMoRVBj8gCydFO7sKmcrgkh/t 6ULPOvPj9FXKaxciD04KUlCqXh17teMpzzMSq5k212w0lCfBhX+PYlnAixRJOzLmfj KC3Wfjvq0OxOnMPvB8LzOUQHnk9MSNfK9WIMD3DU= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 3D84360DBC Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mka@chromium.org, Taniya Das , Rajendra Nayak Subject: [PATCH v3 10/11] arm64: dts: qcom: SC7180: Add node for rpmhcc clock driver Date: Wed, 23 Oct 2019 14:32:18 +0530 Message-Id: <20191023090219.15603-11-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191023090219.15603-1-rnayak@codeaurora.org> References: <20191023090219.15603-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Taniya Das Add node for rpmhcc clock driver. Signed-off-by: Taniya Das Signed-off-by: Rajendra Nayak --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 6584ac6e6c7b..f2981ada578f 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -6,6 +6,7 @@ */ #include +#include #include #include @@ -175,6 +176,9 @@ gcc: clock-controller@100000 { compatible = "qcom,gcc-sc7180"; reg = <0 0x00100000 0 0x1f0000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>; + clock-names = "bi_tcxo", "bi_tcxo_ao"; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; @@ -425,6 +429,13 @@ , , ; + + rpmhcc: clock-controller { + compatible = "qcom,sc7180-rpmh-clk"; + clocks = <&xo_board>; + clock-names = "xo"; + #clock-cells = <1>; + }; }; }; From patchwork Wed Oct 23 09:02:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11206043 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CD3FC13B1 for ; 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t=1571821402; bh=bSOkFQeqO8LEVBJ2HnZt1qFBxSpvVtIOF1peJoYkpYk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lag+2ZpOrOdWTNdOgNlhR5uqv+ASWkJdriOxa8E19P4K92+MJ1b7MihYq/cCErnt6 I00X/mKMufLL/nvnEskcda1R9zEJ9t8AGgroRQPCrfKbWC6d/c4r4v94cdFf0o7laQ bAqk1ZC4tvKtA0mzXlHWZ5EfCpN+/oPfm58PodR4= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 3E3CB60DD1 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mka@chromium.org, Maulik Shah , Rajendra Nayak Subject: [PATCH v3 11/11] arm64: dts: qcom: sc7180: Add pdc interrupt controller Date: Wed, 23 Oct 2019 14:32:19 +0530 Message-Id: <20191023090219.15603-12-rnayak@codeaurora.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191023090219.15603-1-rnayak@codeaurora.org> References: <20191023090219.15603-1-rnayak@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Maulik Shah Add pdc interrupt controller for sc7180 Signed-off-by: Maulik Shah Signed-off-by: Rajendra Nayak --- v3: Used the qcom,sdm845-pdc compatible for pdc node arch/arm64/boot/dts/qcom/sc7180.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index f2981ada578f..07ea393c2b5f 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -184,6 +184,16 @@ #power-domain-cells = <1>; }; + pdc: interrupt-controller@b220000 { + compatible = "qcom,sdm845-pdc"; + reg = <0 0xb220000 0 0x30000>; + qcom,pdc-ranges = <0 480 15>, <17 497 98>, + <119 634 4>, <124 639 1>; + #interrupt-cells = <2>; + interrupt-parent = <&intc>; + interrupt-controller; + }; + qupv3_id_1: geniqup@ac0000 { compatible = "qcom,geni-se-qup"; reg = <0 0x00ac0000 0 0x6000>;