From patchwork Thu Oct 24 11:16:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshihiro Shimoda X-Patchwork-Id: 11209029 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4B7AC139A for ; Thu, 24 Oct 2019 11:17:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2A74D2084C for ; Thu, 24 Oct 2019 11:17:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2408085AbfJXLRE (ORCPT ); Thu, 24 Oct 2019 07:17:04 -0400 Received: from relmlor2.renesas.com ([210.160.252.172]:14863 "EHLO relmlie6.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2408067AbfJXLRE (ORCPT ); Thu, 24 Oct 2019 07:17:04 -0400 X-IronPort-AV: E=Sophos;i="5.68,224,1569250800"; d="scan'208";a="29695327" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 24 Oct 2019 20:17:01 +0900 Received: from localhost.localdomain (unknown [10.166.17.210]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id B6AC14209FBF; Thu, 24 Oct 2019 20:17:01 +0900 (JST) From: Yoshihiro Shimoda To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, geert+renesas@glider.be Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Yoshihiro Shimoda Subject: [PATCH 1/3] dt-bindings: clock: renesas: rcar-usb2-clock-sel: Fix clock[-name]s properties Date: Thu, 24 Oct 2019 20:16:59 +0900 Message-Id: <1571915821-1620-2-git-send-email-yoshihiro.shimoda.uh@renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1571915821-1620-1-git-send-email-yoshihiro.shimoda.uh@renesas.com> References: <1571915821-1620-1-git-send-email-yoshihiro.shimoda.uh@renesas.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Since the hardware requires to enable both USB 2.0 host and peripheral functional clock, this patch fixes the documentation. Fortunately, no one has this device node for now, so that we don't need to think of backward compatibility. Fixes: 311accb64570 ("clk: renesas: rcar-usb2-clock-sel: Add R-Car USB 2.0 clock selector PHY") Signed-off-by: Yoshihiro Shimoda Reviewed-by: Geert Uytterhoeven --- .../devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.txt | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.txt b/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.txt index 83f6c6a..5c1903f 100644 --- a/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.txt +++ b/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.txt @@ -38,7 +38,8 @@ Required properties: - reg: offset and length of the USB 2.0 clock selector register block. - clocks: A list of phandles and specifier pairs. - clock-names: Name of the clocks. - - The functional clock must be "ehci_ohci" + - The functional clock of USB 2.0 host side must be "ehci_ohci" + - The functional clock of HS-USB side must be "hs-usb-if" - The USB_EXTAL clock pin must be "usb_extal" - The USB_XTAL clock pin must be "usb_xtal" - #clock-cells: Must be 0 @@ -49,7 +50,8 @@ Example (R-Car H3): compatible = "renesas,r8a7795-rcar-usb2-clock-sel", "renesas,rcar-gen3-usb2-clock-sel"; reg = <0 0xe6590630 0 0x02>; - clocks = <&cpg CPG_MOD 703>, <&usb_extal>, <&usb_xtal>; - clock-names = "ehci_ohci", "usb_extal", "usb_xtal"; + clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, + <&usb_extal>, <&usb_xtal>; + clock-names = "ehci_ohci", "hs-usb-if", "usb_extal", "usb_xtal"; #clock-cells = <0>; }; From patchwork Thu Oct 24 11:17:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshihiro Shimoda X-Patchwork-Id: 11209023 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6F25D139A for ; Thu, 24 Oct 2019 11:17:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 509662084C for ; Thu, 24 Oct 2019 11:17:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2405717AbfJXLRD (ORCPT ); Thu, 24 Oct 2019 07:17:03 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:61682 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2408056AbfJXLRD (ORCPT ); Thu, 24 Oct 2019 07:17:03 -0400 X-IronPort-AV: E=Sophos;i="5.68,224,1569250800"; d="scan'208";a="29911298" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 24 Oct 2019 20:17:01 +0900 Received: from localhost.localdomain (unknown [10.166.17.210]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id C98974209FC1; Thu, 24 Oct 2019 20:17:01 +0900 (JST) From: Yoshihiro Shimoda To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, geert+renesas@glider.be Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Yoshihiro Shimoda Subject: [PATCH 2/3] clk: renesas: rcar-usb2-clock-sel: Add multiple clocks management Date: Thu, 24 Oct 2019 20:17:00 +0900 Message-Id: <1571915821-1620-3-git-send-email-yoshihiro.shimoda.uh@renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1571915821-1620-1-git-send-email-yoshihiro.shimoda.uh@renesas.com> References: <1571915821-1620-1-git-send-email-yoshihiro.shimoda.uh@renesas.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org This hardware needs to enable clocks of both host and peripheral. So, this patch adds multiple clocks management. Signed-off-by: Yoshihiro Shimoda --- drivers/clk/renesas/rcar-usb2-clock-sel.c | 37 +++++++++++++++++++++++++++++-- 1 file changed, 35 insertions(+), 2 deletions(-) diff --git a/drivers/clk/renesas/rcar-usb2-clock-sel.c b/drivers/clk/renesas/rcar-usb2-clock-sel.c index b97f5f9..570fbd0 100644 --- a/drivers/clk/renesas/rcar-usb2-clock-sel.c +++ b/drivers/clk/renesas/rcar-usb2-clock-sel.c @@ -26,9 +26,16 @@ #define CLKSET0_PRIVATE BIT(0) #define CLKSET0_EXTAL_ONLY (CLKSET0_INTCLK_EN | CLKSET0_PRIVATE) +enum { + CLK_INDEX_EHCI_OHCI, + CLK_INDEX_HS_USB, + CLK_NUM +}; + struct usb2_clock_sel_priv { void __iomem *base; struct clk_hw hw; + struct clk *clks[CLK_NUM]; bool extal; bool xtal; }; @@ -53,14 +60,32 @@ static void usb2_clock_sel_disable_extal_only(struct usb2_clock_sel_priv *priv) static int usb2_clock_sel_enable(struct clk_hw *hw) { - usb2_clock_sel_enable_extal_only(to_priv(hw)); + struct usb2_clock_sel_priv *priv = to_priv(hw); + int i, ret; + + for (i = 0; i < CLK_NUM; i++) { + ret = clk_prepare_enable(priv->clks[i]); + if (ret) { + while (--i >= 0) + clk_disable_unprepare(priv->clks[i]); + return ret; + } + } + + usb2_clock_sel_enable_extal_only(priv); return 0; } static void usb2_clock_sel_disable(struct clk_hw *hw) { - usb2_clock_sel_disable_extal_only(to_priv(hw)); + struct usb2_clock_sel_priv *priv = to_priv(hw); + int i; + + usb2_clock_sel_disable_extal_only(priv); + + for (i = 0; i < CLK_NUM; i++) + clk_disable_unprepare(priv->clks[i]); } /* @@ -131,6 +156,14 @@ static int rcar_usb2_clock_sel_probe(struct platform_device *pdev) pm_runtime_enable(dev); pm_runtime_get_sync(dev); + priv->clks[CLK_INDEX_EHCI_OHCI] = devm_clk_get(dev, "ehci_ohci"); + if (IS_ERR(priv->clks[CLK_INDEX_EHCI_OHCI])) + return PTR_ERR(priv->clks[CLK_INDEX_EHCI_OHCI]); + + priv->clks[CLK_INDEX_HS_USB] = devm_clk_get(dev, "hs-usb-if"); + if (IS_ERR(priv->clks[CLK_INDEX_HS_USB])) + return PTR_ERR(priv->clks[CLK_INDEX_HS_USB]); + clk = devm_clk_get(dev, "usb_extal"); if (!IS_ERR(clk) && !clk_prepare_enable(clk)) { priv->extal = !!clk_get_rate(clk); From patchwork Thu Oct 24 11:17:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshihiro Shimoda X-Patchwork-Id: 11209031 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 77A021864 for ; Thu, 24 Oct 2019 11:17:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 55F6C205F4 for ; Thu, 24 Oct 2019 11:17:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2408067AbfJXLRE (ORCPT ); Thu, 24 Oct 2019 07:17:04 -0400 Received: from relmlor2.renesas.com ([210.160.252.172]:29481 "EHLO relmlie6.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2408056AbfJXLRE (ORCPT ); Thu, 24 Oct 2019 07:17:04 -0400 X-IronPort-AV: E=Sophos;i="5.68,224,1569250800"; d="scan'208";a="29695330" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 24 Oct 2019 20:17:01 +0900 Received: from localhost.localdomain (unknown [10.166.17.210]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id DC6254209FBF; Thu, 24 Oct 2019 20:17:01 +0900 (JST) From: Yoshihiro Shimoda To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, geert+renesas@glider.be Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Yoshihiro Shimoda Subject: [PATCH 3/3] clk: renesas: rcar-usb2-clock-sel: Add reset_control Date: Thu, 24 Oct 2019 20:17:01 +0900 Message-Id: <1571915821-1620-4-git-send-email-yoshihiro.shimoda.uh@renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1571915821-1620-1-git-send-email-yoshihiro.shimoda.uh@renesas.com> References: <1571915821-1620-1-git-send-email-yoshihiro.shimoda.uh@renesas.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org This hardware needs to deassert resets of both host and peripheral. So, this patch adds reset control. Signed-off-by: Yoshihiro Shimoda --- drivers/clk/renesas/rcar-usb2-clock-sel.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/clk/renesas/rcar-usb2-clock-sel.c b/drivers/clk/renesas/rcar-usb2-clock-sel.c index 570fbd0..dfe5510 100644 --- a/drivers/clk/renesas/rcar-usb2-clock-sel.c +++ b/drivers/clk/renesas/rcar-usb2-clock-sel.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #define USB20_CLKSET0 0x00 @@ -36,6 +37,7 @@ struct usb2_clock_sel_priv { void __iomem *base; struct clk_hw hw; struct clk *clks[CLK_NUM]; + struct reset_control *rsts; bool extal; bool xtal; }; @@ -63,11 +65,16 @@ static int usb2_clock_sel_enable(struct clk_hw *hw) struct usb2_clock_sel_priv *priv = to_priv(hw); int i, ret; + ret = reset_control_deassert(priv->rsts); + if (ret) + return ret; + for (i = 0; i < CLK_NUM; i++) { ret = clk_prepare_enable(priv->clks[i]); if (ret) { while (--i >= 0) clk_disable_unprepare(priv->clks[i]); + reset_control_assert(priv->rsts); return ret; } } @@ -86,6 +93,7 @@ static void usb2_clock_sel_disable(struct clk_hw *hw) for (i = 0; i < CLK_NUM; i++) clk_disable_unprepare(priv->clks[i]); + reset_control_assert(priv->rsts); } /* @@ -164,6 +172,10 @@ static int rcar_usb2_clock_sel_probe(struct platform_device *pdev) if (IS_ERR(priv->clks[CLK_INDEX_HS_USB])) return PTR_ERR(priv->clks[CLK_INDEX_HS_USB]); + priv->rsts = devm_reset_control_array_get_optional_shared(&pdev->dev); + if (IS_ERR(priv->rsts)) + return PTR_ERR(priv->rsts); + clk = devm_clk_get(dev, "usb_extal"); if (!IS_ERR(clk) && !clk_prepare_enable(clk)) { priv->extal = !!clk_get_rate(clk);