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[172.254.253.50]) by smtp.gmail.com with ESMTPSA id q17sm1137050qtq.58.2019.10.25.07.22.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 07:22:01 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 01/12] tci: Add implementation for INDEX_op_ld16u_i64 Date: Fri, 25 Oct 2019 10:21:48 -0400 Message-Id: <20191025142159.12459-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025142159.12459-1-richard.henderson@linaro.org> References: <20191025142159.12459-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::744 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Stefan Weil Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Stefan Weil This fixes "make check-tcg" on a Debian x86_64 host. Signed-off-by: Stefan Weil Tested-by: Thomas Huth Message-Id: <20190410194838.10123-1-sw@weilnetz.de> Signed-off-by: Richard Henderson --- tcg/tci.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/tcg/tci.c b/tcg/tci.c index 33edca1903..a6208653e8 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -127,6 +127,12 @@ static void tci_write_reg8(tcg_target_ulong *regs, TCGReg index, uint8_t value) tci_write_reg(regs, index, value); } +static void +tci_write_reg16(tcg_target_ulong *regs, TCGReg index, uint16_t value) +{ + tci_write_reg(regs, index, value); +} + static void tci_write_reg32(tcg_target_ulong *regs, TCGReg index, uint32_t value) { @@ -585,6 +591,8 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr) tci_write_reg8(regs, t0, *(uint8_t *)(t1 + t2)); break; case INDEX_op_ld8s_i32: + TODO(); + break; case INDEX_op_ld16u_i32: TODO(); break; @@ -854,7 +862,14 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr) tci_write_reg8(regs, t0, *(uint8_t *)(t1 + t2)); break; case INDEX_op_ld8s_i64: + TODO(); + break; case INDEX_op_ld16u_i64: + t0 = *tb_ptr++; + t1 = tci_read_r(regs, &tb_ptr); + t2 = tci_read_s32(&tb_ptr); + tci_write_reg16(regs, t0, *(uint16_t *)(t1 + t2)); + break; case INDEX_op_ld16s_i64: TODO(); break; From patchwork Fri Oct 25 14:21:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 11212487 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 048AB139A for ; Fri, 25 Oct 2019 14:36:13 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CEBE7206DD for ; Fri, 25 Oct 2019 14:36:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="s+NwdlmQ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CEBE7206DD Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:32944 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iO0hF-0000US-UZ for patchwork-qemu-devel@patchwork.kernel.org; Fri, 25 Oct 2019 10:36:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44296) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iO0Te-0004yQ-By for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iO0Tc-0001as-Te for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:06 -0400 Received: from mail-qk1-x72e.google.com ([2607:f8b0:4864:20::72e]:33134) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iO0Tc-0001ae-PB for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:04 -0400 Received: by mail-qk1-x72e.google.com with SMTP id 71so1928290qkl.0 for ; Fri, 25 Oct 2019 07:22:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5E3h/dy52NEcLnrR3FCotEmib1HNDwVjiquxqJLNR8c=; b=s+NwdlmQOCSVFqOtb5F/TNOhh2w1vt097/7urr/kyXpD3J6cYIqMa6VPrVaqJjE3v2 trSTMosHIkr0kA2fS+ogsIdeT5nd8+5kzuBfgUt6D0zTWOaMvqt8SAO40nLREgQYiw92 g/D9hQNsDFBKU02CXLZvSZbiCLjhE4Hej5LZSxnzVtwmiQP6yGBHlMbhnB0p46yUS9Mg FYDLxqp8l2dVaFG7joM9DU8usJ1H6cCFNIXeUqxHa00noIMH6jLV4+RarzFXlpO6wLzs Z2bKn61sZjdimICIeKOr3SoeHtxWjeucQeye3Scl/4QueTnm5h1N2QO7AAwwYf5M5deb Z/gQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5E3h/dy52NEcLnrR3FCotEmib1HNDwVjiquxqJLNR8c=; b=FGM/TYLgNV/Fizm7eJHLenXxzbJRaOjWNe/Dz32+JjnVkrxDowNlAJ9nQFEPwXrD50 FRk44Pp+s/eSHQwjJZAGhX+xyZkXzWtpz5xvDzlM7yyIAR6VO8fU1h0j+SfhwNBplYgQ 3MF58bHoRNS+Qyc7htMfH6C1jC0nOHYHSPxGAX792OBYHQqxYA9DxLBsfm9cPyrxTXvo eiL0a7SLnsfC0REVl/Tmh5boz/A5qf8aXzYnNoW8w4+wm5g8tk0REwCcXQTiu3WCo7l4 4i3e6/BLSaCVhP0zEU9dSeuCSnhf48aAEUPLRr7/StdBuxayI0LtnUyEHbPW+H1nHB0t 4Czg== X-Gm-Message-State: APjAAAXoZ3ZZPj96+lDanBwVcRgo27FspREo17JuXV369XnMrpYItUXp qOeTBue/PLXl6qpc+e8Od3lTlZZzvbA= X-Google-Smtp-Source: APXvYqxhwL2bHqMk/YUTKlrJYRsujY7ilyyrnEve+QvDx928uWGe7co5k50vgybufizAS3EFParqiQ== X-Received: by 2002:ae9:ed43:: with SMTP id c64mr145538qkg.274.1572013323748; Fri, 25 Oct 2019 07:22:03 -0700 (PDT) Received: from localhost.localdomain (rrcs-172-254-253-50.nyc.biz.rr.com. [172.254.253.50]) by smtp.gmail.com with ESMTPSA id q17sm1137050qtq.58.2019.10.25.07.22.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 07:22:03 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 02/12] cputlb: ensure _cmmu helper functions follow the naming standard Date: Fri, 25 Oct 2019 10:21:49 -0400 Message-Id: <20191025142159.12459-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025142159.12459-1-richard.henderson@linaro.org> References: <20191025142159.12459-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::72e X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Alex Bennée We document this in docs/devel/load-stores.rst so lets follow it. The 32 bit and 64 bit access functions have historically not included the sign so we leave those as is. We also introduce some signed helpers which are used for loading immediate values in the translator. Fixes: 282dffc8 Reviewed-by: Richard Henderson Signed-off-by: Alex Bennée Message-Id: <20191021150910.23216-1-alex.bennee@linaro.org> Signed-off-by: Richard Henderson --- include/exec/cpu_ldst_template.h | 4 ++-- tcg/tcg.h | 20 ++++++++++++++------ accel/tcg/cputlb.c | 24 +++++++++++++++++++++--- target/cris/translate_v10.inc.c | 3 +-- 4 files changed, 38 insertions(+), 13 deletions(-) diff --git a/include/exec/cpu_ldst_template.h b/include/exec/cpu_ldst_template.h index af7e0b49f2..3d24ed9bd0 100644 --- a/include/exec/cpu_ldst_template.h +++ b/include/exec/cpu_ldst_template.h @@ -65,8 +65,8 @@ #ifdef SOFTMMU_CODE_ACCESS #define ADDR_READ addr_code #define MMUSUFFIX _cmmu -#define URETSUFFIX SUFFIX -#define SRETSUFFIX SUFFIX +#define URETSUFFIX USUFFIX +#define SRETSUFFIX glue(s, SUFFIX) #else #define ADDR_READ addr_read #define MMUSUFFIX _mmu diff --git a/tcg/tcg.h b/tcg/tcg.h index a37181c899..2792f65d04 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -1269,16 +1269,22 @@ void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val, void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val, TCGMemOpIdx oi, uintptr_t retaddr); -uint8_t helper_ret_ldb_cmmu(CPUArchState *env, target_ulong addr, +uint8_t helper_ret_ldub_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr); -uint16_t helper_le_ldw_cmmu(CPUArchState *env, target_ulong addr, +int8_t helper_ret_ldsb_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr); +uint16_t helper_le_lduw_cmmu(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr); +int16_t helper_le_ldsw_cmmu(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr); uint32_t helper_le_ldl_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr); uint64_t helper_le_ldq_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr); -uint16_t helper_be_ldw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); +uint16_t helper_be_lduw_cmmu(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr); +int16_t helper_be_ldsw_cmmu(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr); uint32_t helper_be_ldl_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr); uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr, @@ -1295,7 +1301,8 @@ uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr, # define helper_ret_stw_mmu helper_be_stw_mmu # define helper_ret_stl_mmu helper_be_stl_mmu # define helper_ret_stq_mmu helper_be_stq_mmu -# define helper_ret_ldw_cmmu helper_be_ldw_cmmu +# define helper_ret_lduw_cmmu helper_be_lduw_cmmu +# define helper_ret_ldsw_cmmu helper_be_ldsw_cmmu # define helper_ret_ldl_cmmu helper_be_ldl_cmmu # define helper_ret_ldq_cmmu helper_be_ldq_cmmu #else @@ -1308,7 +1315,8 @@ uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr, # define helper_ret_stw_mmu helper_le_stw_mmu # define helper_ret_stl_mmu helper_le_stl_mmu # define helper_ret_stq_mmu helper_le_stq_mmu -# define helper_ret_ldw_cmmu helper_le_ldw_cmmu +# define helper_ret_lduw_cmmu helper_le_lduw_cmmu +# define helper_ret_ldsw_cmmu helper_le_ldsw_cmmu # define helper_ret_ldl_cmmu helper_le_ldl_cmmu # define helper_ret_ldq_cmmu helper_le_ldq_cmmu #endif diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index defc8d5929..6f4194df96 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1862,12 +1862,18 @@ static uint64_t full_ldub_cmmu(CPUArchState *env, target_ulong addr, return load_helper(env, addr, oi, retaddr, MO_8, true, full_ldub_cmmu); } -uint8_t helper_ret_ldb_cmmu(CPUArchState *env, target_ulong addr, +uint8_t helper_ret_ldub_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr) { return full_ldub_cmmu(env, addr, oi, retaddr); } +int8_t helper_ret_ldsb_cmmu(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr) +{ + return (int8_t) full_ldub_cmmu(env, addr, oi, retaddr); +} + static uint64_t full_le_lduw_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr) { @@ -1875,12 +1881,18 @@ static uint64_t full_le_lduw_cmmu(CPUArchState *env, target_ulong addr, full_le_lduw_cmmu); } -uint16_t helper_le_ldw_cmmu(CPUArchState *env, target_ulong addr, +uint16_t helper_le_lduw_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr) { return full_le_lduw_cmmu(env, addr, oi, retaddr); } +int16_t helper_le_ldsw_cmmu(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr) +{ + return (int16_t) full_le_lduw_cmmu(env, addr, oi, retaddr); +} + static uint64_t full_be_lduw_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr) { @@ -1888,12 +1900,18 @@ static uint64_t full_be_lduw_cmmu(CPUArchState *env, target_ulong addr, full_be_lduw_cmmu); } -uint16_t helper_be_ldw_cmmu(CPUArchState *env, target_ulong addr, +uint16_t helper_be_lduw_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr) { return full_be_lduw_cmmu(env, addr, oi, retaddr); } +int16_t helper_be_ldsw_cmmu(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr) +{ + return (int16_t) full_be_lduw_cmmu(env, addr, oi, retaddr); +} + static uint64_t full_le_ldul_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr) { diff --git a/target/cris/translate_v10.inc.c b/target/cris/translate_v10.inc.c index a87b8bb281..ae34a0d1a3 100644 --- a/target/cris/translate_v10.inc.c +++ b/target/cris/translate_v10.inc.c @@ -1202,8 +1202,7 @@ static unsigned int dec10_ind(CPUCRISState *env, DisasContext *dc) case CRISV10_IND_BCC_M: cris_cc_mask(dc, 0); - imm = cpu_ldsw_code(env, dc->pc + 2); - simm = (int16_t)imm; + simm = cpu_ldsw_code(env, dc->pc + 2); simm += 4; LOG_DIS("bcc_m: b%s %x\n", cc_name(dc->cond), dc->pc + simm); From patchwork Fri Oct 25 14:21:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 11212483 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 16C65139A for ; Fri, 25 Oct 2019 14:33:00 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E04F1206DD for ; Fri, 25 Oct 2019 14:32:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="NKHdQx3W" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E04F1206DD Authentication-Results: mail.kernel.org; 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[172.254.253.50]) by smtp.gmail.com with ESMTPSA id q17sm1137050qtq.58.2019.10.25.07.22.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 07:22:04 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 03/12] cpu: use ROUND_UP() to define xxx_PAGE_ALIGN Date: Fri, 25 Oct 2019 10:21:50 -0400 Message-Id: <20191025142159.12459-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025142159.12459-1-richard.henderson@linaro.org> References: <20191025142159.12459-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::836 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Wei Yang Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Wei Yang Use ROUND_UP() to define, which is a little bit easy to read. Reviewed-by: Alex Bennée Reviewed-by: Michael S. Tsirkin Reviewed-by: David Gibson Reviewed-by: Juan Quintela Signed-off-by: Wei Yang Message-Id: <20191013021145.16011-2-richardw.yang@linux.intel.com> Signed-off-by: Richard Henderson --- include/exec/cpu-all.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index ad9ab85eb3..255bb186ac 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -220,7 +220,7 @@ extern int target_page_bits; #define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) #define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1) -#define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK) +#define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE) /* Using intptr_t ensures that qemu_*_page_mask is sign-extended even * when intptr_t is 32-bit and we are aligning a long long. @@ -228,9 +228,8 @@ extern int target_page_bits; extern uintptr_t qemu_host_page_size; extern intptr_t qemu_host_page_mask; -#define HOST_PAGE_ALIGN(addr) (((addr) + qemu_host_page_size - 1) & qemu_host_page_mask) -#define REAL_HOST_PAGE_ALIGN(addr) (((addr) + qemu_real_host_page_size - 1) & \ - qemu_real_host_page_mask) +#define HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_host_page_size) +#define REAL_HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_real_host_page_size) /* same as PROT_xxx */ #define PAGE_READ 0x0001 From patchwork Fri Oct 25 14:21:51 2019 Content-Type: text/plain; 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[172.254.253.50]) by smtp.gmail.com with ESMTPSA id q17sm1137050qtq.58.2019.10.25.07.22.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 07:22:05 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 04/12] exec: Split out variable page size support to exec-vary.c Date: Fri, 25 Oct 2019 10:21:51 -0400 Message-Id: <20191025142159.12459-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025142159.12459-1-richard.henderson@linaro.org> References: <20191025142159.12459-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::743 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The next patch will play a trick with "const" that will confuse the compiler about the uses of target_page_bits within exec.c. Moving everything to a new file prevents this confusion. No functional change so far. Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- Makefile.target | 2 +- include/qemu-common.h | 6 +++++ exec-vary.c | 57 +++++++++++++++++++++++++++++++++++++++++++ exec.c | 34 -------------------------- 4 files changed, 64 insertions(+), 35 deletions(-) create mode 100644 exec-vary.c diff --git a/Makefile.target b/Makefile.target index 5e916230c4..ca3d14efe1 100644 --- a/Makefile.target +++ b/Makefile.target @@ -107,7 +107,7 @@ obj-y += trace/ ######################################################### # cpu emulator library -obj-y += exec.o +obj-y += exec.o exec-vary.o obj-y += accel/ obj-$(CONFIG_TCG) += tcg/tcg.o tcg/tcg-op.o tcg/tcg-op-vec.o tcg/tcg-op-gvec.o obj-$(CONFIG_TCG) += tcg/tcg-common.o tcg/optimize.o diff --git a/include/qemu-common.h b/include/qemu-common.h index 8d84db90b0..082da59e85 100644 --- a/include/qemu-common.h +++ b/include/qemu-common.h @@ -74,6 +74,12 @@ void cpu_exec_step_atomic(CPUState *cpu); */ bool set_preferred_target_page_bits(int bits); +/** + * finalize_target_page_bits: + * Commit the final value set by set_preferred_target_page_bits. + */ +void finalize_target_page_bits(void); + /** * Sends a (part of) iovec down a socket, yielding when the socket is full, or * Receives data into a (part of) iovec from a socket, diff --git a/exec-vary.c b/exec-vary.c new file mode 100644 index 0000000000..48c0ab306c --- /dev/null +++ b/exec-vary.c @@ -0,0 +1,57 @@ +/* + * Variable page size handling + * + * Copyright (c) 2003 Fabrice Bellard + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#include "qemu/osdep.h" +#include "qemu-common.h" +#include "exec/exec-all.h" + +#ifdef TARGET_PAGE_BITS_VARY +int target_page_bits; +bool target_page_bits_decided; +#endif + +bool set_preferred_target_page_bits(int bits) +{ + /* + * The target page size is the lowest common denominator for all + * the CPUs in the system, so we can only make it smaller, never + * larger. And we can't make it smaller once we've committed to + * a particular size. + */ +#ifdef TARGET_PAGE_BITS_VARY + assert(bits >= TARGET_PAGE_BITS_MIN); + if (target_page_bits == 0 || target_page_bits > bits) { + if (target_page_bits_decided) { + return false; + } + target_page_bits = bits; + } +#endif + return true; +} + +void finalize_target_page_bits(void) +{ +#ifdef TARGET_PAGE_BITS_VARY + if (target_page_bits == 0) { + target_page_bits = TARGET_PAGE_BITS_MIN; + } + target_page_bits_decided = true; +#endif +} diff --git a/exec.c b/exec.c index fb0943cfed..5bf181d23e 100644 --- a/exec.c +++ b/exec.c @@ -91,11 +91,6 @@ AddressSpace address_space_memory; static MemoryRegion io_mem_unassigned; #endif -#ifdef TARGET_PAGE_BITS_VARY -int target_page_bits; -bool target_page_bits_decided; -#endif - CPUTailQ cpus = QTAILQ_HEAD_INITIALIZER(cpus); /* current CPU in the current thread. It is only valid inside @@ -109,37 +104,8 @@ int use_icount; uintptr_t qemu_host_page_size; intptr_t qemu_host_page_mask; -bool set_preferred_target_page_bits(int bits) -{ - /* The target page size is the lowest common denominator for all - * the CPUs in the system, so we can only make it smaller, never - * larger. And we can't make it smaller once we've committed to - * a particular size. - */ -#ifdef TARGET_PAGE_BITS_VARY - assert(bits >= TARGET_PAGE_BITS_MIN); - if (target_page_bits == 0 || target_page_bits > bits) { - if (target_page_bits_decided) { - return false; - } - target_page_bits = bits; - } -#endif - return true; -} - #if !defined(CONFIG_USER_ONLY) -static void finalize_target_page_bits(void) -{ -#ifdef TARGET_PAGE_BITS_VARY - if (target_page_bits == 0) { - target_page_bits = TARGET_PAGE_BITS_MIN; - } - target_page_bits_decided = true; -#endif -} - typedef struct PhysPageEntry PhysPageEntry; struct PhysPageEntry { From patchwork Fri Oct 25 14:21:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 11212497 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BB0F613B1 for ; Fri, 25 Oct 2019 14:41:30 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8F22C2053B for ; Fri, 25 Oct 2019 14:41:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Xt2/AoHi" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8F22C2053B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:33030 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iO0mP-0004Y1-AQ for patchwork-qemu-devel@patchwork.kernel.org; Fri, 25 Oct 2019 10:41:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44327) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iO0Th-00053x-VO for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iO0Tg-0001dH-Sf for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:09 -0400 Received: from mail-qk1-x735.google.com ([2607:f8b0:4864:20::735]:33141) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iO0Tg-0001d2-Od for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:08 -0400 Received: by mail-qk1-x735.google.com with SMTP id 71so1928542qkl.0 for ; Fri, 25 Oct 2019 07:22:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZwXbM1gR9MpWZvFXDuXSv541qXotelrmjZ6gTXEMEYw=; b=Xt2/AoHig+fMveab3f6ZpL1cn9Wiki3qnn6nW/icRxs2e5rdQBX2auMG2NVyN7McOO L1Z8wDuJ7LCssfm7PTIgJuRsmDJ6ch2566LrdrbtpEBc7BLR7/smmFM1b0O9DTlPxIhK yPTJJqxyhsEulzJKm6A6K4lS5vl5F9iYAPL3j3xEkn9EuhDsc6EPlRIJsxGuB5677Grz MkCRKquf7hQ0rVy9FrUJIGmVXOeqwUx1faf2qJfheGUeS4JFo1wKGFn2CnTCTRtHd7Sr NG8QuzOSu/skZG3pKALCXUgsvi66sLscUpR1viD2A+BxGy1Zj3UWUQjge1+F0rTGO2oy 8qlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZwXbM1gR9MpWZvFXDuXSv541qXotelrmjZ6gTXEMEYw=; b=Kz1ItPHaboB87dRmclWT5sUiSvC35mGbZRUC2FMp+Y2i1G0jglzSk3/BHZ3n3oiAny sk38V8PJpq/8BSVXSuzljJlcPURPNCEcLMyevg6CiLpm8p/vGjBQB0XnseqJ5n1YRNJf nbWSPYXpYiq1C+g5a0jCIdMf/+YKFoKC43uWv/ILHBkG6AERG9bSnDPk7NA7mWroie1y 0SRe/oHclk8e+Rsd7MI8INuN8/Ceafz/r+KDe+0DJModb7rHPy5waxFr+JLEofLvFfL4 keg5/HaF6jboi7ZJUGyTuvhaq7SI0g79rCGZP2/7p42Z+WUvddOSQscGJjHIlWUpPr8k 4k0w== X-Gm-Message-State: APjAAAUnqQLKVMl28AFI8Qf71sJ4iqJMCtIQJnwob2snVMFF7wFTwOcZ p94qrnFq+s/o18VZ+Bh6jU38aAf6er0= X-Google-Smtp-Source: APXvYqwZMgry29KNDYn4F9vzU3Lg5lyqbYr5lWca0Osz6R9X/B265Cd411YYvWMjocKjcT3+8oJ0xw== X-Received: by 2002:a37:388:: with SMTP id 130mr3169905qkd.378.1572013327780; Fri, 25 Oct 2019 07:22:07 -0700 (PDT) Received: from localhost.localdomain (rrcs-172-254-253-50.nyc.biz.rr.com. [172.254.253.50]) by smtp.gmail.com with ESMTPSA id q17sm1137050qtq.58.2019.10.25.07.22.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 07:22:06 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 05/12] configure: Detect compiler support for __attribute__((alias)) Date: Fri, 25 Oct 2019 10:21:52 -0400 Message-Id: <20191025142159.12459-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025142159.12459-1-richard.henderson@linaro.org> References: <20191025142159.12459-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::735 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Such support is present almost everywhere, except for Xcode 9. It is added in Xcode 10, but travis uses xcode9 by default, so we should support it for a while yet. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- configure | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/configure b/configure index 145fcabbb3..3a9862fe5e 100755 --- a/configure +++ b/configure @@ -5518,6 +5518,21 @@ if compile_prog "" "" ; then vector16=yes fi +######################################## +# See if __attribute__((alias)) is supported. +# This false for Xcode 9, but has been remedied for Xcode 10. +# Unfortunately, travis uses Xcode 9 by default. + +attralias=no +cat > $TMPC << EOF +int x = 1; +extern const int y __attribute__((alias("x"))); +int main(void) { return 0; } +EOF +if compile_prog "" "" ; then + attralias=yes +fi + ######################################## # check if getauxval is available. @@ -7083,6 +7098,10 @@ if test "$vector16" = "yes" ; then echo "CONFIG_VECTOR16=y" >> $config_host_mak fi +if test "$attralias" = "yes" ; then + echo "CONFIG_ATTRIBUTE_ALIAS=y" >> $config_host_mak +fi + if test "$getauxval" = "yes" ; then echo "CONFIG_GETAUXVAL=y" >> $config_host_mak fi From patchwork Fri Oct 25 14:21:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 11212493 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C64E413B1 for ; Fri, 25 Oct 2019 14:40:05 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9AD742053B for ; Fri, 25 Oct 2019 14:40:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="kgADHCdX" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9AD742053B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:33008 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iO0l2-0001Lv-1N for patchwork-qemu-devel@patchwork.kernel.org; Fri, 25 Oct 2019 10:40:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44347) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iO0Tj-000568-JD for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iO0Ti-0001dx-1S for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:11 -0400 Received: from mail-qt1-x835.google.com ([2607:f8b0:4864:20::835]:34774) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iO0Th-0001dh-Tl for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:09 -0400 Received: by mail-qt1-x835.google.com with SMTP id e14so3520995qto.1 for ; Fri, 25 Oct 2019 07:22:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=24f0Uy6XcbwECMx4XXFRdMBRDyDtwvth7GCP6meHv7s=; b=kgADHCdXdWtY86p15cwD2GZzGrzn3MpPEHLIXypNFuGgmPfG7nSjIkEAUYYAZEgloN /lNxfqRTldKQ7NYG4N/9jz1ngwyV+CjGIjkWTK5T4tehGA2DVVURPJbh7PzgZj4obNoy Dh355L1HuvN20ppCiKyqrnRxBo8Ity32ltdmSs8YfvSIFw54pkWq1Z3yZ+LjnT6VeDlS w+zgvZz/NUSckhdC6QpnL5tOn1G3CWKqOTanx7RPOB/TQh/t+iBPQnuMaHh1tfDrGrSu bNbZa9kX3iegaZdzs+bAWKcFRNmF405PemVnL/GGpCpYw9HyRaq4akKqm2fdRDCTE9SI VU1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=24f0Uy6XcbwECMx4XXFRdMBRDyDtwvth7GCP6meHv7s=; b=p4Qwdle31/BoAwtj8GvSMeKiYTEG+RwWETBinSjxkoDWn0OriFUETCo4MMzjcHrZMe LFdbE3SQQkYq29FQLFqIIY33LDmhVVH/EzpQF971WcI9ftlFNeLU2k1uECEYRAXxN/j1 RvVAf9xPipth03jfHZN/bewlm6uJVI0gcYRB7wFyrc40qSk24vt1ec3Z8cyU3DYDk4kW L1e7umA/zbf/NMiumC8lxLdqULD4yq35xoIaOfxsfxSxjE9/09mSoId/BB4q1SKvvAFY yj7QYtps3vwifri3gCcuKmroNxjGCD956U4DPDytl8/PENLr3IZ8aSJPoSvouQw9jLLW igPQ== X-Gm-Message-State: APjAAAWLOe/32TQfK88gS2ooQueGud9l2kbIdwP5X0l3Bj8cEZPteFlN 4kxNBYDzKUZuXKZ4ZrkA4TeG7TozfMc= X-Google-Smtp-Source: APXvYqxNek+dL37/NsUHaRlWNVK3lr5zY+PsNwRmhSo/HOFp7YHMTyfCG16IkiHc6192GZQPGY2vew== X-Received: by 2002:ac8:44d9:: with SMTP id b25mr3211600qto.347.1572013328903; Fri, 25 Oct 2019 07:22:08 -0700 (PDT) Received: from localhost.localdomain (rrcs-172-254-253-50.nyc.biz.rr.com. [172.254.253.50]) by smtp.gmail.com with ESMTPSA id q17sm1137050qtq.58.2019.10.25.07.22.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 07:22:08 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 06/12] exec: Use const alias for TARGET_PAGE_BITS_VARY Date: Fri, 25 Oct 2019 10:21:53 -0400 Message-Id: <20191025142159.12459-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025142159.12459-1-richard.henderson@linaro.org> References: <20191025142159.12459-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::835 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Using a variable that is declared "const" for this tells the compiler that it may read the value once and assume that it does not change across function calls. For target_page_size, this means we have only one assert per function, and one read of the variable. This reduces the size of qemu-system-aarch64 by 8k. Reviewed-by: Alex Bennée Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- include/exec/cpu-all.h | 14 +++++++--- exec-vary.c | 60 ++++++++++++++++++++++++++++++++++++------ 2 files changed, 62 insertions(+), 12 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 255bb186ac..76515dc8d9 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -210,10 +210,16 @@ static inline void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val /* page related stuff */ #ifdef TARGET_PAGE_BITS_VARY -extern bool target_page_bits_decided; -extern int target_page_bits; -#define TARGET_PAGE_BITS ({ assert(target_page_bits_decided); \ - target_page_bits; }) +typedef struct { + bool decided; + int bits; +} TargetPageBits; +# if defined(CONFIG_ATTRIBUTE_ALIAS) || !defined(IN_EXEC_VARY) +extern const TargetPageBits target_page; +#else +extern TargetPageBits target_page; +# endif +#define TARGET_PAGE_BITS (assert(target_page.decided), target_page.bits) #else #define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS #endif diff --git a/exec-vary.c b/exec-vary.c index 48c0ab306c..e0befd502a 100644 --- a/exec-vary.c +++ b/exec-vary.c @@ -19,11 +19,55 @@ #include "qemu/osdep.h" #include "qemu-common.h" + +#define IN_EXEC_VARY 1 + #include "exec/exec-all.h" #ifdef TARGET_PAGE_BITS_VARY -int target_page_bits; -bool target_page_bits_decided; +# ifdef CONFIG_ATTRIBUTE_ALIAS +/* + * We want to declare the "target_page" variable as const, which tells + * the compiler that it can cache any value that it reads across calls. + * This avoids multiple assertions and multiple reads within any one user. + * + * This works because we initialize the target_page data very early, in a + * location far removed from the functions that require the final results. + * + * This also requires that we have a non-constant symbol by which we can + * perform the actual initialization, and which forces the data to be + * allocated within writable memory. Thus "init_target_page", and we use + * that symbol exclusively in the two functions that initialize this value. + * + * The "target_page" symbol is created as an alias of "init_target_page". + */ +static TargetPageBits init_target_page; + +/* + * Note that this is *not* a redundant decl, this is the definition of + * the "target_page" symbol. The syntax for this definition requires + * the use of the extern keyword. This seems to be a GCC bug in + * either the syntax for the alias attribute or in -Wredundant-decls. + * + * See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91765 + */ +# pragma GCC diagnostic push +# pragma GCC diagnostic ignored "-Wredundant-decls" + +extern const TargetPageBits target_page + __attribute__((alias("init_target_page"))); + +# pragma GCC diagnostic pop +# else +/* + * When aliases are not supported then we force two different declarations, + * by way of suppressing the header declaration with IN_EXEC_VARY. + * We assume that on such an old compiler, LTO cannot be used, and so the + * compiler cannot not detect the mismatched declarations, and all is well. + */ +TargetPageBits target_page; +# define init_target_page target_page +# endif #endif bool set_preferred_target_page_bits(int bits) @@ -36,11 +80,11 @@ bool set_preferred_target_page_bits(int bits) */ #ifdef TARGET_PAGE_BITS_VARY assert(bits >= TARGET_PAGE_BITS_MIN); - if (target_page_bits == 0 || target_page_bits > bits) { - if (target_page_bits_decided) { + if (init_target_page.bits == 0 || init_target_page.bits > bits) { + if (init_target_page.decided) { return false; } - target_page_bits = bits; + init_target_page.bits = bits; } #endif return true; @@ -49,9 +93,9 @@ bool set_preferred_target_page_bits(int bits) void finalize_target_page_bits(void) { #ifdef TARGET_PAGE_BITS_VARY - if (target_page_bits == 0) { - target_page_bits = TARGET_PAGE_BITS_MIN; + if (init_target_page.bits == 0) { + init_target_page.bits = TARGET_PAGE_BITS_MIN; } - target_page_bits_decided = true; + init_target_page.decided = true; #endif } From patchwork Fri Oct 25 14:21:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 11212481 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 95CC6139A for ; Fri, 25 Oct 2019 14:31:55 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6ACA6206DD for ; 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[172.254.253.50]) by smtp.gmail.com with ESMTPSA id q17sm1137050qtq.58.2019.10.25.07.22.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 07:22:09 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 07/12] exec: Restrict TARGET_PAGE_BITS_VARY assert to CONFIG_DEBUG_TCG Date: Fri, 25 Oct 2019 10:21:54 -0400 Message-Id: <20191025142159.12459-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025142159.12459-1-richard.henderson@linaro.org> References: <20191025142159.12459-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::829 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" This reduces the size of a release build by about 10k. Noticably, within the tlb miss helpers. Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- include/exec/cpu-all.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 76515dc8d9..d3e4660d50 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -219,7 +219,11 @@ extern const TargetPageBits target_page; #else extern TargetPageBits target_page; # endif -#define TARGET_PAGE_BITS (assert(target_page.decided), target_page.bits) +# ifdef CONFIG_DEBUG_TCG +# define TARGET_PAGE_BITS (assert(target_page.decided), target_page.bits) +# else +# define TARGET_PAGE_BITS target_page.bits +# endif #else #define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS #endif From patchwork Fri Oct 25 14:21:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 11212489 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0448913B1 for ; Fri, 25 Oct 2019 14:37:12 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CE71C2053B for ; Fri, 25 Oct 2019 14:37:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="fD6MAh+b" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CE71C2053B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:32960 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iO0iE-0002lb-Go for patchwork-qemu-devel@patchwork.kernel.org; Fri, 25 Oct 2019 10:37:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44369) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iO0Tl-00059k-Jx for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iO0Tk-0001fA-A6 for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:13 -0400 Received: from mail-qt1-x833.google.com ([2607:f8b0:4864:20::833]:43331) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iO0Tk-0001ey-4c for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:12 -0400 Received: by mail-qt1-x833.google.com with SMTP id t20so3429934qtr.10 for ; Fri, 25 Oct 2019 07:22:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nmU+yKlQiV860VrF5+z5rPYXmAQaQLmhxeuYjoE3BVY=; b=fD6MAh+bxQtMs/bJ07nmJGgn+oDCqxJ3K69D7N5gASS2Wak5SmbB0ZdAHG915UuQyr FbNZO09QWFqkVDiip+Sw8pTmuv/Z1fyfXH6cKxSOTeYfS274MyaBQuq2w2VwjC/dzRrW fFsIAtZHAEeRpyPgwrTzeqgh5USBmkvHyJ6yxNO4/2+Tiz2DaiPVDGGuZfI2DuNHyKAD 5o9ck4DomF1Td5+RWZMLdQjwJtDF/5C00XgCqAIRCMpcTzJhMx5e6y6dsXQ7G/Mq+WN3 1qIWYlbXJAD0y0/m6FYUEDUhOWVg1XQrvzaeJLNqrNcW0l4ZaBXbV4jD8ENqJWvMdWSW VURg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nmU+yKlQiV860VrF5+z5rPYXmAQaQLmhxeuYjoE3BVY=; b=G/cBSFIl4JRQHGzNIXpkNcxojwqcFC0dviBKhUD9DXvfIqNYhuoXUg+msZGqkahpTt 8OXSymRJS7cO1kDjI3Yj9cSsKXka1CpljqOEyqc9JuYKDMFQKpZjKxJFeKgBhYWZ2g0H 4clBw+LiV/7KU68KLWs15VjCIVUG9tLJ8AUjAh4NHwRXu8CRzTLs31JNuePYw6ciY6Dd +qTSoRCSlNpS05so9AwgeQmYDmhjbZNJRBXLvnjCCf3t+JHhpY8P0aYMD2azPTTvmAOL E4JXIbrP6vLXNEPEtxD7P19v9hWl+RwNot8viv/6RrH8FJXAXLcXWtR3LtLt9x9hF2o0 /Tng== X-Gm-Message-State: APjAAAViWsn7zN/SBy/nOSTzOyKjpSYzzNAmL7vMyzBC5lKdIIfiQMee OsRsjFjbxFX1r9IvN01F17yd1cJ2aVE= X-Google-Smtp-Source: APXvYqwnO2mSa2lI1rYtBMy/nTFTipy6azLQoJPRGTVwBzOya8dGnL/SYymx0EuVjPEGxSRIwL5ZUA== X-Received: by 2002:a0c:fe02:: with SMTP id x2mr3309774qvr.117.1572013331146; Fri, 25 Oct 2019 07:22:11 -0700 (PDT) Received: from localhost.localdomain (rrcs-172-254-253-50.nyc.biz.rr.com. [172.254.253.50]) by smtp.gmail.com with ESMTPSA id q17sm1137050qtq.58.2019.10.25.07.22.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 07:22:10 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 08/12] exec: Promote TARGET_PAGE_MASK to target_long Date: Fri, 25 Oct 2019 10:21:55 -0400 Message-Id: <20191025142159.12459-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025142159.12459-1-richard.henderson@linaro.org> References: <20191025142159.12459-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::833 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" There are some uint64_t uses that expect TARGET_PAGE_MASK to extend for a 32-bit, so this must continue to be a signed type. Define based on TARGET_PAGE_BITS not TARGET_PAGE_SIZE; this will make a following patch more clear. This should not have a functional effect so far. Reviewed-by: Alex Bennée Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- include/exec/cpu-all.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index d3e4660d50..ba6d3306bf 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -229,7 +229,7 @@ extern TargetPageBits target_page; #endif #define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) -#define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1) +#define TARGET_PAGE_MASK ((target_long)-1 << TARGET_PAGE_BITS) #define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE) /* Using intptr_t ensures that qemu_*_page_mask is sign-extended even From patchwork Fri Oct 25 14:21:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 11212503 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A1A20913 for ; Fri, 25 Oct 2019 14:44:30 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 76FFE205ED for ; Fri, 25 Oct 2019 14:44:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="iVVAIhMB" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 76FFE205ED Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:33092 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iO0pJ-0001nS-8C for patchwork-qemu-devel@patchwork.kernel.org; Fri, 25 Oct 2019 10:44:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44383) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iO0Tm-0005Be-QD for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iO0Tl-0001ff-Hy for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:14 -0400 Received: from mail-qt1-x82d.google.com ([2607:f8b0:4864:20::82d]:42371) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iO0Tl-0001fN-7m for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:13 -0400 Received: by mail-qt1-x82d.google.com with SMTP id w14so3451279qto.9 for ; Fri, 25 Oct 2019 07:22:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=XXN4/2a2+6dy7fA+RkJ2f7Fcs3d5SyLj63Al4EWJuoY=; b=iVVAIhMBW5/uhD8NT5xQNE5ySyRimlk7WiQwN8AeZvtJ3r3uaipzyszVb11WaS3Kjb LvUtOxrPZKw9K0D0BsZrrPsbdUu8uTpyE1aPjubuFnWih2TaBYrblSlgdnt1vtk9AMmY lg1N6xMxUKE9lnbs+lT+2FQG4D6DfVAMlQDk/VR85mNTp4OmQZWTO7k4UpAlyhT7S2vF 87RQjiDUpdqjfWiQQli2Dqk2K3zIZdJSN0DEHBX6rgdIdHeynhXT+aJ/CBeGqM6Bbbsx NqHAwLhIenV6mM7uVf0EJ+LNBHX+14tmaxEYhv0rLvZ2Wx1kZAyGb/yx/+cbP4gZ1ZQO Qr7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XXN4/2a2+6dy7fA+RkJ2f7Fcs3d5SyLj63Al4EWJuoY=; b=DFssHhAmO0pKn9T8WFexDX3cJOMq7R2+tJ1NFhUkucsZs6UPIKKAzl+Q+nfZ0vlc2m iIipzohZ1uNAFgYPVzZrDoGEyEfNO+eMdRO1HiVwkucQ8D3etfoDW2AxZDkGe/jwSJds Cv+41SYzWQYUHdt0442Ps/wRZ52xp7hBWCYz/XQ/v+b8g/cQsDWAjXnVIQLUkJykWFog N0MPQZJxKnJVEptQHP1Vb428YDkB/VysVjowNoaOjo8jLI23qXN+X1aFObtaVPbQ+QCW bLUWN1n4oS58IRwJ+wIXLgusrtMnWZPgCm/kQ/HNSMTmkCLyuBCErrtgPw6zJnlkOcVB X9gA== X-Gm-Message-State: APjAAAXWAEDQv2r5yHxhcMfro25ZkzjcMZfTbY+xZRpKmWASRXIHZ3QM akxbAztVRxe9XXZIyrj6o9qrSmDLnd4= X-Google-Smtp-Source: APXvYqyzsFQYH3N2U9N8vPW9TmIQ4C0rTWraYSwq2B62S7bVmZbS4onHELAm2Am7dmuoHeC53q+Zww== X-Received: by 2002:aed:228b:: with SMTP id p11mr1520365qtc.196.1572013332264; Fri, 25 Oct 2019 07:22:12 -0700 (PDT) Received: from localhost.localdomain (rrcs-172-254-253-50.nyc.biz.rr.com. [172.254.253.50]) by smtp.gmail.com with ESMTPSA id q17sm1137050qtq.58.2019.10.25.07.22.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 07:22:11 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 09/12] exec: Cache TARGET_PAGE_MASK for TARGET_PAGE_BITS_VARY Date: Fri, 25 Oct 2019 10:21:56 -0400 Message-Id: <20191025142159.12459-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025142159.12459-1-richard.henderson@linaro.org> References: <20191025142159.12459-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::82d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" This eliminates a set of runtime shifts. It turns out that we require TARGET_PAGE_MASK more often than TARGET_PAGE_SIZE, so redefine TARGET_PAGE_SIZE based on TARGET_PAGE_MASK instead of the other way around. Reviewed-by: Alex Bennée Reviewed-by: David Hildenbrand Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- include/exec/cpu-all.h | 8 ++++++-- exec-vary.c | 1 + 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index ba6d3306bf..08b3a5ab06 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -213,6 +213,7 @@ static inline void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val typedef struct { bool decided; int bits; + target_long mask; } TargetPageBits; # if defined(CONFIG_ATTRIBUTE_ALIAS) || !defined(IN_EXEC_VARY) extern const TargetPageBits target_page; @@ -221,15 +222,18 @@ extern TargetPageBits target_page; # endif # ifdef CONFIG_DEBUG_TCG # define TARGET_PAGE_BITS (assert(target_page.decided), target_page.bits) +# define TARGET_PAGE_MASK (assert(target_page.decided), target_page.mask) # else # define TARGET_PAGE_BITS target_page.bits +# define TARGET_PAGE_MASK target_page.mask # endif +# define TARGET_PAGE_SIZE (-(int)TARGET_PAGE_MASK) #else #define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS +#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) +#define TARGET_PAGE_MASK ((target_long)-1 << TARGET_PAGE_BITS) #endif -#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) -#define TARGET_PAGE_MASK ((target_long)-1 << TARGET_PAGE_BITS) #define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE) /* Using intptr_t ensures that qemu_*_page_mask is sign-extended even diff --git a/exec-vary.c b/exec-vary.c index e0befd502a..0594f61fef 100644 --- a/exec-vary.c +++ b/exec-vary.c @@ -97,5 +97,6 @@ void finalize_target_page_bits(void) init_target_page.bits = TARGET_PAGE_BITS_MIN; } init_target_page.decided = true; + init_target_page.mask = (target_long)-1 << init_target_page.bits; #endif } From patchwork Fri Oct 25 14:21:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 11212495 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5A374139A for ; Fri, 25 Oct 2019 14:40:35 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2F7152053B for ; Fri, 25 Oct 2019 14:40:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="r3o1E+sJ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2F7152053B Authentication-Results: mail.kernel.org; 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[172.254.253.50]) by smtp.gmail.com with ESMTPSA id q17sm1137050qtq.58.2019.10.25.07.22.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 07:22:12 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 10/12] cputlb: Fix tlb_vaddr_to_host Date: Fri, 25 Oct 2019 10:21:57 -0400 Message-Id: <20191025142159.12459-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025142159.12459-1-richard.henderson@linaro.org> References: <20191025142159.12459-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::831 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Using uintptr_t instead of target_ulong meant that, for 64-bit guest and 32-bit host, we truncated the guest address comparator and so may not hit the tlb when we should. Fixes: 4811e9095c0 Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- accel/tcg/cputlb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 6f4194df96..5eebddcca8 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1189,7 +1189,7 @@ void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, MMUAccessType access_type, int mmu_idx) { CPUTLBEntry *entry = tlb_entry(env, mmu_idx, addr); - uintptr_t tlb_addr, page; + target_ulong tlb_addr, page; size_t elt_ofs; switch (access_type) { From patchwork Fri Oct 25 14:21:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 11212499 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0C67B913 for ; Fri, 25 Oct 2019 14:43:31 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D5B5E21D82 for ; Fri, 25 Oct 2019 14:43:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="iHyjGqVB" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D5B5E21D82 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:33072 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iO0oC-0008N2-AR for patchwork-qemu-devel@patchwork.kernel.org; Fri, 25 Oct 2019 10:43:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44410) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iO0To-0005FL-RV for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iO0Tn-0001h1-ND for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:16 -0400 Received: from mail-qt1-x829.google.com ([2607:f8b0:4864:20::829]:40736) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iO0Tn-0001gr-JN for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:15 -0400 Received: by mail-qt1-x829.google.com with SMTP id o49so3460174qta.7 for ; Fri, 25 Oct 2019 07:22:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jWCHT8imM+uT8t8z8pCnUo/8+221GMTt3GzK0VnZBfQ=; b=iHyjGqVBlWhRCyvOuTKND1TnfPp7qdekqymZ8omiqy0rOsD6qMW3tYMAt6QScTvhgw wVNZxFa2fM+X5Qc26r6qIBKAq5KUfPPNZKZIvlmka/ufr2Z0LNfLpVE+DsKh80tsOn37 viq+35QicC57PHBPGNEoNldEOkm9PTqXONY+nJdd59cxXsCtQxWfbYRvT/4pAlGNMaHr A0bdkqDMMeEP6EKv4tBGzWIHLvC4jje46gUXEJZmmlp4x8G/hV2wxDzLkhC8reRBYePv LorXMl3iLMBYr01DSym+7R4EW3uKZMZYIOZnR+uDpO3yRv7w+WCv4l9JKQaFfUJHP6kI Vn9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jWCHT8imM+uT8t8z8pCnUo/8+221GMTt3GzK0VnZBfQ=; b=CtfVSmisbaczH/9Ps4xOR0vjhVs94PNnNg/Bc69G+9GdGA6gCjDNDqOocJZk7CkD/C fiD0217hnkzNVgn5R8lYITL0rz6/B2r5j/L3yK9dU9F8WK4E8q8gZxGU4M/a+dWIwqld TTEkmqbFyJ7yh97H2ZxbxEN5Umnl08ehC/mKk/ulAQ6suRwjWHLSKvPW/P2+NTqZ1Vhj 9BtaJYWqadgbr7UfH7UMWfUToSl5ew6uTDQZkX6Ez1NaNY4V1mFSAuA1J2CusE0i4yUo NgXVRAKqufLQeiF7GrT5d8P6XpH0kKz6AVOn9KnhWEWnHvQ33o9NKckvRnfBxXaqRYOA UvQA== X-Gm-Message-State: APjAAAWIvAkaeBd9Mfw241XVAc6RcZbG5dYjFUusS2jmmSFKXYUlrYYc gsVlcDz50XlO3j6rMDhTG0CaIYz9L24= X-Google-Smtp-Source: APXvYqzWXeIiz3luk5leJS5HD0i/rN+5B9IUti4a3DlT7pAg628VG/RnXEWUZqnCANZYagFv/qLXaA== X-Received: by 2002:a0c:85e4:: with SMTP id o91mr3472073qva.16.1572013334490; Fri, 25 Oct 2019 07:22:14 -0700 (PDT) Received: from localhost.localdomain (rrcs-172-254-253-50.nyc.biz.rr.com. [172.254.253.50]) by smtp.gmail.com with ESMTPSA id q17sm1137050qtq.58.2019.10.25.07.22.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 07:22:13 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 11/12] translate-all: fix uninitialized tb->orig_tb Date: Fri, 25 Oct 2019 10:21:58 -0400 Message-Id: <20191025142159.12459-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025142159.12459-1-richard.henderson@linaro.org> References: <20191025142159.12459-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::829 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Clement Deschamps Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Clement Deschamps This fixes a segmentation fault in icount mode when executing from an IO region. TB is marked as CF_NOCACHE but tb->orig_tb is not initialized (equals previous value in code_gen_buffer). The issue happens in cpu_io_recompile() when it tries to invalidate orig_tb. Reviewed-by: Richard Henderson Signed-off-by: Clement Deschamps Message-Id: <20191022140016.918371-1-clement.deschamps@greensocs.com> Signed-off-by: Richard Henderson --- accel/tcg/translate-all.c | 1 + 1 file changed, 1 insertion(+) diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 66d4bc4341..f9b7ba159d 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1722,6 +1722,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, tb->cs_base = cs_base; tb->flags = flags; tb->cflags = cflags; + tb->orig_tb = NULL; tb->trace_vcpu_dstate = *cpu->trace_dstate; tcg_ctx->tb_cflags = cflags; tb_overflow: From patchwork Fri Oct 25 14:21:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 11212505 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 071901920 for ; Fri, 25 Oct 2019 14:48:40 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D090C21929 for ; Fri, 25 Oct 2019 14:48:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Yx0FCQUm" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D090C21929 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:33168 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iO0tK-0007QZ-DS for patchwork-qemu-devel@patchwork.kernel.org; Fri, 25 Oct 2019 10:48:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44426) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iO0Tr-0005Hs-0I for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iO0To-0001hr-Sf for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:17 -0400 Received: from mail-qk1-x742.google.com ([2607:f8b0:4864:20::742]:36391) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iO0To-0001hd-Ou for qemu-devel@nongnu.org; Fri, 25 Oct 2019 10:22:16 -0400 Received: by mail-qk1-x742.google.com with SMTP id y189so1914231qkc.3 for ; Fri, 25 Oct 2019 07:22:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Q9PA/XGaFb/7jgxWdyktquMDL4GhIzWDsxOacBvv2es=; b=Yx0FCQUmjnlC/9wLCFC/AqUil0d6MtaJ466kwyh+3F6W2HvrXAozjn/R9frjenq6m4 o0h9eArCsFvGLrlGiikTT19M8drjyNC1edKt+qKufB2qgP5iWAGvVdpzPE6+ZTrzqu8r F5tRcYhN1K6Kn0nr1ML8eaVAU+VAev21XFk/2CQRNr8IaRdOojopO5tIi5XEWr1M5Nxp BY1TZ/9pcaYFXzrzNCB4rw4DbBrnmIkpcM6co5OkQic7VLPnGCUAFCiSXvsc7taFce2F KUmcpnFC6Ud9p2cdOnDIlRXJjZKwifAAM7fHIWpP03AYFpjZJDpDBE5SabcciJtWjgEp nKoQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Q9PA/XGaFb/7jgxWdyktquMDL4GhIzWDsxOacBvv2es=; b=DW2hzuL7Dhttb4dXob3LERicuh2H2vOaVYpazUid+AL/Ma9A9u6Nnpl+HM3fvSYBrd 3JGjEDoUBfSxNHWB8W7K1M09Rx5s/oCr95ggd0+9cCLhgiU47iDvQ5Ds8G6TQnPzoiBz RHhfRc3u1xfACKZEmmYhgGV7LgfU2H6PZoCseJnxI4yrQ01qTg9uc98urwXv24gWzXvk 7LycfhwnX4FTs/apU026WCaoryyjsXjb0u/bzkQLfwubUlQrtBZjAODpivhUI4E+M6pp ics0XijGXeGo2fkERzEVlBP3OqfTIv2wxA/lWwTVow9CpFFEvu1vsebGULO/pGnwk+Tm qiJA== X-Gm-Message-State: APjAAAWqopZCY08E1F57vkpHcfVA/NPdMbzh5lm5h4Gi8XEqQGyZouyo kv+lnNGwjUGKmIFoIkNE6IH3J5v0N1c= X-Google-Smtp-Source: APXvYqws88YWxyBGLMZte4YCw7NNcZMhe9S478cfJn6qCSNFc1Dzop9UQjJhOR7Lui/gIhEKm9qVyg== X-Received: by 2002:a05:620a:1321:: with SMTP id p1mr3093122qkj.272.1572013335810; Fri, 25 Oct 2019 07:22:15 -0700 (PDT) Received: from localhost.localdomain (rrcs-172-254-253-50.nyc.biz.rr.com. [172.254.253.50]) by smtp.gmail.com with ESMTPSA id q17sm1137050qtq.58.2019.10.25.07.22.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 07:22:14 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 12/12] translate-all: Remove tb_alloc Date: Fri, 25 Oct 2019 10:21:59 -0400 Message-Id: <20191025142159.12459-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025142159.12459-1-richard.henderson@linaro.org> References: <20191025142159.12459-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::742 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Since 2ac01d6dafab, this function does only two things: assert a lock is held, and call tcg_tb_alloc. It is used exactly once, and its user has already done the assert. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Clement Deschamps Signed-off-by: Richard Henderson --- accel/tcg/translate-all.c | 20 ++------------------ 1 file changed, 2 insertions(+), 18 deletions(-) diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index f9b7ba159d..ae063b53f9 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1156,23 +1156,6 @@ void tcg_exec_init(unsigned long tb_size) #endif } -/* - * Allocate a new translation block. Flush the translation buffer if - * too many translation blocks or too much generated code. - */ -static TranslationBlock *tb_alloc(target_ulong pc) -{ - TranslationBlock *tb; - - assert_memory_lock(); - - tb = tcg_tb_alloc(tcg_ctx); - if (unlikely(tb == NULL)) { - return NULL; - } - return tb; -} - /* call with @p->lock held */ static inline void invalidate_page_bitmap(PageDesc *p) { @@ -1681,6 +1664,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, TCGProfile *prof = &tcg_ctx->prof; int64_t ti; #endif + assert_memory_lock(); phys_pc = get_page_addr_code(env, pc); @@ -1706,7 +1690,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, } buffer_overflow: - tb = tb_alloc(pc); + tb = tcg_tb_alloc(tcg_ctx); if (unlikely(!tb)) { /* flush must be done */ tb_flush(cpu);