From patchwork Sun Oct 27 21:00:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 11214377 X-Patchwork-Delegate: paulburton@kernel.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 699DA1747 for ; Sun, 27 Oct 2019 21:38:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 470E920B7C for ; Sun, 27 Oct 2019 21:38:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1572212306; bh=OxtsmDZcRyjTy/TwgnZe5iInYm/ARc+kAq5vsnT/P2M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=zdCLe5NTEfQzH7DgV71yYalKiKHU9KDAYlGxtg6v0FRtUl6GzlorDyqaLgtamEwun TDTSFmxvIYvLPPSLVvjDhoCEjyOmrkorOxbnor5HT7Iobrq3Q4+0suLTxzXr6yMkjS P/FO4CJBs++sgon1NSMzuQhSooHWr9WZraqTTcIc= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728359AbfJ0VDj (ORCPT ); Sun, 27 Oct 2019 17:03:39 -0400 Received: from mail.kernel.org ([198.145.29.99]:48924 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728379AbfJ0VDh (ORCPT ); Sun, 27 Oct 2019 17:03:37 -0400 Received: from localhost (100.50.158.77.rev.sfr.net [77.158.50.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 456C8208C0; Sun, 27 Oct 2019 21:03:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1572210216; bh=OxtsmDZcRyjTy/TwgnZe5iInYm/ARc+kAq5vsnT/P2M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oavV55ySsN0Nu79XTI+bFwzz0xS53lt/MN8+XMBDz3Aeu77MDrXMf8YZw9Yx/+IbB 6704LI5awFy/nycHGjslxGgbFk5tNC2bvmdfW0NNTgAYGUq3G0k+qY1F+M2byEQH3L UpmrQwM0cFIyDJCJmWs/twdQMGhKWJ/UWV/Zn6iw= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Christophe JAILLET , Paul Burton , chenhc@lemote.com, ralf@linux-mips.org, jhogan@kernel.org, linux-mips@vger.kernel.org, kernel-janitors@vger.kernel.org, Sasha Levin Subject: [PATCH 4.4 07/41] mips: Loongson: Fix the link time qualifier of serial_exit() Date: Sun, 27 Oct 2019 22:00:45 +0100 Message-Id: <20191027203104.062911000@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191027203056.220821342@linuxfoundation.org> References: <20191027203056.220821342@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Christophe JAILLET [ Upstream commit 25b69a889b638b0b7e51e2c4fe717a66bec0e566 ] 'exit' functions should be marked as __exit, not __init. Fixes: 85cc028817ef ("mips: make loongsoon serial driver explicitly modular") Signed-off-by: Christophe JAILLET Signed-off-by: Paul Burton Cc: chenhc@lemote.com Cc: ralf@linux-mips.org Cc: jhogan@kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: kernel-janitors@vger.kernel.org Signed-off-by: Sasha Levin --- arch/mips/loongson64/common/serial.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/loongson64/common/serial.c b/arch/mips/loongson64/common/serial.c index ffefc1cb26121..98c3a7feb10f8 100644 --- a/arch/mips/loongson64/common/serial.c +++ b/arch/mips/loongson64/common/serial.c @@ -110,7 +110,7 @@ static int __init serial_init(void) } module_init(serial_init); -static void __init serial_exit(void) +static void __exit serial_exit(void) { platform_device_unregister(&uart8250_device); } From patchwork Sun Oct 27 21:00:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 11214333 X-Patchwork-Delegate: paulburton@kernel.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4879313BD for ; Sun, 27 Oct 2019 21:02:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 17BD2214AF for ; Sun, 27 Oct 2019 21:02:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1572210158; bh=yJSJj+ITuIJKMs7+vc2CHCVTSpYCGIZ3tQbBjXT/Olk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=h4XjZeUOFzQaAJmSgZE9UXweLEyCnOGypzKla9aqrZwrFKzsRTaFzBORqbXpgxeRU 1VSP7KWmmecCYCOM1Ca5fhGzNGa2xHCevKAzUlLHn914Ch8sUSKRRaRFbCOLaE9uVk wnHuveIj16MpfZPYzdIyLz0BgOzm7bxWPpUP7VaM= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728077AbfJ0VCh (ORCPT ); Sun, 27 Oct 2019 17:02:37 -0400 Received: from mail.kernel.org ([198.145.29.99]:47614 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727099AbfJ0VCh (ORCPT ); Sun, 27 Oct 2019 17:02:37 -0400 Received: from localhost (100.50.158.77.rev.sfr.net [77.158.50.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 7442D208C0; Sun, 27 Oct 2019 21:02:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1572210155; bh=yJSJj+ITuIJKMs7+vc2CHCVTSpYCGIZ3tQbBjXT/Olk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bPdlCma7AuZ+pgwjp1tYLFrFWYMcZtdmPj8QixgX61VKzNBCk6sa+rW27rjFLhaBc 1BmNzAtJDLngTjVxEM+c2qzzrqGEdh9yX+Nh2qu4H0W4drSx/gJCtHUf2byKPycNKG cp2YKG1erVbYOLuvUGcO4l0p02Js6GHJWRvf7K5E= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Jiaxun Yang , Huacai Chen , Yunqiang Su , Paul Burton , linux-mips@vger.kernel.org, Sasha Levin Subject: [PATCH 4.4 10/41] MIPS: Treat Loongson Extensions as ASEs Date: Sun, 27 Oct 2019 22:00:48 +0100 Message-Id: <20191027203108.485466107@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191027203056.220821342@linuxfoundation.org> References: <20191027203056.220821342@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Jiaxun Yang [ Upstream commit d2f965549006acb865c4638f1f030ebcefdc71f6 ] Recently, binutils had split Loongson-3 Extensions into four ASEs: MMI, CAM, EXT, EXT2. This patch do the samething in kernel and expose them in cpuinfo so applications can probe supported ASEs at runtime. Signed-off-by: Jiaxun Yang Cc: Huacai Chen Cc: Yunqiang Su Cc: stable@vger.kernel.org # v4.14+ Signed-off-by: Paul Burton Cc: linux-mips@vger.kernel.org Signed-off-by: Sasha Levin --- arch/mips/include/asm/cpu-features.h | 8 ++++++++ arch/mips/include/asm/cpu.h | 2 ++ arch/mips/kernel/cpu-probe.c | 2 ++ arch/mips/kernel/proc.c | 2 ++ 4 files changed, 14 insertions(+) diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index d1e04c943f5f7..ff60510357f63 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h @@ -307,6 +307,14 @@ #define cpu_has_dsp2 (cpu_data[0].ases & MIPS_ASE_DSP2P) #endif +#ifndef cpu_has_loongson_mmi +#define cpu_has_loongson_mmi __ase(MIPS_ASE_LOONGSON_MMI) +#endif + +#ifndef cpu_has_loongson_ext +#define cpu_has_loongson_ext __ase(MIPS_ASE_LOONGSON_EXT) +#endif + #ifndef cpu_has_mipsmt #define cpu_has_mipsmt (cpu_data[0].ases & MIPS_ASE_MIPSMT) #endif diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 82ad15f110492..08cb7a5661d07 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -399,5 +399,7 @@ enum cpu_type_enum { #define MIPS_ASE_DSP2P 0x00000040 /* Signal Processing ASE Rev 2 */ #define MIPS_ASE_VZ 0x00000080 /* Virtualization ASE */ #define MIPS_ASE_MSA 0x00000100 /* MIPS SIMD Architecture */ +#define MIPS_ASE_LOONGSON_MMI 0x00000800 /* Loongson MultiMedia extensions Instructions */ +#define MIPS_ASE_LOONGSON_EXT 0x00002000 /* Loongson EXTensions */ #endif /* _ASM_CPU_H */ diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 6b9064499bd3d..ee71bda53d4e6 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1016,6 +1016,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu) __cpu_name[cpu] = "ICT Loongson-3"; set_elf_platform(cpu, "loongson3a"); set_isa(c, MIPS_CPU_ISA_M64R1); + c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_EXT); break; case PRID_REV_LOONGSON3B_R1: case PRID_REV_LOONGSON3B_R2: @@ -1023,6 +1024,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu) __cpu_name[cpu] = "ICT Loongson-3"; set_elf_platform(cpu, "loongson3b"); set_isa(c, MIPS_CPU_ISA_M64R1); + c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_EXT); break; } diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index f1fab6ff53e63..33c6cdff2331e 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -121,6 +121,8 @@ static int show_cpuinfo(struct seq_file *m, void *v) if (cpu_has_eva) seq_printf(m, "%s", " eva"); if (cpu_has_htw) seq_printf(m, "%s", " htw"); if (cpu_has_xpa) seq_printf(m, "%s", " xpa"); + if (cpu_has_loongson_mmi) seq_printf(m, "%s", " loongson-mmi"); + if (cpu_has_loongson_ext) seq_printf(m, "%s", " loongson-ext"); seq_printf(m, "\n"); if (cpu_has_mmips) { From patchwork Sun Oct 27 21:00:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 11214335 X-Patchwork-Delegate: paulburton@kernel.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0071813B1 for ; Sun, 27 Oct 2019 21:02:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D16892064A for ; Sun, 27 Oct 2019 21:02:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1572210162; bh=JAjNnovaKiGZ0JEZqWC//3IDhdNyQTZW3xqY1GsT6Hs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=elkNP7guHR9H/YgoLZ6wDvLCIgh5ULqhV6fwtC2ITj6Nbll3FHePL/ujDHYWcXfIA 2EdAoF8Gle9hVOu9H9a1m5s54pndSltsGM9aqCQkMVxJx0tLGKZkm9O6xiFpEH9jsY 5cqMLXcCFje2l/2NTIuH0eNKlcCnQJNl6NM7KHfg= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728093AbfJ0VCk (ORCPT ); Sun, 27 Oct 2019 17:02:40 -0400 Received: from mail.kernel.org ([198.145.29.99]:47640 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727099AbfJ0VCj (ORCPT ); Sun, 27 Oct 2019 17:02:39 -0400 Received: from localhost (100.50.158.77.rev.sfr.net [77.158.50.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 4A0162064A; Sun, 27 Oct 2019 21:02:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1572210157; bh=JAjNnovaKiGZ0JEZqWC//3IDhdNyQTZW3xqY1GsT6Hs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=zUeNj7ki8KBilcan/kdBsFghy+Cne3mI1GaLpvYOwAv7c2GTT7sEob0n0lv1JPG+f kLaOcFS+VehQmjmHMmOkudEeytoQprF5a6nrZr4TmIdk/AWfNKWPjO2+7/pnaSyOP5 vyfrQo6hYVcxtKK9QWSEhpqywKbHXoIkDxDJ0Oxk= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Meng Zhuo , Jiaxun Yang , linux-mips@vger.kernel.org, Paul Burton , Sasha Levin Subject: [PATCH 4.4 11/41] MIPS: elf_hwcap: Export userspace ASEs Date: Sun, 27 Oct 2019 22:00:49 +0100 Message-Id: <20191027203108.951999877@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191027203056.220821342@linuxfoundation.org> References: <20191027203056.220821342@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Jiaxun Yang [ Upstream commit 38dffe1e4dde1d3174fdce09d67370412843ebb5 ] A Golang developer reported MIPS hwcap isn't reflecting instructions that the processor actually supported so programs can't apply optimized code at runtime. Thus we export the ASEs that can be used in userspace programs. Reported-by: Meng Zhuo Signed-off-by: Jiaxun Yang Cc: linux-mips@vger.kernel.org Cc: Paul Burton Cc: # 4.14+ Signed-off-by: Paul Burton Signed-off-by: Sasha Levin --- arch/mips/include/uapi/asm/hwcap.h | 11 +++++++++++ arch/mips/kernel/cpu-probe.c | 25 +++++++++++++++++++++++++ 2 files changed, 36 insertions(+) diff --git a/arch/mips/include/uapi/asm/hwcap.h b/arch/mips/include/uapi/asm/hwcap.h index c7484a7ca686d..2b6f8d569d00f 100644 --- a/arch/mips/include/uapi/asm/hwcap.h +++ b/arch/mips/include/uapi/asm/hwcap.h @@ -4,5 +4,16 @@ /* HWCAP flags */ #define HWCAP_MIPS_R6 (1 << 0) #define HWCAP_MIPS_MSA (1 << 1) +#define HWCAP_MIPS_MIPS16 (1 << 3) +#define HWCAP_MIPS_MDMX (1 << 4) +#define HWCAP_MIPS_MIPS3D (1 << 5) +#define HWCAP_MIPS_SMARTMIPS (1 << 6) +#define HWCAP_MIPS_DSP (1 << 7) +#define HWCAP_MIPS_DSP2 (1 << 8) +#define HWCAP_MIPS_DSP3 (1 << 9) +#define HWCAP_MIPS_MIPS16E2 (1 << 10) +#define HWCAP_LOONGSON_MMI (1 << 11) +#define HWCAP_LOONGSON_EXT (1 << 12) +#define HWCAP_LOONGSON_EXT2 (1 << 13) #endif /* _UAPI_ASM_HWCAP_H */ diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index ee71bda53d4e6..3903737e08cc8 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1540,6 +1540,31 @@ void cpu_probe(void) elf_hwcap |= HWCAP_MIPS_MSA; } + if (cpu_has_mips16) + elf_hwcap |= HWCAP_MIPS_MIPS16; + + if (cpu_has_mdmx) + elf_hwcap |= HWCAP_MIPS_MDMX; + + if (cpu_has_mips3d) + elf_hwcap |= HWCAP_MIPS_MIPS3D; + + if (cpu_has_smartmips) + elf_hwcap |= HWCAP_MIPS_SMARTMIPS; + + if (cpu_has_dsp) + elf_hwcap |= HWCAP_MIPS_DSP; + + if (cpu_has_dsp2) + elf_hwcap |= HWCAP_MIPS_DSP2; + + if (cpu_has_loongson_mmi) + elf_hwcap |= HWCAP_LOONGSON_MMI; + + if (cpu_has_loongson_ext) + elf_hwcap |= HWCAP_LOONGSON_EXT; + + cpu_probe_vmbits(c); #ifdef CONFIG_64BIT