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Fri, 1 Nov 2019 17:33:38 +0000 From: "Moger, Babu" To: "tglx@linutronix.de" , "mingo@redhat.com" , "bp@alien8.de" , "hpa@zytor.com" , "pbonzini@redhat.com" , "rkrcmar@redhat.com" , "sean.j.christopherson@intel.com" , "vkuznets@redhat.com" , "wanpengli@tencent.com" , "jmattson@google.com" CC: "x86@kernel.org" , "joro@8bytes.org" , "Moger, Babu" , "luto@kernel.org" , "zohar@linux.ibm.com" , "yamada.masahiro@socionext.com" , "nayna@linux.ibm.com" , "linux-kernel@vger.kernel.org" , "kvm@vger.kernel.org" Subject: [PATCH 1/4] kvm: x86: Dont set UMIP feature bit unconditionally Thread-Topic: [PATCH 1/4] kvm: x86: Dont set UMIP feature bit unconditionally Thread-Index: AQHVkNp+SVH8W6w/AkiSMfw9AT2GlQ== Date: Fri, 1 Nov 2019 17:33:38 +0000 Message-ID: <157262961597.2838.16953618909905259198.stgit@naples-babu.amd.com> References: <157262960837.2838.17520432516398899751.stgit@naples-babu.amd.com> In-Reply-To: <157262960837.2838.17520432516398899751.stgit@naples-babu.amd.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: SN6PR08CA0035.namprd08.prod.outlook.com (2603:10b6:805:66::48) To BL0PR12MB2468.namprd12.prod.outlook.com (2603:10b6:207:44::29) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Babu.Moger@amd.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [165.204.78.2] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: e02a30c8-bbf2-49b2-8087-08d75ef1a12c x-ms-traffictypediagnostic: BL0PR12MB2548: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:5797; x-forefront-prvs: 020877E0CB x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(4636009)(366004)(396003)(376002)(39860400002)(136003)(346002)(189003)(199004)(66946007)(71190400001)(2501003)(2906002)(71200400001)(11346002)(25786009)(14454004)(476003)(478600001)(2201001)(4744005)(6116002)(3846002)(316002)(5660300002)(54906003)(86362001)(110136005)(4326008)(81156014)(64756008)(76176011)(26005)(102836004)(66066001)(446003)(66446008)(7736002)(99286004)(305945005)(7416002)(8676002)(8936002)(186003)(66476007)(486006)(6486002)(6512007)(6506007)(386003)(66556008)(256004)(14444005)(6436002)(52116002)(103116003)(81166006)(921003)(192303002)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:BL0PR12MB2548;H:BL0PR12MB2468.namprd12.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: amd.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: KYBpK5FsAooHoXbk7vnsQJ/4gRul8PyOZ/I60i+AiS1CbpKEwf1ipFk0zTJYROdT8FEjzFIKVBWB+fzhmwU17ccvBmu8vFjkMz2mKecKB6RQJtyaT+JpAMgnqdtWyg1abmKJ+JjIjYKnDo5CHZx5E/b2mNBbyF8shFFAZZ78KqyAp4KOuctvS2XzoF0a7PsrUCsnlYxgUVbAxPBQg6Bj+vnwMZMP8PfLm1pzDgpcFj61fqUVZQ+c9ExAWGI3tdLpqU7fcrzpRFpjbUKROmvThtKVq6r6TV2o/wsiIX/ySYHDFZrfu1WLf+I+9oQnx/uxQKUNsWF+iv0TUgYskN331zN7sUSV2n2kLvZR3qKxxov5L2jR00lwAMpxsvnaOPD3e5EzX9STOHySyrN6sy18Sd9aWDQh+KKTUmcRVhlsPBjktbtU2apNvA6tkCtZgeAw Content-ID: <3CF0EF04BD1C06498BD1643D01E1912C@namprd12.prod.outlook.com> MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: e02a30c8-bbf2-49b2-8087-08d75ef1a12c X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Nov 2019 17:33:38.2191 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: /Ap3bMeIoOEMdKg+Imjtpu+nhLCirujy51GuWEO8Ub2TJroOStReU9YUuok3fkC8 X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR12MB2548 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The UMIP (User-Mode Instruction Prevention) feature bit should be set if the emulation (kvm_x86_ops->umip_emulated) is supported which is done already. Remove the unconditional setting of this bit. Fixes: ae3e61e1c28338d0 ("KVM: x86: add support for UMIP") Signed-off-by: Babu Moger --- arch/x86/kvm/cpuid.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index f68c0c753c38..5b81ba5ad428 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -364,7 +364,7 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index) /* cpuid 7.0.ecx*/ const u32 kvm_cpuid_7_0_ecx_x86_features = F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | F(RDPID) | - F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) | + F(AVX512_VPOPCNTDQ) | F(AVX512_VBMI2) | F(GFNI) | F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) | F(CLDEMOTE) | F(MOVDIRI) | F(MOVDIR64B) | 0 /*WAITPKG*/; From patchwork Fri Nov 1 17:33:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Babu Moger X-Patchwork-Id: 11223465 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B233A913 for ; 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Fri, 1 Nov 2019 17:33:45 +0000 Received: from BL0PR12MB2468.namprd12.prod.outlook.com ([fe80::748c:1f32:1a4d:acca]) by BL0PR12MB2468.namprd12.prod.outlook.com ([fe80::748c:1f32:1a4d:acca%7]) with mapi id 15.20.2387.028; Fri, 1 Nov 2019 17:33:45 +0000 From: "Moger, Babu" To: "tglx@linutronix.de" , "mingo@redhat.com" , "bp@alien8.de" , "hpa@zytor.com" , "pbonzini@redhat.com" , "rkrcmar@redhat.com" , "sean.j.christopherson@intel.com" , "vkuznets@redhat.com" , "wanpengli@tencent.com" , "jmattson@google.com" CC: "x86@kernel.org" , "joro@8bytes.org" , "Moger, Babu" , "luto@kernel.org" , "zohar@linux.ibm.com" , "yamada.masahiro@socionext.com" , "nayna@linux.ibm.com" , "linux-kernel@vger.kernel.org" , "kvm@vger.kernel.org" Subject: [PATCH 2/4] kvm: svm: Enable UMIP feature on AMD Thread-Topic: [PATCH 2/4] kvm: svm: Enable UMIP feature on AMD Thread-Index: AQHVkNqD+3M/4HqTrkKsDppH5BsZ1g== Date: Fri, 1 Nov 2019 17:33:45 +0000 Message-ID: <157262962352.2838.15656190309312238595.stgit@naples-babu.amd.com> References: <157262960837.2838.17520432516398899751.stgit@naples-babu.amd.com> In-Reply-To: <157262960837.2838.17520432516398899751.stgit@naples-babu.amd.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: SN4PR0501CA0009.namprd05.prod.outlook.com (2603:10b6:803:40::22) To BL0PR12MB2468.namprd12.prod.outlook.com (2603:10b6:207:44::29) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Babu.Moger@amd.com; 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received-spf: None (protection.outlook.com: amd.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: JJq9BnV2F1sHY/YsN1ca67eXk1f1FnnXA0LgqPGzcMPGCfxitg4QE/hPajNtmG5semgHVatQWkNUJ+tAyHkvFsz329jSYMPM1utMkBB+9mJ/+rDofaC4KyYMdGxmV2jTU4qVAymvS9qFDMVC0e4FXvr0jyF2r0sebfjiSucCZrG8gzQxz0f67n2JQigs4Eo3k8emqcLKboVxbNgtCX2CIhHNy44UJXNSQ0Z1Uk6BK2rNrRP6VKQJB1ImlKxr7TkZ4gnPEihiv8cxHSqNSB/Q+BT63r8fL0PliQmrEIH4iXIIBFur1vNZpfBzlAstTl+bxyyf9tE0xJrG0ZXKeQwOqUT9G4htZ3NVzTV77ZYeMzttzAzWWu7Ibigc3VdcDRQp2dGUfVlKN1JHwTvaw9XVPQ4lTD7d2nFHhHXojCdJaUY9NjSSHtMxBQUSosIsG01TAHWM/pgzGXIKwWjFNt9lqX9dIP6vPz8y6IOeIfg4daA= Content-ID: <16B93B0400287747B4AF348D01BEB568@namprd12.prod.outlook.com> MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1fd3ca34-0d30-40b2-ebfa-08d75ef1a595 X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Nov 2019 17:33:45.6198 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: /2FFKJDmW0A66Riy35j+l0qRJZg2HzXrB8+pxQbviKlTfYb200RsF0fdCDVF9qxO X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR12MB2516 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org AMD 2nd generation EPYC processors support UMIP (User-Mode Instruction Prevention) feature. The UMIP feature prevents the execution of certain instructions if the Current Privilege Level (CPL) is greater than 0. If any of these instructions are executed with CPL > 0 and UMIP is enabled, then kernel reports a #GP exception. The idea is taken from articles: https://lwn.net/Articles/738209/ https://lwn.net/Articles/694385/ Enable the feature if supported on bare metal and emulate instructions to return dummy values for certain cases. Signed-off-by: Babu Moger --- arch/x86/kvm/svm.c | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index 4153ca8cddb7..79abbdeca148 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c @@ -2533,6 +2533,11 @@ static void svm_decache_cr4_guest_bits(struct kvm_vcpu *vcpu) { } +static bool svm_umip_emulated(void) +{ + return boot_cpu_has(X86_FEATURE_UMIP); +} + static void update_cr0_intercept(struct vcpu_svm *svm) { ulong gcr0 = svm->vcpu.arch.cr0; @@ -4438,6 +4443,13 @@ static int interrupt_window_interception(struct vcpu_svm *svm) return 1; } +static int umip_interception(struct vcpu_svm *svm) +{ + struct kvm_vcpu *vcpu = &svm->vcpu; + + return kvm_emulate_instruction(vcpu, 0); +} + static int pause_interception(struct vcpu_svm *svm) { struct kvm_vcpu *vcpu = &svm->vcpu; @@ -4775,6 +4787,10 @@ static int (*const svm_exit_handlers[])(struct vcpu_svm *svm) = { [SVM_EXIT_SMI] = nop_on_interception, [SVM_EXIT_INIT] = nop_on_interception, [SVM_EXIT_VINTR] = interrupt_window_interception, + [SVM_EXIT_IDTR_READ] = umip_interception, + [SVM_EXIT_GDTR_READ] = umip_interception, + [SVM_EXIT_LDTR_READ] = umip_interception, + [SVM_EXIT_TR_READ] = umip_interception, [SVM_EXIT_RDPMC] = rdpmc_interception, [SVM_EXIT_CPUID] = cpuid_interception, [SVM_EXIT_IRET] = iret_interception, @@ -5976,11 +5992,6 @@ static bool svm_xsaves_supported(void) return boot_cpu_has(X86_FEATURE_XSAVES); } -static bool svm_umip_emulated(void) -{ - return false; -} - static bool svm_pt_supported(void) { return false; From patchwork Fri Nov 1 17:33:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Babu Moger X-Patchwork-Id: 11223467 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B3987913 for ; Fri, 1 Nov 2019 17:34:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 84EC3217D9 for ; Fri, 1 Nov 2019 17:34:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=amdcloud.onmicrosoft.com header.i=@amdcloud.onmicrosoft.com header.b="ReFiIMMI" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729335AbfKARd7 (ORCPT ); Fri, 1 Nov 2019 13:33:59 -0400 Received: from mail-eopbgr820045.outbound.protection.outlook.com ([40.107.82.45]:11776 "EHLO NAM01-SN1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1729204AbfKARd6 (ORCPT ); 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Fri, 1 Nov 2019 17:33:53 +0000 From: "Moger, Babu" To: "tglx@linutronix.de" , "mingo@redhat.com" , "bp@alien8.de" , "hpa@zytor.com" , "pbonzini@redhat.com" , "rkrcmar@redhat.com" , "sean.j.christopherson@intel.com" , "vkuznets@redhat.com" , "wanpengli@tencent.com" , "jmattson@google.com" CC: "x86@kernel.org" , "joro@8bytes.org" , "Moger, Babu" , "luto@kernel.org" , "zohar@linux.ibm.com" , "yamada.masahiro@socionext.com" , "nayna@linux.ibm.com" , "linux-kernel@vger.kernel.org" , "kvm@vger.kernel.org" Subject: [PATCH 3/4] kvm: svm: Emulate UMIP instructions on non SEV guest Thread-Topic: [PATCH 3/4] kvm: svm: Emulate UMIP instructions on non SEV guest Thread-Index: AQHVkNqHNWOug2PnfE283OzKzR6Cjw== Date: Fri, 1 Nov 2019 17:33:53 +0000 Message-ID: <157262963095.2838.4880629527800792709.stgit@naples-babu.amd.com> References: <157262960837.2838.17520432516398899751.stgit@naples-babu.amd.com> In-Reply-To: <157262960837.2838.17520432516398899751.stgit@naples-babu.amd.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: SN6PR0102CA0016.prod.exchangelabs.com (2603:10b6:805:1::29) To BL0PR12MB2468.namprd12.prod.outlook.com (2603:10b6:207:44::29) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Babu.Moger@amd.com; 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received-spf: None (protection.outlook.com: amd.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: qEmk+OmcPc+W4wJdQ3JSpdxzogMcNY9R4S5kZRusoaZUCkHRJrY1T4UfVVmZtZJjrGJq6e2fNjdLTPzWLlj9BmrqojCdQ4wLOUjuOIsPGLJ4g2bSiamjGW0MNDSUFT1MNPn/yjawxJsGgsatynopjwZgqGphSgyXnQcerw39vU903ZLPJEEAUE7alz+lqZ4ErF0vHmvLg5KyMS5x3rxW+EVxw1Tu1pQ6tns+w9nQL6qWBxsQl6o44Xbmdxz+NtefQA65GZZvfjmFKAFY2i5yBOC0am/BQO60ZZbzylEGPV6kx8ZDbD/hdI2XOhM/z4IUWuZg3Mocl1J7EfeA3Z7/041TuWf/tEuPVvfRK1trBTKn4PUbMgGQc+RptrhkjzanSyFsulpPm+wgyNHKVD1bn08mgUJM/ltLDanGyiT1XzGapKrBGJ2OAEiqKaKWzvNP Content-ID: MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4358d073-f27a-49a6-fe85-08d75ef1aa1d X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Nov 2019 17:33:53.2175 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 26m8VAe5+ZRNbDZKx90TBkw1rSTKxmwCPFMJiDApm0GQYFmt01g+EenJYFzNIIRT X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR12MB2451 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Emulation of UMIP instructions (sgdt, sidt, sldt, smsw and str) requires the hypervisor to read and write the guest memory. Guest memory is encrypted on SEV guest. Hypervisor cannot successfully read or write the guest memory. So disable emulation on SEV guest. Enable the emulation only on non SEV guest. Signed-off-by: Babu Moger --- arch/x86/kvm/svm.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index 79abbdeca148..267dae94e5ca 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c @@ -1535,6 +1535,15 @@ static void init_vmcb(struct vcpu_svm *svm) set_intercept(svm, INTERCEPT_NMI); set_intercept(svm, INTERCEPT_SMI); set_intercept(svm, INTERCEPT_SELECTIVE_CR0); + + /* Enable interception only on non-sev guest */ + if (!sev_guest(svm->vcpu.kvm)) { + set_intercept(svm, INTERCEPT_STORE_IDTR); + set_intercept(svm, INTERCEPT_STORE_GDTR); + set_intercept(svm, INTERCEPT_STORE_LDTR); + set_intercept(svm, INTERCEPT_STORE_TR); + } + set_intercept(svm, INTERCEPT_RDPMC); set_intercept(svm, INTERCEPT_CPUID); set_intercept(svm, INTERCEPT_INVD); From patchwork Fri Nov 1 17:34:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Babu Moger X-Patchwork-Id: 11223469 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3AA6717D5 for ; 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Fri, 1 Nov 2019 17:34:01 +0000 Received: from BL0PR12MB2468.namprd12.prod.outlook.com ([fe80::748c:1f32:1a4d:acca]) by BL0PR12MB2468.namprd12.prod.outlook.com ([fe80::748c:1f32:1a4d:acca%7]) with mapi id 15.20.2387.028; Fri, 1 Nov 2019 17:34:00 +0000 From: "Moger, Babu" To: "tglx@linutronix.de" , "mingo@redhat.com" , "bp@alien8.de" , "hpa@zytor.com" , "pbonzini@redhat.com" , "rkrcmar@redhat.com" , "sean.j.christopherson@intel.com" , "vkuznets@redhat.com" , "wanpengli@tencent.com" , "jmattson@google.com" CC: "x86@kernel.org" , "joro@8bytes.org" , "Moger, Babu" , "luto@kernel.org" , "zohar@linux.ibm.com" , "yamada.masahiro@socionext.com" , "nayna@linux.ibm.com" , "linux-kernel@vger.kernel.org" , "kvm@vger.kernel.org" Subject: [PATCH 4/4] x86/Kconfig: Rename UMIP config parameter Thread-Topic: [PATCH 4/4] x86/Kconfig: Rename UMIP config parameter Thread-Index: AQHVkNqMYpA3/AJr/06gaFyuP7Wa9g== Date: Fri, 1 Nov 2019 17:34:00 +0000 Message-ID: <157262963852.2838.14488338442051597577.stgit@naples-babu.amd.com> References: <157262960837.2838.17520432516398899751.stgit@naples-babu.amd.com> In-Reply-To: <157262960837.2838.17520432516398899751.stgit@naples-babu.amd.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: SN4PR0501CA0002.namprd05.prod.outlook.com (2603:10b6:803:40::15) To BL0PR12MB2468.namprd12.prod.outlook.com (2603:10b6:207:44::29) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Babu.Moger@amd.com; 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received-spf: None (protection.outlook.com: amd.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: dkNn2meK8hqMQ4HzHK+ivvauecgozFJE/Hznr6Dbj/Q0hdTXz9rD86mzV2fRnDiRfl+U5y7/cjHa8G4+gCoG54fyw2RJP4PN/3dwLdVUtanCmuTQK4NjJuTRPj6e+H9CS1of1nK9sp+r7xIMdJcFm+fRPc0JrhUPRrP7lJIYHSK0ksDlGJQZgnPGKOoeL7fOYJOTKOOkYU5GVCaUQia8GdWJuPmSICOu+RLhd9eejIZ3Wz527kqxnK38U17G/PF0xDNHhJJ3Sv9eLrm8IdZk2tfjnS81C42ijWDUqYLC+7/CLQUej9D5ODPAyFTqW7x5TT3adoRKxkaaaem5qZeGSeHgbnP7r0neaB67kj5daR2Dprx9iUFo69YTDG/Lh8qmkqOlBnpK/mMCLbADa5rkR1NkBIRWwN+9CyZKHR5H1964SyqmEXNqN06DuaOi71VB Content-ID: <682AA788FAC95F4EBD8959531CF1B4AE@namprd12.prod.outlook.com> MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8dab568a-25a6-4fe0-ee76-08d75ef1aea3 X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Nov 2019 17:34:00.8051 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: I354mym5Nu81hx9+jy50o0B4eKQrj9Yg2JNaq74tGz7UEmMqTOvE8mQE/xzxAO8m X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR12MB2451 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org AMD 2nd generation EPYC processors support the UMIP (User-Mode Instruction Prevention) feature. So, rename X86_INTEL_UMIP to generic X86_UMIP and modify the text to cover both Intel and AMD. Signed-off-by: Babu Moger --- arch/x86/Kconfig | 8 ++++---- arch/x86/include/asm/disabled-features.h | 2 +- arch/x86/include/asm/umip.h | 4 ++-- arch/x86/kernel/Makefile | 2 +- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index d6e1faa28c58..821b7cebff31 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1880,13 +1880,13 @@ config X86_SMAP If unsure, say Y. -config X86_INTEL_UMIP +config X86_UMIP def_bool y - depends on CPU_SUP_INTEL - prompt "Intel User Mode Instruction Prevention" if EXPERT + depends on X86 && (CPU_SUP_INTEL || CPU_SUP_AMD) + prompt "User Mode Instruction Prevention" if EXPERT ---help--- The User Mode Instruction Prevention (UMIP) is a security - feature in newer Intel processors. If enabled, a general + feature in newer x86 processors. If enabled, a general protection fault is issued if the SGDT, SLDT, SIDT, SMSW or STR instructions are executed in user mode. These instructions unnecessarily expose information about the hardware state. diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h index a5ea841cc6d2..8e1d0bb46361 100644 --- a/arch/x86/include/asm/disabled-features.h +++ b/arch/x86/include/asm/disabled-features.h @@ -22,7 +22,7 @@ # define DISABLE_SMAP (1<<(X86_FEATURE_SMAP & 31)) #endif -#ifdef CONFIG_X86_INTEL_UMIP +#ifdef CONFIG_X86_UMIP # define DISABLE_UMIP 0 #else # define DISABLE_UMIP (1<<(X86_FEATURE_UMIP & 31)) diff --git a/arch/x86/include/asm/umip.h b/arch/x86/include/asm/umip.h index db43f2a0d92c..aeed98c3c9e1 100644 --- a/arch/x86/include/asm/umip.h +++ b/arch/x86/include/asm/umip.h @@ -4,9 +4,9 @@ #include #include -#ifdef CONFIG_X86_INTEL_UMIP +#ifdef CONFIG_X86_UMIP bool fixup_umip_exception(struct pt_regs *regs); #else static inline bool fixup_umip_exception(struct pt_regs *regs) { return false; } -#endif /* CONFIG_X86_INTEL_UMIP */ +#endif /* CONFIG_X86_UMIP */ #endif /* _ASM_X86_UMIP_H */ diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile index 3578ad248bc9..52ce1e239525 100644 --- a/arch/x86/kernel/Makefile +++ b/arch/x86/kernel/Makefile @@ -134,7 +134,7 @@ obj-$(CONFIG_EFI) += sysfb_efi.o obj-$(CONFIG_PERF_EVENTS) += perf_regs.o obj-$(CONFIG_TRACING) += tracepoint.o obj-$(CONFIG_SCHED_MC_PRIO) += itmt.o -obj-$(CONFIG_X86_INTEL_UMIP) += umip.o +obj-$(CONFIG_X86_UMIP) += umip.o obj-$(CONFIG_UNWINDER_ORC) += unwind_orc.o obj-$(CONFIG_UNWINDER_FRAME_POINTER) += unwind_frame.o