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Authentication-Results: esa5.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none; spf=None smtp.pra=andrew.cooper3@citrix.com; spf=Pass smtp.mailfrom=Andrew.Cooper3@citrix.com; spf=None smtp.helo=postmaster@mail.citrix.com Received-SPF: None (esa5.hc3370-68.iphmx.com: no sender authenticity information available from domain of andrew.cooper3@citrix.com) identity=pra; client-ip=162.221.158.21; receiver=esa5.hc3370-68.iphmx.com; envelope-from="Andrew.Cooper3@citrix.com"; x-sender="andrew.cooper3@citrix.com"; x-conformance=sidf_compatible Received-SPF: Pass (esa5.hc3370-68.iphmx.com: domain of Andrew.Cooper3@citrix.com designates 162.221.158.21 as permitted sender) identity=mailfrom; client-ip=162.221.158.21; receiver=esa5.hc3370-68.iphmx.com; envelope-from="Andrew.Cooper3@citrix.com"; x-sender="Andrew.Cooper3@citrix.com"; x-conformance=sidf_compatible; x-record-type="v=spf1"; x-record-text="v=spf1 ip4:209.167.231.154 ip4:178.63.86.133 ip4:195.66.111.40/30 ip4:85.115.9.32/28 ip4:199.102.83.4 ip4:192.28.146.160 ip4:192.28.146.107 ip4:216.52.6.88 ip4:216.52.6.188 ip4:162.221.158.21 ip4:162.221.156.83 ip4:168.245.78.127 ~all" Received-SPF: None (esa5.hc3370-68.iphmx.com: no sender authenticity information available from domain of postmaster@mail.citrix.com) identity=helo; client-ip=162.221.158.21; receiver=esa5.hc3370-68.iphmx.com; envelope-from="Andrew.Cooper3@citrix.com"; x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: wIm9PwG5XylHVHM/7nCj3axiZH72qUvYO4DMS8PMdvtyJLMKdF8pBi79plvvut4JiBYXs01G4M A+Zr8/tV7TMIK9+K1TUDZuZ/vsKvvJ29mhDJKpfrMzjNigsLKrvz14GbBar0DA94lL64qS+48J J2Lz3gnFhtc+yveQDOtQMpTylLDBR/RNkEqSz8fwVrUbv/JUETghIaCZJwZdJLWc8BHBCS6bOy r+inZwpbFQ51GpEJoR2exbGUfx7QUa6G998NBxg9gC4jwbo0eBsH4eEdFAXm4cC1eb9Tty947Q tcc= X-SBRS: 2.7 X-MesageID: 8082546 X-Ironport-Server: esa5.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.68,256,1569297600"; d="scan'208";a="8082546" From: Andrew Cooper To: Xen-devel Date: Fri, 1 Nov 2019 20:25:00 +0000 Message-ID: <20191101202502.31750-2-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20191101202502.31750-1-andrew.cooper3@citrix.com> References: <20191101202502.31750-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH 1/3] x86/boot: Remove cached CPUID data from the trampoline X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Juergen Gross , Sergey Dyasli , Wei Liu , Andrew Cooper , Jan Beulich , =?utf-8?q?Roger_Pau_Monn=C3=A9?= Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" We have a cached cpuid_ext_features in the trampoline which is kept in sync by various pieces of boot logic. This is complicated, and all it is actually used for is to derive whether NX is safe to use. Replace it with a canned value to load into EFER. trampoline_setup() and efi_arch_cpu() now tweak trampoline_efer at the point that they are stashing the main copy of CPUID data. Similarly, early_init_intel() needs to tweak if it has re-enabled the use of NX. This simplifies the AP boot and S3 resume paths by using trampoline_efer directly, rather than locally turning FEATURE_NX into EFER_NX. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Wei Liu CC: Roger Pau Monné CC: Sergey Dyasli CC: Juergen Gross --- xen/arch/x86/boot/head.S | 9 +++++++-- xen/arch/x86/boot/trampoline.S | 13 +++++-------- xen/arch/x86/boot/wakeup.S | 13 ++----------- xen/arch/x86/cpu/common.c | 3 --- xen/arch/x86/cpu/intel.c | 1 + xen/arch/x86/efi/efi-boot.h | 8 +++++--- xen/include/asm-x86/processor.h | 2 +- 7 files changed, 21 insertions(+), 28 deletions(-) diff --git a/xen/arch/x86/boot/head.S b/xen/arch/x86/boot/head.S index a1564b520b..77309e3c82 100644 --- a/xen/arch/x86/boot/head.S +++ b/xen/arch/x86/boot/head.S @@ -640,8 +640,13 @@ trampoline_setup: jbe 1f mov $0x80000001,%eax cpuid -1: mov %edx,sym_fs(cpuid_ext_features) - mov %edx,sym_fs(boot_cpu_data)+CPUINFO_FEATURE_OFFSET(X86_FEATURE_LM) +1: mov %edx, sym_fs(boot_cpu_data) + CPUINFO_FEATURE_OFFSET(X86_FEATURE_LM) + + /* Check for NX. Adjust EFER setting if available. */ + bt $cpufeat_bit(X86_FEATURE_NX), %edx + jnc 1f + orb $EFER_NX >> 8, 1 + sym_esi(trampoline_efer) +1: /* Check for availability of long mode. */ bt $cpufeat_bit(X86_FEATURE_LM),%edx diff --git a/xen/arch/x86/boot/trampoline.S b/xen/arch/x86/boot/trampoline.S index 870ec79a2d..26584493bb 100644 --- a/xen/arch/x86/boot/trampoline.S +++ b/xen/arch/x86/boot/trampoline.S @@ -88,8 +88,9 @@ trampoline_gdt: GLOBAL(trampoline_misc_enable_off) .quad 0 -GLOBAL(cpuid_ext_features) - .long 0 +/* EFER OR-mask for boot paths. This gets adjusted with NX when available. */ +GLOBAL(trampoline_efer) + .long EFER_LME | EFER_SCE GLOBAL(trampoline_xen_phys_start) .long 0 @@ -132,14 +133,10 @@ trampoline_protmode_entry: 1: /* Set up EFER (Extended Feature Enable Register). */ - mov bootsym_rel(cpuid_ext_features,4,%edi) movl $MSR_EFER,%ecx rdmsr - or $EFER_LME|EFER_SCE,%eax /* Long Mode + SYSCALL/SYSRET */ - bt $cpufeat_bit(X86_FEATURE_NX),%edi /* No Execute? */ - jnc 1f - btsl $_EFER_NX,%eax /* No Execute */ -1: wrmsr + or bootsym_rel(trampoline_efer, 4, %eax) + wrmsr mov $(X86_CR0_PG | X86_CR0_AM | X86_CR0_WP | X86_CR0_NE |\ X86_CR0_ET | X86_CR0_MP | X86_CR0_PE), %eax diff --git a/xen/arch/x86/boot/wakeup.S b/xen/arch/x86/boot/wakeup.S index 25ec2fa32b..fc47721f43 100644 --- a/xen/arch/x86/boot/wakeup.S +++ b/xen/arch/x86/boot/wakeup.S @@ -131,20 +131,11 @@ wakeup_32: wrmsr 1: - /* Will cpuid feature change after resume? */ /* Set up EFER (Extended Feature Enable Register). */ - mov bootsym_rel(cpuid_ext_features,4,%edi) - test $0x20100800,%edi /* SYSCALL/SYSRET, No Execute, Long Mode? */ - jz .Lskip_eferw movl $MSR_EFER,%ecx rdmsr - btsl $_EFER_LME,%eax /* Long Mode */ - btsl $_EFER_SCE,%eax /* SYSCALL/SYSRET */ - btl $20,%edi /* No Execute? */ - jnc 1f - btsl $_EFER_NX,%eax /* No Execute */ -1: wrmsr -.Lskip_eferw: + or bootsym_rel(trampoline_efer, 4, %eax) + wrmsr wbinvd diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 6c6bd63301..e5ad17d8d9 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -391,9 +391,6 @@ static void generic_identify(struct cpuinfo_x86 *c) cpuid(0x80000001, &tmp, &tmp, &c->x86_capability[cpufeat_word(X86_FEATURE_LAHF_LM)], &c->x86_capability[cpufeat_word(X86_FEATURE_SYSCALL)]); - if (c == &boot_cpu_data) - bootsym(cpuid_ext_features) = - c->x86_capability[cpufeat_word(X86_FEATURE_NX)]; if (c->extended_cpuid_level >= 0x80000004) get_model_name(c); /* Default name */ diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c index 5356a6ae10..4d7324e4d0 100644 --- a/xen/arch/x86/cpu/intel.c +++ b/xen/arch/x86/cpu/intel.c @@ -270,6 +270,7 @@ static void early_init_intel(struct cpuinfo_x86 *c) if (disable) { wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable & ~disable); bootsym(trampoline_misc_enable_off) |= disable; + bootsym(trampoline_efer) |= EFER_NX; } if (disable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID) diff --git a/xen/arch/x86/efi/efi-boot.h b/xen/arch/x86/efi/efi-boot.h index 940ce12706..cde193a771 100644 --- a/xen/arch/x86/efi/efi-boot.h +++ b/xen/arch/x86/efi/efi-boot.h @@ -238,7 +238,7 @@ static void __init noreturn efi_arch_post_exit_boot(void) asm volatile("pushq $0\n\tpopfq"); rdmsrl(MSR_EFER, efer); efer |= EFER_SCE; - if ( cpuid_ext_features & cpufeat_mask(X86_FEATURE_NX) ) + if ( cpu_has_nx ) efer |= EFER_NX; wrmsrl(MSR_EFER, efer); write_cr0(X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | @@ -640,9 +640,11 @@ static void __init efi_arch_cpu(void) if ( (eax >> 16) == 0x8000 && eax > 0x80000000 ) { - cpuid_ext_features = cpuid_edx(0x80000001); boot_cpu_data.x86_capability[cpufeat_word(X86_FEATURE_SYSCALL)] - = cpuid_ext_features; + = cpuid_edx(0x80000001); + + if ( cpu_has_nx ) + trampoline_efer |= EFER_NX; } } diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h index b686156ea0..45d8f5117e 100644 --- a/xen/include/asm-x86/processor.h +++ b/xen/include/asm-x86/processor.h @@ -151,7 +151,7 @@ extern void ctxt_switch_levelling(const struct vcpu *next); extern void (*ctxt_switch_masking)(const struct vcpu *next); extern bool_t opt_cpu_info; -extern u32 cpuid_ext_features; +extern u32 trampoline_efer; extern u64 trampoline_misc_enable_off; /* Maximum width of physical addresses supported by the hardware. */ From patchwork Fri Nov 1 20:25:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andrew Cooper X-Patchwork-Id: 11223641 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 621041668 for ; Fri, 1 Nov 2019 20:26:39 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3E80521855 for ; Fri, 1 Nov 2019 20:26:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=citrix.com header.i=@citrix.com header.b="SDAiLyU9" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3E80521855 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=citrix.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iQdTx-0000gw-0b; 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client-ip=162.221.158.21; receiver=esa3.hc3370-68.iphmx.com; envelope-from="Andrew.Cooper3@citrix.com"; x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: Fp22Y6DKn1x/VNnWpVeiEpCS5Fgwxio9tIJ4A2GyLEiromNyl7VTmiPaSGb4S2qYFaKucfs9vW hHr9Iiu09Qw8JG7/rBVzBZNbm5LBn1C7XYYfiB7rgB4eWrulPGX05Nt33pFOzGNhzHDO0W+xUW Xt88NYSgJocJmlcLC6ZumbwcVXY5270n2KDSUx67ATzzD/18fDr+aj2h5maObKVxJKZV4nVR7q rz4wycx5ynIgl4zYu+tglwqBkLAjDk1LZqx4n2bYcbbTmKDH5IAwfrI4WOernIxxw8SUSC4sTB C2s= X-SBRS: 2.7 X-MesageID: 7746114 X-Ironport-Server: esa3.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.68,256,1569297600"; d="scan'208";a="7746114" From: Andrew Cooper To: Xen-devel Date: Fri, 1 Nov 2019 20:25:01 +0000 Message-ID: <20191101202502.31750-3-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20191101202502.31750-1-andrew.cooper3@citrix.com> References: <20191101202502.31750-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH 2/3] x86/boot: Cache cpu_has_hypervisor very early on boot X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Juergen Gross , Sergey Dyasli , Wei Liu , Andrew Cooper , Jan Beulich , =?utf-8?q?Roger_Pau_Monn=C3=A9?= Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" We cache Long Mode and No Execute early on boot, so take the opportunity to cache HYPERVISOR early as well. Replace opencoded early access to the feature bit. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- CC: Jan Beulich CC: Wei Liu CC: Roger Pau Monné CC: Sergey Dyasli CC: Juergen Gross --- xen/arch/x86/apic.c | 2 +- xen/arch/x86/boot/head.S | 4 ++++ xen/arch/x86/efi/efi-boot.h | 6 ++++-- xen/arch/x86/guest/xen.c | 6 +----- xen/arch/x86/mm.c | 3 +-- 5 files changed, 11 insertions(+), 10 deletions(-) diff --git a/xen/arch/x86/apic.c b/xen/arch/x86/apic.c index a5f7b05d5a..a8ee18636f 100644 --- a/xen/arch/x86/apic.c +++ b/xen/arch/x86/apic.c @@ -1156,7 +1156,7 @@ static void __init check_deadline_errata(void) const struct x86_cpu_id *m; unsigned int rev; - if ( boot_cpu_has(X86_FEATURE_HYPERVISOR) ) + if ( cpu_has_hypervisor ) return; m = x86_match_cpu(deadline_match); diff --git a/xen/arch/x86/boot/head.S b/xen/arch/x86/boot/head.S index 77309e3c82..8d0ffbd1b0 100644 --- a/xen/arch/x86/boot/head.S +++ b/xen/arch/x86/boot/head.S @@ -630,6 +630,10 @@ trampoline_setup: 1: /* Interrogate CPU extended features via CPUID. */ + mov $1, %eax + cpuid + mov %ecx, sym_fs(boot_cpu_data) + CPUINFO_FEATURE_OFFSET(X86_FEATURE_HYPERVISOR) + mov $0x80000000,%eax cpuid shld $16,%eax,%ecx diff --git a/xen/arch/x86/efi/efi-boot.h b/xen/arch/x86/efi/efi-boot.h index cde193a771..232972eedf 100644 --- a/xen/arch/x86/efi/efi-boot.h +++ b/xen/arch/x86/efi/efi-boot.h @@ -637,11 +637,13 @@ static void __init efi_arch_handle_module(struct file *file, const CHAR16 *name, static void __init efi_arch_cpu(void) { uint32_t eax = cpuid_eax(0x80000000); + uint32_t *caps = boot_cpu_data.x86_capability; + + caps[cpufeat_word(X86_FEATURE_HYPERVISOR)] = cpuid_ecx(1); if ( (eax >> 16) == 0x8000 && eax > 0x80000000 ) { - boot_cpu_data.x86_capability[cpufeat_word(X86_FEATURE_SYSCALL)] - = cpuid_edx(0x80000001); + caps[cpufeat_word(X86_FEATURE_SYSCALL)] = cpuid_edx(0x80000001); if ( cpu_has_nx ) trampoline_efer |= EFER_NX; diff --git a/xen/arch/x86/guest/xen.c b/xen/arch/x86/guest/xen.c index 7b7a5badab..a329e7c886 100644 --- a/xen/arch/x86/guest/xen.c +++ b/xen/arch/x86/guest/xen.c @@ -69,11 +69,7 @@ static void __init find_xen_leaves(void) void __init probe_hypervisor(void) { - if ( xen_guest ) - return; - - /* Too early to use cpu_has_hypervisor */ - if ( !(cpuid_ecx(1) & cpufeat_mask(X86_FEATURE_HYPERVISOR)) ) + if ( xen_guest || !cpu_has_hypervisor ) return; find_xen_leaves(); diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index 57f22775ac..bd8182f40f 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -6112,8 +6112,7 @@ const struct platform_bad_page *__init get_platform_badpages(unsigned int *array case 0x000506e0: /* errata SKL167 / SKW159 */ case 0x000806e0: /* erratum KBL??? */ case 0x000906e0: /* errata KBL??? / KBW114 / CFW103 */ - *array_size = (cpuid_eax(0) >= 7 && - !(cpuid_ecx(1) & cpufeat_mask(X86_FEATURE_HYPERVISOR)) && + *array_size = (cpuid_eax(0) >= 7 && !cpu_has_hypervisor && (cpuid_count_ebx(7, 0) & cpufeat_mask(X86_FEATURE_HLE))); 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client-ip=162.221.158.21; receiver=esa4.hc3370-68.iphmx.com; envelope-from="Andrew.Cooper3@citrix.com"; x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: 5g1j2hO8GgEQ+bAU/bT399V387yEVXrfTQOvDrgI0jPyx0wq/5OxIz1GlVsEIi3u0Elsw8FL3R jJB+R13oDMz/4UW95Rm8z9gHeXJgA1fvrOLWcI3CsQzW8Ng9rNz7057NOxEf+Pe+7W5GdPZpDg jKXGYYFnj5ScGVRKIytZo7Nyk8EGM+HhN12ebbpI0FPlIRYe0KhuF2m8CspcSjPtGs+xLexgaM JrfJB2ODMomUgb38e6jF9PdSBqcxgW9x+iBUWmb1MRQTaNvFj+Klw/J013e0ykqURzDToYlTfY F2Q= X-SBRS: 2.7 X-MesageID: 8233369 X-Ironport-Server: esa4.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.68,256,1569297600"; d="scan'208";a="8233369" From: Andrew Cooper To: Xen-devel Date: Fri, 1 Nov 2019 20:25:02 +0000 Message-ID: <20191101202502.31750-4-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20191101202502.31750-1-andrew.cooper3@citrix.com> References: <20191101202502.31750-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH 3/3] x86/e820: fix 640k - 1M region reservation logic X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Juergen Gross , Sergey Dyasli , Wei Liu , Jan Beulich , =?utf-8?q?Roger_Pau_?= =?utf-8?q?Monn=C3=A9?= Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Sergey Dyasli Converting a guest from PV to PV-in-PVH makes the guest to have 384k less memory, which may confuse guest's balloon driver. This happens because Xen unconditionally reserves 640k - 1M region in E820 despite the fact that it's really a usable RAM in PVH boot mode. Fix this by skipping region type change in virtualised environments, trusting whatever memory map our hypervisor has provided. Signed-off-by: Sergey Dyasli Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Wei Liu CC: Roger Pau Monné CC: Sergey Dyasli CC: Juergen Gross --- xen/arch/x86/e820.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/e820.c b/xen/arch/x86/e820.c index 8e8a2c4e1b..082f9928a1 100644 --- a/xen/arch/x86/e820.c +++ b/xen/arch/x86/e820.c @@ -318,9 +318,9 @@ static int __init copy_e820_map(struct e820entry * biosmap, unsigned int nr_map) /* * Some BIOSes claim RAM in the 640k - 1M region. - * Not right. Fix it up. + * Not right. Fix it up, but only when running on bare metal. */ - if (type == E820_RAM) { + if (!cpu_has_hypervisor && type == E820_RAM) { if (start < 0x100000ULL && end > 0xA0000ULL) { if (start < 0xA0000ULL) add_memory_region(start, 0xA0000ULL-start, type);