From patchwork Mon Nov 4 21:43:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 11226573 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8E40416B1 for ; Mon, 4 Nov 2019 21:57:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6AB1521E6F for ; Mon, 4 Nov 2019 21:57:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1572904643; bh=8h+FkDc3xXvETtsrZrbsTH8LmB+VdeBjN9RyUmQkvEs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=lVveTWt9bPRNPGKymepKl8IziqtPHCt9XiliYqTsN80+BYyQlpCiSPpECjr9qlEcs lN0SKj4XIkMDsG0OW6555tRFo2fIqs2IGL36C1+/DW2c2lr80kk/4KvYSkmAnZs3uz g6EjVowprFmCtGuIDZxtizTvLklWnGtbnl3JsCHE= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388253AbfKDV5W (ORCPT ); Mon, 4 Nov 2019 16:57:22 -0500 Received: from mail.kernel.org ([198.145.29.99]:53484 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387818AbfKDV5T (ORCPT ); Mon, 4 Nov 2019 16:57:19 -0500 Received: from localhost (6.204-14-84.ripe.coltfrance.com [84.14.204.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 6719D2184C; Mon, 4 Nov 2019 21:57:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1572904639; bh=8h+FkDc3xXvETtsrZrbsTH8LmB+VdeBjN9RyUmQkvEs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=imenMDP9BHo9/Tg+KjECk4+XhNY6Fp3iqmyBGShcm27zUwIVvgkH7pDq14qtBAMj8 TMZC33MP6HxdvffAbZ/UdzEaq0CZE7m9YypEUjw2Wo+ERlE6fqAFfBlfR05DEKGJk5 SeapVj99j+r8DjdgkygLfFIrDDM3pNa/WK7xVwxU= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Kan Liang , Qiuxu Zhuo , Tony Luck , Borislav Petkov , Andy Shevchenko , Aristeu Rozanski , "H. Peter Anvin" , Ingo Molnar , linux-edac , Mauro Carvalho Chehab , Megha Dey , Peter Zijlstra , Rajneesh Bhardwaj , Thomas Gleixner , x86-ml , Sasha Levin Subject: [PATCH 4.19 018/149] x86/cpu: Add Atom Tremont (Jacobsville) Date: Mon, 4 Nov 2019 22:43:31 +0100 Message-Id: <20191104212136.034136452@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191104212126.090054740@linuxfoundation.org> References: <20191104212126.090054740@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: linux-edac-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org From: Kan Liang [ Upstream commit 00ae831dfe4474ef6029558f5eb3ef0332d80043 ] Add the Atom Tremont model number to the Intel family list. [ Tony: Also update comment at head of file to say "_X" suffix is also used for microserver parts. ] Signed-off-by: Kan Liang Signed-off-by: Qiuxu Zhuo Signed-off-by: Tony Luck Signed-off-by: Borislav Petkov Cc: Andy Shevchenko Cc: Aristeu Rozanski Cc: "H. Peter Anvin" Cc: Ingo Molnar Cc: linux-edac Cc: Mauro Carvalho Chehab Cc: Megha Dey Cc: Peter Zijlstra Cc: Qiuxu Zhuo Cc: Rajneesh Bhardwaj Cc: Thomas Gleixner Cc: x86-ml Link: https://lkml.kernel.org/r/20190125195902.17109-4-tony.luck@intel.com Signed-off-by: Sasha Levin --- arch/x86/include/asm/intel-family.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h index 5d0b72f281402..82a57d344b9bc 100644 --- a/arch/x86/include/asm/intel-family.h +++ b/arch/x86/include/asm/intel-family.h @@ -6,7 +6,7 @@ * "Big Core" Processors (Branded as Core, Xeon, etc...) * * The "_X" parts are generally the EP and EX Xeons, or the - * "Extreme" ones, like Broadwell-E. + * "Extreme" ones, like Broadwell-E, or Atom microserver. * * While adding a new CPUID for a new microarchitecture, add a new * group to keep logically sorted out in chronological order. Within @@ -80,6 +80,7 @@ #define INTEL_FAM6_ATOM_GOLDMONT 0x5C /* Apollo Lake */ #define INTEL_FAM6_ATOM_GOLDMONT_X 0x5F /* Denverton */ #define INTEL_FAM6_ATOM_GOLDMONT_PLUS 0x7A /* Gemini Lake */ +#define INTEL_FAM6_ATOM_TREMONT_X 0x86 /* Jacobsville */ /* Xeon Phi */