From patchwork Thu Nov 14 00:17:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 11242895 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A5EFE1393 for ; Thu, 14 Nov 2019 00:17:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 414A0206F2 for ; Thu, 14 Nov 2019 00:17:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="nb+hQLZC" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726557AbfKNARh (ORCPT ); Wed, 13 Nov 2019 19:17:37 -0500 Received: from mail-ua1-f73.google.com ([209.85.222.73]:36708 "EHLO mail-ua1-f73.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726195AbfKNARg (ORCPT ); Wed, 13 Nov 2019 19:17:36 -0500 Received: by mail-ua1-f73.google.com with SMTP id r39so1066066uad.3 for ; Wed, 13 Nov 2019 16:17:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=k+kFDmW+TZm9uAXFmGbrnJC5CPVNW5UAKaPtdur5YLA=; b=nb+hQLZC15W0K8WXRmuQy4fdq0rp5A4JbyupyxdXgL2X3VhQPx23GRz4EAcNgaCWlN wQ+aRlFjAJQ2MlwNjc5hIyqHU7HLxoNy1ts1s93b6f8JsgW1h6KIo47EDS1sX4ElD+Sy q06A8vJ7LWdUCphs18CBwzfh+XXgzRxnB7WvF0kGMjy0P3Arx8qhE/IRweOdUmbYlWlk Q2a4vTVh/uTOqqQv4eSD9IAzen8mdbyvt8gZMiOl7c66MdESQMTzBuwfU+A4Kk62sFTH sNR5oEKJdZUbEVcRBqatvxgLOHz3apKKscxYAhjP6QSf+0NRk64pSfLgofRWgW011NqA o0Ug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=k+kFDmW+TZm9uAXFmGbrnJC5CPVNW5UAKaPtdur5YLA=; b=uYVmRiP7FCO/fzEvxhGPuhZx/wyMZzHgdLYe0jfsgFksCqSU4bmM4IVUsbHcl1JoU/ 2+CZtcghE8BS2zU1RRk8T+kwAKun5l0JW6/RDHkOVIHQgqihMQqcVc8zbgI86HvFNhZu alouIqEy9S7r6UuUk2qdqDorGN8SlcbAb2Yq2vK446RVHGouJS1fs6xToyUjcwIVfj0R JStzecPd2TN5JVgM5thcMsYHVQxrVkkDIA4HDDNboCpvIPrXIURmch8nu8be4IgAbqpT 1bY/XemFdjSs8d7KTAb7npYOfN75tDIDMGSdPSy7YeVR3NvUSgA2180KzwWcJ2U45sYx bCtQ== X-Gm-Message-State: APjAAAUDxE5uYcW5xB4xk3/gPn0ly6y81boN95MKMZ3Z9dXvRtAZdzs3 NUmc5WQNO/OcxdkZp2kH85dUIhUzclzDOLOwgWRymxaB+9S29h4w9VvCye8trRaP5KFd0hyQTDz jQdALkRCqY1oO2gXepbqyUO3YiHSqBTXVgX/Crs4q0JxLgUuPJfe5irLrxQ== X-Google-Smtp-Source: APXvYqwna/gXQTrY9o3e39CR7hive+a2govJYQk8eL/5hYoyxFh3SYxseEVMt871AFGLc3oT3jqWQXPbWR8= X-Received: by 2002:ab0:7d2:: with SMTP id d18mr4059285uaf.68.1573690653917; Wed, 13 Nov 2019 16:17:33 -0800 (PST) Date: Wed, 13 Nov 2019 16:17:15 -0800 In-Reply-To: <20191114001722.173836-1-oupton@google.com> Message-Id: <20191114001722.173836-2-oupton@google.com> Mime-Version: 1.0 References: <20191114001722.173836-1-oupton@google.com> X-Mailer: git-send-email 2.24.0.rc1.363.gb1bccd3e3d-goog Subject: [PATCH v5 1/8] KVM: VMX: Add helper to check reserved bits in IA32_PERF_GLOBAL_CTRL From: Oliver Upton To: kvm@vger.kernel.org, Paolo Bonzini , " =?utf-8?b?UmFkaW0gS3LEjW3DocWZ?= " Cc: Jim Mattson , Peter Shier , Krish Sadhukhan , Sean Christopherson , Oliver Upton Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Create a helper function to check the validity of a proposed value for IA32_PERF_GLOBAL_CTRL from the existing check in intel_pmu_set_msr(). Per Intel's SDM, the reserved bits in IA32_PERF_GLOBAL_CTRL must be cleared for the corresponding host/guest state fields. Suggested-by: Jim Mattson Co-developed-by: Krish Sadhukhan Signed-off-by: Krish Sadhukhan Signed-off-by: Oliver Upton Reviewed-by: Jim Mattson Reviewed-by: Peter Shier --- arch/x86/kvm/pmu.h | 6 ++++++ arch/x86/kvm/vmx/pmu_intel.c | 2 +- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h index 58265f761c3b..1631ac852ce0 100644 --- a/arch/x86/kvm/pmu.h +++ b/arch/x86/kvm/pmu.h @@ -79,6 +79,12 @@ static inline bool pmc_is_enabled(struct kvm_pmc *pmc) return kvm_x86_ops->pmu_ops->pmc_is_enabled(pmc); } +static inline bool kvm_valid_perf_global_ctrl(struct kvm_pmu *pmu, + u64 data) +{ + return !(pmu->global_ctrl_mask & data); +} + /* returns general purpose PMC with the specified MSR. Note that it can be * used for both PERFCTRn and EVNTSELn; that is why it accepts base as a * paramenter to tell them apart. diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index 3e9c059099e9..8cd2cc2fe986 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -223,7 +223,7 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) case MSR_CORE_PERF_GLOBAL_CTRL: if (pmu->global_ctrl == data) return 0; - if (!(data & pmu->global_ctrl_mask)) { + if (kvm_valid_perf_global_ctrl(pmu, data)) { global_ctrl_changed(pmu, data); return 0; } From patchwork Thu Nov 14 00:17:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 11242897 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A2EAF1393 for ; Thu, 14 Nov 2019 00:17:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3E784206EC for ; Thu, 14 Nov 2019 00:17:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="Alw++F/V" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726628AbfKNARj (ORCPT ); Wed, 13 Nov 2019 19:17:39 -0500 Received: from mail-pf1-f202.google.com ([209.85.210.202]:53137 "EHLO mail-pf1-f202.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726564AbfKNARi (ORCPT ); Wed, 13 Nov 2019 19:17:38 -0500 Received: by mail-pf1-f202.google.com with SMTP id f20so3033611pfn.19 for ; Wed, 13 Nov 2019 16:17:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=BX7RT8qAkB+AYWbevuwN18lQM0QHX09qJQguHxmgnmY=; b=Alw++F/VhpvBDrSg3BlZomdOwgdEM++PB9tbLgs0ncIIzEWHM1tz8pvcPLzvcP92Ls EM2qa7v3tn6TxCOKg0msG2klSK67yMbNAUgiAjAwIEkCfvj/NdUSnCMZZAINkcAydiMy l7CNZ3g5tX6ujfTOFptQLx92g2YsRgFjytuDuvv5rO/bvWndu2O+CtZBHu7HWl8KWWWp 7x8Co+OabbQQDPXfFxH86kimWWO7DUi3lvadsZ/AYczPWlW0S29OuHEeWC0UjUsal4el WXzVDZcbT4dhHSwSzGSB8S5vi1+JAqfPMS6NVDGf2120BfFiSNTMvWG8lqTfaML0IW4S RVYw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=BX7RT8qAkB+AYWbevuwN18lQM0QHX09qJQguHxmgnmY=; b=crcsba+SM3lrRDUaBrjuywP2rBS9A5RM2fdcDKVMAYqQhbz7b2L4wJpz0GT0AD/0Hz ZTfiA7w+WzB+YN2HKz7eSsQ+D0kH9/XrS09MTttDmYAb+7TVcNy2NdhmWzUgJryXkdXY 76/7CVRGI+TMG15Jii6+A5NKVIGVJg62SypiktHUSG7JMpyW1GoTw+3m228m7u656yW0 HGm38Jc4pxPTnw/hijA9CpqdxT3RrX47eY2saKWCbJp+C2DJ7VWC03P8pXB4ck1m5bwK 6eiz9lIRw8PgjOSlTkK17InVQwpmDwJVTxtQWIGP2S0aJ9GyLd4TDBzhS3xwVHlRvgX3 k9Fw== X-Gm-Message-State: APjAAAXFL0azCqsiT9vOSCyUFmj7J2h91hmyII8yz1CyKm3ZN8wPERfQ WvTbnjTDbFMVTRmp1vw9kVi8LlRIuZJ9NQU+YRSf6i/q24GsQ8fwCgehIzPjv8aCzZlO6PVE3LV pjXD76bODIHavCxWXWwdILXK5uBgNP3hgknD7s09cA+N67pkRUjiFr6v5kg== X-Google-Smtp-Source: APXvYqw6DegNtUI5cRcWXUOA81/O7WE2fG9ibAJ1flbxMp23RvhMwub05oYde9aQZL7xd5kVnuaq2DXuioE= X-Received: by 2002:a63:6286:: with SMTP id w128mr6816399pgb.290.1573690655957; Wed, 13 Nov 2019 16:17:35 -0800 (PST) Date: Wed, 13 Nov 2019 16:17:16 -0800 In-Reply-To: <20191114001722.173836-1-oupton@google.com> Message-Id: <20191114001722.173836-3-oupton@google.com> Mime-Version: 1.0 References: <20191114001722.173836-1-oupton@google.com> X-Mailer: git-send-email 2.24.0.rc1.363.gb1bccd3e3d-goog Subject: [PATCH v5 2/8] KVM: nVMX: Check GUEST_IA32_PERF_GLOBAL_CTRL on VM-Entry From: Oliver Upton To: kvm@vger.kernel.org, Paolo Bonzini , " =?utf-8?b?UmFkaW0gS3LEjW3DocWZ?= " Cc: Jim Mattson , Peter Shier , Krish Sadhukhan , Sean Christopherson , Oliver Upton Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Add condition to nested_vmx_check_guest_state() to check the validity of GUEST_IA32_PERF_GLOBAL_CTRL. Per Intel's SDM Vol 3 26.3.1.1: If the "load IA32_PERF_GLOBAL_CTRL" VM-entry control is 1, bits reserved in the IA32_PERF_GLOBAL_CTRL MSR must be 0 in the field for that register. Suggested-by: Jim Mattson Co-developed-by: Krish Sadhukhan Signed-off-by: Krish Sadhukhan Signed-off-by: Oliver Upton Reviewed-by: Jim Mattson Reviewed-by: Peter Shier --- arch/x86/kvm/vmx/nested.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c index e76eb4f07f6c..c19975c57d69 100644 --- a/arch/x86/kvm/vmx/nested.c +++ b/arch/x86/kvm/vmx/nested.c @@ -10,6 +10,7 @@ #include "hyperv.h" #include "mmu.h" #include "nested.h" +#include "pmu.h" #include "trace.h" #include "x86.h" @@ -2779,6 +2780,11 @@ static int nested_vmx_check_guest_state(struct kvm_vcpu *vcpu, return -EINVAL; } + if ((vmcs12->vm_entry_controls & VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL) && + CC(!kvm_valid_perf_global_ctrl(vcpu_to_pmu(vcpu), + vmcs12->guest_ia32_perf_global_ctrl))) + return -EINVAL; + /* * If the load IA32_EFER VM-entry control is 1, the following checks * are performed on the field for the IA32_EFER MSR: From patchwork Thu Nov 14 00:17:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 11242899 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E2A451393 for ; Thu, 14 Nov 2019 00:17:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7E466206F2 for ; Thu, 14 Nov 2019 00:17:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="WlDhbmzz" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726923AbfKNARk (ORCPT ); Wed, 13 Nov 2019 19:17:40 -0500 Received: from mail-pg1-f202.google.com ([209.85.215.202]:41250 "EHLO mail-pg1-f202.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726605AbfKNARj (ORCPT ); Wed, 13 Nov 2019 19:17:39 -0500 Received: by mail-pg1-f202.google.com with SMTP id e6so3141207pgc.8 for ; Wed, 13 Nov 2019 16:17:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=wyU7X5+KZ1eW/8rXzi076f3hAP9H70n2FWQEO44IkUo=; b=WlDhbmzzXfj/My+sRcsc/e03UkeLMxc9jk6m56WS2CofWmA1sWtPxTuzUpA9vJsYXh xoaeZu0Z0VdoJUpfKMdppMZaqW6ntokmvqNsfr26X2KCJumq9DyP4zMY9HzK2d/0I7ZR Afvofz2+W06OeuTi49jbw/neAJJpw6Mh+4aAICi8e3xZLgd2D675pi6mFZKGaXqSFFn4 c6GrjF0Pk1kQ6g0s9vjdUkT+QxA5pz8Yg9HI7MOPg79lVVbCUCnaxZXF8tAJ884nIis6 5F9FsQVxRR8jTegCW2354RZElM4lvBweVQsvqM6ynL8oN6Zwr5cWwL5BB27qhHZQdPfb QnPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=wyU7X5+KZ1eW/8rXzi076f3hAP9H70n2FWQEO44IkUo=; b=EBDnoc/h6Vuft8WBgYjE3IIrGOq1OHaNTUDPiX2oFWb1jw2YlYaTf95yLHvqSLRLC7 Yezc3Oj6C33Nk1zALfv/zlugTNQcZw5WptwzSOSrwUG1x5TDkY2y0LOH9JJSw1P9kk7x opPgum9nUqECsLi0B7+q2kmXitvqsLHgwxa8v+D5lb2cJ8A3xQ2qIzKsJNPCQTu0dtyA P5X1GLMrBEwWoK0ia/bTWRuSk9CN9zZkPC/mi63t0ocGQG5382SMtQErgDVhnUZEDm+G 6T05eKylqVtP+HK7EU5Hxcve3Cs5dp68zYkzTNuSy9SE4dJNyvdkJOmdkYTtOs4bE4RY 1tqw== X-Gm-Message-State: APjAAAWlc+8VokhzKHzG65We9ZgKK/MCL5OuM/NKNSrbByrffdbFylNO QWhcObfrcLH1s+zZSlC8HcLRPeryUKs3D/ybLhMsO1zdZCzNOmuEk5F4fve7hsfDDSpv/1JsNBT JXL+9Ts4F7fVISjQBxj/p/KoS6JdNR6uCo3y9ediS6zdrVirZknLiTYAXKg== X-Google-Smtp-Source: APXvYqzKQwOjYeTIEiDFuKyqYaAeZJUWI/ozSTmKYGbOn2qX4C0tZ/6R0cRerj4IAC9Hp/3rLaLfSmi4dog= X-Received: by 2002:a63:9d0f:: with SMTP id i15mr6975542pgd.286.1573690658232; Wed, 13 Nov 2019 16:17:38 -0800 (PST) Date: Wed, 13 Nov 2019 16:17:17 -0800 In-Reply-To: <20191114001722.173836-1-oupton@google.com> Message-Id: <20191114001722.173836-4-oupton@google.com> Mime-Version: 1.0 References: <20191114001722.173836-1-oupton@google.com> X-Mailer: git-send-email 2.24.0.rc1.363.gb1bccd3e3d-goog Subject: [PATCH v5 3/8] KVM: nVMX: Check HOST_IA32_PERF_GLOBAL_CTRL on VM-Entry From: Oliver Upton To: kvm@vger.kernel.org, Paolo Bonzini , " =?utf-8?b?UmFkaW0gS3LEjW3DocWZ?= " Cc: Jim Mattson , Peter Shier , Krish Sadhukhan , Sean Christopherson , Oliver Upton Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Add a consistency check on nested vm-entry for host's IA32_PERF_GLOBAL_CTRL from vmcs12. Per Intel's SDM Vol 3 26.2.2: If the "load IA32_PERF_GLOBAL_CTRL" VM-exit control is 1, bits reserved in the IA32_PERF_GLOBAL_CTRL MSR must be 0 in the field for that register" Suggested-by: Jim Mattson Co-developed-by: Krish Sadhukhan Signed-off-by: Krish Sadhukhan Signed-off-by: Oliver Upton Reviewed-by: Jim Mattson Reviewed-by: Peter Shier --- arch/x86/kvm/vmx/nested.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c index c19975c57d69..f9ae7bc0a421 100644 --- a/arch/x86/kvm/vmx/nested.c +++ b/arch/x86/kvm/vmx/nested.c @@ -2665,6 +2665,11 @@ static int nested_vmx_check_host_state(struct kvm_vcpu *vcpu, CC(!kvm_pat_valid(vmcs12->host_ia32_pat))) return -EINVAL; + if ((vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL) && + CC(!kvm_valid_perf_global_ctrl(vcpu_to_pmu(vcpu), + vmcs12->host_ia32_perf_global_ctrl))) + return -EINVAL; + #ifdef CONFIG_X86_64 ia32e = !!(vcpu->arch.efer & EFER_LMA); #else From patchwork Thu Nov 14 00:17:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 11242901 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DA74514E5 for ; Thu, 14 Nov 2019 00:17:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 75C80206F2 for ; Thu, 14 Nov 2019 00:17:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="grLiIb+M" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726969AbfKNARm (ORCPT ); Wed, 13 Nov 2019 19:17:42 -0500 Received: from mail-pf1-f202.google.com ([209.85.210.202]:48850 "EHLO mail-pf1-f202.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726949AbfKNARl (ORCPT ); Wed, 13 Nov 2019 19:17:41 -0500 Received: by mail-pf1-f202.google.com with SMTP id g186so3030968pfb.15 for ; Wed, 13 Nov 2019 16:17:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=j+sbbYAmUYfGQI9q2XqqN18XKNQPBGrU7X7l37kJkKc=; b=grLiIb+MWw2SV176nL6BzEymQNc2B3VppfpDBj31mNIJqcsQjFOzh/5H4lzlG9KFq5 IrucCn5i9iFP4LfbDofhCfNx0+wpL91CH3pvEkJqc4ks1fBRgEnI4UX8c6I9AYjPj4f7 yu1Yrs081oSpM0Ir8YE5UBnJ8kL6BFL0SE/+J+iVE1pFHpohhFTtxrk6Ks3n4ArjxeeX yWfdx6Sm9dju52zz5xw2maY+W/yh7PP7a2UqmEHOUMupNCcQEfRc/wquVQkPt2G35hq5 UufJiDpAM0GKu9AP6adJOVORVStx7HupABl9cXM1UCJPIKRyEQ5iaRgsNWmjh5e2L6/u 125w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=j+sbbYAmUYfGQI9q2XqqN18XKNQPBGrU7X7l37kJkKc=; b=Cj4JyL0r/OnRy0jx3vpnHRu0oede4dwtWCPrg++0DQ/521f/gL3/0DLwIJlBRoBlnc 0MBnL2hcDhsE9+ry9vzVfLv3TT9wCieSlaH6v/UuftlRR6Q3JuekQuhJEA+xh3mF2iuC OhPDAjUXLIL0d0MwPNW18Ok3mFZ47me1oJW1/Yrb3SzTbxKlyayx4VzqyBpDpllzX7C7 0ijrAD0NwmSKid5QAVTG9/VHRbRImdMBcuLsHHe3ZqH4LFEdsg2kCaIjOgEUgxVgeU96 7EjDlaa5FBzHnHrXcZ+s9oXUmrNxp4sSSm2g7U+8Pm3wW9SCddSnQuNOUvQYqwzbfvft qREQ== X-Gm-Message-State: APjAAAUXBqj0K0cMoDHIF34+lybSSAQcu1GYNdR5QPRCoCvyZB3BLc7Z hQw15NWL7ThV8LzwMFgtaYwfX+Kx6GyWoklsWAjnRl/ikcNpApTAa3kjK1JupE4b+FERZZ31F+B szckJ27E58Edhtsw+tuJxlkShGfLQtNrlUhTy7U0NOjgDuEqoR1TAWCednQ== X-Google-Smtp-Source: APXvYqxVVmPzt3Sv1YNKo6a3iyg/nndi2rfozTLDRLNRE6XuLn7vIZmDxwOq8qeEuTqu6CxTZgOKpx6j8Fw= X-Received: by 2002:a65:66c5:: with SMTP id c5mr7014502pgw.12.1573690660413; Wed, 13 Nov 2019 16:17:40 -0800 (PST) Date: Wed, 13 Nov 2019 16:17:18 -0800 In-Reply-To: <20191114001722.173836-1-oupton@google.com> Message-Id: <20191114001722.173836-5-oupton@google.com> Mime-Version: 1.0 References: <20191114001722.173836-1-oupton@google.com> X-Mailer: git-send-email 2.24.0.rc1.363.gb1bccd3e3d-goog Subject: [PATCH v5 4/8] KVM: nVMX: Use kvm_set_msr to load IA32_PERF_GLOBAL_CTRL on VM-Exit From: Oliver Upton To: kvm@vger.kernel.org, Paolo Bonzini , " =?utf-8?b?UmFkaW0gS3LEjW3DocWZ?= " Cc: Jim Mattson , Peter Shier , Krish Sadhukhan , Sean Christopherson , Oliver Upton Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The existing implementation for loading the IA32_PERF_GLOBAL_CTRL MSR on VM-exit was incorrect, as the next call to atomic_switch_perf_msrs() could cause this value to be overwritten. Instead, call kvm_set_msr() which will allow atomic_switch_perf_msrs() to correctly set the values. Define a macro, SET_MSR_OR_WARN(), to set the MSR with kvm_set_msr() and WARN on failure. Suggested-by: Jim Mattson Co-developed-by: Krish Sadhukhan Signed-off-by: Krish Sadhukhan Signed-off-by: Oliver Upton Reviewed-by: Jim Mattson Reviewed-by: Peter Shier --- arch/x86/kvm/vmx/nested.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c index f9ae7bc0a421..ecdc706f171b 100644 --- a/arch/x86/kvm/vmx/nested.c +++ b/arch/x86/kvm/vmx/nested.c @@ -28,6 +28,16 @@ module_param(nested_early_check, bool, S_IRUGO); failed; \ }) +#define SET_MSR_OR_WARN(vcpu, idx, data) \ +({ \ + bool failed = kvm_set_msr(vcpu, idx, data); \ + if (failed) \ + pr_warn_ratelimited( \ + "%s cannot write MSR (0x%x, 0x%llx)\n", \ + __func__, idx, data); \ + failed; \ +}) + /* * Hyper-V requires all of these, so mark them as supported even though * they are just treated the same as all-context. @@ -3867,8 +3877,8 @@ static void load_vmcs12_host_state(struct kvm_vcpu *vcpu, vcpu->arch.pat = vmcs12->host_ia32_pat; } if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL) - vmcs_write64(GUEST_IA32_PERF_GLOBAL_CTRL, - vmcs12->host_ia32_perf_global_ctrl); + SET_MSR_OR_WARN(vcpu, MSR_CORE_PERF_GLOBAL_CTRL, + vmcs12->host_ia32_perf_global_ctrl); /* Set L1 segment info according to Intel SDM 27.5.2 Loading Host Segment and Descriptor-Table Registers */ From patchwork Thu Nov 14 00:17:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 11242903 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D9F7F14E5 for ; Thu, 14 Nov 2019 00:17:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 76334206F2 for ; Thu, 14 Nov 2019 00:17:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="bKI31gmh" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726592AbfKNARo (ORCPT ); Wed, 13 Nov 2019 19:17:44 -0500 Received: from mail-pg1-f202.google.com ([209.85.215.202]:56309 "EHLO mail-pg1-f202.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726605AbfKNARn (ORCPT ); Wed, 13 Nov 2019 19:17:43 -0500 Received: by mail-pg1-f202.google.com with SMTP id a12so3109343pgl.22 for ; Wed, 13 Nov 2019 16:17:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=r9ABbPLQvpTdNAbSvMBeBdD/m/CKWVMiKZBTu76R2fE=; b=bKI31gmhlLeDbHg+DSZdU//6xaRQ1h6AzvIPJSUi6vv99EUEczBPCEmdBKA60Bu4ss xKLA/vGeoIpRKnl5LX+K1dezLRB3BxE6Zll4DpZ6Y56HgKIDYZMl0637kj8eXt6gRpmR b0KsAXbt6AbufquZjAFMExVzEez+LAGhAPwcOxkW2Hu9I++CNNY/LLAIiIRgmk3y5+c+ nPalBYaSQXp6jGlIBUvcEELzx60D7w6yY2j6n+nQotsc5OTENUw6rkbzsJh/Anua5RdB 7IZVfoJ/7UE//5hpr9vWjV1cU48OEJdTds1jpEnhTgB5lDSDR3MEWxFqWLKUEYIsqRyO cyMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=r9ABbPLQvpTdNAbSvMBeBdD/m/CKWVMiKZBTu76R2fE=; b=L+b7RkH4LZKAFtTarPNitEQYemP8q78Afm0JSN+hJUpafMtw91A3hQvNnLJa9JS/uO WyV8yVe/7q6W1PYeq+SUhsHcKLo2buAjTDNj9Li2MLRiVoU/mpVCOIwXVHvB35y3TiQ3 a/2Jt1v927rckYgX5OQfXqisNKn5yOI5jSOIIs818fIyTJpdr8XYizu8vPgWtVKYFy2+ x90ysf6N4BHlbexHmlod2HBw7TxGGELUfI5RG08bXtekhFEBfTFQjTD/9JWjB9cAuZNi 1wP4WbWV+Fi5SX/gbKxRUq4hWDBD/nIgunAvnsV5yQ94qAYBz8KGt9mElz1OTmD793f0 B9cg== X-Gm-Message-State: APjAAAUu4LwvPjDvhnWg7xjZ+yuq559FFbJQnlAEpgHS1eHCAUBvNnTT 2EO37WX+OMs5ozNZLB+AS5yKka50oJSgsmSyyoOtkIhPJ5PuEwaBZxyyl30MA45l5JiQfSy6kcr zocl9BQAF5hg8uZPexsfqofR1tSy9+APzDVypMtXQJyYwlHkmlQJvdfVnMA== X-Google-Smtp-Source: APXvYqyyMTDvv7DIkP69M3lMJr80wo/cYAicteS0zHq7eTrZfatVFTKfOl4jlify/Mk3CbCfvwbM++BAb8w= X-Received: by 2002:a65:66c5:: with SMTP id c5mr7014645pgw.12.1573690662818; Wed, 13 Nov 2019 16:17:42 -0800 (PST) Date: Wed, 13 Nov 2019 16:17:19 -0800 In-Reply-To: <20191114001722.173836-1-oupton@google.com> Message-Id: <20191114001722.173836-6-oupton@google.com> Mime-Version: 1.0 References: <20191114001722.173836-1-oupton@google.com> X-Mailer: git-send-email 2.24.0.rc1.363.gb1bccd3e3d-goog Subject: [PATCH v5 5/8] KVM: nVMX: Load GUEST_IA32_PERF_GLOBAL_CTRL MSR on VM-Entry From: Oliver Upton To: kvm@vger.kernel.org, Paolo Bonzini , " =?utf-8?b?UmFkaW0gS3LEjW3DocWZ?= " Cc: Jim Mattson , Peter Shier , Krish Sadhukhan , Sean Christopherson , Oliver Upton Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Add condition to prepare_vmcs02 which loads IA32_PERF_GLOBAL_CTRL on VM-entry if the "load IA32_PERF_GLOBAL_CTRL" bit on the VM-entry control is set. Use SET_MSR_OR_WARN() rather than directly writing to the field to avoid overwrite by atomic_switch_perf_msrs(). Suggested-by: Jim Mattson Co-developed-by: Krish Sadhukhan Signed-off-by: Krish Sadhukhan Signed-off-by: Oliver Upton Reviewed-by: Jim Mattson Reviewed-by: Peter Shier --- arch/x86/kvm/vmx/nested.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c index ecdc706f171b..64e15c6f6944 100644 --- a/arch/x86/kvm/vmx/nested.c +++ b/arch/x86/kvm/vmx/nested.c @@ -2441,6 +2441,11 @@ static int prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12, if (!enable_ept) vcpu->arch.walk_mmu->inject_page_fault = vmx_inject_page_fault_nested; + if ((vmcs12->vm_entry_controls & VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL) && + SET_MSR_OR_WARN(vcpu, MSR_CORE_PERF_GLOBAL_CTRL, + vmcs12->guest_ia32_perf_global_ctrl)) + return -EINVAL; + kvm_rsp_write(vcpu, vmcs12->guest_rsp); kvm_rip_write(vcpu, vmcs12->guest_rip); return 0; From patchwork Thu Nov 14 00:17:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 11242905 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D4F721393 for ; Thu, 14 Nov 2019 00:17:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6FB2A206EC for ; Thu, 14 Nov 2019 00:17:47 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="Hv1l8biw" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727032AbfKNARq (ORCPT ); Wed, 13 Nov 2019 19:17:46 -0500 Received: from mail-pg1-f202.google.com ([209.85.215.202]:41252 "EHLO mail-pg1-f202.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727001AbfKNARp (ORCPT ); Wed, 13 Nov 2019 19:17:45 -0500 Received: by mail-pg1-f202.google.com with SMTP id e6so3141398pgc.8 for ; Wed, 13 Nov 2019 16:17:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=zesQxPiIvkAtnrmp9oG7z8sqiluhfRLnvHi8XcnkD4Q=; b=Hv1l8biwHccbTHqpCRNtUhFEp4Uhhc4aGSZq0c0q/q7iD1J/PAFcCIl9lJSWUrwRAz Zu3Kl01wp4mKRbLkQohsf73XFCkP/6rOFp/lFPzkj3rHQpi583Rn6dm0K9AJsgxCW7t8 Bxh5x9VbVrQa8uNhdwujG/QPKpb8YjQnVDfkUVYnvPGuPwK3+/hYj+YQZ9e/awkPvgPi +T90Mih21rY8mNNfLYwpfKN3ZUuBwB0q4KFn/pCRyuMfcQ6mbfSSVTxcaCk/huAzXKEJ k3Icut3Zi25RQwwygK8/43ux1cAycIosUq2kB0oguTXFzNS56mLvG/msbWNtyZCZdBjJ Wgyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=zesQxPiIvkAtnrmp9oG7z8sqiluhfRLnvHi8XcnkD4Q=; b=RZyOYnvG6AYEJev81NONLrGrZ64vO7ds+QjZR7tiPF5vAmvyarZw/ESZEXzNX/aYqX 19FiV207cP44HeYFJGdS7jIxyHz0ANj5L/ZrUVqpHu4fDre/fRxsVl+jEUgWZPkCoFYj LYTmT2XjNC0q5V71uM7U5onITojN0dPQL0Lwjdz8LGIjo08v/qH3FMXV4ffUMlCeOXhZ LhVCH3pY+bz55FEeb7U17p480Zm02bwVFqcF7Uir5Sx2z/u4GnrUBUfdjmpH4hO0E/Ig 3V5+5EVRQ94v54cmyzhgmB+e+0YBpqZjn1ReMfLqM0UXoGNrq8gXUHAe5g3mqXSd0Exj l7iQ== X-Gm-Message-State: APjAAAXYOEb/67A5x3e0oghWsOUdWeIB+q+S9LdFN6o8JT0mIts6HttE jWazzNCmpb3h+EFcwz+ED4sKij1dVo/IQyBo7ENmMGlehyukiaxcXTx4oER+bfQJTN/1+HOuPlc R/1KXRfBKZtaVRespdfVqiWvoMJF3eW5BwVet+/oIhjPSwKz+Nza7+xXn+w== X-Google-Smtp-Source: APXvYqwf/Z3Y1DBQUqLFRy5d2N3nIi8cUfY1a4zGPnpefN/nZ/BiP6RS1a1Ss+4+ps2ULvo6p7rx7P+eHuo= X-Received: by 2002:a65:68d7:: with SMTP id k23mr6723623pgt.157.1573690665032; Wed, 13 Nov 2019 16:17:45 -0800 (PST) Date: Wed, 13 Nov 2019 16:17:20 -0800 In-Reply-To: <20191114001722.173836-1-oupton@google.com> Message-Id: <20191114001722.173836-7-oupton@google.com> Mime-Version: 1.0 References: <20191114001722.173836-1-oupton@google.com> X-Mailer: git-send-email 2.24.0.rc1.363.gb1bccd3e3d-goog Subject: [PATCH v5 6/8] KVM: nVMX: Expose load IA32_PERF_GLOBAL_CTRL VM-{Entry,Exit} control From: Oliver Upton To: kvm@vger.kernel.org, Paolo Bonzini , " =?utf-8?b?UmFkaW0gS3LEjW3DocWZ?= " Cc: Jim Mattson , Peter Shier , Krish Sadhukhan , Sean Christopherson , Oliver Upton Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The "load IA32_PERF_GLOBAL_CTRL" bit for VM-entry and VM-exit should only be exposed to the guest if IA32_PERF_GLOBAL_CTRL is a valid MSR. Create a new helper to allow pmu_refresh() to update the VM-Entry and VM-Exit controls to ensure PMU values are initialized when performing the is_valid_msr() check. Suggested-by: Jim Mattson Co-developed-by: Krish Sadhukhan Signed-off-by: Krish Sadhukhan Signed-off-by: Oliver Upton Reviewed-by: Jim Mattson Reviewed-by: Peter Shier --- arch/x86/kvm/vmx/nested.c | 21 +++++++++++++++++++++ arch/x86/kvm/vmx/nested.h | 1 + arch/x86/kvm/vmx/pmu_intel.c | 3 +++ 3 files changed, 25 insertions(+) diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c index 64e15c6f6944..cc5297d3310f 100644 --- a/arch/x86/kvm/vmx/nested.c +++ b/arch/x86/kvm/vmx/nested.c @@ -4345,6 +4345,27 @@ int get_vmx_mem_address(struct kvm_vcpu *vcpu, unsigned long exit_qualification, return 0; } +void nested_vmx_pmu_entry_exit_ctls_update(struct kvm_vcpu *vcpu) +{ + struct vcpu_vmx *vmx; + + if (!nested_vmx_allowed(vcpu)) + return; + + vmx = to_vmx(vcpu); + if (kvm_x86_ops->pmu_ops->is_valid_msr(vcpu, MSR_CORE_PERF_GLOBAL_CTRL)) { + vmx->nested.msrs.entry_ctls_high |= + VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL; + vmx->nested.msrs.exit_ctls_high |= + VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL; + } else { + vmx->nested.msrs.entry_ctls_high &= + ~VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL; + vmx->nested.msrs.exit_ctls_high &= + ~VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL; + } +} + static int nested_vmx_get_vmptr(struct kvm_vcpu *vcpu, gpa_t *vmpointer) { gva_t gva; diff --git a/arch/x86/kvm/vmx/nested.h b/arch/x86/kvm/vmx/nested.h index 187d39bf0bf1..440bc08e0a2f 100644 --- a/arch/x86/kvm/vmx/nested.h +++ b/arch/x86/kvm/vmx/nested.h @@ -22,6 +22,7 @@ int vmx_set_vmx_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); int vmx_get_vmx_msr(struct nested_vmx_msrs *msrs, u32 msr_index, u64 *pdata); int get_vmx_mem_address(struct kvm_vcpu *vcpu, unsigned long exit_qualification, u32 vmx_instruction_info, bool wr, int len, gva_t *ret); +void nested_vmx_pmu_entry_exit_ctls_update(struct kvm_vcpu *vcpu); static inline struct vmcs12 *get_vmcs12(struct kvm_vcpu *vcpu) { diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index 8cd2cc2fe986..b7b2fcdf97ff 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -15,6 +15,7 @@ #include "x86.h" #include "cpuid.h" #include "lapic.h" +#include "nested.h" #include "pmu.h" static struct kvm_event_hw_type_mapping intel_arch_events[] = { @@ -317,6 +318,8 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) (boot_cpu_has(X86_FEATURE_HLE) || boot_cpu_has(X86_FEATURE_RTM)) && (entry->ebx & (X86_FEATURE_HLE|X86_FEATURE_RTM))) pmu->reserved_bits ^= HSW_IN_TX|HSW_IN_TX_CHECKPOINTED; + + nested_vmx_pmu_entry_exit_ctls_update(vcpu); } static void intel_pmu_init(struct kvm_vcpu *vcpu) From patchwork Thu Nov 14 00:17:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 11242907 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 32BB814E5 for ; Thu, 14 Nov 2019 00:17:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C2AF8206EC for ; Thu, 14 Nov 2019 00:17:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="F6iMFFH0" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726590AbfKNARs (ORCPT ); Wed, 13 Nov 2019 19:17:48 -0500 Received: from mail-pg1-f202.google.com ([209.85.215.202]:43427 "EHLO mail-pg1-f202.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726988AbfKNARs (ORCPT ); Wed, 13 Nov 2019 19:17:48 -0500 Received: by mail-pg1-f202.google.com with SMTP id k7so3133207pgq.10 for ; Wed, 13 Nov 2019 16:17:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=8J/MPbbyVLx+eRo/IQtIwrRQH9YlY/Av6MONKgQvwHs=; b=F6iMFFH0RwNb51PBITF0M94+XRB55GnbElZ53B7LT96UnY0Sp2v9XpBIMAWk7SBmsy vlSVyqNOil9RuBLF1I4p5fyp5e6UvnpAeSyfvPlwy8Nr6XTnzMExHfNph7XXRnJBSFEd wLJaStgpdEYzefukpsjGECI6dPSdmpUsP91tWFLWUUzMZb3/+aVM88x8WBvWa1kq+3mu duI1BAYuXxBVU1ISxRatVkR10Bd5WpqBYnYWh6FRdtZUMEtNlu9Wq8r8fKv0aCXowRcO puaFQ05pgjXOXQfXIGIZJwR3pJCxk6j5YgNoODG5w7rD+yxQkoPd7Zet5nsIyLb3Ul7E FuZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=8J/MPbbyVLx+eRo/IQtIwrRQH9YlY/Av6MONKgQvwHs=; b=FUpbYPRSaDDYljU7El+GE4UuyCiSmMzDOg5v0v2dbf4mmqNp/AZtV8KWj8Jf/PZiY5 9NTm6dqbjP9YRgwKUzywDLmm1U5pzRJI6eX7xZFs45eU9w+cXb1mb1st63b18wCb+oyl oiukHPyf6QO+d/uWMePhWIQbRDJqJTWPnWZF4j7rvaX7c46CLP47CVa63e8wrqt+x5vM 2lBrvfRBQ2l2dzvRfC/e76ImIWaifpxHP7lvAOtrifoTRFh0LqBPZTKeNh5h0FasdB7i 3d6ka6meP0Upv4Kez7m69WgtGF9IyLTX9jWZY40KRWEjY4ypIiF56V+pxqrcst33THsv hI4Q== X-Gm-Message-State: APjAAAUCCk+2FYnApZTWyw9O7VDvpwRTNaBUY8u59AQQS9+072HPly5U sHTa93zz4/Lqa3pS1iZsHwIq/tPDCtYwjbgvNBrqbz0A3HGt2tzbCN+Kadq8hOZ/0zfrdpuVRG+ 1wZd0mMGEk1Ezk930hnlRyRp4JTchdZZvnpRWtHvDkgt9dj2jPXgyjzvowg== X-Google-Smtp-Source: APXvYqwfBORSEE39TFTfpLW+BWwuWNudEqSNY41I0PVPSMm9KyIkVnLo8eiwq9V09O7AM+hfT+/JzOT9Gaw= X-Received: by 2002:a63:7887:: with SMTP id t129mr5450835pgc.144.1573690667195; Wed, 13 Nov 2019 16:17:47 -0800 (PST) Date: Wed, 13 Nov 2019 16:17:21 -0800 In-Reply-To: <20191114001722.173836-1-oupton@google.com> Message-Id: <20191114001722.173836-8-oupton@google.com> Mime-Version: 1.0 References: <20191114001722.173836-1-oupton@google.com> X-Mailer: git-send-email 2.24.0.rc1.363.gb1bccd3e3d-goog Subject: [kvm-unit-tests PATCH v5 7/8] x86: VMX: Make guest_state_test_main() check state from nested VM From: Oliver Upton To: kvm@vger.kernel.org, Paolo Bonzini , " =?utf-8?b?UmFkaW0gS3LEjW3DocWZ?= " Cc: Jim Mattson , Peter Shier , Krish Sadhukhan , Sean Christopherson , Oliver Upton Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Introduce the vmx_state_area_test_data struct for sharing test expectation data with the nested VM. Signed-off-by: Oliver Upton Reviewed-by: Krish Sadhukhan --- x86/vmx_tests.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c index 1d8932fad12b..95c1c01d2966 100644 --- a/x86/vmx_tests.c +++ b/x86/vmx_tests.c @@ -5023,13 +5023,28 @@ static void test_entry_msr_load(void) test_vmx_valid_controls(); } +static struct vmx_state_area_test_data { + u32 msr; + u64 exp; + bool enabled; +} vmx_state_area_test_data; + static void guest_state_test_main(void) { + u64 obs; + struct vmx_state_area_test_data *data = &vmx_state_area_test_data; + while (1) { - if (vmx_get_test_stage() != 2) - vmcall(); - else + if (vmx_get_test_stage() == 2) break; + + if (data->enabled) { + obs = rdmsr(data->msr); + report("Guest state is 0x%lx (expected 0x%lx)", + data->exp == obs, obs, data->exp); + } + + vmcall(); } asm volatile("fnop"); From patchwork Thu Nov 14 00:17:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 11242909 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B986D14E5 for ; Thu, 14 Nov 2019 00:17:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4BDB2206EC for ; Thu, 14 Nov 2019 00:17:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="sAjH4Y5g" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727004AbfKNARv (ORCPT ); Wed, 13 Nov 2019 19:17:51 -0500 Received: from mail-pf1-f202.google.com ([209.85.210.202]:37245 "EHLO mail-pf1-f202.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727053AbfKNARu (ORCPT ); Wed, 13 Nov 2019 19:17:50 -0500 Received: by mail-pf1-f202.google.com with SMTP id z21so3056975pfr.4 for ; Wed, 13 Nov 2019 16:17:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=nylFVGJM1JJqusN0N1wcSxuBrkk2n/VpoC80tEizbbo=; b=sAjH4Y5gL2mt6UMK2kf5yARh8OTj5UIfaYWHbTd9M5V4JMqgos42Tg/DCMW06kLp9g vupSKG5WCyJlJCp0RU61KHKYBDvaM8OmeaRAVeJCxpMKGdBhIC4YTniSejOQMO6M89y9 WGywFklM0W5pvn54p7QQeaIwHfvW4w+vCL9oTRjKclO4RJ2M+2HSvd+2GbmdWC8CGuqq 5HMzsLdfPaJf9sduu8gIsW2Tw9sn4gDW9R/qnrXArtfybsbpFFbm8nB4cgAPhtdfpbbf 2R6RN2jOFyAuyf5i/uUBrnD8sTYyyV7TiHEvJc1x6vZQxZmGLACMX3gxw4S2TsW+TCGe A0hA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=nylFVGJM1JJqusN0N1wcSxuBrkk2n/VpoC80tEizbbo=; b=RggbJQSJuSen1dh8w0KyVh+LDJRA4H2j5hHMh4S0DpV8fLDi4+36Icwsrlx7Cz5leM fJh96rWkNUwFSLTXPJRXz/x0dTzu9OfA4prOi0nJXmeyvhAxmMCJzIuccf/YsSuz5TUf Ocr9inz/w5JsXP+m54Dmiu1CMIMw4hBAXp1eFvYaohYTv93yW4C4S4Te+xWpjqBez6xu AKd4s1u4gBHbJSxgj7uAttpvz8gNtowIFKqmryQ2Y+KNzgUuQPaP5bfAUYyozt0xjvOq 3edm3+HgRIAoXUs7yYbhBofrqD6J7Nm0TN7s8nnhtapp/ZXwtcIALZ6NQA347VjuH89c knHw== X-Gm-Message-State: APjAAAVsIRo36/mCLC+57SEIMA6rv0sJzUSZCrDYB7yvRBAz0afWDYQx RFXWMNKXSxlGeKWCs1WJXuUIHanWR9/PET5XjCLDLazECH/1nQWbZKb8p7B0/U5n4wTpwqShJm9 yT/wO/4l2KUTn9VigLho5aONN+OsWkgfB+sRdpeY5Fb4zoJKbdk5TkWQQoA== X-Google-Smtp-Source: APXvYqx58cV1ipuSvVsP9sH39FzPYPrlpcsiTIbWcguNaTZ7WlUYpMfUeD+KnalrUNa7g3K2KuMYo4u/SfY= X-Received: by 2002:a63:555b:: with SMTP id f27mr6792946pgm.66.1573690669314; Wed, 13 Nov 2019 16:17:49 -0800 (PST) Date: Wed, 13 Nov 2019 16:17:22 -0800 In-Reply-To: <20191114001722.173836-1-oupton@google.com> Message-Id: <20191114001722.173836-9-oupton@google.com> Mime-Version: 1.0 References: <20191114001722.173836-1-oupton@google.com> X-Mailer: git-send-email 2.24.0.rc1.363.gb1bccd3e3d-goog Subject: [kvm-unit-tests PATCH v5 8/8] x86: VMX: Add tests for nested "load IA32_PERF_GLOBAL_CTRL" From: Oliver Upton To: kvm@vger.kernel.org, Paolo Bonzini , " =?utf-8?b?UmFkaW0gS3LEjW3DocWZ?= " Cc: Jim Mattson , Peter Shier , Krish Sadhukhan , Sean Christopherson , Oliver Upton Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Tests to verify that KVM performs the correct checks on Host/Guest state at VM-entry, as described in SDM 26.3.1.1 "Checks on Guest Control Registers, Debug Registers, and MSRs" and SDM 26.2.2 "Checks on Host Control Registers and MSRs". Test that KVM does the following: If the "load IA32_PERF_GLOBAL_CTRL" VM-entry control is 1, the reserved bits of the IA32_PERF_GLOBAL_CTRL MSR must be 0 in the GUEST_IA32_PERF_GLOBAL_CTRL VMCS field. Otherwise, the VM-entry should fail with an exit reason of "VM-entry failure due to invalid guest state" (33). On a successful VM-entry, the correct value should be observed when the nested VM performs an RDMSR on IA32_PERF_GLOBAL_CTRL. If the "load IA32_PERF_GLOBAL_CTRL" VM-exit control is 1, the reserved bits of the IA32_PERF_GLOBAL_CTRL MSR must be 0 in the HOST_IA32_PERF_GLOBAL_CTRL VMCS field. Otherwise, the VM-entry should fail with a VM-instruction error of "VM entry with invalid host-state field(s)" (8). On a successful VM-exit, the correct value should be observed when L1 performs an RDMSR on IA32_PERF_GLOBAL_CTRL. Suggested-by: Jim Mattson Co-developed-by: Krish Sadhukhan Signed-off-by: Krish Sadhukhan Signed-off-by: Oliver Upton Reviewed-by: Krish Sadhukhan --- x86/vmx_tests.c | 160 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 160 insertions(+) diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c index 95c1c01d2966..0d5e463f9887 100644 --- a/x86/vmx_tests.c +++ b/x86/vmx_tests.c @@ -7032,6 +7032,164 @@ static void test_load_host_pat(void) test_pat(HOST_PAT, "HOST_PAT", EXI_CONTROLS, EXI_LOAD_PAT); } +union cpuidA_eax { + struct { + unsigned int version_id:8; + unsigned int num_counters_gp:8; + unsigned int bit_width:8; + unsigned int mask_length:8; + } split; + unsigned int full; +}; + +union cpuidA_edx { + struct { + unsigned int num_counters_fixed:5; + unsigned int bit_width_fixed:8; + unsigned int reserved:9; + } split; + unsigned int full; +}; + +static bool valid_pgc(u64 val) +{ + struct cpuid id; + union cpuidA_eax eax; + union cpuidA_edx edx; + u64 mask; + + id = cpuid(0xA); + eax.full = id.a; + edx.full = id.d; + mask = ~(((1ull << eax.split.num_counters_gp) - 1) | + (((1ull << edx.split.num_counters_fixed) - 1) << 32)); + + return !(val & mask); +} + +static void test_pgc_vmlaunch(u32 xerror, u32 xreason, bool xfail, bool host) +{ + u32 inst_err; + u64 obs; + bool success; + struct vmx_state_area_test_data *data = &vmx_state_area_test_data; + + if (host) { + success = vmlaunch_succeeds(); + obs = rdmsr(data->msr); + if (!success) { + inst_err = vmcs_read(VMX_INST_ERROR); + report("vmlaunch failed, VMX Inst Error is %d (expected %d)", + xerror == inst_err, inst_err, xerror); + } else { + report("Host state is 0x%lx (expected 0x%lx)", + !data->enabled || data->exp == obs, obs, data->exp); + report("vmlaunch succeeded", success != xfail); + } + } else { + if (xfail) { + enter_guest_with_invalid_guest_state(); + } else { + enter_guest(); + } + report_guest_state_test("load GUEST_PERF_GLOBAL_CTRL", + xreason, GUEST_PERF_GLOBAL_CTRL, + "GUEST_PERF_GLOBAL_CTRL"); + } +} + +/* + * test_load_perf_global_ctrl is a generic function for testing the + * "load IA32_PERF_GLOBAL_CTRL" VM-{Entry,Exit} controls. This test function + * tests the provided ctrl_val when disabled and enabled. + * + * @nr: VMCS field number corresponding to the host/guest state field + * @name: Name of the above VMCS field for printing in test report + * @ctrl_nr: VMCS field number corresponding to the VM-{Entry,Exit} control + * @ctrl_val: Bit to set on the ctrl_field + */ +static void test_perf_global_ctrl(u32 nr, const char *name, u32 ctrl_nr, + const char *ctrl_name, u64 ctrl_val) +{ + u64 ctrl_saved = vmcs_read(ctrl_nr); + u64 pgc_saved = vmcs_read(nr); + u64 i, val; + bool host = nr == HOST_PERF_GLOBAL_CTRL; + struct vmx_state_area_test_data *data = &vmx_state_area_test_data; + + data->msr = MSR_CORE_PERF_GLOBAL_CTRL; + msr_bmp_init(); + vmcs_write(ctrl_nr, ctrl_saved & ~ctrl_val); + data->enabled = false; + report_prefix_pushf("\"load IA32_PERF_GLOBAL_CTRL\"=0 on %s", + ctrl_name); + + for (i = 0; i < 64; i++) { + val = 1ull << i; + vmcs_write(nr, val); + report_prefix_pushf("%s = 0x%lx", name, val); + test_pgc_vmlaunch(0, VMX_VMCALL, false, host); + report_prefix_pop(); + } + report_prefix_pop(); + + vmcs_write(ctrl_nr, ctrl_saved | ctrl_val); + data->enabled = true; + report_prefix_pushf("\"load IA32_PERF_GLOBAL_CTRL\"=1 on %s", + ctrl_name); + for (i = 0; i < 64; i++) { + val = 1ull << i; + data->exp = val; + vmcs_write(nr, val); + report_prefix_pushf("%s = 0x%lx", name, val); + if (valid_pgc(val)) { + test_pgc_vmlaunch(0, VMX_VMCALL, false, host); + } else { + if (host) + test_pgc_vmlaunch( + VMXERR_ENTRY_INVALID_HOST_STATE_FIELD, + 0, + true, + host); + else + test_pgc_vmlaunch( + 0, + VMX_ENTRY_FAILURE | VMX_FAIL_STATE, + true, + host); + } + report_prefix_pop(); + } + + report_prefix_pop(); + vmcs_write(ctrl_nr, ctrl_saved); + vmcs_write(nr, pgc_saved); +} + +static void test_load_host_perf_global_ctrl(void) +{ + if (!(ctrl_exit_rev.clr & EXI_LOAD_PERF)) { + printf("\"load IA32_PERF_GLOBAL_CTRL\" exit control not supported\n"); + return; + } + + test_perf_global_ctrl(HOST_PERF_GLOBAL_CTRL, "HOST_PERF_GLOBAL_CTRL", + EXI_CONTROLS, "EXI_CONTROLS", EXI_LOAD_PERF); +} + + +static void test_load_guest_perf_global_ctrl(void) +{ + if (!(ctrl_enter_rev.clr & ENT_LOAD_PERF)) { + printf("\"load IA32_PERF_GLOBAL_CTRL\" entry control not supported\n"); + return; + } + + test_perf_global_ctrl(GUEST_PERF_GLOBAL_CTRL, "GUEST_PERF_GLOBAL_CTRL", + ENT_CONTROLS, "ENT_CONTROLS", ENT_LOAD_PERF); +} + + /* * test_vmcs_field - test a value for the given VMCS field * @field: VMCS field @@ -7261,6 +7419,7 @@ static void vmx_host_state_area_test(void) test_host_segment_regs(); test_host_desc_tables(); test_host_addr_size(); + test_load_host_perf_global_ctrl(); } /* @@ -7296,6 +7455,7 @@ static void vmx_guest_state_area_test(void) test_load_guest_pat(); test_guest_efer(); + test_load_guest_perf_global_ctrl(); /* * Let the guest finish execution