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Fri, 15 Nov 2019 07:23:56 +0100 Received: from vleu-orange.cadence.com (10.160.88.83) by maileu3.global.cadence.com (10.160.88.99) with Microsoft SMTP Server (TLS) id 15.0.1367.3 via Frontend Transport; Fri, 15 Nov 2019 07:23:56 +0100 Received: from vleu-orange.cadence.com (localhost.localdomain [127.0.0.1]) by vleu-orange.cadence.com (8.14.4/8.14.4) with ESMTP id xAF6NuVt018512; Fri, 15 Nov 2019 07:23:56 +0100 Received: (from pgaj@localhost) by vleu-orange.cadence.com (8.14.4/8.14.4/Submit) id xAF6NtKc018491; Fri, 15 Nov 2019 07:23:55 +0100 From: Przemyslaw Gaj To: Subject: [PATCH v2] i3c: master: cdns: add data hold delay support Date: Fri, 15 Nov 2019 07:23:26 +0100 Message-ID: <20191115062326.16476-1-pgaj@cadence.com> X-Mailer: git-send-email 2.14.0 MIME-Version: 1.0 X-OrganizationHeadersPreserved: maileu3.global.cadence.com X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:64.207.220.243; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(4636009)(136003)(376002)(39850400004)(396003)(346002)(36092001)(189003)(199004)(4326008)(186003)(6916009)(2351001)(6666004)(107886003)(356004)(305945005)(36906005)(54906003)(42186006)(16586007)(316002)(1076003)(5660300002)(26005)(106002)(51416003)(478600001)(70206006)(47776003)(70586007)(476003)(126002)(8936002)(50466002)(86362001)(87636003)(36756003)(2906002)(2616005)(336012)(81166006)(8676002)(486006)(48376002)(426003)(81156014)(50226002); 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Ip=[64.207.220.243]; Helo=[wcmailrelayl01.cadence.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN7PR07MB4147 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,18.0.572 definitions=2019-11-14_07:2019-11-14,2019-11-14 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 lowpriorityscore=0 clxscore=1015 suspectscore=1 malwarescore=0 bulkscore=0 impostorscore=0 priorityscore=1501 spamscore=0 mlxlogscore=966 mlxscore=0 adultscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1910280000 definitions=main-1911150056 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191114_222745_574840_354345B8 X-CRM114-Status: GOOD ( 15.67 ) X-Spam-Score: -0.9 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low trust [208.86.201.193 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-i3c@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux I3C List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-i3c@lists.infradead.org, agolec@cadence.com, Przemyslaw Gaj , rafalc@cadence.com, vitor.soares@synopsys.com Sender: "linux-i3c" Errors-To: linux-i3c-bounces+linux-i3c=patchwork.kernel.org@lists.infradead.org This patch adds support for THD_DEL (Data Hold Delay) to Cadence I3C master constoller driver. As per MIPI I3C Specification 1.0, Table 75 (page 142) defines non-zero minimal tHD_PP timing on master output (Fig 65). This setting allows to meet this timing on master's soc outputs, regardless of PCB balancing. Signed-off-by: Przemyslaw Gaj --- Main changes between v1 and v2: - Add device-specific data which holds the thd_del value - Remove device tree property --- drivers/i3c/master/i3c-master-cdns.c | 37 +++++++++++++++++++++++++++++++----- 1 file changed, 32 insertions(+), 5 deletions(-) diff --git a/drivers/i3c/master/i3c-master-cdns.c b/drivers/i3c/master/i3c-master-cdns.c index 10db0bf0655a..3531396f04fd 100644 --- a/drivers/i3c/master/i3c-master-cdns.c +++ b/drivers/i3c/master/i3c-master-cdns.c @@ -22,6 +22,7 @@ #include #include #include +#include #define DEV_ID 0x0 #define DEV_ID_I3C_MASTER 0x5034 @@ -60,6 +61,7 @@ #define CTRL_HALT_EN BIT(30) #define CTRL_MCS BIT(29) #define CTRL_MCS_EN BIT(28) +#define CTRL_THD_DEL(x) (((x) << 24) & GENMASK(25, 24)) #define CTRL_HJ_DISEC BIT(8) #define CTRL_MST_ACK BIT(7) #define CTRL_HJ_ACK BIT(6) @@ -388,6 +390,10 @@ struct cdns_i3c_xfer { struct cdns_i3c_cmd cmds[0]; }; +struct cdns_i3c_data { + u8 thd_del; +}; + struct cdns_i3c_master { struct work_struct hj_work; struct i3c_master_controller base; @@ -408,6 +414,7 @@ struct cdns_i3c_master { struct clk *pclk; struct cdns_i3c_master_caps caps; unsigned long i3c_scl_lim; + const struct cdns_i3c_data *devdata; }; static inline struct cdns_i3c_master * @@ -1264,6 +1271,15 @@ static int cdns_i3c_master_bus_init(struct i3c_master_controller *m) * We will issue ENTDAA afterwards from the threaded IRQ handler. */ ctrl |= CTRL_HJ_ACK | CTRL_HJ_DISEC | CTRL_HALT_EN | CTRL_MCS_EN; + + /* + * Configure data hold delay based on device-specific data. + * + * MIPI I3C Specification 1.0 defines non-zero minimal tHD_PP timing on + * master output. This setting allows to meet this timing on master's + * SoC outputs, regardless of PCB balancing. + */ + ctrl |= CTRL_THD_DEL(master->devdata->thd_del); writel(ctrl, master->regs + CTRL); cdns_i3c_master_enable(master); @@ -1521,17 +1537,33 @@ static void cdns_i3c_master_hj(struct work_struct *work) i3c_master_do_daa(&master->base); } +static struct cdns_i3c_data cdns_i3c_devdata = { + .thd_del = 0x3, +}; + +static const struct of_device_id cdns_i3c_master_of_ids[] = { + { .compatible = "cdns,i3c-master", .data = &cdns_i3c_devdata }, + { /* sentinel */ }, +}; + static int cdns_i3c_master_probe(struct platform_device *pdev) { struct cdns_i3c_master *master; + const struct of_device_id *of_id = of_match_device( + of_match_ptr(cdns_i3c_master_of_ids), &pdev->dev); struct resource *res; int ret, irq; u32 val; + if (!of_id) + return -ENODEV; + master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL); if (!master) return -ENOMEM; + master->devdata = of_id->data; + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); master->regs = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(master->regs)) @@ -1631,11 +1663,6 @@ static int cdns_i3c_master_remove(struct platform_device *pdev) return 0; } -static const struct of_device_id cdns_i3c_master_of_ids[] = { - { .compatible = "cdns,i3c-master" }, - { /* sentinel */ }, -}; - static struct platform_driver cdns_i3c_master = { .probe = cdns_i3c_master_probe, .remove = cdns_i3c_master_remove,