From patchwork Thu Nov 21 00:08:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Beata Michalska X-Patchwork-Id: 11255019 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 778186C1 for ; Thu, 21 Nov 2019 00:10:47 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4D61820878 for ; Thu, 21 Nov 2019 00:10:47 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="vnfxoDEL" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4D61820878 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:35292 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iXa3a-0001vU-9u for patchwork-qemu-devel@patchwork.kernel.org; Wed, 20 Nov 2019 19:10:46 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:56864) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iXa2G-0008Kq-D3 for qemu-devel@nongnu.org; Wed, 20 Nov 2019 19:09:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iXa2E-0005iV-DO for qemu-devel@nongnu.org; Wed, 20 Nov 2019 19:09:24 -0500 Received: from mail-oi1-x244.google.com ([2607:f8b0:4864:20::244]:42285) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iXa2C-0005hn-FX for qemu-devel@nongnu.org; Wed, 20 Nov 2019 19:09:22 -0500 Received: by mail-oi1-x244.google.com with SMTP id o12so1517373oic.9 for ; Wed, 20 Nov 2019 16:09:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RzXz801WN8Wx2siaVGOD6DywcY9lAErvVsKc+KJI/kM=; b=vnfxoDELTvt6Rj+4jtN22TJcn899OQga2bZHWcpp8GwkPO0dWivtlxz2UIogyVyEhW 6J33yNUhPj2foQbzst0gAmfepIObCDuTHtC6pM7xkOgSscB//EohEuPJgGKaL3BjuKLp C35g8Cx8QIOg90YO4gzskSGGprNRDJEuH2X8vpKKehWvRxYX84Xu7uMUmthcXvV2Qtmv 60FgnvkJC7OInqDzlRqefSRMUIhKLjMlegGqGaLV/aXrfuMXXJiLRYY+bp2STDA/Pd8p ANtCmFJ0bFnA54sdA6cyVTP8mVVbTvpnGFZ//7IXKOIErwkoSZHgeqKQV7nJiBcbpd7Z A3ow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RzXz801WN8Wx2siaVGOD6DywcY9lAErvVsKc+KJI/kM=; b=rJTKid1ELLyPrJVxSwBMAke0mEKbjYpXqWYE0PuQtQwhY2TsJ33LicH+yv/ezCFcyq k2qk4iL9FByHONUpQbhvdO/JcTNvtsX1QmDVhF6VkGGuCe7pgmlmIZ0E/Kbbpb1B6R49 YaXYv0AdopBPooe7etuvsbI5wIKYi4ulNsFqq8Y4oNAZ66HBu1vaqdgYzJUzeMiCR6VT dmANRmfxnDR8EIFpxbZaWNYowuJ0hN6ct6h3yCzKa27mLyXSHB4tJ74oIvRDVIRlZz5R r1idBbohaiM3MsZ6DF1Rh6oJI78LQ4m11lIcrNtlGAI6WQORlnUibP8qPcLA5NZNbIYV 31cw== X-Gm-Message-State: APjAAAUIKvwYYEtD8DWO50r5xfPkMFSoPLGVHpGXfmFRFNPohIsg7mq8 8nisY8jyA+gGfZFgivH+AGxISNngNQk+LQ== X-Google-Smtp-Source: APXvYqxxgq/skakxNDYVibmtjreM/9kF6IQUV7YmidOKqK2cN/CTVo39otn6Fbj9BkFpWEMCW9rw0w== X-Received: by 2002:aca:4fce:: with SMTP id d197mr5319084oib.142.1574294958980; Wed, 20 Nov 2019 16:09:18 -0800 (PST) Received: from moi-limbo-9350.arm.com (host86-181-127-240.range86-181.btcentralplus.com. [86.181.127.240]) by smtp.gmail.com with ESMTPSA id z17sm351439otk.40.2019.11.20.16.09.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Nov 2019 16:09:18 -0800 (PST) From: Beata Michalska To: qemu-devel@nongnu.org Subject: [PATCH v3 1/4] tcg: cputlb: Add probe_read Date: Thu, 21 Nov 2019 00:08:40 +0000 Message-Id: <20191121000843.24844-2-beata.michalska@linaro.org> In-Reply-To: <20191121000843.24844-1-beata.michalska@linaro.org> References: <20191121000843.24844-1-beata.michalska@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::244 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, quintela@redhat.com, richard.henderson@linaro.org, dgilbert@redhat.com, shameerali.kolothum.thodi@huawei.com, eric.auger@redhat.com, qemu-arm@nongnu.org, pbonzini@redhat.com, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Add probe_read alongside the write probing equivalent. Signed-off-by: Beata Michalska Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson --- include/exec/exec-all.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index d85e610..350c4b4 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -339,6 +339,12 @@ static inline void *probe_write(CPUArchState *env, target_ulong addr, int size, return probe_access(env, addr, size, MMU_DATA_STORE, mmu_idx, retaddr); } +static inline void *probe_read(CPUArchState *env, target_ulong addr, int size, + int mmu_idx, uintptr_t retaddr) +{ + return probe_access(env, addr, size, MMU_DATA_LOAD, mmu_idx, retaddr); +} + #define CODE_GEN_ALIGN 16 /* must be >= of the size of a icache line */ /* Estimated block size for TB allocation. */ From patchwork Thu Nov 21 00:08:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Beata Michalska X-Patchwork-Id: 11255021 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 055596C1 for ; Thu, 21 Nov 2019 00:11:13 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CDA82208A1 for ; Thu, 21 Nov 2019 00:11:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="grzm5RiA" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CDA82208A1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:35296 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iXa3z-0002BJ-Sl for patchwork-qemu-devel@patchwork.kernel.org; Wed, 20 Nov 2019 19:11:11 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:56904) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iXa2N-0008Q8-2Q for qemu-devel@nongnu.org; Wed, 20 Nov 2019 19:09:32 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iXa2K-0005kO-JO for qemu-devel@nongnu.org; Wed, 20 Nov 2019 19:09:30 -0500 Received: from mail-oi1-x242.google.com ([2607:f8b0:4864:20::242]:40268) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iXa2K-0005k8-F3 for qemu-devel@nongnu.org; Wed, 20 Nov 2019 19:09:28 -0500 Received: by mail-oi1-x242.google.com with SMTP id d22so1538515oic.7 for ; Wed, 20 Nov 2019 16:09:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=UyIEBMa6z9micWDikfTpKjg+QEwcylKwntebI6UKvLE=; b=grzm5RiApYJFWFKJHH7UXMZZ96U+atMUoaAx5W9pW3lppJAzHKtmdmuJpgZ/1aS3Gg /N3/Gpa0Wb+pg0w0rkWvZI8mpaJy0xlsw4gtpw8kZYUN0zPvN0jDXTMMKBNwblt5Il3m Mz0xSGL8GdWOZeG8/rd4uKbQ7EJEgZPq2qK7GsLw7W4uLX7AZfc3WoIFC8mYPWHNgE61 NwPtTX2xQDN2qqaGnLeXUVLVYcH6pTc/ZQiiST04emWE/KbkQ0TazrkrzhfnrfrCfc96 kaIiP3dg30osWS4N+deXydCCZVQwF/4FyIidtjT9b3e0wMA3SJgc2XwmuC8qNgB7bbSb I0pA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=UyIEBMa6z9micWDikfTpKjg+QEwcylKwntebI6UKvLE=; b=dDH554YRox1TdxG1NdRRmCzkj7pnGIK9NnThJB4CCBgcKbiKudubG1ObE6w11QwhDW RKVTPZ5QwQzDX01g3f3vyjhxHIDfTUq//K7oz1TIQgsY73ay/tIQ6W6D8wVBYCxM1e1v VQDFWX6bHDWlGLhM+kO8LPaXnh0V1rHf4/RojzN2JY5M/eEKkyTqG29lxLmvzTF8R4R5 fRRvn8v1eLZkGn2s4bND/hXMRJEJ7S8Qz6OMSgFb8TbdF0+KjqE2gcE9tRJlrzoQerEa 5oWcLbG2zAYIsj5bEIRanpkbvUfEE32o/pBwqj6c0PyNjZ0L8tKqKBa8gnPnREk2Av/E IXyQ== X-Gm-Message-State: APjAAAVLkFyxzdzRO4THrngHPD3KezVh+l0R8EvTQ2J2zcmAmlpSVDUI 8cEZCmYL//Q1Vv9MWyQ5unZsuKryYdlH7Q== X-Google-Smtp-Source: APXvYqxrzvRfdNo/+ct3BsAjNHOag24AiC9UMlSXBuEGLcZKHOe1PEkTY5P+kQTmfNWXoyr2KiodnA== X-Received: by 2002:aca:f4c6:: with SMTP id s189mr5247504oih.63.1574294967317; Wed, 20 Nov 2019 16:09:27 -0800 (PST) Received: from moi-limbo-9350.arm.com (host86-181-127-240.range86-181.btcentralplus.com. [86.181.127.240]) by smtp.gmail.com with ESMTPSA id z17sm351439otk.40.2019.11.20.16.09.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Nov 2019 16:09:26 -0800 (PST) From: Beata Michalska To: qemu-devel@nongnu.org Subject: [PATCH v3 2/4] Memory: Enable writeback for given memory region Date: Thu, 21 Nov 2019 00:08:41 +0000 Message-Id: <20191121000843.24844-3-beata.michalska@linaro.org> In-Reply-To: <20191121000843.24844-1-beata.michalska@linaro.org> References: <20191121000843.24844-1-beata.michalska@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::242 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, quintela@redhat.com, richard.henderson@linaro.org, dgilbert@redhat.com, shameerali.kolothum.thodi@huawei.com, eric.auger@redhat.com, qemu-arm@nongnu.org, pbonzini@redhat.com, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Add an option to trigger memory writeback to sync given memory region with the corresponding backing store, case one is available. This extends the support for persistent memory, allowing syncing on-demand. Signed-off-by: Beata Michalska Reviewed-by: Richard Henderson --- exec.c | 36 ++++++++++++++++++++++++++++++++++++ include/exec/memory.h | 6 ++++++ include/exec/ram_addr.h | 8 ++++++++ include/qemu/cutils.h | 1 + memory.c | 12 ++++++++++++ util/cutils.c | 38 ++++++++++++++++++++++++++++++++++++++ 6 files changed, 101 insertions(+) diff --git a/exec.c b/exec.c index ffdb518..a34c348 100644 --- a/exec.c +++ b/exec.c @@ -65,6 +65,8 @@ #include "exec/ram_addr.h" #include "exec/log.h" +#include "qemu/pmem.h" + #include "migration/vmstate.h" #include "qemu/range.h" @@ -2156,6 +2158,40 @@ int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error **errp) return 0; } +/* + * Trigger sync on the given ram block for range [start, start + length] + * with the backing store if one is available. + * Otherwise no-op. + * @Note: this is supposed to be a synchronous op. + */ +void qemu_ram_writeback(RAMBlock *block, ram_addr_t start, ram_addr_t length) +{ + void *addr = ramblock_ptr(block, start); + + /* The requested range should fit in within the block range */ + g_assert((start + length) <= block->used_length); + +#ifdef CONFIG_LIBPMEM + /* The lack of support for pmem should not block the sync */ + if (ramblock_is_pmem(block)) { + pmem_persist(addr, length); + return; + } +#endif + if (block->fd >= 0) { + /** + * Case there is no support for PMEM or the memory has not been + * specified as persistent (or is not one) - use the msync. + * Less optimal but still achieves the same goal + */ + if (qemu_msync(addr, length, block->fd)) { + warn_report("%s: failed to sync memory range: start: " + RAM_ADDR_FMT " length: " RAM_ADDR_FMT, + __func__, start, length); + } + } +} + /* Called with ram_list.mutex held */ static void dirty_memory_extend(ram_addr_t old_ram_size, ram_addr_t new_ram_size) diff --git a/include/exec/memory.h b/include/exec/memory.h index e499dc2..27a84e0 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -1265,6 +1265,12 @@ void *memory_region_get_ram_ptr(MemoryRegion *mr); */ void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp); +/** + * memory_region_do_writeback: Trigger writeback for selected address range + * [addr, addr + size] + * + */ +void memory_region_do_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size); /** * memory_region_set_log: Turn dirty logging on or off for a region. diff --git a/include/exec/ram_addr.h b/include/exec/ram_addr.h index bed0554..5adebb0 100644 --- a/include/exec/ram_addr.h +++ b/include/exec/ram_addr.h @@ -174,6 +174,14 @@ void qemu_ram_free(RAMBlock *block); int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error **errp); +void qemu_ram_writeback(RAMBlock *block, ram_addr_t start, ram_addr_t length); + +/* Clear whole block of mem */ +static inline void qemu_ram_block_writeback(RAMBlock *block) +{ + qemu_ram_writeback(block, 0, block->used_length); +} + #define DIRTY_CLIENTS_ALL ((1 << DIRTY_MEMORY_NUM) - 1) #define DIRTY_CLIENTS_NOCODE (DIRTY_CLIENTS_ALL & ~(1 << DIRTY_MEMORY_CODE)) diff --git a/include/qemu/cutils.h b/include/qemu/cutils.h index b54c847..eb59852 100644 --- a/include/qemu/cutils.h +++ b/include/qemu/cutils.h @@ -130,6 +130,7 @@ const char *qemu_strchrnul(const char *s, int c); #endif time_t mktimegm(struct tm *tm); int qemu_fdatasync(int fd); +int qemu_msync(void *addr, size_t length, int fd); int fcntl_setfl(int fd, int flag); int qemu_parse_fd(const char *param); int qemu_strtoi(const char *nptr, const char **endptr, int base, diff --git a/memory.c b/memory.c index 06484c2..0228cad 100644 --- a/memory.c +++ b/memory.c @@ -2207,6 +2207,18 @@ void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp qemu_ram_resize(mr->ram_block, newsize, errp); } + +void memory_region_do_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size) +{ + /* + * Might be extended case needed to cover + * different types of memory regions + */ + if (mr->ram_block && mr->dirty_log_mask) { + qemu_ram_writeback(mr->ram_block, addr, size); + } +} + /* * Call proper memory listeners about the change on the newly * added/removed CoalescedMemoryRange. diff --git a/util/cutils.c b/util/cutils.c index fd591ca..c76ed88 100644 --- a/util/cutils.c +++ b/util/cutils.c @@ -164,6 +164,44 @@ int qemu_fdatasync(int fd) #endif } +/** + * Sync changes made to the memory mapped file back to the backing + * storage. For POSIX compliant systems this will fallback + * to regular msync call. Otherwise it will trigger whole file sync + * (including the metadata case there is no support to skip that otherwise) + * + * @addr - start of the memory area to be synced + * @length - length of the are to be synced + * @fd - file descriptor for the file to be synced + * (mandatory only for POSIX non-compliant systems) + */ +int qemu_msync(void *addr, size_t length, int fd) +{ +#ifdef CONFIG_POSIX + size_t align_mask = ~(qemu_real_host_page_size - 1); + + /** + * There are no strict reqs as per the length of mapping + * to be synced. Still the length needs to follow the address + * alignment changes. Additionally - round the size to the multiple + * of PAGE_SIZE + */ + length += ((uintptr_t)addr & (qemu_real_host_page_size - 1)); + length = (length + ~align_mask) & align_mask; + + addr = (void *)((uintptr_t)addr & align_mask); + + return msync(addr, length, MS_SYNC); +#else /* CONFIG_POSIX */ + /** + * Perform the sync based on the file descriptor + * The sync range will most probably be wider than the one + * requested - but it will still get the job done + */ + return qemu_fdatasync(fd); +#endif /* CONFIG_POSIX */ +} + #ifndef _WIN32 /* Sets a specific flag */ int fcntl_setfl(int fd, int flag) From patchwork Thu Nov 21 00:08:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Beata Michalska X-Patchwork-Id: 11255023 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 970236C1 for ; Thu, 21 Nov 2019 00:12:39 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6CE83208A1 for ; Thu, 21 Nov 2019 00:12:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="yE5W+q13" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6CE83208A1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:35322 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iXa5O-0004pI-JY for patchwork-qemu-devel@patchwork.kernel.org; Wed, 20 Nov 2019 19:12:38 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:56935) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iXa2S-00007G-Pu for qemu-devel@nongnu.org; Wed, 20 Nov 2019 19:09:37 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iXa2R-0005m9-QQ for qemu-devel@nongnu.org; Wed, 20 Nov 2019 19:09:36 -0500 Received: from mail-oi1-x242.google.com ([2607:f8b0:4864:20::242]:46806) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iXa2R-0005ly-MI for qemu-devel@nongnu.org; Wed, 20 Nov 2019 19:09:35 -0500 Received: by mail-oi1-x242.google.com with SMTP id n14so1495179oie.13 for ; Wed, 20 Nov 2019 16:09:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HsdErY/VOvmYyLB8+2L3+K8sDccz0NDXgt0JMSNXxNM=; b=yE5W+q13zjR9HSIv2qTmit1G376oCNK63mE87vcAp5m3BCmNcERZ2pI/DleA241pJG KQQ2qIzR1Alk1Fx9KC7+oD3k/jWJCLdXdpbGU0T6NjYou9MjPyj+83LE9v5igjXdUwUL U+kknaJFZB98dHa/g9StcN1KFj2LRDm6AR3pQpgJhSbQNJbAC21ImS4ky+u3ScWZtAvL 03sMIARyePANvzh1s81EWaKdUIUR/99qzFxP/ef1QMKgpCEHsLI/s9TREBtpGjR2QB5n Tt1PXsKfn2aACAqFmIPaIVFwt1lUwUS4WHWSbrdNRkiHUmHtS5D8OJMeKGpYuEAuLFPR yEQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HsdErY/VOvmYyLB8+2L3+K8sDccz0NDXgt0JMSNXxNM=; b=SlfqZSJa0jo4c3hJYkNmdgAnqJCpEjdWPkEDb90SVwNsa3uZme5es7g10nHlGz3x4n G7BlGPXYeusL+/UAP2F2hV+IkSIQv7BLAcMvyC9MH47MA9CobHgUpr5nyp8NyZolKowW ywnCx6nRmlTHJdfaMwGhuy5P/lBQJdtZ2CE1Nu7I+Hu4UPUWEauvAUuZL+FE5X30jgHJ I8dzL32H3s7MwVx6bZi4ZNh+1uR9M37ly0mLnRy5PsCCW27OgHYEv3St1Iril8QK6xIv XmhetlcvrNtA18pTprgqInRY3UyuBe0nZMHKQ11b/X4UGaElWzJ313vYQTjeUlQ/ghMj mQjw== X-Gm-Message-State: APjAAAU1zK0LA18A9WGRnjOET+lc6Z9MiUG24hsvDsNJWmv7zMY1UkBv lXl/kU2GCOHlp0+QcnsVjrAFPqgC5CCtfg== X-Google-Smtp-Source: APXvYqxcT5JqL5Y3heq9E/QnQ6K0pwMAYWD6DKsbRMakjfptkS7mNKtxkm7p6bdt3e7R4TH3PH3wVw== X-Received: by 2002:aca:ddc2:: with SMTP id u185mr5222506oig.174.1574294974817; Wed, 20 Nov 2019 16:09:34 -0800 (PST) Received: from moi-limbo-9350.arm.com (host86-181-127-240.range86-181.btcentralplus.com. [86.181.127.240]) by smtp.gmail.com with ESMTPSA id z17sm351439otk.40.2019.11.20.16.09.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Nov 2019 16:09:34 -0800 (PST) From: Beata Michalska To: qemu-devel@nongnu.org Subject: [PATCH v3 3/4] migration: ram: Switch to ram block writeback Date: Thu, 21 Nov 2019 00:08:42 +0000 Message-Id: <20191121000843.24844-4-beata.michalska@linaro.org> In-Reply-To: <20191121000843.24844-1-beata.michalska@linaro.org> References: <20191121000843.24844-1-beata.michalska@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::242 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, quintela@redhat.com, richard.henderson@linaro.org, dgilbert@redhat.com, shameerali.kolothum.thodi@huawei.com, eric.auger@redhat.com, qemu-arm@nongnu.org, pbonzini@redhat.com, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Switch to ram block writeback for pmem migration. Signed-off-by: Beata Michalska Reviewed-by: Richard Henderson Reviewed-by: Alex Bennée Acked-by: Dr. David Alan Gilbert --- migration/ram.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/migration/ram.c b/migration/ram.c index 5078f94..38070f1 100644 --- a/migration/ram.c +++ b/migration/ram.c @@ -33,7 +33,6 @@ #include "qemu/bitops.h" #include "qemu/bitmap.h" #include "qemu/main-loop.h" -#include "qemu/pmem.h" #include "xbzrle.h" #include "ram.h" #include "migration.h" @@ -3981,9 +3980,7 @@ static int ram_load_cleanup(void *opaque) RAMBlock *rb; RAMBLOCK_FOREACH_NOT_IGNORED(rb) { - if (ramblock_is_pmem(rb)) { - pmem_persist(rb->host, rb->used_length); - } + qemu_ram_block_writeback(rb); } xbzrle_load_cleanup(); From patchwork Thu Nov 21 00:08:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Beata Michalska X-Patchwork-Id: 11255025 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 99B031390 for ; Thu, 21 Nov 2019 00:14:20 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 67BDC20730 for ; Thu, 21 Nov 2019 00:14:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="sngSs25s" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 67BDC20730 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:35334 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iXa71-0006AD-GU for patchwork-qemu-devel@patchwork.kernel.org; Wed, 20 Nov 2019 19:14:19 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:56979) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iXa2Z-0000JY-QT for qemu-devel@nongnu.org; Wed, 20 Nov 2019 19:09:45 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iXa2Y-0005pP-Cq for qemu-devel@nongnu.org; Wed, 20 Nov 2019 19:09:43 -0500 Received: from mail-ot1-x341.google.com ([2607:f8b0:4864:20::341]:36167) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iXa2Y-0005p1-8d for qemu-devel@nongnu.org; Wed, 20 Nov 2019 19:09:42 -0500 Received: by mail-ot1-x341.google.com with SMTP id f10so1338004oto.3 for ; Wed, 20 Nov 2019 16:09:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Rdoo/trm2kfQbHrpXryTEVHE3GHeXymHmhFHGDwpeds=; b=sngSs25sWQUSqJMDGvDXVQEzAQlgRRZiiFG0+slzGADNnd7glffB0YktsqjeF+7hKO 7bpD+FmpW1YNuLXby9+kuKqMzF2aL03X6aeYe7RCcbYM78kF5NvivS7E+OPAQ4Z98n2Q 02r2pF8fRl8+j/4ELA8Lu30AlQyj/Bf+dPxNosQoy+MlVB6bGHXY5ZtP2UVyduWaTncb 3FlDZMMM8ODEErbcUM65ofqJuASMYhmCTHTBtrVXQlIAOd9lvxhV9UpSOEfJ37eBDld4 il9dvh4kNgAnU+iMr9ARhUauEXFxf/wqndtRQM0vYDQ48L5upcoQ2Qarv+O+dfOc7kLI NISQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Rdoo/trm2kfQbHrpXryTEVHE3GHeXymHmhFHGDwpeds=; b=fivhQMNUSB8Qh77wsuUjb3rJhfDrpRPcIuMQmAWiUUtCaMoEGENo0cam5c06/44sjo tZKTV4vxi+eN8Y8+XNGb3eDr08NWRJUoYJjBUqwthRKAIKNW8Bc4ARKp/Cd3Jyg13VGL 4dQpNSas3XJcuy3GJHJikhFEEMkHCz0J8FKweITO7NGzO6T9UN1AjG0gRy9igoHPZbuv Y4HCkX+N1k5YTrym9vy+3lOqyfzORcEIPxXXZCP+8P6TgPA8Hl2hoZtiT/AvX56W+V3Z 1ZvM/pfj2NHVBkMfMUDoWgQ3lpWNP7tZC7GB2juAcp2TQpifu0F+54rXKF9XoBQbO757 g73A== X-Gm-Message-State: APjAAAWIhNUh9meXGQ0NocUPFEiEvX1TSWNjoUKGpxVLFTf5BEOJyyFs RANcrRJ4RHOV/bJcOVZdGSv+qLonYs7iSg== X-Google-Smtp-Source: APXvYqxolcYUacdkXJpKZX6xSSBKx+1V9eLJfXP1J/QWskDaR8x8QdPN6xSWkUX19ZxvzuZxB0nPeg== X-Received: by 2002:a05:6830:155a:: with SMTP id l26mr4316290otp.119.1574294981368; Wed, 20 Nov 2019 16:09:41 -0800 (PST) Received: from moi-limbo-9350.arm.com (host86-181-127-240.range86-181.btcentralplus.com. [86.181.127.240]) by smtp.gmail.com with ESMTPSA id z17sm351439otk.40.2019.11.20.16.09.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Nov 2019 16:09:40 -0800 (PST) From: Beata Michalska To: qemu-devel@nongnu.org Subject: [PATCH v3 4/4] target/arm: Add support for DC CVAP & DC CVADP ins Date: Thu, 21 Nov 2019 00:08:43 +0000 Message-Id: <20191121000843.24844-5-beata.michalska@linaro.org> In-Reply-To: <20191121000843.24844-1-beata.michalska@linaro.org> References: <20191121000843.24844-1-beata.michalska@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::341 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, quintela@redhat.com, richard.henderson@linaro.org, dgilbert@redhat.com, shameerali.kolothum.thodi@huawei.com, eric.auger@redhat.com, qemu-arm@nongnu.org, pbonzini@redhat.com, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" ARMv8.2 introduced support for Data Cache Clean instructions to PoP (point-of-persistence) - DC CVAP and PoDP (point-of-deep-persistence) - DV CVADP. Both specify conceptual points in a memory system where all writes that are to reach them are considered persistent. The support provided considers both to be actually the same so there is no distinction between the two. If none is available (there is no backing store for given memory) both will result in Data Cache Clean up to the point of coherency. Otherwise sync for the specified range shall be performed. Signed-off-by: Beata Michalska Reviewed-by: Richard Henderson --- linux-user/elfload.c | 2 ++ target/arm/cpu.h | 10 ++++++++++ target/arm/cpu64.c | 1 + target/arm/helper.c | 56 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 69 insertions(+) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index f6693e5..07b16cc 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -656,6 +656,7 @@ static uint32_t get_elf_hwcap(void) GET_FEATURE_ID(aa64_jscvt, ARM_HWCAP_A64_JSCVT); GET_FEATURE_ID(aa64_sb, ARM_HWCAP_A64_SB); GET_FEATURE_ID(aa64_condm_4, ARM_HWCAP_A64_FLAGM); + GET_FEATURE_ID(aa64_dcpop, ARM_HWCAP_A64_DCPOP); return hwcaps; } @@ -665,6 +666,7 @@ static uint32_t get_elf_hwcap2(void) ARMCPU *cpu = ARM_CPU(thread_cpu); uint32_t hwcaps = 0; + GET_FEATURE_ID(aa64_dcpodp, ARM_HWCAP2_A64_DCPODP); GET_FEATURE_ID(aa64_condm_5, ARM_HWCAP2_A64_FLAGM2); GET_FEATURE_ID(aa64_frint, ARM_HWCAP2_A64_FRINT); diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 83a809d..c3c0bf5 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3616,6 +3616,16 @@ static inline bool isar_feature_aa64_frint(const ARMISARegisters *id) return FIELD_EX64(id->id_aa64isar1, ID_AA64ISAR1, FRINTTS) != 0; } +static inline bool isar_feature_aa64_dcpop(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64isar1, ID_AA64ISAR1, DPB) != 0; +} + +static inline bool isar_feature_aa64_dcpodp(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64isar1, ID_AA64ISAR1, DPB) >= 2; +} + static inline bool isar_feature_aa64_fp16(const ARMISARegisters *id) { /* We always set the AdvSIMD and FP fields identically wrt FP16. */ diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index a39d6fc..61fd0ad 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -646,6 +646,7 @@ static void aarch64_max_initfn(Object *obj) cpu->isar.id_aa64isar0 = t; t = cpu->isar.id_aa64isar1; + t = FIELD_DP64(t, ID_AA64ISAR1, DPB, 2); t = FIELD_DP64(t, ID_AA64ISAR1, JSCVT, 1); t = FIELD_DP64(t, ID_AA64ISAR1, FCMA, 1); t = FIELD_DP64(t, ID_AA64ISAR1, APA, 1); /* PAuth, architected only */ diff --git a/target/arm/helper.c b/target/arm/helper.c index a089fb5..f90f3ec 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -5929,6 +5929,52 @@ static const ARMCPRegInfo rndr_reginfo[] = { .access = PL0_R, .readfn = rndr_readfn }, REGINFO_SENTINEL }; + +#ifndef CONFIG_USER_ONLY +static void dccvap_writefn(CPUARMState *env, const ARMCPRegInfo *opaque, + uint64_t value) +{ + ARMCPU *cpu = env_archcpu(env); + /* CTR_EL0 System register -> DminLine, bits [19:16] */ + uint64_t dline_size = 4 << ((cpu->ctr >> 16) & 0xF); + uint64_t vaddr_in = (uint64_t) value; + uint64_t vaddr = vaddr_in & ~(dline_size - 1); + void *haddr; + int mem_idx = cpu_mmu_index(env, false); + + /* This won't be crossing page boundaries */ + haddr = probe_read(env, vaddr, dline_size, mem_idx, GETPC()); + if (haddr) { + + ram_addr_t offset; + MemoryRegion *mr; + + /* RCU lock is already being held */ + mr = memory_region_from_host(haddr, &offset); + + if (mr) { + memory_region_do_writeback(mr, offset, dline_size); + } + } +} + +static const ARMCPRegInfo dcpop_reg[] = { + { .name = "DC_CVAP", .state = ARM_CP_STATE_AA64, + .opc0 = 1, .opc1 = 3, .crn = 7, .crm = 12, .opc2 = 1, + .access = PL0_W, .type = ARM_CP_NO_RAW | ARM_CP_SUPPRESS_TB_END, + .accessfn = aa64_cacheop_access, .writefn = dccvap_writefn }, + REGINFO_SENTINEL +}; + +static const ARMCPRegInfo dcpodp_reg[] = { + { .name = "DC_CVADP", .state = ARM_CP_STATE_AA64, + .opc0 = 1, .opc1 = 3, .crn = 7, .crm = 13, .opc2 = 1, + .access = PL0_W, .type = ARM_CP_NO_RAW | ARM_CP_SUPPRESS_TB_END, + .accessfn = aa64_cacheop_access, .writefn = dccvap_writefn }, + REGINFO_SENTINEL +}; +#endif /*CONFIG_USER_ONLY*/ + #endif static CPAccessResult access_predinv(CPUARMState *env, const ARMCPRegInfo *ri, @@ -6889,6 +6935,16 @@ void register_cp_regs_for_features(ARMCPU *cpu) if (cpu_isar_feature(aa64_rndr, cpu)) { define_arm_cp_regs(cpu, rndr_reginfo); } +#ifndef CONFIG_USER_ONLY + /* Data Cache clean instructions up to PoP */ + if (cpu_isar_feature(aa64_dcpop, cpu)) { + define_one_arm_cp_reg(cpu, dcpop_reg); + + if (cpu_isar_feature(aa64_dcpodp, cpu)) { + define_one_arm_cp_reg(cpu, dcpodp_reg); + } + } +#endif /*CONFIG_USER_ONLY*/ #endif /*