From patchwork Tue Dec 3 00:40:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11270065 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2C28113B6 for ; Tue, 3 Dec 2019 00:42:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 09AAA206E1 for ; Tue, 3 Dec 2019 00:42:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="sUKJcS63" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726330AbfLCAmD (ORCPT ); Mon, 2 Dec 2019 19:42:03 -0500 Received: from mail-lj1-f195.google.com ([209.85.208.195]:44266 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726318AbfLCAmD (ORCPT ); Mon, 2 Dec 2019 19:42:03 -0500 Received: by mail-lj1-f195.google.com with SMTP id c19so1630060lji.11; Mon, 02 Dec 2019 16:42:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RXuTZNw4YluF0xsaWYam3YpLe0yLbc8vBZ1dGFmmgz4=; b=sUKJcS63tb1/bE2B19Z+utIpq8bnEg+Gv14tzsoDn0iZxdIwWa84H1iUfSvXrk1jAx DDab6Omdsv2fQedGajfAymBRLGm8jzauyBWbVtGai9BUe4Eiad9zjHwG5LIjxo9ChRFF OG7XH6y0Ha8Cfv2JfoitJNIJ6z7AKTzVKoyonLulHbAE+kbU2THnBEWFg6+8bX0qpNQA yy513flUCYmupIqgpsA/oZEe1rkonzPcdO/ipU1aPZ8DLQYigOhqcCI9wsWI+yhXXwG8 nCmbKPfs7dW1RryL58rQWF6JSNjWchFOnnMYHrqUVqT5/LUnajPwaqidI4ejjfbV3uIh VXHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RXuTZNw4YluF0xsaWYam3YpLe0yLbc8vBZ1dGFmmgz4=; b=SC329KVMU252SLiJJebkvoAeRq66qJGLX8a3AYNDTFQ4CBktK2stXRs9RkiF1Kdafs WxthUm96hrkk6J2BlvBl1FQszGdNknVsqjvPDH3EPjuWBW2By1NKgF4MbY3rk0664PZp Iq0+XqhJvqwbeL0gyHcgtll2RKVTzk/uFnz8lTY2UfqXW7OL7QPyn4iu1aob9sysdzZ1 5qT7xcb1AtpNulsPypyx3TktVyvPOSYxZdGmTGk6wqYMhSqzhPRNUeqCuG7MhJfms2Te VaLXTZjupcgBvAWXtbLdL7m973wG1p1Zdl6oMICFNVUqvNBi7Wvmuiraxa2ikS1DoDwd 8D0A== X-Gm-Message-State: APjAAAWwxGbY7hNowCf4XUC/T/z0rg9UTrqITm+6ffP0AFR6hnnqEcYe EokAsOaanrXuLQBugY2WmSE= X-Google-Smtp-Source: APXvYqyDdCe4cvfThpvsaPkZ+owpBUCZfAhEmQKBt9kVsfCXwF8+pPhTggQwhNStfNVqxDE5Hip0vg== X-Received: by 2002:a2e:95c4:: with SMTP id y4mr908302ljh.38.1575333720872; Mon, 02 Dec 2019 16:42:00 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id y21sm456384ljm.25.2019.12.02.16.41.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2019 16:42:00 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 01/19] ARM: tegra: Compile sleep-tegra20/30.S unconditionally Date: Tue, 3 Dec 2019 03:40:58 +0300 Message-Id: <20191203004116.11771-2-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191203004116.11771-1-digetx@gmail.com> References: <20191203004116.11771-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The sleep-tegra*.S provides functionality required for suspend/resume and CPU hotplugging. The new unified CPUIDLE driver will support multiple hardware generations starting from Terga20 and ending with Tegra124, the driver will utilize functions that are provided by the assembly and thus it is cleaner to compile that code without any build-dependencies in order to avoid churning with #ifdef's. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/Makefile | 6 ++---- arch/arm/mach-tegra/sleep.h | 2 -- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 6c1dff2eccc2..965862608ff6 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -8,13 +8,13 @@ obj-y += reset.o obj-y += reset-handler.o obj-y += sleep.o obj-y += tegra.o +obj-y += sleep-tegra20.o +obj-y += sleep-tegra30.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o -obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += sleep-tegra20.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pm-tegra20.o ifeq ($(CONFIG_CPU_IDLE),y) obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += cpuidle-tegra20.o endif -obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += sleep-tegra30.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pm-tegra30.o ifeq ($(CONFIG_CPU_IDLE),y) obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += cpuidle-tegra30.o @@ -22,12 +22,10 @@ endif obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o -obj-$(CONFIG_ARCH_TEGRA_114_SOC) += sleep-tegra30.o obj-$(CONFIG_ARCH_TEGRA_114_SOC) += pm-tegra30.o ifeq ($(CONFIG_CPU_IDLE),y) obj-$(CONFIG_ARCH_TEGRA_114_SOC) += cpuidle-tegra114.o endif -obj-$(CONFIG_ARCH_TEGRA_124_SOC) += sleep-tegra30.o obj-$(CONFIG_ARCH_TEGRA_124_SOC) += pm-tegra30.o ifeq ($(CONFIG_CPU_IDLE),y) obj-$(CONFIG_ARCH_TEGRA_124_SOC) += cpuidle-tegra114.o diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h index 78ef32a907c8..63e2205cbc82 100644 --- a/arch/arm/mach-tegra/sleep.h +++ b/arch/arm/mach-tegra/sleep.h @@ -120,10 +120,8 @@ void tegra_resume(void); int tegra_sleep_cpu_finish(unsigned long); void tegra_disable_clean_inv_dcache(u32 flag); -#ifdef CONFIG_HOTPLUG_CPU void tegra20_hotplug_shutdown(void); void tegra30_hotplug_shutdown(void); -#endif void tegra20_cpu_shutdown(int cpu); int tegra20_cpu_is_resettable_soon(void); From patchwork Tue Dec 3 00:40:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11270099 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B7B6B138D for ; Tue, 3 Dec 2019 00:43:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 973B120717 for ; Tue, 3 Dec 2019 00:43:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="PM1DpEIe" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726318AbfLCAmF (ORCPT ); Mon, 2 Dec 2019 19:42:05 -0500 Received: from mail-lf1-f68.google.com ([209.85.167.68]:36376 "EHLO mail-lf1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726319AbfLCAmE (ORCPT ); Mon, 2 Dec 2019 19:42:04 -0500 Received: by mail-lf1-f68.google.com with SMTP id f16so1418753lfm.3; Mon, 02 Dec 2019 16:42:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3ulGCTMcCDBRRk2yLFdFo9M4Wmqj5q8vYCHGVC30ky4=; b=PM1DpEIefdGw++srLH30Y63fT0TR+zXMyX81gz4dGtjWpyXgP2NpvUbnWHFLVwSj/y WijM3WvSt3MZ3cVC5OyybdBIKxVQpczex7yBt0KY6HJnvgEilN6OVNrgEKWk/8654Qak xXBpYAZjBBOiVCAIHrTioORhhAo1m8u0JFLH4RuY9F697osQdl6SYZnUF5W/taxM4IOJ bV+VbKHMtfV9PsvHdtII2V+5IHNBww8f60/QzgznxHpttTdQCmZbaSSKEdOW6to6QDas q1boaekthAdyc8ro86mqN8RcYNx5oi7GUgq9OXO03fDNROAcAaha9y5HNo0x7O8SbsyN kCHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3ulGCTMcCDBRRk2yLFdFo9M4Wmqj5q8vYCHGVC30ky4=; b=Lu4QPb/TPAF+mZDJDxaKVSv7aLmzJhihwkAGH78tUv66uvaKTT1RF7ZFRo6dl0mkUy P7Be48eGkm2pHYdZ+HXcvmi3d/IlVKfuCrjxVClPve+Hrern0W13L8AM2L42nSL5BihK BYPTxW+fp4eaXoaIJhUBl8YLlAcxfbItYTbvJtinX8dYLU0rUyoB4BpB7rQDka+2VoL2 5pHiL+HZ/CQ7rW1hanp8/N1Ry4VC208uibY7M2dBhstaeKFq8jdkspURsL3K1Gt+OjHR Lsn0JRLfzz+VlP6e8umd0iIDBl3BxQoRKmAwfurfQavmYSuSuidxtPi5q1AJPYo4AVfX 6HJg== X-Gm-Message-State: APjAAAWy5tuBWZt5WxHu6SUOGt5mbR8jtEbbIVlVwjkZWoaeMvj/iybA 3Sys+4SEpWXjnppUDvVZ3WQ= X-Google-Smtp-Source: APXvYqw1uehVpy5cg+XgrJGqqkYH7IwgvT7Cm7YzIaBNPiFp4O7eFINcnpnLo0WhGEBh5uG4t3IInA== X-Received: by 2002:a19:ae10:: with SMTP id f16mr1006600lfc.147.1575333721957; Mon, 02 Dec 2019 16:42:01 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id y21sm456384ljm.25.2019.12.02.16.42.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2019 16:42:01 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 02/19] ARM: tegra: Add tegra_pm_park_secondary_cpu() Date: Tue, 3 Dec 2019 03:40:59 +0300 Message-Id: <20191203004116.11771-3-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191203004116.11771-1-digetx@gmail.com> References: <20191203004116.11771-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org This function resembles tegra_cpu_die() of the hotplug code, but this variant is more suitable to be used for CPU PM because it's made specifically to be used by cpu_suspend(). In short this function puts secondary CPU offline, it will be used by the new CPUIDLE driver. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/pm.c | 14 ++++++++++++++ arch/arm/mach-tegra/pm.h | 5 +++++ 2 files changed, 19 insertions(+) diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index 3cab81b82866..f5ff3dd1dd81 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -436,4 +436,18 @@ void __init tegra_init_suspend(void) suspend_set_ops(&tegra_suspend_ops); } + +int tegra_pm_park_secondary_cpu(unsigned long cpu) +{ + if (cpu > 0) { + tegra_disable_clean_inv_dcache(TEGRA_FLUSH_CACHE_LOUIS); + + if (tegra_get_chip_id() == TEGRA20) + tegra20_hotplug_shutdown(); + else + tegra30_hotplug_shutdown(); + } + + return -EINVAL; +} #endif diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h index 569151b3edc0..9a790f00237f 100644 --- a/arch/arm/mach-tegra/pm.h +++ b/arch/arm/mach-tegra/pm.h @@ -31,8 +31,13 @@ extern void (*tegra_tear_down_cpu)(void); #ifdef CONFIG_PM_SLEEP void tegra_init_suspend(void); +int tegra_pm_park_secondary_cpu(unsigned long cpu); #else static inline void tegra_init_suspend(void) {} +static inline int tegra_pm_park_secondary_cpu(unsigned long cpu) +{ + return -ENOTSUPP; +} #endif #endif /* _MACH_TEGRA_PM_H_ */ From patchwork Tue Dec 3 00:41:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11270067 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A921514B7 for ; Tue, 3 Dec 2019 00:42:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7380820717 for ; Tue, 3 Dec 2019 00:42:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="NvHhmaM9" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726564AbfLCAmI (ORCPT ); Mon, 2 Dec 2019 19:42:08 -0500 Received: from mail-lj1-f169.google.com ([209.85.208.169]:44966 "EHLO mail-lj1-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726469AbfLCAmI (ORCPT ); Mon, 2 Dec 2019 19:42:08 -0500 Received: by mail-lj1-f169.google.com with SMTP id c19so1630173lji.11; Mon, 02 Dec 2019 16:42:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3xniGRiLFlPnWoHCyT+oVb/kATdgXcW3RPA6Ckt6RNQ=; b=NvHhmaM9Mmw27EXvOhfrg7ukxfSEu/6G92c+h6gbRWI3LyXWMpDTaiAUOJ1HZ32N4s 6oW14HHvkG0F/XzY6R6L+hjGK5L6tISSEkRJRDikwOAaRwg7VzKMsSpW2fH3JUIjoY2a C1YT2tJ17gFvfwjZGlD+NTkhkhLgrrRhh5g2gXgQWOpuS36BVjDmnZbE7NieLVCaSq8H VbF3QmQo5cTuwsra91jpBfuMPrwQC8XmW0SDgyd1CyRMd2Q3N1gG/A9HkrdwvMx8FAkt XaTq5X8eoyPRelZKUPZ0Cm5tVQCbUs6U9G21WtsAW2eL5W0Ic3aicVr+86YX6J07d0zH qpGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3xniGRiLFlPnWoHCyT+oVb/kATdgXcW3RPA6Ckt6RNQ=; b=TKd2z0S3a0aDUkZ2kPlGkg4AFVeydXpfZfXhSMKM8Ah9KfBXXIoOeqUMmlNiRMnUIg eoYgjpugs3WY3TZZBy0I1mXCjwCnZIfQAg//OFZ6nI+FvC2HLNgzQWiI4ilWPx+fXev1 Cp/NktDuPf2uJWlc32U/Ym9emTxqIgpp52EHZFHeeHS20b7207vMAjdmlX+BGlcVLJsH b6pUGn+gj7l3vKzzF5u/Ln1MKwvC6qO2NpgVNHUrhwHC1Yg2+WwTp7x7IAKySnBuRnFY x9I9GMrF1L7Rewn5eHwZHVHzUDcy70ka86VfFQz4/uPWrgDvBbr+cwotiB/lXaC3Xl8M V0rA== X-Gm-Message-State: APjAAAVQNPIY0Tw1d6peFzPxbtCHb14BsSzTqi0Uv+MNPa5zbKdbhy+e JL2xF6TcOYyT2ceUrryIQ94= X-Google-Smtp-Source: APXvYqwz+3x/zwx7lfZQKaIOB7633T8gxvujuLt7ThMxfdJ7etvgkxxf0tvdhs8JvUXc01cc5jUzIA== X-Received: by 2002:a2e:9906:: with SMTP id v6mr905454lji.90.1575333724728; Mon, 02 Dec 2019 16:42:04 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id y21sm456384ljm.25.2019.12.02.16.42.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2019 16:42:04 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 03/19] ARM: tegra: Remove pen-locking from cpuidle-tegra20 Date: Tue, 3 Dec 2019 03:41:00 +0300 Message-Id: <20191203004116.11771-4-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191203004116.11771-1-digetx@gmail.com> References: <20191203004116.11771-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Pen-locking is meant to block CPU0 if CPU1 wakes up during of entering into LP2 because of some interrupt firing up, preventing unnecessary LP2 enter that will be resumed immediately. Apparently this case doesn't happen often in practice, I checked how often it takes place and found that after ~20 hours of browsing web, managing email, watching videos and idling (15+ hours) there is only a dozen of early LP2 entering abortions and they all happened while device was idling. Thus let's remove the pen-locking and make LP2 entering uninterruptible, simplifying code quite a lot. This will also become very handy for the upcoming unified cpuidle driver, allowing to have a common LP2 code-path across of different hardware generations. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra20.c | 46 +------ arch/arm/mach-tegra/pm.c | 7 -- arch/arm/mach-tegra/pm.h | 1 - arch/arm/mach-tegra/reset-handler.S | 11 -- arch/arm/mach-tegra/reset.h | 9 +- arch/arm/mach-tegra/sleep-tegra20.S | 170 -------------------------- arch/arm/mach-tegra/sleep.h | 12 -- 7 files changed, 5 insertions(+), 251 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index 69f3fa270fbe..f7d5041e73cc 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -65,28 +66,8 @@ static struct cpuidle_driver tegra_idle_driver = { #ifdef CONFIG_PM_SLEEP #ifdef CONFIG_SMP -static int tegra20_reset_sleeping_cpu_1(void) -{ - int ret = 0; - - tegra_pen_lock(); - - if (readb(tegra20_cpu1_resettable_status) == CPU_RESETTABLE) - tegra20_cpu_shutdown(1); - else - ret = -EINVAL; - - tegra_pen_unlock(); - - return ret; -} - static void tegra20_wake_cpu1_from_reset(void) { - tegra_pen_lock(); - - tegra20_cpu_clear_resettable(); - /* enable cpu clock on cpu */ tegra_enable_cpu_clock(1); @@ -95,39 +76,20 @@ static void tegra20_wake_cpu1_from_reset(void) /* unhalt the cpu */ flowctrl_write_cpu_halt(1, 0); - - tegra_pen_unlock(); -} - -static int tegra20_reset_cpu_1(void) -{ - if (!cpu_online(1) || !tegra20_reset_sleeping_cpu_1()) - return 0; - - tegra20_wake_cpu1_from_reset(); - return -EBUSY; } #else static inline void tegra20_wake_cpu1_from_reset(void) { } - -static inline int tegra20_reset_cpu_1(void) -{ - return 0; -} #endif static bool tegra20_cpu_cluster_power_down(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { - while (tegra20_cpu_is_resettable_soon()) + while (!tegra_cpu_rail_off_ready()) cpu_relax(); - if (tegra20_reset_cpu_1() || !tegra_cpu_rail_off_ready()) - return false; - tegra_idle_lp2_last(); if (cpu_online(1)) @@ -141,9 +103,7 @@ static bool tegra20_idle_enter_lp2_cpu_1(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { - cpu_suspend(0, tegra20_sleep_cpu_secondary_finish); - - tegra20_cpu_clear_resettable(); + cpu_suspend(dev->cpu, tegra_pm_park_secondary_cpu); return true; } diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index f5ff3dd1dd81..1ff499068bb1 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -137,18 +137,11 @@ bool tegra_set_cpu_in_lp2(void) if ((phy_cpu_id == 0) && cpumask_equal(cpu_lp2_mask, cpu_online_mask)) last_cpu = true; - else if (tegra_get_chip_id() == TEGRA20 && phy_cpu_id == 1) - tegra20_cpu_set_resettable_soon(); spin_unlock(&tegra_lp2_lock); return last_cpu; } -int tegra_cpu_do_idle(void) -{ - return cpu_do_idle(); -} - static int tegra_sleep_cpu(unsigned long v2p) { /* diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h index 9a790f00237f..b9cc12222bb1 100644 --- a/arch/arm/mach-tegra/pm.h +++ b/arch/arm/mach-tegra/pm.h @@ -25,7 +25,6 @@ void tegra30_sleep_core_init(void); void tegra_clear_cpu_in_lp2(void); bool tegra_set_cpu_in_lp2(void); -int tegra_cpu_do_idle(void); void tegra_idle_lp2_last(void); extern void (*tegra_tear_down_cpu)(void); diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S index e3f34815c9da..53123ae4ac3b 100644 --- a/arch/arm/mach-tegra/reset-handler.S +++ b/arch/arm/mach-tegra/reset-handler.S @@ -183,17 +183,6 @@ after_errata: bleq __die @ CPU not present (to OS) #endif -#ifdef CONFIG_ARCH_TEGRA_2x_SOC - /* Are we on Tegra20? */ - cmp r6, #TEGRA20 - bne 1f - /* If not CPU0, don't let CPU0 reset CPU1 now that CPU1 is coming up. */ - mov r0, #CPU_NOT_RESETTABLE - cmp r10, #0 - strbne r0, [r12, #RESET_DATA(RESETTABLE_STATUS)] -1: -#endif - /* Waking up from LP1? */ ldr r8, [r12, #RESET_DATA(MASK_LP1)] tst r8, r11 @ if in_lp1 diff --git a/arch/arm/mach-tegra/reset.h b/arch/arm/mach-tegra/reset.h index a4cfc08159f6..51265592cb1a 100644 --- a/arch/arm/mach-tegra/reset.h +++ b/arch/arm/mach-tegra/reset.h @@ -16,9 +16,8 @@ #define TEGRA_RESET_STARTUP_SECONDARY 3 #define TEGRA_RESET_STARTUP_LP2 4 #define TEGRA_RESET_STARTUP_LP1 5 -#define TEGRA_RESET_RESETTABLE_STATUS 6 -#define TEGRA_RESET_TF_PRESENT 7 -#define TEGRA_RESET_DATA_SIZE 8 +#define TEGRA_RESET_TF_PRESENT 6 +#define TEGRA_RESET_DATA_SIZE 7 #define RESET_DATA(x) ((TEGRA_RESET_##x)*4) @@ -42,10 +41,6 @@ void __tegra_cpu_reset_handler_end(void); (IO_ADDRESS(TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET + \ ((u32)&__tegra_cpu_reset_handler_data[TEGRA_RESET_MASK_LP2] - \ (u32)__tegra_cpu_reset_handler_start))) -#define tegra20_cpu1_resettable_status \ - (IO_ADDRESS(TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET + \ - ((u32)&__tegra_cpu_reset_handler_data[TEGRA_RESET_RESETTABLE_STATUS] - \ - (u32)__tegra_cpu_reset_handler_start))) #endif #define tegra_cpu_reset_handler_offset \ diff --git a/arch/arm/mach-tegra/sleep-tegra20.S b/arch/arm/mach-tegra/sleep-tegra20.S index 9a89f30d53ca..0e00ba8cf646 100644 --- a/arch/arm/mach-tegra/sleep-tegra20.S +++ b/arch/arm/mach-tegra/sleep-tegra20.S @@ -43,9 +43,6 @@ #define APB_MISC_XM2CFGCPADCTRL2 0x8e4 #define APB_MISC_XM2CFGDPADCTRL2 0x8e8 -#define __tegra20_cpu1_resettable_status_offset \ - (__tegra_cpu_reset_handler_data_offset + RESET_DATA(RESETTABLE_STATUS)) - .macro pll_enable, rd, r_car_base, pll_base ldr \rd, [\r_car_base, #\pll_base] tst \rd, #(1 << 30) @@ -90,10 +87,6 @@ ENDPROC(tegra20_hotplug_shutdown) ENTRY(tegra20_cpu_shutdown) cmp r0, #0 reteq lr @ must not be called for CPU 0 - mov32 r1, TEGRA_IRAM_RESET_BASE_VIRT - ldr r2, =__tegra20_cpu1_resettable_status_offset - mov r12, #CPU_RESETTABLE - strb r12, [r1, r2] cpu_to_halt_reg r1, r0 ldr r3, =TEGRA_FLOW_CTRL_VIRT @@ -116,107 +109,6 @@ ENDPROC(tegra20_cpu_shutdown) #endif #ifdef CONFIG_PM_SLEEP -/* - * tegra_pen_lock - * - * spinlock implementation with no atomic test-and-set and no coherence - * using Peterson's algorithm on strongly-ordered registers - * used to synchronize a cpu waking up from wfi with entering lp2 on idle - * - * The reference link of Peterson's algorithm: - * http://en.wikipedia.org/wiki/Peterson's_algorithm - * - * SCRATCH37 = r1 = !turn (inverted from Peterson's algorithm) - * on cpu 0: - * r2 = flag[0] (in SCRATCH38) - * r3 = flag[1] (in SCRATCH39) - * on cpu1: - * r2 = flag[1] (in SCRATCH39) - * r3 = flag[0] (in SCRATCH38) - * - * must be called with MMU on - * corrupts r0-r3, r12 - */ -ENTRY(tegra_pen_lock) - mov32 r3, TEGRA_PMC_VIRT - cpu_id r0 - add r1, r3, #PMC_SCRATCH37 - cmp r0, #0 - addeq r2, r3, #PMC_SCRATCH38 - addeq r3, r3, #PMC_SCRATCH39 - addne r2, r3, #PMC_SCRATCH39 - addne r3, r3, #PMC_SCRATCH38 - - mov r12, #1 - str r12, [r2] @ flag[cpu] = 1 - dsb - str r12, [r1] @ !turn = cpu -1: dsb - ldr r12, [r3] - cmp r12, #1 @ flag[!cpu] == 1? - ldreq r12, [r1] - cmpeq r12, r0 @ !turn == cpu? - beq 1b @ while !turn == cpu && flag[!cpu] == 1 - - ret lr @ locked -ENDPROC(tegra_pen_lock) - -ENTRY(tegra_pen_unlock) - dsb - mov32 r3, TEGRA_PMC_VIRT - cpu_id r0 - cmp r0, #0 - addeq r2, r3, #PMC_SCRATCH38 - addne r2, r3, #PMC_SCRATCH39 - mov r12, #0 - str r12, [r2] - ret lr -ENDPROC(tegra_pen_unlock) - -/* - * tegra20_cpu_clear_resettable(void) - * - * Called to clear the "resettable soon" flag in IRAM variable when - * it is expected that the secondary CPU will be idle soon. - */ -ENTRY(tegra20_cpu_clear_resettable) - mov32 r1, TEGRA_IRAM_RESET_BASE_VIRT - ldr r2, =__tegra20_cpu1_resettable_status_offset - mov r12, #CPU_NOT_RESETTABLE - strb r12, [r1, r2] - ret lr -ENDPROC(tegra20_cpu_clear_resettable) - -/* - * tegra20_cpu_set_resettable_soon(void) - * - * Called to set the "resettable soon" flag in IRAM variable when - * it is expected that the secondary CPU will be idle soon. - */ -ENTRY(tegra20_cpu_set_resettable_soon) - mov32 r1, TEGRA_IRAM_RESET_BASE_VIRT - ldr r2, =__tegra20_cpu1_resettable_status_offset - mov r12, #CPU_RESETTABLE_SOON - strb r12, [r1, r2] - ret lr -ENDPROC(tegra20_cpu_set_resettable_soon) - -/* - * tegra20_cpu_is_resettable_soon(void) - * - * Returns true if the "resettable soon" flag in IRAM variable has been - * set because it is expected that the secondary CPU will be idle soon. - */ -ENTRY(tegra20_cpu_is_resettable_soon) - mov32 r1, TEGRA_IRAM_RESET_BASE_VIRT - ldr r2, =__tegra20_cpu1_resettable_status_offset - ldrb r12, [r1, r2] - cmp r12, #CPU_RESETTABLE_SOON - moveq r0, #1 - movne r0, #0 - ret lr -ENDPROC(tegra20_cpu_is_resettable_soon) - /* * tegra20_sleep_core_finish(unsigned long v2p) * @@ -242,68 +134,6 @@ ENTRY(tegra20_sleep_core_finish) ret r3 ENDPROC(tegra20_sleep_core_finish) -/* - * tegra20_sleep_cpu_secondary_finish(unsigned long v2p) - * - * Enters WFI on secondary CPU by exiting coherency. - */ -ENTRY(tegra20_sleep_cpu_secondary_finish) - stmfd sp!, {r4-r11, lr} - - mrc p15, 0, r11, c1, c0, 1 @ save actlr before exiting coherency - - /* Flush and disable the L1 data cache */ - mov r0, #TEGRA_FLUSH_CACHE_LOUIS - bl tegra_disable_clean_inv_dcache - - mov32 r0, TEGRA_IRAM_RESET_BASE_VIRT - ldr r4, =__tegra20_cpu1_resettable_status_offset - mov r3, #CPU_RESETTABLE - strb r3, [r0, r4] - - bl tegra_cpu_do_idle - - /* - * cpu may be reset while in wfi, which will return through - * tegra_resume to cpu_resume - * or interrupt may wake wfi, which will return here - * cpu state is unchanged - MMU is on, cache is on, coherency - * is off, and the data cache is off - * - * r11 contains the original actlr - */ - - bl tegra_pen_lock - - mov32 r0, TEGRA_IRAM_RESET_BASE_VIRT - ldr r4, =__tegra20_cpu1_resettable_status_offset - mov r3, #CPU_NOT_RESETTABLE - strb r3, [r0, r4] - - bl tegra_pen_unlock - - /* Re-enable the data cache */ - mrc p15, 0, r10, c1, c0, 0 - orr r10, r10, #CR_C - mcr p15, 0, r10, c1, c0, 0 - isb - - mcr p15, 0, r11, c1, c0, 1 @ reenable coherency - - /* Invalidate the TLBs & BTAC */ - mov r1, #0 - mcr p15, 0, r1, c8, c3, 0 @ invalidate shared TLBs - mcr p15, 0, r1, c7, c1, 6 @ invalidate shared BTAC - dsb - isb - - /* the cpu was running with coherency disabled, - * caches may be out of date */ - bl v7_flush_kern_cache_louis - - ldmfd sp!, {r4 - r11, pc} -ENDPROC(tegra20_sleep_cpu_secondary_finish) - /* * tegra20_tear_down_cpu * diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h index 63e2205cbc82..4978def9db46 100644 --- a/arch/arm/mach-tegra/sleep.h +++ b/arch/arm/mach-tegra/sleep.h @@ -114,8 +114,6 @@ .endm #else -void tegra_pen_lock(void); -void tegra_pen_unlock(void); void tegra_resume(void); int tegra_sleep_cpu_finish(unsigned long); void tegra_disable_clean_inv_dcache(u32 flag); @@ -123,16 +121,6 @@ void tegra_disable_clean_inv_dcache(u32 flag); void tegra20_hotplug_shutdown(void); void tegra30_hotplug_shutdown(void); -void tegra20_cpu_shutdown(int cpu); -int tegra20_cpu_is_resettable_soon(void); -void tegra20_cpu_clear_resettable(void); -#ifdef CONFIG_ARCH_TEGRA_2x_SOC -void tegra20_cpu_set_resettable_soon(void); -#else -static inline void tegra20_cpu_set_resettable_soon(void) {} -#endif - -int tegra20_sleep_cpu_secondary_finish(unsigned long); void tegra20_tear_down_cpu(void); int tegra30_sleep_cpu_secondary_finish(unsigned long); void tegra30_tear_down_cpu(void); From patchwork Tue Dec 3 00:41:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11270101 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2D23513B6 for ; Tue, 3 Dec 2019 00:43:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0B7D02070B for ; Tue, 3 Dec 2019 00:43:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="aTO2dQSx" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726214AbfLCAnS (ORCPT ); Mon, 2 Dec 2019 19:43:18 -0500 Received: from mail-lj1-f194.google.com ([209.85.208.194]:34928 "EHLO mail-lj1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726484AbfLCAmI (ORCPT ); Mon, 2 Dec 2019 19:42:08 -0500 Received: by mail-lj1-f194.google.com with SMTP id j6so1710108lja.2; Mon, 02 Dec 2019 16:42:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lggSWbCZNX4XnKftuaR7fJMavXczez7/+ave15WB09g=; b=aTO2dQSxtLsNpKvjGhKfHA+Dho91ikfU8iK1uYu3rGNE2aNovu7uxkfuQ/kwT7Mjgd 3yR11LoWQUL9+fplIPmQa7Wxr+TtrD2nmmIPFC+B+QSYvc1QtTNAWDH0ZNM9A8sKH0kA FPbKItZbr1LfXl0BaKHsFQz1IdRKprpiOJnVpLjb4qXaDFP16T3JBROWQR+cJ7JES5Kb bQV6W4MKcatkvB5N5s9js2GkiDCafVKxRqu1pYUuJj1vEqcJvn+JAcIn6g0nxtOb+/Xa aLGr4hJlSc1HPcdKPvWXo9hToCdmpv7sHN1ozja6oIsBFEjnHswMWSbuL6uavXjeHSWD Vahw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lggSWbCZNX4XnKftuaR7fJMavXczez7/+ave15WB09g=; b=h0iFwQFqEvDYUtaRRs1n28hNhylSvOcML/taJfunUkC2yXtojTP9jIfbiWk8liDmm/ 5KnrvUZXt7PPvhHkM00MWQ/XasA6TegQV8DMuIsrqhc43WKzRhJOPI6jcHtNiMi56UQ7 mC/bPe6zj2ELFvDBhOFhWgP28HlgUKwAeVvLMz1KSByWOjbWA86wFYZeTjAIySddIIxO vXLJ/nnCSdmpwrat+sTfPjqGliEH4NR0dUw3G2DT9KoL9J3cYEmpo8Nvtn1xrlfV85Y7 ihaEVngGdSRWkjCFDMXceCBc7V8au3bJYRcwuJcvdNEPz4GFCu6jWmxW03yYDxvXRFwO N9Hw== X-Gm-Message-State: APjAAAWg6YI0aAYbBhbAHe/SWXjzQqT52d6scRBJJInyRKKNPwGZOxPt Ael+Zx/n6HvBfG9dxaMAHprBYfok X-Google-Smtp-Source: APXvYqxyFBmKkomgX9ONthvnDaB7i4Ua9A46iWU2dN3NEFThRceWwppnAHq/XfJY6OEZKPJNaj+f+w== X-Received: by 2002:a2e:8e69:: with SMTP id t9mr851837ljk.91.1575333725701; Mon, 02 Dec 2019 16:42:05 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id y21sm456384ljm.25.2019.12.02.16.42.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2019 16:42:05 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 04/19] ARM: tegra: Change tegra_set_cpu_in_lp2() type to void Date: Tue, 3 Dec 2019 03:41:01 +0300 Message-Id: <20191203004116.11771-5-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191203004116.11771-1-digetx@gmail.com> References: <20191203004116.11771-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The Tegra30 CPUIDLE driver has intention to check whether primary CPU was the last CPU that entered LP2 (CC6) idle-state, but that functionality never got utilized because driver never supported the CC6 state for the case where any secondary CPU is online. The new cpuidle driver will properly support CC6 on Tegra30, including the case where secondary CPUs are online, and that knowledge about what CPUs entered into CC6 won't be needed at all because new driver will use different approach by making use of the coupled idle-state and explicitly parking secondary CPUs before entering into CC6. Thus this patch is just a minor cleanup change. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra30.c | 14 ++++---------- arch/arm/mach-tegra/pm.c | 8 +------- arch/arm/mach-tegra/pm.h | 2 +- 3 files changed, 6 insertions(+), 18 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c index c6128526877d..a3ce8dabfe18 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra30.c +++ b/arch/arm/mach-tegra/cpuidle-tegra30.c @@ -98,22 +98,16 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev, int index) { bool entered_lp2 = false; - bool last_cpu; local_fiq_disable(); - last_cpu = tegra_set_cpu_in_lp2(); + tegra_set_cpu_in_lp2(); cpu_pm_enter(); - if (dev->cpu == 0) { - if (last_cpu) - entered_lp2 = tegra30_cpu_cluster_power_down(dev, drv, - index); - else - cpu_do_idle(); - } else { + if (dev->cpu == 0) + entered_lp2 = tegra30_cpu_cluster_power_down(dev, drv, index); + else entered_lp2 = tegra30_cpu_core_power_down(dev, drv, index); - } cpu_pm_exit(); tegra_clear_cpu_in_lp2(); diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index 1ff499068bb1..a72f9a2d3cb7 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -123,11 +123,9 @@ void tegra_clear_cpu_in_lp2(void) spin_unlock(&tegra_lp2_lock); } -bool tegra_set_cpu_in_lp2(void) +void tegra_set_cpu_in_lp2(void) { int phy_cpu_id = cpu_logical_map(smp_processor_id()); - bool last_cpu = false; - cpumask_t *cpu_lp2_mask = tegra_cpu_lp2_mask; u32 *cpu_in_lp2 = tegra_cpu_lp2_mask; spin_lock(&tegra_lp2_lock); @@ -135,11 +133,7 @@ bool tegra_set_cpu_in_lp2(void) BUG_ON((*cpu_in_lp2 & BIT(phy_cpu_id))); *cpu_in_lp2 |= BIT(phy_cpu_id); - if ((phy_cpu_id == 0) && cpumask_equal(cpu_lp2_mask, cpu_online_mask)) - last_cpu = true; - spin_unlock(&tegra_lp2_lock); - return last_cpu; } static int tegra_sleep_cpu(unsigned long v2p) diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h index b9cc12222bb1..2c294f6365c0 100644 --- a/arch/arm/mach-tegra/pm.h +++ b/arch/arm/mach-tegra/pm.h @@ -24,7 +24,7 @@ void tegra30_lp1_iram_hook(void); void tegra30_sleep_core_init(void); void tegra_clear_cpu_in_lp2(void); -bool tegra_set_cpu_in_lp2(void); +void tegra_set_cpu_in_lp2(void); void tegra_idle_lp2_last(void); extern void (*tegra_tear_down_cpu)(void); From patchwork Tue Dec 3 00:41:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11270097 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1C47F13B6 for ; Tue, 3 Dec 2019 00:43:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EF49B2070B for ; Tue, 3 Dec 2019 00:43:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="n3LLOHE1" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727289AbfLCAnK (ORCPT ); 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[79.139.233.37]) by smtp.gmail.com with ESMTPSA id y21sm456384ljm.25.2019.12.02.16.42.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2019 16:42:06 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 05/19] ARM: tegra: Propagate error from tegra_idle_lp2_last() Date: Tue, 3 Dec 2019 03:41:02 +0300 Message-Id: <20191203004116.11771-6-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191203004116.11771-1-digetx@gmail.com> References: <20191203004116.11771-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Technically cpu_suspend() may fail and it's never good to lose information about failure. For example things like cpuidle core could correctly sample idling time in the case of failure. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra20.c | 6 ++++-- arch/arm/mach-tegra/cpuidle-tegra30.c | 4 +--- arch/arm/mach-tegra/pm.c | 8 ++++++-- arch/arm/mach-tegra/pm.h | 2 +- 4 files changed, 12 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index f7d5041e73cc..9789541adb7d 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -87,15 +87,17 @@ static bool tegra20_cpu_cluster_power_down(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { + bool ret; + while (!tegra_cpu_rail_off_ready()) cpu_relax(); - tegra_idle_lp2_last(); + ret = !tegra_idle_lp2_last(); if (cpu_online(1)) tegra20_wake_cpu1_from_reset(); - return true; + return ret; } #ifdef CONFIG_SMP diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c index a3ce8dabfe18..17cbd118abee 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra30.c +++ b/arch/arm/mach-tegra/cpuidle-tegra30.c @@ -68,9 +68,7 @@ static bool tegra30_cpu_cluster_power_down(struct cpuidle_device *dev, return false; } - tegra_idle_lp2_last(); - - return true; + return !tegra_idle_lp2_last(); } #ifdef CONFIG_SMP diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index a72f9a2d3cb7..a094acaca307 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -189,14 +189,16 @@ static void tegra_pm_set(enum tegra_suspend_mode mode) tegra_pmc_enter_suspend_mode(mode); } -void tegra_idle_lp2_last(void) +int tegra_idle_lp2_last(void) { + int err; + tegra_pm_set(TEGRA_SUSPEND_LP2); cpu_cluster_pm_enter(); suspend_cpu_complex(); - cpu_suspend(PHYS_OFFSET - PAGE_OFFSET, &tegra_sleep_cpu); + err = cpu_suspend(PHYS_OFFSET - PAGE_OFFSET, &tegra_sleep_cpu); /* * Resume L2 cache if it wasn't re-enabled early during resume, @@ -208,6 +210,8 @@ void tegra_idle_lp2_last(void) restore_cpu_complex(); cpu_cluster_pm_exit(); + + return err; } enum tegra_suspend_mode tegra_pm_validate_suspend_mode( diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h index 2c294f6365c0..7d72f31dee77 100644 --- a/arch/arm/mach-tegra/pm.h +++ b/arch/arm/mach-tegra/pm.h @@ -25,7 +25,7 @@ void tegra30_sleep_core_init(void); void tegra_clear_cpu_in_lp2(void); void tegra_set_cpu_in_lp2(void); -void tegra_idle_lp2_last(void); +int tegra_idle_lp2_last(void); extern void (*tegra_tear_down_cpu)(void); #ifdef CONFIG_PM_SLEEP From patchwork Tue Dec 3 00:41:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11270069 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5EFB0138D for ; Tue, 3 Dec 2019 00:42:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 32CC220715 for ; Tue, 3 Dec 2019 00:42:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="H+W2mi6Q" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726678AbfLCAmL (ORCPT ); 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[79.139.233.37]) by smtp.gmail.com with ESMTPSA id y21sm456384ljm.25.2019.12.02.16.42.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2019 16:42:07 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 06/19] ARM: tegra: Expose PM functions required for new cpuidle driver Date: Tue, 3 Dec 2019 03:41:03 +0300 Message-Id: <20191203004116.11771-7-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191203004116.11771-1-digetx@gmail.com> References: <20191203004116.11771-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The upcoming unified CPUIDLE driver will be added to the drivers/cpuidle/ directory and it will require all these exposed Tegra PM-core functions. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra114.c | 3 +- arch/arm/mach-tegra/cpuidle-tegra20.c | 2 +- arch/arm/mach-tegra/cpuidle-tegra30.c | 3 +- arch/arm/mach-tegra/irq.c | 3 +- arch/arm/mach-tegra/pm.h | 8 ----- arch/arm/mach-tegra/sleep.h | 1 - arch/arm/mach-tegra/tegra.c | 1 - .../mach-tegra => include/soc/tegra}/irq.h | 8 +++-- include/soc/tegra/pm.h | 31 +++++++++++++++++++ 9 files changed, 43 insertions(+), 17 deletions(-) rename {arch/arm/mach-tegra => include/soc/tegra}/irq.h (59%) diff --git a/arch/arm/mach-tegra/cpuidle-tegra114.c b/arch/arm/mach-tegra/cpuidle-tegra114.c index 5118f777fd66..2d8527837aeb 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra114.c +++ b/arch/arm/mach-tegra/cpuidle-tegra114.c @@ -12,13 +12,14 @@ #include +#include + #include #include #include #include #include "cpuidle.h" -#include "pm.h" #include "sleep.h" #ifdef CONFIG_PM_SLEEP diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index 9789541adb7d..fdfe92068e38 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -19,6 +19,7 @@ #include #include +#include #include #include @@ -27,7 +28,6 @@ #include "cpuidle.h" #include "iomap.h" #include "irq.h" -#include "pm.h" #include "reset.h" #include "sleep.h" diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c index 17cbd118abee..3e91c29891f7 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra30.c +++ b/arch/arm/mach-tegra/cpuidle-tegra30.c @@ -17,12 +17,13 @@ #include #include +#include + #include #include #include #include "cpuidle.h" -#include "pm.h" #include "sleep.h" #ifdef CONFIG_PM_SLEEP diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c index ace7a390b5fe..4e1ee70b2a3f 100644 --- a/arch/arm/mach-tegra/irq.c +++ b/arch/arm/mach-tegra/irq.c @@ -18,9 +18,10 @@ #include #include +#include + #include "board.h" #include "iomap.h" -#include "irq.h" #define SGI_MASK 0xFFFF diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h index 7d72f31dee77..81525f5f4a44 100644 --- a/arch/arm/mach-tegra/pm.h +++ b/arch/arm/mach-tegra/pm.h @@ -23,20 +23,12 @@ void tegra20_sleep_core_init(void); void tegra30_lp1_iram_hook(void); void tegra30_sleep_core_init(void); -void tegra_clear_cpu_in_lp2(void); -void tegra_set_cpu_in_lp2(void); -int tegra_idle_lp2_last(void); extern void (*tegra_tear_down_cpu)(void); #ifdef CONFIG_PM_SLEEP void tegra_init_suspend(void); -int tegra_pm_park_secondary_cpu(unsigned long cpu); #else static inline void tegra_init_suspend(void) {} -static inline int tegra_pm_park_secondary_cpu(unsigned long cpu) -{ - return -ENOTSUPP; -} #endif #endif /* _MACH_TEGRA_PM_H_ */ diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h index 4978def9db46..4718a3cb45a1 100644 --- a/arch/arm/mach-tegra/sleep.h +++ b/arch/arm/mach-tegra/sleep.h @@ -122,7 +122,6 @@ void tegra20_hotplug_shutdown(void); void tegra30_hotplug_shutdown(void); void tegra20_tear_down_cpu(void); -int tegra30_sleep_cpu_secondary_finish(unsigned long); void tegra30_tear_down_cpu(void); #endif diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c index 1e3b85923ca3..79184a077c84 100644 --- a/arch/arm/mach-tegra/tegra.c +++ b/arch/arm/mach-tegra/tegra.c @@ -42,7 +42,6 @@ #include "common.h" #include "cpuidle.h" #include "iomap.h" -#include "irq.h" #include "pm.h" #include "reset.h" #include "sleep.h" diff --git a/arch/arm/mach-tegra/irq.h b/include/soc/tegra/irq.h similarity index 59% rename from arch/arm/mach-tegra/irq.h rename to include/soc/tegra/irq.h index 7a94cf121448..8eb11a7109e4 100644 --- a/arch/arm/mach-tegra/irq.h +++ b/include/soc/tegra/irq.h @@ -3,9 +3,11 @@ * Copyright (c) 2012, NVIDIA Corporation. All rights reserved. */ -#ifndef __TEGRA_IRQ_H -#define __TEGRA_IRQ_H +#ifndef __SOC_TEGRA_IRQ_H +#define __SOC_TEGRA_IRQ_H +#if defined(CONFIG_ARM) bool tegra_pending_sgi(void); - #endif + +#endif /* __SOC_TEGRA_IRQ_H */ diff --git a/include/soc/tegra/pm.h b/include/soc/tegra/pm.h index 951fcd738d55..1974e8405098 100644 --- a/include/soc/tegra/pm.h +++ b/include/soc/tegra/pm.h @@ -6,6 +6,8 @@ #ifndef __SOC_TEGRA_PM_H__ #define __SOC_TEGRA_PM_H__ +#include + enum tegra_suspend_mode { TEGRA_SUSPEND_NONE = 0, TEGRA_SUSPEND_LP2, /* CPU voltage off */ @@ -20,6 +22,12 @@ tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode); /* low-level resume entry point */ void tegra_resume(void); + +int tegra30_sleep_cpu_secondary_finish(unsigned long arg); +void tegra_clear_cpu_in_lp2(void); +void tegra_set_cpu_in_lp2(void); +int tegra_idle_lp2_last(void); +int tegra_pm_park_secondary_cpu(unsigned long cpu); #else static inline enum tegra_suspend_mode tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode) @@ -30,6 +38,29 @@ tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode) static inline void tegra_resume(void) { } + +static inline int tegra30_sleep_cpu_secondary_finish(unsigned long arg) +{ + return -ENOTSUPP; +} + +static inline void tegra_clear_cpu_in_lp2(void) +{ +} + +static inline void tegra_set_cpu_in_lp2(void) +{ +} + +static inline int tegra_idle_lp2_last(void) +{ + return -ENOTSUPP; +} + +static inline int tegra_pm_park_secondary_cpu(unsigned long cpu) +{ + return -ENOTSUPP; +} #endif /* CONFIG_PM_SLEEP */ #endif /* __SOC_TEGRA_PM_H__ */ From patchwork Tue Dec 3 00:41:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11270095 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5B751138D for ; Tue, 3 Dec 2019 00:43:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3089A2084B for ; Tue, 3 Dec 2019 00:43:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="M8LSSJW2" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726114AbfLCAnF (ORCPT ); Mon, 2 Dec 2019 19:43:05 -0500 Received: from mail-lj1-f196.google.com ([209.85.208.196]:34453 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726645AbfLCAmL (ORCPT ); Mon, 2 Dec 2019 19:42:11 -0500 Received: by mail-lj1-f196.google.com with SMTP id m6so1718548ljc.1; Mon, 02 Dec 2019 16:42:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7l0r4bTRWBpFt6PewqwjEw8TsFxPLheHYvKsASQ9K3g=; b=M8LSSJW2Uw6JUYm3suu9jGhdrjBT/2FXbLuyyHC2Ei5uFD1uby5gn/OF8xlb/BxafZ Q2hGs9EoxAvECDVLf9czllZPogYEr0TfAzNjyC/oNfp1+N3bkGwnZvFeQUc2MyJvf5bC rs69VbhuNYCGJ+WpXf016rBk2yt5snxRRF/ufJHSngLwdPJkLN7uUw6ra3XcmNbilG/0 xcrV2Wh9oHo9brkhQfVChCtN0prh8dZgSCua4tmsXmVhumGrxnZA84dEI77GSyinQ30v b6GCrw1WV0FDrThFHSeyZ6M/D5cJAaPIn23xqeTEuzanU2VmddPhL2LH967NSet8ggpM MbTA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7l0r4bTRWBpFt6PewqwjEw8TsFxPLheHYvKsASQ9K3g=; b=PBjPbbc9QT4BQ1WHbGfZsINdUkmOAITd6ZHbhBQiB0kT1zCkcPGXjwnyakCUDxwmuQ 5/l2/wCPHm6CskAJRI+Se94RFLhcoZcfWLncT5kpn1SVllz4bq0iYtic5ArajJV87tzw +d4zKQeHX1P+P5pr7FJ+EIbccELukgT8tVn8cI/EyDlqqFkCOhrKeX/w7K9SERoP/PLF huQbsyCBLiZ1sXtDyxDg4FdHL3Gz/wIm7enUuofV5XSY1soMPrXsEq6x2IhbcJuZ1XwT uLPZE03G8pmEptEltC4Wsa7V+qJ5iJjWkvHp6zCr78M3brsLAL8sjWMctprT7/qJo4qk sdvQ== X-Gm-Message-State: APjAAAWGn7ks3V7O3/ZXarbWOzpNRBMAy4BIzLcy+Otm+l73IdJ8phIw Uzo8nZ0QEFJGTjPfHrI5AK/FqKDr X-Google-Smtp-Source: APXvYqwc02wIGwef/Bk9nH2aNaLXu30N6RCvcrkBGh7q8i/zFQKcjjkhR0KdUdf6poKZVhM+94Uy4Q== X-Received: by 2002:a2e:b537:: with SMTP id z23mr871541ljm.129.1575333728865; Mon, 02 Dec 2019 16:42:08 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id y21sm456384ljm.25.2019.12.02.16.42.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2019 16:42:08 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 07/19] ARM: tegra: Rename some of the newly exposed PM functions Date: Tue, 3 Dec 2019 03:41:04 +0300 Message-Id: <20191203004116.11771-8-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191203004116.11771-1-digetx@gmail.com> References: <20191203004116.11771-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Rename some of the recently exposed PM functions, prefixing them with "tegra_pm_" in order to make the naming of the PM functions consistent. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra114.c | 6 +++--- arch/arm/mach-tegra/cpuidle-tegra20.c | 6 +++--- arch/arm/mach-tegra/cpuidle-tegra30.c | 8 ++++---- arch/arm/mach-tegra/pm.c | 10 +++++----- arch/arm/mach-tegra/sleep-tegra30.S | 6 +++--- include/soc/tegra/pm.h | 16 ++++++++-------- 6 files changed, 26 insertions(+), 26 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra114.c b/arch/arm/mach-tegra/cpuidle-tegra114.c index 2d8527837aeb..858c30cc5dc7 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra114.c +++ b/arch/arm/mach-tegra/cpuidle-tegra114.c @@ -35,17 +35,17 @@ static int tegra114_idle_power_down(struct cpuidle_device *dev, { local_fiq_disable(); - tegra_set_cpu_in_lp2(); + tegra_pm_set_cpu_in_lp2(); cpu_pm_enter(); call_firmware_op(prepare_idle, TF_PM_MODE_LP2_NOFLUSH_L2); /* Do suspend by ourselves if the firmware does not implement it */ if (call_firmware_op(do_idle, 0) == -ENOSYS) - cpu_suspend(0, tegra30_sleep_cpu_secondary_finish); + cpu_suspend(0, tegra30_pm_secondary_cpu_suspend); cpu_pm_exit(); - tegra_clear_cpu_in_lp2(); + tegra_pm_clear_cpu_in_lp2(); local_fiq_enable(); diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index fdfe92068e38..9672c619f4bc 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -92,7 +92,7 @@ static bool tegra20_cpu_cluster_power_down(struct cpuidle_device *dev, while (!tegra_cpu_rail_off_ready()) cpu_relax(); - ret = !tegra_idle_lp2_last(); + ret = !tegra_pm_enter_lp2(); if (cpu_online(1)) tegra20_wake_cpu1_from_reset(); @@ -137,7 +137,7 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, local_fiq_disable(); - tegra_set_cpu_in_lp2(); + tegra_pm_set_cpu_in_lp2(); cpu_pm_enter(); if (dev->cpu == 0) @@ -146,7 +146,7 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, entered_lp2 = tegra20_idle_enter_lp2_cpu_1(dev, drv, index); cpu_pm_exit(); - tegra_clear_cpu_in_lp2(); + tegra_pm_clear_cpu_in_lp2(); local_fiq_enable(); diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c index 3e91c29891f7..a4f0add46a27 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra30.c +++ b/arch/arm/mach-tegra/cpuidle-tegra30.c @@ -69,7 +69,7 @@ static bool tegra30_cpu_cluster_power_down(struct cpuidle_device *dev, return false; } - return !tegra_idle_lp2_last(); + return !tegra_pm_enter_lp2(); } #ifdef CONFIG_SMP @@ -79,7 +79,7 @@ static bool tegra30_cpu_core_power_down(struct cpuidle_device *dev, { smp_wmb(); - cpu_suspend(0, tegra30_sleep_cpu_secondary_finish); + cpu_suspend(0, tegra30_pm_secondary_cpu_suspend); return true; } @@ -100,7 +100,7 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev, local_fiq_disable(); - tegra_set_cpu_in_lp2(); + tegra_pm_set_cpu_in_lp2(); cpu_pm_enter(); if (dev->cpu == 0) @@ -109,7 +109,7 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev, entered_lp2 = tegra30_cpu_core_power_down(dev, drv, index); cpu_pm_exit(); - tegra_clear_cpu_in_lp2(); + tegra_pm_clear_cpu_in_lp2(); local_fiq_enable(); diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index a094acaca307..7d9ef26e52a7 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -110,7 +110,7 @@ static void suspend_cpu_complex(void) flowctrl_cpu_suspend_enter(cpu); } -void tegra_clear_cpu_in_lp2(void) +void tegra_pm_clear_cpu_in_lp2(void) { int phy_cpu_id = cpu_logical_map(smp_processor_id()); u32 *cpu_in_lp2 = tegra_cpu_lp2_mask; @@ -123,7 +123,7 @@ void tegra_clear_cpu_in_lp2(void) spin_unlock(&tegra_lp2_lock); } -void tegra_set_cpu_in_lp2(void) +void tegra_pm_set_cpu_in_lp2(void) { int phy_cpu_id = cpu_logical_map(smp_processor_id()); u32 *cpu_in_lp2 = tegra_cpu_lp2_mask; @@ -189,7 +189,7 @@ static void tegra_pm_set(enum tegra_suspend_mode mode) tegra_pmc_enter_suspend_mode(mode); } -int tegra_idle_lp2_last(void) +int tegra_pm_enter_lp2(void) { int err; @@ -356,7 +356,7 @@ static int tegra_suspend_enter(suspend_state_t state) tegra_suspend_enter_lp1(); break; case TEGRA_SUSPEND_LP2: - tegra_set_cpu_in_lp2(); + tegra_pm_set_cpu_in_lp2(); break; default: break; @@ -377,7 +377,7 @@ static int tegra_suspend_enter(suspend_state_t state) tegra_suspend_exit_lp1(); break; case TEGRA_SUSPEND_LP2: - tegra_clear_cpu_in_lp2(); + tegra_pm_clear_cpu_in_lp2(); break; default: break; diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S index 3341a12bbb9c..5942cec9b6ef 100644 --- a/arch/arm/mach-tegra/sleep-tegra30.S +++ b/arch/arm/mach-tegra/sleep-tegra30.S @@ -262,11 +262,11 @@ ENTRY(tegra30_sleep_core_finish) ENDPROC(tegra30_sleep_core_finish) /* - * tegra30_sleep_cpu_secondary_finish(unsigned long v2p) + * tegra30_pm_secondary_cpu_suspend(unsigned long unused_arg) * * Enters LP2 on secondary CPU by exiting coherency and powergating the CPU. */ -ENTRY(tegra30_sleep_cpu_secondary_finish) +ENTRY(tegra30_pm_secondary_cpu_suspend) mov r7, lr /* Flush and disable the L1 data cache */ @@ -278,7 +278,7 @@ ENTRY(tegra30_sleep_cpu_secondary_finish) bl tegra30_cpu_shutdown mov r0, #1 @ never return here ret r7 -ENDPROC(tegra30_sleep_cpu_secondary_finish) +ENDPROC(tegra30_pm_secondary_cpu_suspend) /* * tegra30_tear_down_cpu diff --git a/include/soc/tegra/pm.h b/include/soc/tegra/pm.h index 1974e8405098..08477d7bfab9 100644 --- a/include/soc/tegra/pm.h +++ b/include/soc/tegra/pm.h @@ -23,10 +23,10 @@ tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode); /* low-level resume entry point */ void tegra_resume(void); -int tegra30_sleep_cpu_secondary_finish(unsigned long arg); -void tegra_clear_cpu_in_lp2(void); -void tegra_set_cpu_in_lp2(void); -int tegra_idle_lp2_last(void); +int tegra30_pm_secondary_cpu_suspend(unsigned long arg); +void tegra_pm_clear_cpu_in_lp2(void); +void tegra_pm_set_cpu_in_lp2(void); +int tegra_pm_enter_lp2(void); int tegra_pm_park_secondary_cpu(unsigned long cpu); #else static inline enum tegra_suspend_mode @@ -39,20 +39,20 @@ static inline void tegra_resume(void) { } -static inline int tegra30_sleep_cpu_secondary_finish(unsigned long arg) +static inline int tegra30_pm_secondary_cpu_suspend(unsigned long arg) { return -ENOTSUPP; } -static inline void tegra_clear_cpu_in_lp2(void) +static inline void tegra_pm_clear_cpu_in_lp2(void) { } -static inline void tegra_set_cpu_in_lp2(void) +static inline void tegra_pm_set_cpu_in_lp2(void) { } -static inline int tegra_idle_lp2_last(void) +static inline int tegra_pm_enter_lp2(void) { return -ENOTSUPP; } From patchwork Tue Dec 3 00:41:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11270093 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4189C138D for ; Tue, 3 Dec 2019 00:43:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1FDC320705 for ; Tue, 3 Dec 2019 00:43:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Mvds3uxX" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726791AbfLCAnA (ORCPT ); Mon, 2 Dec 2019 19:43:00 -0500 Received: from mail-lf1-f67.google.com ([209.85.167.67]:39334 "EHLO mail-lf1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726162AbfLCAmM (ORCPT ); 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[79.139.233.37]) by smtp.gmail.com with ESMTPSA id y21sm456384ljm.25.2019.12.02.16.42.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2019 16:42:09 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 08/19] ARM: tegra: Make outer_disable() open-coded Date: Tue, 3 Dec 2019 03:41:05 +0300 Message-Id: <20191203004116.11771-9-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191203004116.11771-1-digetx@gmail.com> References: <20191203004116.11771-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The outer_disable() of Tegra's suspend code is open-coded now since that helper produces spurious warning message about secondary CPUs being online when CPU enters into LP2 from cpuidle. The secondaries are actually halted by the cpuidle driver on entering into LP2 idle-state, but the online status is not touched by the cpuidle. This fixes a storm of warnings once LP2 idling state is enabled on Tegra30. The outer_disable() helper has sanity checks for interrupts and secondary CPUs being disabled and we are pretty confident about the interrupts state during of CPU idling / system suspend. The rail-off status check is added in this patch as equivalent for the "num_online_cpus() > 1". Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/pm.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index 7d9ef26e52a7..d1e1a61b12cf 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -138,6 +138,10 @@ void tegra_pm_set_cpu_in_lp2(void) static int tegra_sleep_cpu(unsigned long v2p) { + if (tegra_cpu_car_ops->rail_off_ready && + WARN_ON(!tegra_cpu_rail_off_ready())) + return -EBUSY; + /* * L2 cache disabling using kernel API only allowed when all * secondary CPU's are offline. Cache have to be disabled with @@ -146,9 +150,10 @@ static int tegra_sleep_cpu(unsigned long v2p) * if any of secondary CPU's is online and this is the LP2-idle * code-path only for Tegra20/30. */ - if (trusted_foundations_registered()) - outer_disable(); - +#ifdef CONFIG_OUTER_CACHE + if (trusted_foundations_registered() && outer_cache.disable) + outer_cache.disable(); +#endif /* * Note that besides of setting up CPU reset vector this firmware * call may also do the following, depending on the FW version: From patchwork Tue Dec 3 00:41:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11270073 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1588713B6 for ; Tue, 3 Dec 2019 00:42:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E897C20722 for ; Tue, 3 Dec 2019 00:42:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="LGDylwQ1" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726824AbfLCAmR (ORCPT ); Mon, 2 Dec 2019 19:42:17 -0500 Received: from mail-lf1-f66.google.com ([209.85.167.66]:33541 "EHLO mail-lf1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725954AbfLCAmN (ORCPT ); Mon, 2 Dec 2019 19:42:13 -0500 Received: by mail-lf1-f66.google.com with SMTP id n25so1439872lfl.0; Mon, 02 Dec 2019 16:42:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=L9kXKgBrYXH+hSm9TkMRosOtHlt6sNljimu1oTCcerc=; b=LGDylwQ1uES/B4cybQXOfkvOFEhf0Hm84ek9j4YkQe99WFBJwpYQTSlqLObeFSkH16 iAs0jzYnz4icjgNDVq5kavQUC0NULbYVB0io3HZU0xzCpvekX8ZCwTilMv4rEdD/tBAZ tUN8PKZJRi6CPLqYRNbNGkK8/VwUm56feKkLYoLmnPZIpLijdC8GB0iNA1tbwkw0ge+J 03GFZ5pLKRR/nzuUmtN6mvd4ITYfPCs6+7251TwM9a+wT8OJmSUQJYZDQ+DsazTMS5aD o0YjlkbOS2dL+y2Xw7RPjFCKi9qwrKJbgpwYFX8XEw96s/ssLcWxUoBS7ytHQQZPBMer 5BWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=L9kXKgBrYXH+hSm9TkMRosOtHlt6sNljimu1oTCcerc=; b=ucw5Elvt88/7JNhkP2WNjVJJv/P0nJAR0KfrXhRhqxGlK01DEbd0ay2JIofkMATwFC 2jitXzkNsmfxetL+EoLWMshoI71JEuMtSjkgpofLrBEEwuYW8U0TDwgA0m2XQGsT8BSD cHR2m99Gkghj71/xxOi8+fRpAfK5SNb7YmlraMbbw4LjOLQWZJcv6y4nS9odMN+4ZCRw Shjr6CII7IH3v3nTySXMHzMoBhX4E+bkKcwU4lWmGnYiCV933dicGHCYxi58mxqQm9UB pr2xU+HOopVMCrlNoUafNwOhCiufGcaAIVBsB0Z88FVfi6HzgKRDF2BOz07c+Szlxjna 4KSw== X-Gm-Message-State: APjAAAU0GunRrDMrzcfpaKNRVRI7/md8e8t4ejGADh4LLg0WWcRDexnx vgJfA/+UTSa+ZrzIR/5n43E= X-Google-Smtp-Source: APXvYqyCWZUYj7IQPwpmCQO5dZi3l3VfqdgaW/bUqPRVmQbxgEnXrSU1/qr8rk2oDFgLc2tLfKbcFw== X-Received: by 2002:ac2:568d:: with SMTP id 13mr1002023lfr.113.1575333730737; Mon, 02 Dec 2019 16:42:10 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id y21sm456384ljm.25.2019.12.02.16.42.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2019 16:42:10 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 09/19] arm: tegra20: cpuidle: Handle case where secondary CPU hangs on entering LP2 Date: Tue, 3 Dec 2019 03:41:06 +0300 Message-Id: <20191203004116.11771-10-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191203004116.11771-1-digetx@gmail.com> References: <20191203004116.11771-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org It is possible that something may go wrong with the secondary CPU, in that case it is much nicer to get a dump of the flow-controller state before hanging machine. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra20.c | 46 +++++++++++++++++++++++++-- 1 file changed, 44 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index 9672c619f4bc..f3a898f69a1d 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -83,14 +83,56 @@ static inline void tegra20_wake_cpu1_from_reset(void) } #endif +static void tegra20_report_cpus_state(void) +{ + unsigned int cpu, lcpu; + + pr_err("secondary CPU taking too long to park\n"); + + for_each_cpu(lcpu, cpu_possible_mask) { + cpu = cpu_logical_map(lcpu); + + pr_err("cpu%u: online=%d flowctrl_csr=0x%08x\n", + cpu, cpu_online(lcpu), flowctrl_read_cpu_csr(cpu)); + } +} + +static int tegra20_wait_for_secondary_cpu_parking(void) +{ + unsigned int retries = 3; + + while (retries--) { + ktime_t timeout = ktime_add_ms(ktime_get(), 500); + + /* + * The primary CPU0 core shall wait for the secondaries + * shutdown in order to power-off CPU's cluster safely. + * The timeout value depends on the current CPU frequency, + * it takes about 40-150us in average and over 1000us in + * a worst case scenario. + */ + do { + if (tegra_cpu_rail_off_ready()) + return 0; + + } while (ktime_before(ktime_get(), timeout)); + + tegra20_report_cpus_state(); + } + + pr_err("timed out waiting secondaries to park\n"); + + return -ETIMEDOUT; +} + static bool tegra20_cpu_cluster_power_down(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { bool ret; - while (!tegra_cpu_rail_off_ready()) - cpu_relax(); + if (tegra20_wait_for_secondary_cpu_parking()) + return false; ret = !tegra_pm_enter_lp2(); From patchwork Tue Dec 3 00:41:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11270075 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 413DB14B7 for ; Tue, 3 Dec 2019 00:42:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2042320722 for ; Tue, 3 Dec 2019 00:42:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="emlsPJmR" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726819AbfLCAmR (ORCPT ); Mon, 2 Dec 2019 19:42:17 -0500 Received: from mail-lj1-f195.google.com ([209.85.208.195]:44278 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726741AbfLCAmO (ORCPT ); Mon, 2 Dec 2019 19:42:14 -0500 Received: by mail-lj1-f195.google.com with SMTP id c19so1630377lji.11; Mon, 02 Dec 2019 16:42:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YS3LdxKq5b+UqxDE8Gb+7FH4eIFw8irwS8Dbd5Tpsrs=; b=emlsPJmRNGBdEP0DCWBUFtAq+/fSqOcidcQY5LOBKTpTine1WweRJKkNhZ7JLXNwcW aATS6UgvXwl2a7QD8OAPMJFFvZbksjOtPzVZfA9RSPsEKOx2OU9g05eTjC00gGIQJGhG VCYXkVwaB41Y58vYYp5mNLz67XQCvCge0EhbcYGLD5FjylEMqIzw+ZQ/FvhhWymVT/wh U/rr1xKlgi2BAHQ2Nhxx2ovrGSpy2l///42f2z9RY0L0Zz5DDsjer31krm3U3xQXUpIy lsyuZml2QdaEHpRhPzFlgy8gd/rBD+UuplsrkB4lg2+M+BJHH/ipTzwLSymSUynPUf4e X+fg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YS3LdxKq5b+UqxDE8Gb+7FH4eIFw8irwS8Dbd5Tpsrs=; b=DtwJ3QRzxk4yZ7exeIKzowXAfpmnncFqheAaVe3XMiZNfjb2a+EI36vtOjtaupKUtJ 3PDbvpv4ySgpXtQgFkGk/bHpkCFTvAcQoaZX4DiuBhULtPY/21tF6TAKN4CaswzcL5eb 0d1IT6GHpLzIXDXpdBHa1NtgOGjRlO1bnUxs3CEc+CjeX6N0RyOowdfIyfAsDxUBSDU6 cIok6bpmavcQt50Qp2uH2WYF8lbxx+W6UUMzyf+kWf4xHYeD8m6wuY6I5GMJ2MMBoxt4 j11256DRIokSrI9/fimRfQXApps0nUuvx9eQR865a405EM+RUeviVxF6aqmJJCofgyPT qhVw== X-Gm-Message-State: APjAAAUvLBywoPSLgVAQCA/qD0kvKIeGL2LCOP2ZYkaWtGON9K5THY1F pecTH00OAemZijUXq9MP1UFf7eHb X-Google-Smtp-Source: APXvYqyQBFgbeWgxsgFsudpDoLp6B5xeUCyg5Ux6CKxPw4eh2/mETwgXCa8JT67u+dnewwAbofeSqw== X-Received: by 2002:a2e:8eda:: with SMTP id e26mr826153ljl.65.1575333731754; Mon, 02 Dec 2019 16:42:11 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id y21sm456384ljm.25.2019.12.02.16.42.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2019 16:42:11 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 10/19] arm: tegra20: cpuidle: Make abort_flag atomic Date: Tue, 3 Dec 2019 03:41:07 +0300 Message-Id: <20191203004116.11771-11-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191203004116.11771-1-digetx@gmail.com> References: <20191203004116.11771-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Replace memory accessors with atomic API just to make code consistent with the abort_barrier. The new variant may be even more correct now since atomic_read() will prevent compiler from generating wrong things like carrying abort_flag value in a register instead of re-fetching it from memory. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra20.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index f3a898f69a1d..3f4c75dbb4aa 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -32,7 +32,7 @@ #include "sleep.h" #ifdef CONFIG_PM_SLEEP -static bool abort_flag; +static atomic_t abort_flag; static atomic_t abort_barrier; static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, struct cpuidle_driver *drv, @@ -167,13 +167,14 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, bool entered_lp2 = false; if (tegra_pending_sgi()) - WRITE_ONCE(abort_flag, true); + atomic_set(&abort_flag, 1); cpuidle_coupled_parallel_barrier(dev, &abort_barrier); - if (abort_flag) { + if (atomic_read(&abort_flag)) { cpuidle_coupled_parallel_barrier(dev, &abort_barrier); - abort_flag = false; /* clean flag for next coming */ + /* clean flag for next coming */ + atomic_set(&abort_flag, 0); return -EINTR; } From patchwork Tue Dec 3 00:41:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11270071 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B1104138D for ; Tue, 3 Dec 2019 00:42:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 902CC206E1 for ; Tue, 3 Dec 2019 00:42:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="aLOtU4r/" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726808AbfLCAmQ (ORCPT ); Mon, 2 Dec 2019 19:42:16 -0500 Received: from mail-lf1-f65.google.com ([209.85.167.65]:37755 "EHLO mail-lf1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726791AbfLCAmP (ORCPT ); Mon, 2 Dec 2019 19:42:15 -0500 Received: by mail-lf1-f65.google.com with SMTP id b15so1413423lfc.4; Mon, 02 Dec 2019 16:42:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YPWz6Eps+PhevUacVbz0yxoPDkrfT6VaPLM5BXqdcsI=; b=aLOtU4r//tQHJ0s0P85Xa2GTz9bMIPnWQbIWq0RIjUxJPAc5Gfy7ojVkUz8wlTY+2d 0L2B8iHVVr3F6ZMyhdIMq4tm6RbTAQ5fWPVytZWQUVifQ3CWm2g6FTroG1rAEXzpov/Z PNCkJ/FMlkgA0EJEnG2rCTEG2+oRpcYP6r36LKEnMA77d8IJ89q27mgeHJfSkLegZdkG Zho5xsE+6Xpqf6UM1Ltr8VDoaWXZcGnZ+qhKZ1jJSjsgr/EkfajrP0/H10jIm1jdqWxV PY54SwiB21bzhKz/w1xJY2DO5LBcKBDhKX2bt9eAWJjlcCSQTxfGEtShaI7GtxPVg8aw dYgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YPWz6Eps+PhevUacVbz0yxoPDkrfT6VaPLM5BXqdcsI=; b=tz+ibvIP6yt3eq5tk0nkCyYpa2B0qI0eBvucbduYij/USz8CF9oawgcC2TGrjBoAgK /1V/vQbLZj5w1hJl9G7fyDanhPzldR3/sPrtlGVVe7uRV/75Ib3c2mGcioifN8vkpE9F Qsdj3koLZrNwKdIQTXE3OMV6MxRY6B4WYjzKJOd5Hx3QLmzb48nmKNKnjHX9Krw5Hu4d CJEbWc0QZxqhhJKjWcCaiN8skTdz0jrntuRPFldXsWfKxQaqPRbePE/iztI89EFFFWhs cF3bgU7wU5JxqFK1XWvwHYXuNg+YEMg6fH5/2VdLtXkO2hSK0V4SyMBnHM6KmjrEpcqQ 5iAw== X-Gm-Message-State: APjAAAX/U1MuTKQU9lak1hYT27AS7/5YpTA6qnnjBEQDlAZw0izQp92j zLueoO5oDayuRiqNCSpXqkA= X-Google-Smtp-Source: APXvYqzCGutgD2DB6pOTAMV4est1pbVbMLLuTEe/8IXprp0YJhjGPp9cyqhBlQN0h55qaukg9EJC/Q== X-Received: by 2002:a19:7611:: with SMTP id c17mr983236lff.86.1575333732664; Mon, 02 Dec 2019 16:42:12 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id y21sm456384ljm.25.2019.12.02.16.42.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2019 16:42:12 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 11/19] arm: tegra20/30: cpuidle: Remove unnecessary memory barrier Date: Tue, 3 Dec 2019 03:41:08 +0300 Message-Id: <20191203004116.11771-12-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191203004116.11771-1-digetx@gmail.com> References: <20191203004116.11771-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org There is no good justification for smp_rmb() after returning from LP2 because there are no memory operations that require SMP synchronization. Thus remove the confusing barrier. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra20.c | 2 -- arch/arm/mach-tegra/cpuidle-tegra30.c | 2 -- 2 files changed, 4 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index 3f4c75dbb4aa..78cc424fac35 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -193,8 +193,6 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, local_fiq_enable(); - smp_rmb(); - return entered_lp2 ? index : 0; } #endif diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c index a4f0add46a27..80ae64bcdf50 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra30.c +++ b/arch/arm/mach-tegra/cpuidle-tegra30.c @@ -113,8 +113,6 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev, local_fiq_enable(); - smp_rmb(); - return (entered_lp2) ? index : 0; } #endif From patchwork Tue Dec 3 00:41:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11270077 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 21AE313B6 for ; Tue, 3 Dec 2019 00:42:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 01AE820717 for ; Tue, 3 Dec 2019 00:42:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="J2lygnRY" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726843AbfLCAmR (ORCPT ); Mon, 2 Dec 2019 19:42:17 -0500 Received: from mail-lf1-f67.google.com ([209.85.167.67]:46866 "EHLO mail-lf1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726805AbfLCAmQ (ORCPT ); Mon, 2 Dec 2019 19:42:16 -0500 Received: by mail-lf1-f67.google.com with SMTP id a17so1357495lfi.13; Mon, 02 Dec 2019 16:42:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7Er4Vc+z2ksR0zUUT5Njd+rmUl7+6DjOG6u4eDEnuSc=; b=J2lygnRYWnx4vzwi7HKXIyWtwvTVa7tK3dNI4j4nA95IjTgMVi4JQDgC171S1roy7z EQgJ/44YN9JumlaBJhIJYcpy7/YPktUH8i4CsIDC72ETHaQKX3XEC4Wm6YaSbhFT8Jpv TC8tM0wbxCrZ+4BsdNrNcZr8eiNOkejli/lJV9rMxTOtCQ+PwNx7YxXEL67RemehOzeT /4LT2QF2KrNTuovlKGaoZ7G+MEaT6m2husWmouNoJFFZjZlWWiuMXMeKy8DAc/gfX3r8 r4OUEe1P8jDFxw5EUamNPuadg4ybTggOvdfd90k3E8UlndMFkYY4RJwfrn4SQ7RqnJgK R1lA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7Er4Vc+z2ksR0zUUT5Njd+rmUl7+6DjOG6u4eDEnuSc=; b=ZJvslJO7PeNuoc5S7f+814jE3ag8QFp6hgFb5L9H9Zga911kDXgFyoSGP33FKEGG8s jGDoXuV8WJdsfPJWpEVfYs6xj5fawSb4QyyhyOGBJF7UgSlZ44pjOJEHWzIAGNh6JXib 0e93Ljb2EPkcHKfoyjvgLPMKKuzrqhgWuWEqyaAHiLJ2RZK+fiAOEHsm+7RHZkx4/N19 sAXgV4xQsJKgn2SkLv1MRckd9mBlkK/YJTT94cCQBL7QWVKitfjURfH8e2yKlBkGtxwX ZYLhXuMVwAbzHtD725KtRaQfTmxj/zDKyjeG61CwqOZGuG1R9bDNmN37dqqIfXDb25AQ KRcw== X-Gm-Message-State: APjAAAVfVzrCMitX2CTADTrW4aqXgRuMjVs1rT6DXAt8XgynOBwOkh/I oUmqE/MFKW82nFoA+/b1+gmmjmOV X-Google-Smtp-Source: APXvYqyYdC1ZeK54TKY4uYq4h3iOkIzqyAkex3VOXAi8DuXLsCh/MVu/UxqF/KaUTz75e40PMLK5Sw== X-Received: by 2002:ac2:508f:: with SMTP id f15mr992482lfm.146.1575333733523; Mon, 02 Dec 2019 16:42:13 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id y21sm456384ljm.25.2019.12.02.16.42.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2019 16:42:13 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 12/19] cpuidle: Avoid NULL dereference in cpuidle_driver_state_disabled() Date: Tue, 3 Dec 2019 03:41:09 +0300 Message-Id: <20191203004116.11771-13-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191203004116.11771-1-digetx@gmail.com> References: <20191203004116.11771-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The cpumask is NULL if cpuidle_driver_state_disabled() is called before cpuidle driver is initialized. This shouldn't be a problem for now because cpuidle drivers are registered quite early. The NVIDIA Tegra cpuidle driver is going to be moved to a later init stage and thus it could become a problem if PCIE driver is probed earlier than cpuidle. Signed-off-by: Dmitry Osipenko --- drivers/cpuidle/driver.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/cpuidle/driver.c b/drivers/cpuidle/driver.c index c76423aaef4d..f8164f56c420 100644 --- a/drivers/cpuidle/driver.c +++ b/drivers/cpuidle/driver.c @@ -403,6 +403,9 @@ void cpuidle_driver_state_disabled(struct cpuidle_driver *drv, int idx, mutex_lock(&cpuidle_lock); + if (!drv->cpumask) + goto unlock; + for_each_cpu(cpu, drv->cpumask) { struct cpuidle_device *dev = per_cpu(cpuidle_devices, cpu); @@ -415,5 +418,6 @@ void cpuidle_driver_state_disabled(struct cpuidle_driver *drv, int idx, dev->states_usage[idx].disable &= ~CPUIDLE_STATE_DISABLED_BY_DRIVER; } +unlock: mutex_unlock(&cpuidle_lock); } From patchwork Tue Dec 3 00:41:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11270079 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8E3E9138D for ; Tue, 3 Dec 2019 00:42:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5860D206E1 for ; Tue, 3 Dec 2019 00:42:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="r/D7SPSn" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726888AbfLCAmT (ORCPT ); Mon, 2 Dec 2019 19:42:19 -0500 Received: from mail-lf1-f68.google.com ([209.85.167.68]:38540 "EHLO mail-lf1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726139AbfLCAmS (ORCPT ); Mon, 2 Dec 2019 19:42:18 -0500 Received: by mail-lf1-f68.google.com with SMTP id r14so1411056lfm.5; Mon, 02 Dec 2019 16:42:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ESuiJE2hQr/ZSTBmtHjvYQ4sX6f/2dQYnnMtbMKp7Vo=; b=r/D7SPSnC8mN1xmtbZerwOrsygXzgOC1ahZ2fKWTH73GxifqttiOMcw3Wmw8tZgEBs Cc04uPm9i6QIZ6R7KWspRTdVPigwVP+56newWYqCd1mXeLskvW6VvfHCk9bJah6ZgEw1 oCkpoW8ppy+WpwgNmsGsjYurrri1L5jq1Wrswpv2l4DZKcB5TZonS6ZDo+JEs55CT6NF Rcv0LOtyWXtiCgoyRhTqIvhUUCPrpnfzYx+EDRcVMDIhEwBkAsz/GCtS17qieGZ9OvS4 R0oJV0aV0rQD5iB6qOwvVtH7cA/YczH1xzVYbiVLXoEUXCk2dBFjT5InG6RDXEp0hz1P XgGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ESuiJE2hQr/ZSTBmtHjvYQ4sX6f/2dQYnnMtbMKp7Vo=; b=k49pv6rNDPXHDX3cJ2R9n96fBB9xx9Tvn6PI2cbSXQGRZi00KcTPPPcK8NGJO63pfS 6nWNaeM04oF9kGdAcnmtlfN87IKjmZxWL6bNtfu0VGdBVeBdaUwVmJnsAQDAwhs7ZMSU bV2mBbepolu75UsunPIkdIGVCGrT5iDWqtGTdM5fApD4VLv2BWlUBWxbvYGoBjFI1Ks8 4dAZgLhC2f5kXkqLiEfqk6JSaJwZazRQGRFj7jGlM3Jjm+p04f2o0D5Kn96DYdUbf+7x EahVoGo5FflvTHkwbU3A5poAc0brNWVUdr1xVVYURhNeXuCw8gWorR4QD+W2fEV9E7hn F9tA== X-Gm-Message-State: APjAAAXNXzouARG/htxChbGc9wxGxv8dVpPwhetEEvCKlVoWTHBYojXF xAutCzFXZ1XtmvH2UfuqmcU= X-Google-Smtp-Source: APXvYqwrcCzJtLLkz6mrp1f5H/r4/QsKWcj0Zws/vQTDK3nA7bahQ1v/GRG2fgg+5T1zJU13l2xjQA== X-Received: by 2002:ac2:5504:: with SMTP id j4mr1081268lfk.144.1575333734472; Mon, 02 Dec 2019 16:42:14 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id y21sm456384ljm.25.2019.12.02.16.42.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2019 16:42:14 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 13/19] cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle Date: Tue, 3 Dec 2019 03:41:10 +0300 Message-Id: <20191203004116.11771-14-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191203004116.11771-1-digetx@gmail.com> References: <20191203004116.11771-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The driver's code is refactored in a way that will make it easy to support Tegra30/114/124 SoCs by this unified driver later on. The current functionality is equal to the old Tegra20 driver, only the code's structure changed a tad. This is also a proper platform driver now. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/Makefile | 3 - arch/arm/mach-tegra/cpuidle-tegra20.c | 215 -------------------- arch/arm/mach-tegra/cpuidle.c | 14 +- arch/arm/mach-tegra/cpuidle.h | 4 - drivers/cpuidle/Kconfig.arm | 8 + drivers/cpuidle/Makefile | 1 + drivers/cpuidle/cpuidle-tegra.c | 269 ++++++++++++++++++++++++++ include/soc/tegra/cpuidle.h | 2 +- 8 files changed, 281 insertions(+), 235 deletions(-) delete mode 100644 arch/arm/mach-tegra/cpuidle-tegra20.c create mode 100644 drivers/cpuidle/cpuidle-tegra.c diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 965862608ff6..8425bb5608d5 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -12,9 +12,6 @@ obj-y += sleep-tegra20.o obj-y += sleep-tegra30.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pm-tegra20.o -ifeq ($(CONFIG_CPU_IDLE),y) -obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += cpuidle-tegra20.o -endif obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pm-tegra30.o ifeq ($(CONFIG_CPU_IDLE),y) obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += cpuidle-tegra30.o diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c deleted file mode 100644 index 78cc424fac35..000000000000 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ /dev/null @@ -1,215 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * CPU idle driver for Tegra CPUs - * - * Copyright (c) 2010-2012, NVIDIA Corporation. - * Copyright (c) 2011 Google, Inc. - * Author: Colin Cross - * Gary King - * - * Rework for 3.3 by Peter De Schrijver - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#include "cpuidle.h" -#include "iomap.h" -#include "irq.h" -#include "reset.h" -#include "sleep.h" - -#ifdef CONFIG_PM_SLEEP -static atomic_t abort_flag; -static atomic_t abort_barrier; -static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index); -#define TEGRA20_MAX_STATES 2 -#else -#define TEGRA20_MAX_STATES 1 -#endif - -static struct cpuidle_driver tegra_idle_driver = { - .name = "tegra_idle", - .owner = THIS_MODULE, - .states = { - ARM_CPUIDLE_WFI_STATE_PWR(600), -#ifdef CONFIG_PM_SLEEP - { - .enter = tegra20_idle_lp2_coupled, - .exit_latency = 5000, - .target_residency = 10000, - .power_usage = 0, - .flags = CPUIDLE_FLAG_COUPLED | - CPUIDLE_FLAG_TIMER_STOP, - .name = "powered-down", - .desc = "CPU power gated", - }, -#endif - }, - .state_count = TEGRA20_MAX_STATES, - .safe_state_index = 0, -}; - -#ifdef CONFIG_PM_SLEEP -#ifdef CONFIG_SMP -static void tegra20_wake_cpu1_from_reset(void) -{ - /* enable cpu clock on cpu */ - tegra_enable_cpu_clock(1); - - /* take the CPU out of reset */ - tegra_cpu_out_of_reset(1); - - /* unhalt the cpu */ - flowctrl_write_cpu_halt(1, 0); -} -#else -static inline void tegra20_wake_cpu1_from_reset(void) -{ -} -#endif - -static void tegra20_report_cpus_state(void) -{ - unsigned int cpu, lcpu; - - pr_err("secondary CPU taking too long to park\n"); - - for_each_cpu(lcpu, cpu_possible_mask) { - cpu = cpu_logical_map(lcpu); - - pr_err("cpu%u: online=%d flowctrl_csr=0x%08x\n", - cpu, cpu_online(lcpu), flowctrl_read_cpu_csr(cpu)); - } -} - -static int tegra20_wait_for_secondary_cpu_parking(void) -{ - unsigned int retries = 3; - - while (retries--) { - ktime_t timeout = ktime_add_ms(ktime_get(), 500); - - /* - * The primary CPU0 core shall wait for the secondaries - * shutdown in order to power-off CPU's cluster safely. - * The timeout value depends on the current CPU frequency, - * it takes about 40-150us in average and over 1000us in - * a worst case scenario. - */ - do { - if (tegra_cpu_rail_off_ready()) - return 0; - - } while (ktime_before(ktime_get(), timeout)); - - tegra20_report_cpus_state(); - } - - pr_err("timed out waiting secondaries to park\n"); - - return -ETIMEDOUT; -} - -static bool tegra20_cpu_cluster_power_down(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - bool ret; - - if (tegra20_wait_for_secondary_cpu_parking()) - return false; - - ret = !tegra_pm_enter_lp2(); - - if (cpu_online(1)) - tegra20_wake_cpu1_from_reset(); - - return ret; -} - -#ifdef CONFIG_SMP -static bool tegra20_idle_enter_lp2_cpu_1(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - cpu_suspend(dev->cpu, tegra_pm_park_secondary_cpu); - - return true; -} -#else -static inline bool tegra20_idle_enter_lp2_cpu_1(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - return true; -} -#endif - -static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - bool entered_lp2 = false; - - if (tegra_pending_sgi()) - atomic_set(&abort_flag, 1); - - cpuidle_coupled_parallel_barrier(dev, &abort_barrier); - - if (atomic_read(&abort_flag)) { - cpuidle_coupled_parallel_barrier(dev, &abort_barrier); - /* clean flag for next coming */ - atomic_set(&abort_flag, 0); - return -EINTR; - } - - local_fiq_disable(); - - tegra_pm_set_cpu_in_lp2(); - cpu_pm_enter(); - - if (dev->cpu == 0) - entered_lp2 = tegra20_cpu_cluster_power_down(dev, drv, index); - else - entered_lp2 = tegra20_idle_enter_lp2_cpu_1(dev, drv, index); - - cpu_pm_exit(); - tegra_pm_clear_cpu_in_lp2(); - - local_fiq_enable(); - - return entered_lp2 ? index : 0; -} -#endif - -/* - * Tegra20 HW appears to have a bug such that PCIe device interrupts, whether - * they are legacy IRQs or MSI, are lost when LP2 is enabled. To work around - * this, simply disable LP2 if the PCI driver and DT node are both enabled. - */ -void tegra20_cpuidle_pcie_irqs_in_use(void) -{ - pr_info_once( - "Disabling cpuidle LP2 state, since PCIe IRQs are in use\n"); - cpuidle_driver_state_disabled(&tegra_idle_driver, 1, true); -} - -int __init tegra20_cpuidle_init(void) -{ - return cpuidle_register(&tegra_idle_driver, cpu_possible_mask); -} diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c index d565c44cfc93..eee85d517783 100644 --- a/arch/arm/mach-tegra/cpuidle.c +++ b/arch/arm/mach-tegra/cpuidle.c @@ -14,6 +14,7 @@ #include #include +#include #include @@ -23,8 +24,7 @@ void __init tegra_cpuidle_init(void) { switch (tegra_get_chip_id()) { case TEGRA20: - if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC)) - tegra20_cpuidle_init(); + platform_device_register_simple("tegra-cpuidle", -1, NULL, 0); break; case TEGRA30: if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC)) @@ -38,13 +38,3 @@ void __init tegra_cpuidle_init(void) break; } } - -void tegra_cpuidle_pcie_irqs_in_use(void) -{ - switch (tegra_get_chip_id()) { - case TEGRA20: - if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC)) - tegra20_cpuidle_pcie_irqs_in_use(); - break; - } -} diff --git a/arch/arm/mach-tegra/cpuidle.h b/arch/arm/mach-tegra/cpuidle.h index 4e1f459f5bd8..eeb37baf18e1 100644 --- a/arch/arm/mach-tegra/cpuidle.h +++ b/arch/arm/mach-tegra/cpuidle.h @@ -7,15 +7,11 @@ #define __MACH_TEGRA_CPUIDLE_H #ifdef CONFIG_CPU_IDLE -int tegra20_cpuidle_init(void); -void tegra20_cpuidle_pcie_irqs_in_use(void); int tegra30_cpuidle_init(void); int tegra114_cpuidle_init(void); void tegra_cpuidle_init(void); -void tegra_cpuidle_pcie_irqs_in_use(void); #else static inline void tegra_cpuidle_init(void) {} -static inline void tegra_cpuidle_pcie_irqs_in_use(void) {} #endif #endif diff --git a/drivers/cpuidle/Kconfig.arm b/drivers/cpuidle/Kconfig.arm index d8530475493c..6952bf7bb260 100644 --- a/drivers/cpuidle/Kconfig.arm +++ b/drivers/cpuidle/Kconfig.arm @@ -86,3 +86,11 @@ config ARM_MVEBU_V7_CPUIDLE depends on ARCH_MVEBU && !ARM64 help Select this to enable cpuidle on Armada 370, 38x and XP processors. + +config ARM_TEGRA_CPUIDLE + bool "CPU Idle Driver for NVIDIA Tegra SoCs" + depends on ARCH_TEGRA && !ARM64 + select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP + select ARM_CPU_SUSPEND + help + Select this to enable cpuidle for NVIDIA Tegra20/30/114/124 SoCs. diff --git a/drivers/cpuidle/Makefile b/drivers/cpuidle/Makefile index ee70d5cc5b99..a15e4808d295 100644 --- a/drivers/cpuidle/Makefile +++ b/drivers/cpuidle/Makefile @@ -22,6 +22,7 @@ obj-$(CONFIG_ARM_AT91_CPUIDLE) += cpuidle-at91.o obj-$(CONFIG_ARM_EXYNOS_CPUIDLE) += cpuidle-exynos.o obj-$(CONFIG_ARM_CPUIDLE) += cpuidle-arm.o obj-$(CONFIG_ARM_PSCI_CPUIDLE) += cpuidle-psci.o +obj-$(CONFIG_ARM_TEGRA_CPUIDLE) += cpuidle-tegra.o ############################################################################### # MIPS drivers diff --git a/drivers/cpuidle/cpuidle-tegra.c b/drivers/cpuidle/cpuidle-tegra.c new file mode 100644 index 000000000000..6f7955b9d4bd --- /dev/null +++ b/drivers/cpuidle/cpuidle-tegra.c @@ -0,0 +1,269 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * CPU idle driver for Tegra CPUs + * + * Copyright (c) 2010-2013, NVIDIA Corporation. + * Copyright (c) 2011 Google, Inc. + * Author: Colin Cross + * Gary King + * + * Rework for 3.3 by Peter De Schrijver + * + * Tegra20/124 driver unification by Dmitry Osipenko + */ + +#define pr_fmt(fmt) "tegra-cpuidle: " fmt + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include + +enum { + TEGRA_C1, + TEGRA_CC6, + TEGRA_STATE_COUNT, +}; + +static atomic_t tegra_idle_barrier; +static atomic_t tegra_abort_flag; + +static void tegra_cpuidle_report_cpus_state(void) +{ + unsigned int cpu, lcpu; + + pr_err("secondary CPU taking too long to park\n"); + + for_each_cpu(lcpu, cpu_possible_mask) { + cpu = cpu_logical_map(lcpu); + + pr_err("cpu%u: online=%d flowctrl_csr=0x%08x\n", + cpu, cpu_online(lcpu), flowctrl_read_cpu_csr(cpu)); + } +} + +static int tegra_cpuidle_wait_for_secondary_cpus_parking(void) +{ + unsigned int retries = 3; + + while (retries--) { + ktime_t timeout = ktime_add_ms(ktime_get(), 500); + + /* + * The primary CPU0 core shall wait for the secondaries + * shutdown in order to power-off CPU's cluster safely. + * The timeout value depends on the current CPU frequency, + * it takes about 40-150us in average and over 1000us in + * a worst case scenario. + */ + do { + if (tegra_cpu_rail_off_ready()) + return 0; + + } while (ktime_before(ktime_get(), timeout)); + + tegra_cpuidle_report_cpus_state(); + } + + pr_err("timed out waiting secondaries to park\n"); + + return -ETIMEDOUT; +} + +static void tegra_cpuidle_unpark_secondary_cpus(void) +{ + unsigned int cpu, lcpu; + + for_each_cpu(lcpu, cpu_online_mask) { + cpu = cpu_logical_map(lcpu); + + if (cpu > 0) { + tegra_enable_cpu_clock(cpu); + tegra_cpu_out_of_reset(cpu); + flowctrl_write_cpu_halt(cpu, 0); + } + } +} + +static int tegra_cpuidle_cc6_enter(unsigned int cpu) +{ + int ret; + + if (cpu > 0) { + ret = cpu_suspend(cpu, tegra_pm_park_secondary_cpu); + } else { + ret = tegra_cpuidle_wait_for_secondary_cpus_parking(); + if (!ret) + ret = tegra_pm_enter_lp2(); + + tegra_cpuidle_unpark_secondary_cpus(); + } + + return ret; +} + +static int tegra_cpuidle_coupled_barrier(struct cpuidle_device *dev) +{ + if (tegra_pending_sgi()) { + /* + * CPU got local interrupt that will be lost after GIC's + * shutdown because GIC driver doesn't save/restore the + * pending SGI state across CPU cluster PM. Abort and retry + * next time. + */ + atomic_set(&tegra_abort_flag, 1); + } + + cpuidle_coupled_parallel_barrier(dev, &tegra_idle_barrier); + + if (atomic_read(&tegra_abort_flag)) { + cpuidle_coupled_parallel_barrier(dev, &tegra_idle_barrier); + atomic_set(&tegra_abort_flag, 0); + return -EINTR; + } + + return 0; +} + +static int tegra_cpuidle_state_enter(struct cpuidle_device *dev, + int index, unsigned int cpu) +{ + int ret; + + /* + * CC6 state is the "CPU cluster power-off" state. In order to + * enter this state, at first the secondary CPU cores need to be + * parked into offline mode, then the last CPU should clean out + * remaining dirty cache lines into DRAM and trigger Flow Controller + * logic that turns off the cluster's power domain (which includes + * CPU cores, GIC and L2 cache). + */ + if (index == TEGRA_CC6) { + ret = tegra_cpuidle_coupled_barrier(dev); + if (ret) + return ret; + } + + local_fiq_disable(); + tegra_pm_set_cpu_in_lp2(); + cpu_pm_enter(); + + switch (index) { + case TEGRA_CC6: + ret = tegra_cpuidle_cc6_enter(cpu); + break; + default: + ret = -EINVAL; + break; + } + + cpu_pm_exit(); + tegra_pm_clear_cpu_in_lp2(); + local_fiq_enable(); + + return ret; +} + +static int tegra_cpuidle_enter(struct cpuidle_device *dev, + struct cpuidle_driver *drv, + int index) +{ + unsigned int cpu = cpu_logical_map(dev->cpu); + int err; + + err = tegra_cpuidle_state_enter(dev, index, cpu); + if (err && err != -EINTR) + pr_err_once("cpu%u failed to enter idle state %d err: %d\n", + cpu, index, err); + + return err ? -1 : index; +} + +/* + * The previous versions of Tegra CPUIDLE driver used a different "legacy" + * terminology for naming of the idling states, while this driver uses the + * new terminology. + * + * Mapping of the old terms into the new ones: + * + * Old | New + * --------- + * LP3 | C1 (CPU core clock gating) + * LP2 | C7 (CPU core power gating) + * LP2 | CC6 (CPU cluster power gating) + * + * Note that that the older CPUIDLE driver versions didn't explicitly + * differentiate the LP2 states because these states either used the same + * code path or because CC6 wasn't supported. + */ +static struct cpuidle_driver tegra_idle_driver = { + .name = "tegra_idle", + .states = { + [TEGRA_C1] = ARM_CPUIDLE_WFI_STATE_PWR(600), + [TEGRA_CC6] = { + .enter = tegra_cpuidle_enter, + .exit_latency = 5000, + .target_residency = 10000, + .power_usage = 0, + .flags = CPUIDLE_FLAG_TIMER_STOP | + CPUIDLE_FLAG_COUPLED, + .name = "CC6", + .desc = "CPU cluster powered off", + }, + }, + .state_count = TEGRA_STATE_COUNT, + .safe_state_index = TEGRA_C1, +}; + +/* + * Tegra20 HW appears to have a bug such that PCIe device interrupts, whether + * they are legacy IRQs or MSI, are lost when CC6 is enabled. To work around + * this, simply disable CC6 if the PCI driver and DT node are both enabled. + */ +void tegra_cpuidle_pcie_irqs_in_use(void) +{ + if (tegra_idle_driver.states[TEGRA_CC6].disabled || + tegra_get_chip_id() != TEGRA20) + return; + + pr_info("disabling CC6 state, since PCIe IRQs are in use\n"); + cpuidle_driver_state_disabled(&tegra_idle_driver, TEGRA_CC6, true); + tegra_idle_driver.states[TEGRA_CC6].disabled = true; +} + +static int tegra_cpuidle_probe(struct platform_device *pdev) +{ + /* + * Required suspend-resume functionality, which is provided by the + * Tegra-arch core and PMC driver, is unavailable if PM-sleep option + * is disabled. + */ + if (!IS_ENABLED(CONFIG_PM_SLEEP)) + tegra_idle_driver.states[TEGRA_CC6].disabled = true; + + return cpuidle_register(&tegra_idle_driver, cpu_possible_mask); +} + +static struct platform_driver tegra_cpuidle_driver = { + .probe = tegra_cpuidle_probe, + .driver = { + .name = "tegra-cpuidle", + }, +}; +builtin_platform_driver(tegra_cpuidle_driver); diff --git a/include/soc/tegra/cpuidle.h b/include/soc/tegra/cpuidle.h index 029ba1f4b2cc..5665975015d8 100644 --- a/include/soc/tegra/cpuidle.h +++ b/include/soc/tegra/cpuidle.h @@ -6,7 +6,7 @@ #ifndef __SOC_TEGRA_CPUIDLE_H__ #define __SOC_TEGRA_CPUIDLE_H__ -#if defined(CONFIG_ARM) && defined(CONFIG_ARCH_TEGRA) && defined(CONFIG_CPU_IDLE) +#ifdef CONFIG_ARM_TEGRA_CPUIDLE void tegra_cpuidle_pcie_irqs_in_use(void); #else static inline void tegra_cpuidle_pcie_irqs_in_use(void) From patchwork Tue Dec 3 00:41:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11270091 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E06FF14B7 for ; Tue, 3 Dec 2019 00:42:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id ABB8B20718 for ; Tue, 3 Dec 2019 00:42:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="gxiYQIHU" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726893AbfLCAmT (ORCPT ); Mon, 2 Dec 2019 19:42:19 -0500 Received: from mail-lf1-f65.google.com ([209.85.167.65]:44700 "EHLO mail-lf1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726810AbfLCAmT (ORCPT ); Mon, 2 Dec 2019 19:42:19 -0500 Received: by mail-lf1-f65.google.com with SMTP id v201so1368693lfa.11; Mon, 02 Dec 2019 16:42:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=aNNaq3lx4/WMV6CTzdXc6ZQ/h1nRf26kJ9ahDq/STKk=; b=gxiYQIHULwgNpKh4T0oNZv+2VYMDmIfWciCjWM23cUqvJ+Erb9suwqvYYUwOnNEchg 86SFUsMUuAAYsINHja10QW3R9RrlO+WJT7Poe7QYE+v14ofUezyf2Q40nIX8wYRugbOO fNZlPIET/nmqOzoldSJd09084g6Cd4NvKMqPVcjCq6x8DgfSt28cYTZT3/6aj5HrcGQh u/yHW/eWNwQJnQTsSs5ROZcinUjDWJ5UR1mLwLYjvBTy4ekl8NdmZ7nko54rXk5/313F uIDgBTK/6WQ2b64iynh7Ow6fNTI+B03yisPNbRjVR23gqTKvoxXBIfOWjT6t04PePNhK 1Tgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=aNNaq3lx4/WMV6CTzdXc6ZQ/h1nRf26kJ9ahDq/STKk=; b=mCv/Q0msrD+bAtYOD72ZevfNs1l+7i6jTjF50gd5fAItOfVRzreuyx8WHszeJoHvLR B/S8NLFJKvoxUSd+3Cs47UntsVaAiHCiUh+Pa1WppbSTSDvz0XvUSLONqTbcLYt2tKxv /q5Sq1iTW/6r8tEv9o1QrwWABgmdvlEPn1Wzsbs3DYwHKuQRY7WYp5sYeMRwa1Mf9kII HvdK61bqxvkyobfSZok2x4V6euNpug8Dj3P5YoiTMMa/+cixvxxE95c8B0xX0WAfdJoJ Zu3z+H5jkpnpVubucSNUZubRFPdVkZzBE+2QsoIFCI3uHmyg2piZkKTFDvXBHYqwau33 leAg== X-Gm-Message-State: APjAAAUzIc95zEXzR2zeFrArTXdMCyz31hU2++amcdIhMzWhrs/aZFYK 60j8SELqmRF6m8Pb826v3SA= X-Google-Smtp-Source: APXvYqwNaolr6Yg++PxZs7MQIifC2MeEBRAXv3u9MzvKJVrltxUm0t3hUKBiTcBz10wizmYUA86nwg== X-Received: by 2002:a19:7015:: with SMTP id h21mr1018239lfc.68.1575333735869; Mon, 02 Dec 2019 16:42:15 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id y21sm456384ljm.25.2019.12.02.16.42.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2019 16:42:14 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 14/19] cpuidle: tegra: Squash Tegra30 driver into the common driver Date: Tue, 3 Dec 2019 03:41:11 +0300 Message-Id: <20191203004116.11771-15-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191203004116.11771-1-digetx@gmail.com> References: <20191203004116.11771-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Tegra20 and Terga30 SoCs have common C1 and CC6 idling states and thus share the same code paths, there is no point in having separate drivers for a similar hardware. This patch merely moves functionality of the old driver into the new, although the CC6 state is kept disabled for now since old driver had a rudimentary support for this state (allowing to enter into CC6 only when secondary CPUs are put offline), while new driver can provide a full-featured support. The new feature will be enabled by another patch. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/Makefile | 3 - arch/arm/mach-tegra/cpuidle-tegra30.c | 123 -------------------------- arch/arm/mach-tegra/cpuidle.c | 5 +- arch/arm/mach-tegra/cpuidle.h | 1 - drivers/cpuidle/cpuidle-tegra.c | 71 +++++++++++++-- 5 files changed, 67 insertions(+), 136 deletions(-) delete mode 100644 arch/arm/mach-tegra/cpuidle-tegra30.c diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 8425bb5608d5..99c5f4274e5c 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -13,9 +13,6 @@ obj-y += sleep-tegra30.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pm-tegra20.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pm-tegra30.o -ifeq ($(CONFIG_CPU_IDLE),y) -obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += cpuidle-tegra30.o -endif obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c deleted file mode 100644 index 80ae64bcdf50..000000000000 --- a/arch/arm/mach-tegra/cpuidle-tegra30.c +++ /dev/null @@ -1,123 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * CPU idle driver for Tegra CPUs - * - * Copyright (c) 2010-2012, NVIDIA Corporation. - * Copyright (c) 2011 Google, Inc. - * Author: Colin Cross - * Gary King - * - * Rework for 3.3 by Peter De Schrijver - */ - -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include "cpuidle.h" -#include "sleep.h" - -#ifdef CONFIG_PM_SLEEP -static int tegra30_idle_lp2(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index); -#endif - -static struct cpuidle_driver tegra_idle_driver = { - .name = "tegra_idle", - .owner = THIS_MODULE, -#ifdef CONFIG_PM_SLEEP - .state_count = 2, -#else - .state_count = 1, -#endif - .states = { - [0] = ARM_CPUIDLE_WFI_STATE_PWR(600), -#ifdef CONFIG_PM_SLEEP - [1] = { - .enter = tegra30_idle_lp2, - .exit_latency = 2000, - .target_residency = 2200, - .power_usage = 0, - .flags = CPUIDLE_FLAG_TIMER_STOP, - .name = "powered-down", - .desc = "CPU power gated", - }, -#endif - }, -}; - -#ifdef CONFIG_PM_SLEEP -static bool tegra30_cpu_cluster_power_down(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - /* All CPUs entering LP2 is not working. - * Don't let CPU0 enter LP2 when any secondary CPU is online. - */ - if (num_online_cpus() > 1 || !tegra_cpu_rail_off_ready()) { - cpu_do_idle(); - return false; - } - - return !tegra_pm_enter_lp2(); -} - -#ifdef CONFIG_SMP -static bool tegra30_cpu_core_power_down(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - smp_wmb(); - - cpu_suspend(0, tegra30_pm_secondary_cpu_suspend); - - return true; -} -#else -static inline bool tegra30_cpu_core_power_down(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - return true; -} -#endif - -static int tegra30_idle_lp2(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - bool entered_lp2 = false; - - local_fiq_disable(); - - tegra_pm_set_cpu_in_lp2(); - cpu_pm_enter(); - - if (dev->cpu == 0) - entered_lp2 = tegra30_cpu_cluster_power_down(dev, drv, index); - else - entered_lp2 = tegra30_cpu_core_power_down(dev, drv, index); - - cpu_pm_exit(); - tegra_pm_clear_cpu_in_lp2(); - - local_fiq_enable(); - - return (entered_lp2) ? index : 0; -} -#endif - -int __init tegra30_cpuidle_init(void) -{ - return cpuidle_register(&tegra_idle_driver, NULL); -} diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c index eee85d517783..fa0dcf3c2c45 100644 --- a/arch/arm/mach-tegra/cpuidle.c +++ b/arch/arm/mach-tegra/cpuidle.c @@ -24,11 +24,8 @@ void __init tegra_cpuidle_init(void) { switch (tegra_get_chip_id()) { case TEGRA20: - platform_device_register_simple("tegra-cpuidle", -1, NULL, 0); - break; case TEGRA30: - if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC)) - tegra30_cpuidle_init(); + platform_device_register_simple("tegra-cpuidle", -1, NULL, 0); break; case TEGRA114: case TEGRA124: diff --git a/arch/arm/mach-tegra/cpuidle.h b/arch/arm/mach-tegra/cpuidle.h index eeb37baf18e1..5423a05a69f6 100644 --- a/arch/arm/mach-tegra/cpuidle.h +++ b/arch/arm/mach-tegra/cpuidle.h @@ -7,7 +7,6 @@ #define __MACH_TEGRA_CPUIDLE_H #ifdef CONFIG_CPU_IDLE -int tegra30_cpuidle_init(void); int tegra114_cpuidle_init(void); void tegra_cpuidle_init(void); #else diff --git a/drivers/cpuidle/cpuidle-tegra.c b/drivers/cpuidle/cpuidle-tegra.c index 6f7955b9d4bd..828b30e352ef 100644 --- a/drivers/cpuidle/cpuidle-tegra.c +++ b/drivers/cpuidle/cpuidle-tegra.c @@ -37,6 +37,7 @@ enum { TEGRA_C1, + TEGRA_C7, TEGRA_CC6, TEGRA_STATE_COUNT, }; @@ -118,6 +119,11 @@ static int tegra_cpuidle_cc6_enter(unsigned int cpu) return ret; } +static int tegra_cpuidle_c7_enter(void) +{ + return cpu_suspend(0, tegra30_pm_secondary_cpu_suspend); +} + static int tegra_cpuidle_coupled_barrier(struct cpuidle_device *dev) { if (tegra_pending_sgi()) { @@ -165,6 +171,9 @@ static int tegra_cpuidle_state_enter(struct cpuidle_device *dev, cpu_pm_enter(); switch (index) { + case TEGRA_C7: + ret = tegra_cpuidle_c7_enter(); + break; case TEGRA_CC6: ret = tegra_cpuidle_cc6_enter(cpu); break; @@ -180,6 +189,24 @@ static int tegra_cpuidle_state_enter(struct cpuidle_device *dev, return ret; } +static int tegra_cpuidle_adjust_state_index(int index, unsigned int cpu) +{ + /* + * On Tegra30 CPU0 can't be power-gated separately from secondary + * cores because it gates the whole CPU cluster. + */ + if (cpu != 0 || index != TEGRA_C7 || tegra_get_chip_id() != TEGRA30) + return index; + + /* put CPU0 into C1 if C7 is requested and secondaries are online */ + if (!IS_ENABLED(CONFIG_PM_SLEEP) || num_online_cpus() > 1) + index = TEGRA_C1; + else + index = TEGRA_CC6; + + return index; +} + static int tegra_cpuidle_enter(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) @@ -187,10 +214,17 @@ static int tegra_cpuidle_enter(struct cpuidle_device *dev, unsigned int cpu = cpu_logical_map(dev->cpu); int err; - err = tegra_cpuidle_state_enter(dev, index, cpu); - if (err && err != -EINTR) - pr_err_once("cpu%u failed to enter idle state %d err: %d\n", - cpu, index, err); + index = tegra_cpuidle_adjust_state_index(index, cpu); + if (dev->states_usage[index].disable) + return -1; + + if (index == TEGRA_C1) + err = arm_cpuidle_simple_enter(dev, drv, index); + else + err = tegra_cpuidle_state_enter(dev, index, cpu); + + if (err && (err != -EINTR || index != TEGRA_CC6)) + pr_err_once("failed to enter state %d err: %d\n", index, err); return err ? -1 : index; } @@ -216,6 +250,15 @@ static struct cpuidle_driver tegra_idle_driver = { .name = "tegra_idle", .states = { [TEGRA_C1] = ARM_CPUIDLE_WFI_STATE_PWR(600), + [TEGRA_C7] = { + .enter = tegra_cpuidle_enter, + .exit_latency = 2000, + .target_residency = 2200, + .power_usage = 100, + .flags = CPUIDLE_FLAG_TIMER_STOP, + .name = "C7", + .desc = "CPU core powered off", + }, [TEGRA_CC6] = { .enter = tegra_cpuidle_enter, .exit_latency = 5000, @@ -254,8 +297,26 @@ static int tegra_cpuidle_probe(struct platform_device *pdev) * Tegra-arch core and PMC driver, is unavailable if PM-sleep option * is disabled. */ - if (!IS_ENABLED(CONFIG_PM_SLEEP)) + if (!IS_ENABLED(CONFIG_PM_SLEEP)) { + tegra_idle_driver.states[TEGRA_C7].disabled = true; + tegra_idle_driver.states[TEGRA_CC6].disabled = true; + } + + /* + * Generic WFI state (also known as C1 or LP3) and the coupled CPU + * cluster power-off (CC6 or LP2) states are common for all Tegra SoCs. + */ + switch (tegra_get_chip_id()) { + case TEGRA20: + /* Tegra20 isn't capable to power-off individual CPU cores */ + tegra_idle_driver.states[TEGRA_C7].disabled = true; + break; + case TEGRA30: tegra_idle_driver.states[TEGRA_CC6].disabled = true; + break; + default: + return -EINVAL; + } return cpuidle_register(&tegra_idle_driver, cpu_possible_mask); } From patchwork Tue Dec 3 00:41:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11270089 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 64108138D for ; Tue, 3 Dec 2019 00:42:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 41DD120718 for ; Tue, 3 Dec 2019 00:42:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="etsioX30" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726897AbfLCAmU (ORCPT ); Mon, 2 Dec 2019 19:42:20 -0500 Received: from mail-lj1-f196.google.com ([209.85.208.196]:46246 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726845AbfLCAmT (ORCPT ); Mon, 2 Dec 2019 19:42:19 -0500 Received: by mail-lj1-f196.google.com with SMTP id z17so1624321ljk.13; Mon, 02 Dec 2019 16:42:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/vScFMEW5c6mcmahpQZvLBRpTO1V0ohLenYjntTCVwo=; b=etsioX30uZHdnWnYOmYEBjJi3Q+cfI/5mmTEm5MQ6/zv24CfUkwa9OUTLzGD6T+CcY hZ8Z/0ttdiKFxHbKRz7am+uBNHhRlPQw07qoQS/9v+vywxpRlJxvJtjyHFk85MOx2FYc 3ygHgWSlY8FYMk/pKX4oAzQqqzp+nKamEwGJB5/tWCNxSF3eNQwWCQ7h4hpzv3nn8Gei 1Cgx0/tohUMzIbHubYqrhGXtiETxkYXKjFQ515ImuYtWckNK1WfXH4/zIyrOR9DlLjXm Pfm+NSm9EgDIJemDuCPn2LOaFiVLvO7G4tXd1R8db7Zm048i56ZRsHF2GO8WAVHq3PKe rb6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/vScFMEW5c6mcmahpQZvLBRpTO1V0ohLenYjntTCVwo=; b=DW/HcnXzC4+KH3iyLXm+GHNdXlo5sXmEJlc/EiD9YYGc3adUQeIZ+IWMeHS1D47CfD RMF6ipN4E0PsYOmL9B7SqCSzBn13BkO4GqVnbAb1REQj1kjb2TuaTMwen7p+XFLP2+5F IVHZr0LQg9p6jTzTviVB0htbn+gw5JOXT2Vq3klM2uvkdod/EJdh6AlsoEVQANOAUxT3 Td5vclwxXD+1TKWKlU491YDsllCGd3nJxdxhlB8vXdDrmpP5YR658C7E2y2+hH1DqwA/ zW/Doj6/F3mgmu+y4sqIvhQsjiJjVIYQbDegc3yGiqIYDHOR1OIxqwTolLTu4U6eOXgj IYSA== X-Gm-Message-State: APjAAAW7C/89gBLauD+BzGoInPlkAKz+ZnvbnGYFPR8xJ29yxq4bI2SD 2VFVVuNE4gu1YwuMUYFhv9PbgDkp X-Google-Smtp-Source: APXvYqz9xkaiorJSpQ2XyvedcG3TqAAgSLBV9czN755y6OVTLrynxhsLoLgj+T5w/yJy+Kztv6GZyw== X-Received: by 2002:a2e:9596:: with SMTP id w22mr864195ljh.21.1575333736974; Mon, 02 Dec 2019 16:42:16 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id y21sm456384ljm.25.2019.12.02.16.42.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2019 16:42:16 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 15/19] cpuidle: tegra: Support CPU cluster power-down state on Tegra30 Date: Tue, 3 Dec 2019 03:41:12 +0300 Message-Id: <20191203004116.11771-16-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191203004116.11771-1-digetx@gmail.com> References: <20191203004116.11771-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The new Tegra CPU Idle driver now has a unified code path for the coupled CC6 (LP2) state, this allows to enable the deepest idling state on Tegra30 SoC where the whole CPU cluster is power-gated. Signed-off-by: Dmitry Osipenko --- drivers/cpuidle/cpuidle-tegra.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/cpuidle/cpuidle-tegra.c b/drivers/cpuidle/cpuidle-tegra.c index 828b30e352ef..bacc1d1532cd 100644 --- a/drivers/cpuidle/cpuidle-tegra.c +++ b/drivers/cpuidle/cpuidle-tegra.c @@ -312,7 +312,6 @@ static int tegra_cpuidle_probe(struct platform_device *pdev) tegra_idle_driver.states[TEGRA_C7].disabled = true; break; case TEGRA30: - tegra_idle_driver.states[TEGRA_CC6].disabled = true; break; default: return -EINVAL; From patchwork Tue Dec 3 00:41:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11270085 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F141113B6 for ; Tue, 3 Dec 2019 00:42:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BBFD820705 for ; Tue, 3 Dec 2019 00:42:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="c9P4+7sy" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726350AbfLCAms (ORCPT ); Mon, 2 Dec 2019 19:42:48 -0500 Received: from mail-lf1-f66.google.com ([209.85.167.66]:42653 "EHLO mail-lf1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726877AbfLCAmV (ORCPT ); Mon, 2 Dec 2019 19:42:21 -0500 Received: by mail-lf1-f66.google.com with SMTP id y19so1380394lfl.9; Mon, 02 Dec 2019 16:42:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=03OvV9pEr9jc+nGQ03vHAZI105V2runKZV3pjqJ8mRU=; b=c9P4+7syliP2vzcliPp/6xQHTTHhPydc1HFSt7JVxELTPl13zUoKw/hczSJnecCVtc ttD8nIYyhu2KSYCYs4P251K8jGdsyunnmTGAtCJP6IrCLaxverTFkVv+iG5uTZi/Vq90 AY2nDqbcxXFo5rX87SMY2YOgO+W5+BXgGgk4dZb3W71LLR3CH7JeHavH6mS3UQWPd7Ek vz4ffzO6Z7f5DxcvyseV7g5joJ/vhfX/yb5TrmraDwoZWWXaVddwdrp4JXe0+7qfyf+o 6JLrsTjddc41LOqw3UYtlUJOaXZ1EHkGgPUC3qpjP7DHp/6VoeCgvss7cMNmOm1YYqMz gGjg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=03OvV9pEr9jc+nGQ03vHAZI105V2runKZV3pjqJ8mRU=; b=tGGTadUQI2OscSOHJSDAS3HKMGdw9qwvI0FBnHcw+X72Z8G6fmqMzlMPphz0J05Eao 8sXS4rlquDXV/Bw78hT9vrvtcyCCKnqN7ovhi/QYaKEdyD2lhl6hH5KpLOXI7ZDwsui5 bWFxX8V2rxZJe2JqXUjQzU6TOaJyn/dvNjCEoA4B1T8/+vOM6JXUTpq8cvKIsQ+f3tD7 47A1BkKGZzjRA2QS5bcLsuhJa7tQAcnA5tdklBjTiCwI3jIx5Aqc5AdXRF+V6uYkKwZI ygxVWnij64OGzN7VASwYWYsilSrV8Hf0Jj8pjZjzs418dhjh8hrTaeacKERyrzo8AjbC zHLA== X-Gm-Message-State: APjAAAUsmzgHzv9O/lkGaGRUv1q5HOiyS8HJi67gc3++uXvD5TjZEkcJ 1tbBaW+8PfCT7vbnkOVtc0TRRcpQ X-Google-Smtp-Source: APXvYqwW87XP5NtbJuPvF28HKEIBalCbQTDb5gzU+tB8Q8DK7PdBP1cLpfk3e5ZaQSWwe1vObYKqSg== X-Received: by 2002:a19:2486:: with SMTP id k128mr1015236lfk.1.1575333738068; Mon, 02 Dec 2019 16:42:18 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id y21sm456384ljm.25.2019.12.02.16.42.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2019 16:42:17 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 16/19] cpuidle: tegra: Squash Tegra114 driver into the common driver Date: Tue, 3 Dec 2019 03:41:13 +0300 Message-Id: <20191203004116.11771-17-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191203004116.11771-1-digetx@gmail.com> References: <20191203004116.11771-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Tegra20/30/114/124 SoCs have common idling states, thus there is no much point in having separate drivers for a similar hardware. This patch moves Tegra114/124 arch/ drivers into the common driver without any functional changes. The CC6 state is kept disabled on Tegra114/124 because the core Tegra PM code needs some more work in order to support that state. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/Makefile | 7 -- arch/arm/mach-tegra/cpuidle-tegra114.c | 90 -------------------------- arch/arm/mach-tegra/cpuidle.c | 37 ----------- arch/arm/mach-tegra/cpuidle.h | 16 ----- arch/arm/mach-tegra/tegra.c | 6 +- drivers/cpuidle/cpuidle-tegra.c | 44 ++++++++++++- 6 files changed, 47 insertions(+), 153 deletions(-) delete mode 100644 arch/arm/mach-tegra/cpuidle-tegra114.c delete mode 100644 arch/arm/mach-tegra/cpuidle.c delete mode 100644 arch/arm/mach-tegra/cpuidle.h diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 99c5f4274e5c..07572b5373b8 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -10,19 +10,12 @@ obj-y += sleep.o obj-y += tegra.o obj-y += sleep-tegra20.o obj-y += sleep-tegra30.o -obj-$(CONFIG_CPU_IDLE) += cpuidle.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pm-tegra20.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pm-tegra30.o obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_ARCH_TEGRA_114_SOC) += pm-tegra30.o -ifeq ($(CONFIG_CPU_IDLE),y) -obj-$(CONFIG_ARCH_TEGRA_114_SOC) += cpuidle-tegra114.o -endif obj-$(CONFIG_ARCH_TEGRA_124_SOC) += pm-tegra30.o -ifeq ($(CONFIG_CPU_IDLE),y) -obj-$(CONFIG_ARCH_TEGRA_124_SOC) += cpuidle-tegra114.o -endif obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += board-paz00.o diff --git a/arch/arm/mach-tegra/cpuidle-tegra114.c b/arch/arm/mach-tegra/cpuidle-tegra114.c deleted file mode 100644 index 858c30cc5dc7..000000000000 --- a/arch/arm/mach-tegra/cpuidle-tegra114.c +++ /dev/null @@ -1,90 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2013, NVIDIA Corporation. All rights reserved. - */ - -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include -#include -#include -#include - -#include "cpuidle.h" -#include "sleep.h" - -#ifdef CONFIG_PM_SLEEP -#define TEGRA114_MAX_STATES 2 -#else -#define TEGRA114_MAX_STATES 1 -#endif - -#ifdef CONFIG_PM_SLEEP -static int tegra114_idle_power_down(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - local_fiq_disable(); - - tegra_pm_set_cpu_in_lp2(); - cpu_pm_enter(); - - call_firmware_op(prepare_idle, TF_PM_MODE_LP2_NOFLUSH_L2); - - /* Do suspend by ourselves if the firmware does not implement it */ - if (call_firmware_op(do_idle, 0) == -ENOSYS) - cpu_suspend(0, tegra30_pm_secondary_cpu_suspend); - - cpu_pm_exit(); - tegra_pm_clear_cpu_in_lp2(); - - local_fiq_enable(); - - return index; -} - -static void tegra114_idle_enter_s2idle(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - tegra114_idle_power_down(dev, drv, index); -} -#endif - -static struct cpuidle_driver tegra_idle_driver = { - .name = "tegra_idle", - .owner = THIS_MODULE, - .state_count = TEGRA114_MAX_STATES, - .states = { - [0] = ARM_CPUIDLE_WFI_STATE_PWR(600), -#ifdef CONFIG_PM_SLEEP - [1] = { - .enter = tegra114_idle_power_down, - .enter_s2idle = tegra114_idle_enter_s2idle, - .exit_latency = 500, - .target_residency = 1000, - .flags = CPUIDLE_FLAG_TIMER_STOP, - .power_usage = 0, - .name = "powered-down", - .desc = "CPU power gated", - }, -#endif - }, -}; - -int __init tegra114_cpuidle_init(void) -{ - if (!psci_smp_available()) - return cpuidle_register(&tegra_idle_driver, NULL); - - return 0; -} diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c deleted file mode 100644 index fa0dcf3c2c45..000000000000 --- a/arch/arm/mach-tegra/cpuidle.c +++ /dev/null @@ -1,37 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * arch/arm/mach-tegra/cpuidle.c - * - * CPU idle driver for Tegra CPUs - * - * Copyright (c) 2010-2012, NVIDIA Corporation. - * Copyright (c) 2011 Google, Inc. - * Author: Colin Cross - * Gary King - * - * Rework for 3.3 by Peter De Schrijver - */ - -#include -#include -#include - -#include - -#include "cpuidle.h" - -void __init tegra_cpuidle_init(void) -{ - switch (tegra_get_chip_id()) { - case TEGRA20: - case TEGRA30: - platform_device_register_simple("tegra-cpuidle", -1, NULL, 0); - break; - case TEGRA114: - case TEGRA124: - if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) || - IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC)) - tegra114_cpuidle_init(); - break; - } -} diff --git a/arch/arm/mach-tegra/cpuidle.h b/arch/arm/mach-tegra/cpuidle.h deleted file mode 100644 index 5423a05a69f6..000000000000 --- a/arch/arm/mach-tegra/cpuidle.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2012, NVIDIA Corporation. All rights reserved. - */ - -#ifndef __MACH_TEGRA_CPUIDLE_H -#define __MACH_TEGRA_CPUIDLE_H - -#ifdef CONFIG_CPU_IDLE -int tegra114_cpuidle_init(void); -void tegra_cpuidle_init(void); -#else -static inline void tegra_cpuidle_init(void) {} -#endif - -#endif diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c index 79184a077c84..eeacff626546 100644 --- a/arch/arm/mach-tegra/tegra.c +++ b/arch/arm/mach-tegra/tegra.c @@ -36,11 +36,11 @@ #include #include #include +#include #include #include "board.h" #include "common.h" -#include "cpuidle.h" #include "iomap.h" #include "pm.h" #include "reset.h" @@ -85,7 +85,6 @@ static void __init tegra_dt_init(void) static void __init tegra_dt_init_late(void) { tegra_init_suspend(); - tegra_cpuidle_init(); if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && of_machine_is_compatible("compal,paz00")) @@ -98,6 +97,9 @@ static void __init tegra_dt_init_late(void) if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) && of_machine_is_compatible("nvidia,tegra30")) platform_device_register_simple("tegra20-cpufreq", -1, NULL, 0); + + if (IS_ENABLED(CONFIG_ARM_TEGRA_CPUIDLE) && !psci_smp_available()) + platform_device_register_simple("tegra-cpuidle", -1, NULL, 0); } static const char * const tegra_dt_board_compat[] = { diff --git a/drivers/cpuidle/cpuidle-tegra.c b/drivers/cpuidle/cpuidle-tegra.c index bacc1d1532cd..bbd7999a3910 100644 --- a/drivers/cpuidle/cpuidle-tegra.c +++ b/drivers/cpuidle/cpuidle-tegra.c @@ -24,6 +24,7 @@ #include #include +#include #include #include @@ -32,6 +33,7 @@ #include #include +#include #include #include @@ -45,6 +47,11 @@ enum { static atomic_t tegra_idle_barrier; static atomic_t tegra_abort_flag; +static inline bool tegra_cpuidle_using_firmware(void) +{ + return firmware_ops->prepare_idle && firmware_ops->do_idle; +} + static void tegra_cpuidle_report_cpus_state(void) { unsigned int cpu, lcpu; @@ -121,6 +128,16 @@ static int tegra_cpuidle_cc6_enter(unsigned int cpu) static int tegra_cpuidle_c7_enter(void) { + int err; + + if (tegra_cpuidle_using_firmware()) { + err = call_firmware_op(prepare_idle, TF_PM_MODE_LP2_NOFLUSH_L2); + if (err) + return err; + + return call_firmware_op(do_idle, 0); + } + return cpu_suspend(0, tegra30_pm_secondary_cpu_suspend); } @@ -229,6 +246,13 @@ static int tegra_cpuidle_enter(struct cpuidle_device *dev, return err ? -1 : index; } +static void tegra114_enter_s2idle(struct cpuidle_device *dev, + struct cpuidle_driver *drv, + int index) +{ + tegra_cpuidle_enter(dev, drv, index); +} + /* * The previous versions of Tegra CPUIDLE driver used a different "legacy" * terminology for naming of the idling states, while this driver uses the @@ -290,6 +314,15 @@ void tegra_cpuidle_pcie_irqs_in_use(void) tegra_idle_driver.states[TEGRA_CC6].disabled = true; } +static void tegra_cpuidle_setup_tegra114_c7_state(void) +{ + struct cpuidle_state *s = &tegra_idle_driver.states[TEGRA_C7]; + + s->enter_s2idle = tegra114_enter_s2idle; + s->target_residency = 1000; + s->exit_latency = 500; +} + static int tegra_cpuidle_probe(struct platform_device *pdev) { /* @@ -298,7 +331,9 @@ static int tegra_cpuidle_probe(struct platform_device *pdev) * is disabled. */ if (!IS_ENABLED(CONFIG_PM_SLEEP)) { - tegra_idle_driver.states[TEGRA_C7].disabled = true; + if (!tegra_cpuidle_using_firmware()) + tegra_idle_driver.states[TEGRA_C7].disabled = true; + tegra_idle_driver.states[TEGRA_CC6].disabled = true; } @@ -313,6 +348,13 @@ static int tegra_cpuidle_probe(struct platform_device *pdev) break; case TEGRA30: break; + case TEGRA114: + case TEGRA124: + tegra_cpuidle_setup_tegra114_c7_state(); + + /* coupled CC6 (LP2) state isn't implemented yet */ + tegra_idle_driver.states[TEGRA_CC6].disabled = true; + break; default: return -EINVAL; } From patchwork Tue Dec 3 00:41:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11270087 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3841F13B6 for ; Tue, 3 Dec 2019 00:42:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 15FD320718 for ; Tue, 3 Dec 2019 00:42:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="hnvt7O4u" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725903AbfLCAmw (ORCPT ); Mon, 2 Dec 2019 19:42:52 -0500 Received: from mail-lj1-f195.google.com ([209.85.208.195]:45806 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726791AbfLCAmU (ORCPT ); Mon, 2 Dec 2019 19:42:20 -0500 Received: by mail-lj1-f195.google.com with SMTP id d20so1623106ljc.12; Mon, 02 Dec 2019 16:42:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=iAu8VzWG/+L0QpU5qi5zuwKYWMMJhtbx3vr03UqSLdU=; b=hnvt7O4ur4Gc5jo6tBCMQ+373oJLCfmF0wKSyvBVPRmGra49O/M0LW6eyOrOE/Qrgf qIfuGySay7GzP/LxO2BGO5KeLpJlUJvZs0MrNbCMckATerI1jaIbhiJMbATVmdFWiayG gGrcE4mY7pN2Ol5OjFSRAXhLPtbdbNC1DS1QXCefXWRtdVgvtZQ8FbfDgMnGMyugbRzc KhTCoraYdpLeGgM6aZxN4UfHmE77bKjAf4mqN2RWI5sSG4qoabVlF36t3c66Nhp1LpNi s2M2XL3uGo+IGHaj3XWhF8w7TngbDoRDtuLCDT5+xEQ+BGFGdpqRJCYkEDTj1RZB7Nuk 0hFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=iAu8VzWG/+L0QpU5qi5zuwKYWMMJhtbx3vr03UqSLdU=; b=Pg7zwT5l0m3DYADK+9FcT/WVujoT3N2gzK94dcN5lHvax/WEoTC9yjOdyTlAWKfV+3 Yu59VSVId7s9khoCQ9qV0GvakP78MHJh3UqxtKAfXUwc2AJ09xFpeBDMwzhE4WN0WbnA 3C2YO2TVOdqihEqGvbzqUKIsPkk8z6g6+Kg7ZHcxM7n7fW2GAwYvZcZlT4gvQc1Nkm5G cjqwOeI9Vyfs7tGH1kdrwvjFM0jjy1VxG0LvkMic/DV3P5pyiMt+AHuYImyT7kYoAtD9 hfbrv1l/8VrQUgbH5I9k0MN/WuUzfA4B4rD1At9vezSGFOpC7QMgmva26ZpUMnk7BfBJ TUwA== X-Gm-Message-State: APjAAAVtwtdESwa40CIaFOKglr9YnB/VHARewP2g1CNw0pEpPWwwRhtX kBVMbFHzPv0VGO2ejpdCvaA= X-Google-Smtp-Source: APXvYqw9Io9lTNijDet9+E0yfZEj0NuyVytiKA1BHZLYA9S3gp5sr9w3N0StSAkPBMOmUd6kXXy6Fw== X-Received: by 2002:a2e:809a:: with SMTP id i26mr870450ljg.108.1575333739076; Mon, 02 Dec 2019 16:42:19 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id y21sm456384ljm.25.2019.12.02.16.42.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2019 16:42:18 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 17/19] cpuidle: tegra: Disable CC6 state if LP2 unavailable Date: Tue, 3 Dec 2019 03:41:14 +0300 Message-Id: <20191203004116.11771-18-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191203004116.11771-1-digetx@gmail.com> References: <20191203004116.11771-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org LP2 suspending could be unavailable, for example if it is disabled in a device-tree. CC6 cpuidle state won't work in that case. Signed-off-by: Dmitry Osipenko --- drivers/cpuidle/cpuidle-tegra.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/cpuidle/cpuidle-tegra.c b/drivers/cpuidle/cpuidle-tegra.c index bbd7999a3910..077ff15e32fb 100644 --- a/drivers/cpuidle/cpuidle-tegra.c +++ b/drivers/cpuidle/cpuidle-tegra.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include @@ -325,6 +326,10 @@ static void tegra_cpuidle_setup_tegra114_c7_state(void) static int tegra_cpuidle_probe(struct platform_device *pdev) { + /* LP2 could be disabled in device-tree */ + if (tegra_pmc_get_suspend_mode() < TEGRA_SUSPEND_LP2) + tegra_idle_driver.states[TEGRA_CC6].disabled = true; + /* * Required suspend-resume functionality, which is provided by the * Tegra-arch core and PMC driver, is unavailable if PM-sleep option From patchwork Tue Dec 3 00:41:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11270081 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8A46513B6 for ; Tue, 3 Dec 2019 00:42:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 699782071F for ; Tue, 3 Dec 2019 00:42:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="KC+5/s44" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726990AbfLCAmX (ORCPT ); Mon, 2 Dec 2019 19:42:23 -0500 Received: from mail-lj1-f193.google.com ([209.85.208.193]:38358 "EHLO mail-lj1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726925AbfLCAmW (ORCPT ); Mon, 2 Dec 2019 19:42:22 -0500 Received: by mail-lj1-f193.google.com with SMTP id k8so1686363ljh.5; Mon, 02 Dec 2019 16:42:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=d0mK1Z7qoFE2PZhFBqu+ALZHCAnCtCbOKYMTfyLZ6ec=; b=KC+5/s44yjC+sGvGgutLBMU6HME7FKCgF+Tezsa0DgIckWH2D5WXBH4REhnM3dKW6O WybjWeABQ8PkL58tiYzf5k8F0v4C5KqLiLiXIxU/SsdlcDehxaRuafXhQrDq/imdelt6 NC6HpZ9Jr8kvlMFXHDhzYauCItMi+dYq1Crba97nMzyGyuNhWt6EjkS0joX4buTTo4EA IHqGgfXV/567S3CVvv1J08p8Ivdf8uXZMmcc2CwOu6//Y/g/540ofuVI10/EZuj4cnEs YNhfZp/vuZ7Vm0ZlQPVsrLvtGMfoUeP2Xp2kRDrypqqrk9f9PPjNW+dFGOU2vwOIHJsq aEjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=d0mK1Z7qoFE2PZhFBqu+ALZHCAnCtCbOKYMTfyLZ6ec=; b=nVZmoRQewdscguT6ATuVR1W0tN2EEB/VjxsXFZxcFjv3efr5cnvtwAXrIQ9ibmHX2c 0i92zwWzDTX6M4WHNgji6jFCY46b9QDzHv6FL5Lf109L8idG+X7LAy7mV/HWrOoEu6FQ ahiBhmnAR9Jadj+LfSncnZKOY+cbnEeOVsITGiDj/v/q3kGePO40GkkmE1FUUnfxgo+K ZwLjiEjqmthiwDubVsDNDime31UKf689zwTdQ4Bgrv6/SI9+FOTRKxtBywFttdLLsK4O 3gm01mCWrPgzQxfsGgfpmX4dKoo7h50kIYm6iuch2cS7TfJmVkVwyCUUN3sdzmAn8iuw iikg== X-Gm-Message-State: APjAAAVYZzvSCMtaWVanAd7FIs9k0hvI8q4XxwAq1kwAkx6UkdVidxP4 QWRWEUZFMWP9rG50HLBowI8= X-Google-Smtp-Source: APXvYqzuOaDi1w2VYKYtjXSXPnGq/WjZ67cZD2LiTfoJD/V2fG4riQ84gJiNZOska3OXND03onH5uw== X-Received: by 2002:a2e:978d:: with SMTP id y13mr878257lji.103.1575333740100; Mon, 02 Dec 2019 16:42:20 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id y21sm456384ljm.25.2019.12.02.16.42.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2019 16:42:19 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 18/19] ARM: multi_v7_defconfig: Enable Tegra cpuidle driver Date: Tue, 3 Dec 2019 03:41:15 +0300 Message-Id: <20191203004116.11771-19-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191203004116.11771-1-digetx@gmail.com> References: <20191203004116.11771-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The Tegra CPU Idle driver was moved out into driver/cpuidle/ directory and it is now a proper platform driver. Signed-off-by: Dmitry Osipenko --- arch/arm/configs/multi_v7_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index 24962d0e71c7..293f0cea076c 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -113,6 +113,7 @@ CONFIG_CPU_IDLE=y CONFIG_ARM_CPUIDLE=y CONFIG_ARM_ZYNQ_CPUIDLE=y CONFIG_ARM_EXYNOS_CPUIDLE=y +CONFIG_ARM_TEGRA_CPUIDLE=y CONFIG_KERNEL_MODE_NEON=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_TRUSTED_FOUNDATIONS=y From patchwork Tue Dec 3 00:41:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11270083 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A7A68138D for ; Tue, 3 Dec 2019 00:42:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8654A2071E for ; Tue, 3 Dec 2019 00:42:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="KQSRPXn4" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727022AbfLCAmZ (ORCPT ); Mon, 2 Dec 2019 19:42:25 -0500 Received: from mail-lj1-f193.google.com ([209.85.208.193]:45808 "EHLO mail-lj1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726741AbfLCAmX (ORCPT ); Mon, 2 Dec 2019 19:42:23 -0500 Received: by mail-lj1-f193.google.com with SMTP id d20so1623172ljc.12; Mon, 02 Dec 2019 16:42:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=imnnqxS4XYlJpcakyQfZSF6VXI+HvHKYNPt5DnEHnHw=; b=KQSRPXn4dUWHiByc6z92JVtNZBcewSoNB63v8EpDiJLOctxI+DrD4FdetkFcXfOqNu W4440cv7tgGsPwweeDbXinwiJiBZyE5MTWhDcDoegUFWVyz5SERh6Zp6QygmHO5Yswi5 jEMBlze9I21XWX02tseSd+Jg11a5y+9e1o8JwzbI34EVw84oQ4z3UsiXKhXGKVAN5ZQf 5mJxI3mATgM/547yGymzdiY/kEm3lbk9suW4asOLeIldUA8mlWjcQZrWb4PDdpMAAv+G u4tEGfnPrGG3Ej1pfFHWoDDV5/kACvdwjrtV7FB2v5MZk/H7TerauQg2b9O07jT0Lav8 O+7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=imnnqxS4XYlJpcakyQfZSF6VXI+HvHKYNPt5DnEHnHw=; b=M5jmkthkhDhKXsO6qQkqghnGrzXV5cyqA5DcCwpen2ADjlHtFLO6wvobfwCWNmyMLt qf2Odn4qYmw6itBG/12FiLUuhRyTKE/n7yZ+pdClxkccQs7HpKnVw0w9gJC8uqqP8U7O WdB3xRm1oycr7qtHV2ZpXeWD5WalxxTaOBPbusjpFJVlQzg7dUua2vx39z3ABF+09kvt wpnsf3mzr8cUaAzJxkuSILmdxs6nPUWxYr6PJU1BPWDzGdx4V7gw2yjZmtNuiqP4HF8g bN6YX0Xup+LcMjxgDiNnA2FmUuprH5N+LWtCG3sFu9aZ4u6aUROcC8evn6OLcQFt+lEM rxdw== X-Gm-Message-State: APjAAAU90JTbxHcWjr0kTnikGr6UUK/dxnfhrIlRJDw/bBocDhTPZ519 hZXQTYYQHEzOz1Dm2HFfNaE= X-Google-Smtp-Source: APXvYqzA09wneGnM2Dv67ipc7OMdiZxhpUzqRw2d2tkvqoGdbSFHXer3A6mNASQuRYt6d7rMT6d9SA== X-Received: by 2002:a2e:89c6:: with SMTP id c6mr892313ljk.113.1575333741038; Mon, 02 Dec 2019 16:42:21 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id y21sm456384ljm.25.2019.12.02.16.42.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2019 16:42:20 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 19/19] ARM: tegra: Enable Tegra cpuidle driver in tegra_defconfig Date: Tue, 3 Dec 2019 03:41:16 +0300 Message-Id: <20191203004116.11771-20-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191203004116.11771-1-digetx@gmail.com> References: <20191203004116.11771-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The Tegra CPU Idle driver was moved out into driver/cpuidle/ directory and it is now a proper platform driver. Signed-off-by: Dmitry Osipenko --- arch/arm/configs/tegra_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig index a27592d3b1fa..aa94369bdd0f 100644 --- a/arch/arm/configs/tegra_defconfig +++ b/arch/arm/configs/tegra_defconfig @@ -25,6 +25,7 @@ CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y CONFIG_CPUFREQ_DT=y CONFIG_CPU_IDLE=y +CONFIG_ARM_TEGRA_CPUIDLE=y CONFIG_VFP=y CONFIG_NEON=y CONFIG_TRUSTED_FOUNDATIONS=y