From patchwork Thu Dec 5 02:19:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 11274069 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1154D13B6 for ; Thu, 5 Dec 2019 02:20:10 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DCED921744 for ; Thu, 5 Dec 2019 02:20:09 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="DSuXeI2q"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="BDAh3g1x" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DCED921744 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=qUBY7AXgbx+Jn2QhnCeTY4+tFiiK3hpSTF0Fhm2ase0=; b=DSuXeI2qwmKbTI 7iVmLsTI4yiAqHj+Ua+ep/ip/hdeladwtAPJg4CCaPS9U9Ai2tMjkvdfhmSWtcowb/Y4NdxBzsfi1 dMLghY8XADcmN1Mjkmh8/QyMmPHhoUJZsm4wKlV/ccpUUhjXxd8hx7/A24ubiZS2ARmEfnpMygy+O sy5Fee14p/ZvQehcOEerPEs1bsb/kgRhfE814vOR6tgWFmHkJOVMD1cBXUC3wL7E+eOCCPGrakCSy BUHFGy1E9bV3VxdF4E78HRKnI9CqNMWbGMYGoC6dXbrenh8I5Bms+VhvBW9Fpm+g9NP5ZFLXmLg4y 89ZkO3l6HjBwdImGDGpw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1icgkK-0008Iz-WB; Thu, 05 Dec 2019 02:20:01 +0000 Received: from mail-yb1-xb44.google.com ([2607:f8b0:4864:20::b44]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1icgk4-000819-PY for linux-arm-kernel@lists.infradead.org; Thu, 05 Dec 2019 02:19:47 +0000 Received: by mail-yb1-xb44.google.com with SMTP id v15so850538ybp.13 for ; Wed, 04 Dec 2019 18:19:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ihtlFABPBnoy2P/0nme6IxjB8k8abDvHtlVFp7u9UbU=; b=BDAh3g1xK+Dp/INnYnBHccAOCjdoDmNH2LUb6rnU1ddHgXY/FfDQcOHo+IZMytIrYY Iz707zpP3MFrvY9oUzNC+U6u+SRRU1mCidaJrbJe3Ws2wFreNL0ACLouRbtcBZSXcjiU DZgC48HC0ffaqLNfulk58wxYNEowiaTAC1AEH3be2v/H9BV5JuX7UUH9J+MGPwJLpfaK UvhHKENBybEbxXkNbaQeq1CTOavGJRIQTAZQnzWSPChQYgmRVhHQsEA7rXn17fHz5p5K IOC1Xh39Vo4PCMSjfP9JC/Q5f1bznBFhwTGOCjCKveo3D74IFP+6Sr5SQZtU37emCg35 iyLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ihtlFABPBnoy2P/0nme6IxjB8k8abDvHtlVFp7u9UbU=; b=p+frDuqDtnJ32g1y1vIG0mhMXzF5839VAryRC01cSB9gk3v5nv6Xsy4eZRyHCg8ysY 6zWtRC+hYqZGQpUU50i7sKN/KoAvfULpI/QdXTWXNfhZRJp83RqlGJM/Y+sVO4Z0QxG5 2ysBaYq85vw51rZy+FrQ5rja9Hu6tJrSpBvy5rZKzfeRNwl/izu3EqgajVGQmV/EnMZN QV3q6+fjWSqOmMHSliWF6JgIgajj8wiL4eHd9+IF5ZUOQqQlIvJ9rGWabA0d06v0JXjS tD4+EQbFT2iUJEcrwtQxw/3RDL5USsZ8tlKOr4kTm8f+q1q05Kw8iJrMNmMMz6bJQHB8 pz6Q== X-Gm-Message-State: APjAAAXDtG1SIcbTOgDt/ZMSKLX0yQN810Y60EpF9ycIsw1FvWlKnWum f9lSC9XHVjQzbB7GG65Li+9e/SRO X-Google-Smtp-Source: APXvYqxF86DnJ8ZxbtvUU5bmlYrvbRlVOwxtkpTsyn3N9R3JEX3DO5SwegbiASSWbFKP3wcWDE/MGA== X-Received: by 2002:a25:5788:: with SMTP id l130mr4227810ybb.334.1575512382963; Wed, 04 Dec 2019 18:19:42 -0800 (PST) Received: from localhost.localdomain (c-73-37-219-234.hsd1.mn.comcast.net. [73.37.219.234]) by smtp.gmail.com with ESMTPSA id l6sm4188449ywa.39.2019.12.04.18.19.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Dec 2019 18:19:42 -0800 (PST) From: Adam Ford To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/7] soc: imx: gpcv2: Rename imx8mq-power.h to imx8m-power.h Date: Wed, 4 Dec 2019 20:19:17 -0600 Message-Id: <20191205021924.25188-2-aford173@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191205021924.25188-1-aford173@gmail.com> References: <20191205021924.25188-1-aford173@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191204_181944_829264_3F6A09F1 X-CRM114-Status: GOOD ( 13.39 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:b44 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (aford173[at]gmail.com) 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (aford173[at]gmail.com) -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Fabio Estevam , Adam Ford , Sascha Hauer , linux-kernel@vger.kernel.org, Rob Herring , NXP Linux Team , Pengutronix Kernel Team , Shawn Guo Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org In preparation to add support for i.MX8M Mini, this renames the existing file to be more generic, so it doesn't become necessary to include multiple files to accomplish the same task in the future. Signed-off-by: Adam Ford --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 +- drivers/soc/imx/gpcv2.c | 2 +- include/dt-bindings/power/{imx8mq-power.h => imx8m-power.h} | 0 3 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 55a3d1c4bdf0..f73045539fb1 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -5,7 +5,7 @@ */ #include -#include +#include #include #include #include "dt-bindings/input/input.h" diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index b0dffb06c05d..250f740d2314 100644 --- a/drivers/soc/imx/gpcv2.c +++ b/drivers/soc/imx/gpcv2.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #define GPC_LPCR_A_CORE_BSC 0x000 diff --git a/include/dt-bindings/power/imx8mq-power.h b/include/dt-bindings/power/imx8m-power.h similarity index 100% rename from include/dt-bindings/power/imx8mq-power.h rename to include/dt-bindings/power/imx8m-power.h From patchwork Thu Dec 5 02:19:18 2019 Content-Type: text/plain; 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[73.37.219.234]) by smtp.gmail.com with ESMTPSA id l6sm4188449ywa.39.2019.12.04.18.19.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Dec 2019 18:19:44 -0800 (PST) From: Adam Ford To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/7] soc: imx: gpcv2: Update imx8m-power.h to include iMX8M Mini Date: Wed, 4 Dec 2019 20:19:18 -0600 Message-Id: <20191205021924.25188-3-aford173@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191205021924.25188-1-aford173@gmail.com> References: <20191205021924.25188-1-aford173@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191204_181946_101760_F3FAB247 X-CRM114-Status: GOOD ( 10.36 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:b44 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (aford173[at]gmail.com) 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (aford173[at]gmail.com) -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Fabio Estevam , Adam Ford , Sascha Hauer , linux-kernel@vger.kernel.org, Rob Herring , NXP Linux Team , Pengutronix Kernel Team , Shawn Guo Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org In preparation for i.MX8M Mini support in the GPC driver, the include file used by both the device tree and the source needs to have the appropriate references for it. Signed-off-by: Adam Ford --- include/dt-bindings/power/imx8m-power.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/include/dt-bindings/power/imx8m-power.h b/include/dt-bindings/power/imx8m-power.h index 8a513bd9166e..0054bba744b8 100644 --- a/include/dt-bindings/power/imx8m-power.h +++ b/include/dt-bindings/power/imx8m-power.h @@ -18,4 +18,18 @@ #define IMX8M_POWER_DOMAIN_MIPI_CSI2 9 #define IMX8M_POWER_DOMAIN_PCIE2 10 +#define IMX8MM_POWER_DOMAIN_MIPI 0 +#define IMX8MM_POWER_DOMAIN_PCIE 1 +#define IMX8MM_POWER_DOMAIN_USB_OTG1 2 +#define IMX8MM_POWER_DOMAIN_USB_OTG2 3 +#define IMX8MM_POWER_DOMAIN_DDR1 4 +#define IMX8MM_POWER_DOMAIN_GPU2D 5 +#define IMX8MM_POWER_DOMAIN_GPU 6 +#define IMX8MM_POWER_DOMAIN_VPU 7 +#define IMX8MM_POWER_DOMAIN_GPU3D 8 +#define IMX8MM_POWER_DOMAIN_DISP 9 +#define IMX8MM_POWER_VPU_G1 10 +#define IMX8MM_POWER_VPU_G2 11 +#define IMX8MM_POWER_VPU_H1 12 + #endif From patchwork Thu Dec 5 02:19:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 11274073 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6A4366C1 for ; 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[73.37.219.234]) by smtp.gmail.com with ESMTPSA id l6sm4188449ywa.39.2019.12.04.18.19.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Dec 2019 18:19:46 -0800 (PST) From: Adam Ford To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/7] soc: imx: gpcv2: add support for i.MX8M Mini SoC Date: Wed, 4 Dec 2019 20:19:19 -0600 Message-Id: <20191205021924.25188-4-aford173@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191205021924.25188-1-aford173@gmail.com> References: <20191205021924.25188-1-aford173@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191204_181948_809395_0B7FC004 X-CRM114-Status: GOOD ( 13.84 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:c43 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (aford173[at]gmail.com) 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (aford173[at]gmail.com) -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Fabio Estevam , Adam Ford , Sascha Hauer , linux-kernel@vger.kernel.org, Rob Herring , NXP Linux Team , Pengutronix Kernel Team , Shawn Guo Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The GPCv2 on the Freescale i.MX8M Mini SoC works in the same way as the GPCv2 on the i.MX8MQ, but with slightly different power domains and mapping. This patch adds the necessary tables so the GPC can operate on the i.MX8M Mini. Signed-off-by: Adam Ford --- drivers/soc/imx/gpcv2.c | 244 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 244 insertions(+) diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index 250f740d2314..52668e985e8e 100644 --- a/drivers/soc/imx/gpcv2.c +++ b/drivers/soc/imx/gpcv2.c @@ -41,6 +41,20 @@ #define IMX8M_PCIE1_A53_DOMAIN BIT(3) #define IMX8M_MIPI_A53_DOMAIN BIT(2) +#define IMX8MM_VPU_H1_A53_DOMAIN BIT(15) +#define IMX8MM_VPU_G2_A53_DOMAIN BIT(14) +#define IMX8MM_VPU_G1_A53_DOMAIN BIT(13) +#define IMX8MM_DISP_MIX_A53_DOMAIN BIT(12) +#define IMX8MM_GPU_3D_A53_DOMAIN BIT(11) +#define IMX8MM_VPUMIX_A53_DOMAIN BIT(10) +#define IMX8MM_GPUMIX_A53_DOMAIN BIT(9) +#define IMX8MM_GPU_2D_A53_DOMAIN BIT(8) +#define IMX8MM_DDR1_A53_DOMAIN BIT(7) +#define IMX8MM_OTG2_A53_DOMAIN BIT(5) +#define IMX8MM_OTG1_A53_DOMAIN BIT(4) +#define IMX8MM_PCIE_A53_DOMAIN BIT(3) +#define IMX8MM_MIPI_A53_DOMAIN BIT(2) + #define GPC_PU_PGC_SW_PUP_REQ 0x0f8 #define GPC_PU_PGC_SW_PDN_REQ 0x104 @@ -64,6 +78,20 @@ #define IMX8M_PCIE1_SW_Pxx_REQ BIT(1) #define IMX8M_MIPI_SW_Pxx_REQ BIT(0) +#define IMX8MM_VPU_H1_SW_Pxx_REQ BIT(13) +#define IMX8MM_VPU_G2_SW_Pxx_REQ BIT(12) +#define IMX8MM_VPU_G1_SW_Pxx_REQ BIT(11) +#define IMX8MM_DISP_SW_Pxx_REQ BIT(10) +#define IMX8MM_GPU_3D_SW_Pxx_REQ BIT(9) +#define IMX8MM_VPU_SW_Pxx_REQ BIT(8) +#define IMX8MM_GPU_SW_Pxx_REQ BIT(7) +#define IMX8MM_GPU_2D_SW_PXX_REQ BIT(6) +#define IMX8MM_DDR1_SW_Pxx_REQ BIT(5) +#define IMX8MM_OTG2_SW_Pxx_REQ BIT(3) +#define IMX8MM_OTG1_SW_Pxx_REQ BIT(2) +#define IMX8MM_PCIE_SW_Pxx_REQ BIT(1) +#define IMX8MM_MIPI_SW_Pxx_REQ BIT(0) + #define GPC_M4_PU_PDN_FLG 0x1bc #define GPC_PU_PWRHSK 0x1fc @@ -72,6 +100,10 @@ #define IMX8M_VPU_HSK_PWRDNREQN BIT(5) #define IMX8M_DISP_HSK_PWRDNREQN BIT(4) +#define IMX8MM_GPU_HSK_PWRDNREQN BIT(9) +#define IMX8MM_VPU_HSK_PWRDNREQN BIT(8) +#define IMX8MM_DISP_HSK_PWRDNREQN BIT(7) + /* * The PGC offset values in Reference Manual * (Rev. 1, 01/2018 and the older ones) GPC chapter's @@ -94,6 +126,24 @@ #define IMX8M_PGC_MIPI_CSI2 28 #define IMX8M_PGC_PCIE2 29 +/* + * Taken from i.MX8M Mini values from Reference + * Manual, Rev. 2, 08/2019 + */ +#define IMX8MM_PGC_MIPI 16 +#define IMX8MM_PGC_PCIE 17 +#define IMX8MM_PGC_OTG1 18 +#define IMX8MM_PGC_OTG2 19 +#define IMX8MM_PGC_DDR1 21 +#define IMX8MM_PGC_GPU2D 22 +#define IMX8MM_PGC_GPU 23 +#define IMX8MM_PGC_VPU 24 +#define IMX8MM_PGC_GPU3D 25 +#define IMX8MM_PGC_DISP 26 +#define IMX8MM_PGC_VPU_G1 27 +#define IMX8MM_PGC_VPU_G2 28 +#define IMX8MM_PGC_VPU_H1 29 + #define GPC_PGC_CTRL(n) (0x800 + (n) * 0x40) #define GPC_PGC_SR(n) (GPC_PGC_CTRL(n) + 0xc) @@ -278,6 +328,7 @@ static const struct imx_pgc_domain_data imx7_pgc_domain_data = { .reg_access_table = &imx7_access_table, }; +/* i.MX8M dual/QuadLite/Quad */ static const struct imx_pgc_domain imx8m_pgc_domains[] = { [IMX8M_POWER_DOMAIN_MIPI] = { .genpd = { @@ -442,6 +493,198 @@ static const struct imx_pgc_domain_data imx8m_pgc_domain_data = { .reg_access_table = &imx8m_access_table, }; +/* i.MX8M Mini */ +static const struct imx_pgc_domain imx8mm_pgc_domains[] = { + [IMX8MM_POWER_DOMAIN_MIPI] = { + .genpd = { + .name = "mipi", + }, + .bits = { + .pxx = IMX8MM_MIPI_SW_Pxx_REQ, + .map = IMX8MM_MIPI_A53_DOMAIN, + }, + .pgc = IMX8M_PGC_MIPI, + }, + + [IMX8MM_POWER_DOMAIN_PCIE] = { + .genpd = { + .name = "pcie1", + }, + .bits = { + .pxx = IMX8MM_PCIE_SW_Pxx_REQ, + .map = IMX8MM_PCIE_A53_DOMAIN, + }, + .pgc = IMX8MM_PGC_PCIE, + }, + + [IMX8MM_POWER_DOMAIN_USB_OTG1] = { + .genpd = { + .name = "usb-otg1", + }, + .bits = { + .pxx = IMX8MM_OTG1_SW_Pxx_REQ, + .map = IMX8MM_OTG1_A53_DOMAIN, + }, + .pgc = IMX8M_PGC_OTG1, + }, + + [IMX8MM_POWER_DOMAIN_USB_OTG2] = { + .genpd = { + .name = "usb-otg2", + }, + .bits = { + .pxx = IMX8MM_OTG2_SW_Pxx_REQ, + .map = IMX8MM_OTG2_A53_DOMAIN, + }, + .pgc = IMX8M_PGC_OTG2, + }, + + [IMX8MM_POWER_DOMAIN_DDR1] = { + .genpd = { + .name = "ddr1", + }, + .bits = { + .pxx = IMX8MM_DDR1_SW_Pxx_REQ, + .map = IMX8MM_DDR1_A53_DOMAIN, + }, + .pgc = IMX8M_PGC_DDR1, + }, + + [IMX8MM_POWER_DOMAIN_GPU2D] = { + .genpd = { + .name = "gpu2d", + }, + .bits = { + .pxx = IMX8MM_GPU_2D_SW_PXX_REQ, + .map = IMX8MM_GPU_2D_A53_DOMAIN, + .hsk = IMX8MM_GPU_HSK_PWRDNREQN, + }, + .pgc = IMX8MM_PGC_GPU2D, + }, + + + [IMX8MM_POWER_DOMAIN_GPU] = { + .genpd = { + .name = "gpu", + }, + .bits = { + .pxx = IMX8MM_GPU_SW_Pxx_REQ, + .map = IMX8MM_GPUMIX_A53_DOMAIN, + .hsk = IMX8MM_GPU_HSK_PWRDNREQN, + }, + .pgc = IMX8M_PGC_GPU, + }, + + [IMX8MM_POWER_DOMAIN_VPU] = { + .genpd = { + .name = "vpu", + }, + .bits = { + .pxx = IMX8MM_VPU_SW_Pxx_REQ, + .map = IMX8MM_VPUMIX_A53_DOMAIN, + .hsk = IMX8MM_VPU_HSK_PWRDNREQN, + }, + .pgc = IMX8M_PGC_VPU, + }, + + [IMX8MM_POWER_DOMAIN_GPU3D] = { + .genpd = { + .name = "gpu3d", + }, + .bits = { + .pxx = IMX8MM_GPU_3D_SW_Pxx_REQ, + .map = IMX8MM_GPU_3D_A53_DOMAIN, + .hsk = IMX8MM_GPU_HSK_PWRDNREQN, + }, + .pgc = IMX8MM_PGC_GPU2D, + }, + + [IMX8MM_POWER_DOMAIN_DISP] = { + .genpd = { + .name = "disp", + }, + .bits = { + .pxx = IMX8MM_DISP_SW_Pxx_REQ, + .map = IMX8MM_DISP_MIX_A53_DOMAIN, + .hsk = IMX8MM_DISP_HSK_PWRDNREQN, + }, + .pgc = IMX8M_PGC_DISP, + }, + + [IMX8MM_POWER_VPU_G1] = { + .genpd = { + .name = "vpu_g1", + }, + .bits = { + .pxx = IMX8MM_VPU_G1_SW_Pxx_REQ, + .map = IMX8MM_VPU_G1_A53_DOMAIN, + }, + .pgc = IMX8M_PGC_MIPI_CSI1, + }, + + [IMX8MM_POWER_VPU_G2] = { + .genpd = { + .name = "vpu_g2", + }, + .bits = { + .pxx = IMX8MM_VPU_G2_SW_Pxx_REQ, + .map = IMX8MM_VPU_G2_A53_DOMAIN, + }, + .pgc = IMX8M_PGC_MIPI_CSI2, + }, + + [IMX8MM_POWER_VPU_H1] = { + .genpd = { + .name = "vpu_h1", + }, + .bits = { + .pxx = IMX8MM_VPU_H1_SW_Pxx_REQ, + .map = IMX8MM_VPU_H1_A53_DOMAIN, + }, + .pgc = IMX8M_PGC_PCIE2, + }, +}; + +static const struct regmap_range imx8mm_yes_ranges[] = { + regmap_reg_range(GPC_LPCR_A_CORE_BSC, + GPC_PU_PWRHSK), + regmap_reg_range(GPC_PGC_CTRL(IMX8MM_PGC_MIPI), + GPC_PGC_SR(IMX8MM_PGC_MIPI)), + regmap_reg_range(GPC_PGC_CTRL(IMX8MM_PGC_PCIE), + GPC_PGC_SR(IMX8MM_PGC_PCIE)), + regmap_reg_range(GPC_PGC_CTRL(IMX8MM_PGC_OTG1), + GPC_PGC_SR(IMX8MM_PGC_OTG1)), + regmap_reg_range(GPC_PGC_CTRL(IMX8MM_PGC_OTG2), + GPC_PGC_SR(IMX8MM_PGC_OTG2)), + regmap_reg_range(GPC_PGC_CTRL(IMX8MM_PGC_DDR1), + GPC_PGC_SR(IMX8MM_PGC_DDR1)), + regmap_reg_range(GPC_PGC_CTRL(IMX8MM_PGC_GPU2D), + GPC_PGC_SR(IMX8MM_PGC_GPU2D)), + regmap_reg_range(GPC_PGC_CTRL(IMX8MM_PGC_GPU), + GPC_PGC_SR(IMX8MM_PGC_GPU)), + regmap_reg_range(GPC_PGC_CTRL(IMX8MM_PGC_VPU), + GPC_PGC_SR(IMX8MM_PGC_VPU)), + regmap_reg_range(GPC_PGC_CTRL(IMX8MM_PGC_DISP), + GPC_PGC_SR(IMX8MM_PGC_DISP)), + regmap_reg_range(GPC_PGC_CTRL(IMX8MM_PGC_VPU_G1), + GPC_PGC_SR(IMX8MM_PGC_VPU_G1)), + regmap_reg_range(GPC_PGC_CTRL(IMX8MM_PGC_VPU_G2), + GPC_PGC_SR(IMX8MM_PGC_VPU_G2)), + regmap_reg_range(GPC_PGC_CTRL(IMX8MM_PGC_VPU_H1), + GPC_PGC_SR(IMX8MM_PGC_VPU_H1)), +}; + +static const struct regmap_access_table imx8mm_access_table = { + .yes_ranges = imx8mm_yes_ranges, + .n_yes_ranges = ARRAY_SIZE(imx8mm_yes_ranges), +}; + +static const struct imx_pgc_domain_data imx8mm_pgc_domain_data = { + .domains = imx8mm_pgc_domains, + .domains_num = ARRAY_SIZE(imx8mm_pgc_domains), + .reg_access_table = &imx8mm_access_table, +}; + static int imx_pgc_get_clocks(struct imx_pgc_domain *domain) { int i, ret; @@ -641,6 +884,7 @@ static int imx_gpcv2_probe(struct platform_device *pdev) static const struct of_device_id imx_gpcv2_dt_ids[] = { { .compatible = "fsl,imx7d-gpc", .data = &imx7_pgc_domain_data, }, { .compatible = "fsl,imx8mq-gpc", .data = &imx8m_pgc_domain_data, }, + { .compatible = "fsl,imx8mm-gpc", .data = &imx8mm_pgc_domain_data, }, { } }; From patchwork Thu Dec 5 02:19:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 11274075 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2D6856C1 for ; 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[73.37.219.234]) by smtp.gmail.com with ESMTPSA id l6sm4188449ywa.39.2019.12.04.18.19.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Dec 2019 18:19:48 -0800 (PST) From: Adam Ford To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 4/7] dt-bindings: imx-gpcv2: Update bindings to support i.MX8M Mini Date: Wed, 4 Dec 2019 20:19:20 -0600 Message-Id: <20191205021924.25188-5-aford173@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191205021924.25188-1-aford173@gmail.com> References: <20191205021924.25188-1-aford173@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191204_181950_795169_04ABE4EA X-CRM114-Status: GOOD ( 14.48 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:b41 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (aford173[at]gmail.com) 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (aford173[at]gmail.com) -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Fabio Estevam , Adam Ford , Sascha Hauer , linux-kernel@vger.kernel.org, Rob Herring , NXP Linux Team , Pengutronix Kernel Team , Shawn Guo Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The with the recent additions to the driver, the GPCv2 driver can support the i.MX8M Mini, but it needs updated 'compatible' entry to use the proper table. This patch adds the i.MX8MM to the compatible list of devices. Signed-off-by: Adam Ford --- Documentation/devicetree/bindings/power/fsl,imx-gpcv2.txt | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.txt b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.txt index 7c7e972aaa42..576a79097a4c 100644 --- a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.txt +++ b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.txt @@ -9,6 +9,7 @@ Required properties: - compatible: Should be one of: - "fsl,imx7d-gpc" - "fsl,imx8mq-gpc" + - "fsl,imx8mm-gpc" - reg: should be register base and length as documented in the datasheet @@ -24,8 +25,9 @@ which, in turn, is expected to contain the following: Required properties: - reg: Power domain index. Valid values are defined in - include/dt-bindings/power/imx7-power.h for fsl,imx7d-gpc and - include/dt-bindings/power/imx8m-power.h for fsl,imx8mq-gpc + include/dt-bindings/power/imx7-power.h for fsl,imx7d-gpc, + include/dt-bindings/power/imx8m-power.h for fsl,imx8mq-gpc, and + include/dt-bindings/power/imx8m-power.h for fsl,imx8mm-gpc - #power-domain-cells: Should be 0 From patchwork Thu Dec 5 02:19:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 11274077 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DBA7F13B6 for ; Thu, 5 Dec 2019 02:21:23 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B3243214B2 for ; Thu, 5 Dec 2019 02:21:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="meMzmgE6"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="W1C+dYyw" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B3243214B2 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ccmGIf0vaUEJzcP2SPmvBSP/qgp/iMg0vkVkWj1JcQg=; b=meMzmgE6XLZWJr GspjPzoPNWnvFsYULwj+0F4il5eIgxdtXBIHMj76xPQsTMxM/5n4BuEl0QikUKrqfJeHuAPmJD4mO DQkimBdCn4415QUTE2R/O69beC3wxr4oK7+XC03U8bOmFkVvu35D5aU/wQUa3LZsZGkA1XUrIMVhg 98wSdLuhH5+Yhl8QT63UO4yff9CTaMx6lX/ygPJxY58yO93Z9JFY6bn059h1PU6P2FIflOtFulS+r 2bx6IB6wcCEjpb+xAJglYRU67OHs8vwiGrpT/vXpLI+fE1AHXCjOtkxMb8KWhP6vVVpBR/A9lRJmH JmVAD4vAibC+3MVJoGzg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1icglc-00022i-9M; Thu, 05 Dec 2019 02:21:20 +0000 Received: from mail-yb1-xb44.google.com ([2607:f8b0:4864:20::b44]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1icgkC-00088I-84 for linux-arm-kernel@lists.infradead.org; Thu, 05 Dec 2019 02:19:53 +0000 Received: by mail-yb1-xb44.google.com with SMTP id d95so865344ybi.8 for ; Wed, 04 Dec 2019 18:19:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=o8rdL81CA1/QSUatk5QZuPPaOIlwBprO0GQX2EhaRjM=; b=W1C+dYywW8EEg+KrCR9sD3uflofMaz0LkxIaYVdl/6TGvx8BVp2HSq7vgphATgN2BI 6XVVI9gBWLX8BXhgqJpIOEOnWlbOzToicgYJaS/tBb+dIxQ1BjfPhhjR5gxnTz7Uat/o olvMTEB5EwL45/extiYTkrbyuMactGPuACcJrxIWL4klqMk8XGZCnS192UxkZBdXT3Y0 H7PaFjvvmjAs3+JJEbpefhzNYgO7SI7WRWgJa/jFqa9t7praVOIsTiPhgAQzyQGxX/im 3p2rBbJFcte9jSQblW7252rhLust313ljInBl79Yz6S+TBhx6Z6itNRymzOs0EbLzHvI OXcA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=o8rdL81CA1/QSUatk5QZuPPaOIlwBprO0GQX2EhaRjM=; b=Q6Skx+wTSdKVTjllp9fkPG/FSQhHRhcQ1wy+RsgYhydmg0Qj8cry6weRPH3195h/4P wDoGhwTLFzIKW/w+0MTFuG32eDC/Fm5rTWcZkoF4kx65LV6sZzICcLBhaw85eEoVNFZ9 n/6XfwE+wQiu+YlEYdsc8QkSg3rH5NMI6Vrb07oupTg8tsgInE/ZYtPaPQV/2eg7wdR6 Dv/iMHDBpd69ZhuMcHM3xucXfEBg5jx8AZ9Wonx4FtFMXzTc1AgIMOKURpMadIduGgS0 Tqs6oFOPe/CBvf9juCGI1wDZCTl+e2CSZUVrsqekfWYaFgqMdUohYZDhAXJKoIpnoCrf gJYA== X-Gm-Message-State: APjAAAVD3qhVk8KECfotonnlmX0IBJW4x4vnmBPX+f+qWaZo5+kiUzLy dcDsFy+yeawItC82viK4dnRUFBS4 X-Google-Smtp-Source: APXvYqwAD9YGInc+qgp3awEl6WpVlrReB1uKRLWOTxVKUwY1TL0YVhztXM3OkuWK1013hQExDq0WRQ== X-Received: by 2002:a25:d5:: with SMTP id 204mr4502582yba.165.1575512390970; Wed, 04 Dec 2019 18:19:50 -0800 (PST) Received: from localhost.localdomain (c-73-37-219-234.hsd1.mn.comcast.net. [73.37.219.234]) by smtp.gmail.com with ESMTPSA id l6sm4188449ywa.39.2019.12.04.18.19.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Dec 2019 18:19:50 -0800 (PST) From: Adam Ford To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 5/7] arm64: dts: imx8mm: add GPC power domains Date: Wed, 4 Dec 2019 20:19:21 -0600 Message-Id: <20191205021924.25188-6-aford173@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191205021924.25188-1-aford173@gmail.com> References: <20191205021924.25188-1-aford173@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191204_181952_377896_975B80DB X-CRM114-Status: GOOD ( 12.91 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:b44 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (aford173[at]gmail.com) 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (aford173[at]gmail.com) -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Fabio Estevam , Adam Ford , Sascha Hauer , linux-kernel@vger.kernel.org, Rob Herring , NXP Linux Team , Pengutronix Kernel Team , Shawn Guo Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org There is a power domain controller on the i.XM8M Mini used for handling interrupts and controlling certain peripherals like USB OTG and PCIe, which are currently unavailable. This patch enables support the controller itself to the help facilitate enabling additional peripherals. Signed-off-by: Adam Ford --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 82 ++++++++++++++++++++++- 1 file changed, 81 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 23c8fad7932b..d05c5b617a4d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -13,7 +14,7 @@ / { compatible = "fsl,imx8mm"; - interrupt-parent = <&gic>; + interrupt-parent = <&gpc>; #address-cells = <2>; #size-cells = <2>; @@ -495,6 +496,85 @@ interrupts = ; #reset-cells = <1>; }; + + gpc: gpc@303a0000 { + compatible = "fsl,imx8mm-gpc"; + reg = <0x303a0000 0x10000>; + interrupt-parent = <&gic>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; + + pgc { + #address-cells = <1>; + #size-cells = <0>; + + pgc_mipi: power-domain@0 { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_pcie: power-domain@1 { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_otg1: power-domain@2 { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_otg2: power-domain@3 { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_ddr1: power-domain@4 { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_gpu2d: power-domain@5 { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_gpu: power-domain@6 { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_vpu: power-domain@7 { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_gpu3d: power-domain@8 { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_disp: power-domain@9 { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_vpu_g1: power-domain@a { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_vpu_g2: power-domain@b { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_vpu_h1: power-domain@c { + #power-domain-cells = <0>; + reg = ; + }; + }; + }; }; aips2: bus@30400000 { From patchwork Thu Dec 5 02:19:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 11274079 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E205F13B6 for ; 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[73.37.219.234]) by smtp.gmail.com with ESMTPSA id l6sm4188449ywa.39.2019.12.04.18.19.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Dec 2019 18:19:52 -0800 (PST) From: Adam Ford To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 6/7] ARM64: dts: imx8mm: Fix clocks and power domain for USB OTG Date: Wed, 4 Dec 2019 20:19:22 -0600 Message-Id: <20191205021924.25188-7-aford173@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191205021924.25188-1-aford173@gmail.com> References: <20191205021924.25188-1-aford173@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191204_181954_853130_899CB92D X-CRM114-Status: GOOD ( 12.49 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:b43 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (aford173[at]gmail.com) 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (aford173[at]gmail.com) -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Fabio Estevam , Adam Ford , Sascha Hauer , linux-kernel@vger.kernel.org, Rob Herring , NXP Linux Team , Pengutronix Kernel Team , Shawn Guo Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org There are two USB OTG controllers on the i.MX8M Mini, but currently neither are functional. According to the device tree entries published on the NXP kernel for the imx8m mini, these both need to be assigned to the proper clocks and power domain in order to function. This patch configures both USB OTG controllers to enable a missing clock and define the power domain so boards wishing to enable the USB OTG can do so. Signed-off-by: Adam Ford --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index d05c5b617a4d..5036d713558f 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -14,7 +14,7 @@ / { compatible = "fsl,imx8mm"; - interrupt-parent = <&gpc>; + interrupt-parent = <&gic>; #address-cells = <2>; #size-cells = <2>; @@ -867,8 +867,11 @@ interrupts = ; clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>; clock-names = "usb1_ctrl_root_clk"; - assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>; - assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>; + assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>, + <&clk IMX8MM_CLK_USB_CORE_REF>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>, + <&clk IMX8MM_SYS_PLL1_100M>; + power-domains = <&pgc_otg1>; fsl,usbphy = <&usbphynop1>; fsl,usbmisc = <&usbmisc1 0>; status = "disabled"; @@ -886,8 +889,11 @@ interrupts = ; clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>; clock-names = "usb1_ctrl_root_clk"; - assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>; - assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>; + assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>, + <&clk IMX8MM_CLK_USB_CORE_REF>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>, + <&clk IMX8MM_SYS_PLL1_100M>; + power-domains = <&pgc_otg2>; fsl,usbphy = <&usbphynop2>; fsl,usbmisc = <&usbmisc2 0>; status = "disabled"; From patchwork Thu Dec 5 02:19:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 11274081 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0C1E36C1 for ; Thu, 5 Dec 2019 02:21:58 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C522B206DB for ; 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[73.37.219.234]) by smtp.gmail.com with ESMTPSA id l6sm4188449ywa.39.2019.12.04.18.19.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Dec 2019 18:19:54 -0800 (PST) From: Adam Ford To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 7/7] arm64: dts: imx8mm: Add PCIe support Date: Wed, 4 Dec 2019 20:19:23 -0600 Message-Id: <20191205021924.25188-8-aford173@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191205021924.25188-1-aford173@gmail.com> References: <20191205021924.25188-1-aford173@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191204_181957_073737_AA2C53AC X-CRM114-Status: GOOD ( 15.21 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:c42 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (aford173[at]gmail.com) 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (aford173[at]gmail.com) -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Fabio Estevam , Adam Ford , Sascha Hauer , linux-kernel@vger.kernel.org, Rob Herring , NXP Linux Team , Pengutronix Kernel Team , Shawn Guo Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The PCIE controller on the i.MX8M Mini appears to be the same as the i.MX8MQ but it is absent. This patch uses the bindings from the i.MX8MQ and the clock information from the NXP Linux release and marks it as disabled so it can be configured and enabled on boards where needed. Signed-off-by: Adam Ford --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 35 +++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 5036d713558f..f384934ddbb4 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -936,6 +937,40 @@ status = "disabled"; }; + pcie0: pcie@33800000 { + compatible = "fsl,imx8mq-pcie"; + reg = <0x33800000 0x400000>, + <0x1ff00000 0x80000>; + reg-names = "dbi", "config"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x00 0xff>; + ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000 /* downstream I/O 64KB */ + 0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */ + num-lanes = <1>; + num-viewport = <4>; + interrupts = ; + interrupt-names = "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &gic GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gic GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; + fsl,max-link-speed = <2>; + power-domains = <&pgc_pcie>; + resets = <&src IMX8MQ_RESET_PCIEPHY>, + <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>, + <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>; + reset-names = "pciephy", "apps", "turnoff"; + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, + <&clk IMX8MM_CLK_PCIE1_AUX>, + <&clk IMX8MM_CLK_PCIE1_PHY>; + clock-names = "pcie", "pcie_bus", "pcie_phy"; + status = "disabled"; + }; + gic: interrupt-controller@38800000 { compatible = "arm,gic-v3"; reg = <0x38800000 0x10000>, /* GIC Dist */