From patchwork Fri Dec 6 14:06:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11276345 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BCF8E138D for ; Fri, 6 Dec 2019 14:07:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9ADDA24659 for ; Fri, 6 Dec 2019 14:07:00 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="R64rYywV" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726262AbfLFOHA (ORCPT ); Fri, 6 Dec 2019 09:07:00 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:42012 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726195AbfLFOG7 (ORCPT ); Fri, 6 Dec 2019 09:06:59 -0500 Received: by mail-wr1-f67.google.com with SMTP id a15so7859314wrf.9; Fri, 06 Dec 2019 06:06:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=g9e15ylUWWD8Md/O9KWguZs6ua1GwDKvgMSQEsgrXeQ=; b=R64rYywV+IOXy6kh7mVtxd2ABqigMMC4hjAIflbWG7i/9NS6NrSEE4a0KeuXc9omcV V6y+TckPo977DOAnSpRV2QTIBPpPu62Cl6CdiDX2fby6JikyZe8cc1106jm+lP17V9Lf frQszqKok/UBsr3iInVkEMB06iqQvKZTbv9qKgBwDOgthzwQMqko+Q8RKqBh1tZ975Ln hfW5Cu4pWPUe77vVmh6i8LIpJXAMQ3H2lT0dzSc6Umof4uDtPvq69UXo5XIh8tsZKs/9 /Mk+P6HUPTVHC1XzztxOeHadcTbS/CLGi/lj89vyENgebxAfEId9+Wp9qF4dJVromdLo Mh7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=g9e15ylUWWD8Md/O9KWguZs6ua1GwDKvgMSQEsgrXeQ=; b=R4WvGmF5hVas7buA26upL9pgTHilIG0nIp0/BKNY0V76OVnzQehGPrlCMBrJ2zU9Y2 rMqYghss25VhNa6dHTfk6/REMmmB0CzU62AMw6OFolza71iitCXDym8vyjZRS7Q1CbeY W/2TDLR/TZtN+2CbisFwKnEioZwmkKYIx2aotZZ47f0BDrEWcaKMZ0CuM8OD5H3Ls7t2 mZU5n8wueGF7UUlL/P9Kxny+4355rZkrCDKgLjHukfrgUtbfRk4GRk+5j83EBtHs7Wyf zUVzq41T0BVf0krQUyr3RBx+FUmJyu+kf2n/UoI7ufmY+4QuAn1oEnbXohKusicdqZrN cDqg== X-Gm-Message-State: APjAAAVUXMFj6YGePXagk1caSjBUpMGItTLkkCKdKjL1oRDlno/TYnhi P2ZJcEIqep84v+pAMaM1MHE= X-Google-Smtp-Source: APXvYqzpx0vSNXTcgy24SN9ur5IvEaGQ7NWCoXm3ob+h2G24ja4aTbdV7g8yilvXa90t9QD2xqbJyg== X-Received: by 2002:adf:f70b:: with SMTP id r11mr17110475wrp.388.1575641217484; Fri, 06 Dec 2019 06:06:57 -0800 (PST) Received: from localhost (pD9E518ED.dip0.t-ipconnect.de. [217.229.24.237]) by smtp.gmail.com with ESMTPSA id f16sm3083485wrm.65.2019.12.06.06.06.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2019 06:06:56 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 01/10] usb: host: xhci-tegra: Fix "tega" -> "tegra" typo Date: Fri, 6 Dec 2019 15:06:44 +0100 Message-Id: <20191206140653.2085561-2-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191206140653.2085561-1-thierry.reding@gmail.com> References: <20191206140653.2085561-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding The tegra_xusb_mbox_regs structure was misspelled tega_xusb_mbox_regs. Fortunately this was done consistently so it didn't cause any issues. Reviewed-by: JC Kuo Signed-off-by: Thierry Reding --- drivers/usb/host/xhci-tegra.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index bf9065438320..aa1c4e5fd750 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -145,7 +145,7 @@ struct tegra_xusb_phy_type { unsigned int num; }; -struct tega_xusb_mbox_regs { +struct tegra_xusb_mbox_regs { u16 cmd; u16 data_in; u16 data_out; @@ -166,7 +166,7 @@ struct tegra_xusb_soc { } usb2, ulpi, hsic, usb3; } ports; - struct tega_xusb_mbox_regs mbox; + struct tegra_xusb_mbox_regs mbox; bool scale_ss_clock; bool has_ipfs; From patchwork Fri Dec 6 14:06:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11276347 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 211E814B7 for ; Fri, 6 Dec 2019 14:07:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 00EE824659 for ; Fri, 6 Dec 2019 14:07:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="U2e01gsa" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726269AbfLFOHC (ORCPT ); Fri, 6 Dec 2019 09:07:02 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:37720 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726195AbfLFOHC (ORCPT ); Fri, 6 Dec 2019 09:07:02 -0500 Received: by mail-wr1-f65.google.com with SMTP id w15so7933096wru.4; Fri, 06 Dec 2019 06:07:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=r+qw/KtpSnFUlLnEiXkCoitlkbC2ot04gXVHUo3aq5g=; b=U2e01gsaO6D0oFjk1pJaoOCVOMVQvKTyxkgqZZlC1QmBjmxOiDXxOh4ArZiMyHzGJi IoA0beyKXC8KYkPHUgbG9XOaNInvpfRNClK8pUmFmjelWfnIHlePMj+R00sD4mR1yOOe 9ckasAaiwnGzI4+INrnqYLvNfbvS1kFYUoEvd+Y6pHcAUNEcBlGqI9pTyv/jN37yhKAO aMRzkPtWTQ/dan9y9t+Wtybq0ghkloP4xZDBCzaXIqP+PmgtCa2UuKAaXXbw+SJ3txY4 J+pbxgso4WpLdVVGUtSOgV5NvOZAKSn15Jqz1OX9T7xDEfCzxT9Uvh560m71T7MU9ogR HVSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=r+qw/KtpSnFUlLnEiXkCoitlkbC2ot04gXVHUo3aq5g=; b=GWI7SF5aiChjYwHkPeCiuWPB/YuhwajteIrZCD5U65LMJkhGzJKCLJoa2T/NZ8B+br 5yM8T7lBaWq/zjGRBzpcyrh0OsBlmtTpkAmokeHB8QtueKu1MIBQtejyEKshLhg8yWSg lOn4ycGtMoDmJaIOQ0LAfBlWHSWepH6peZJzaLeK92+k6VgNzQC2N8Wcg0shn/KP0svr 8WzMNqnL9pbhj4+rR6oUFH95uQvKvM5KoPsOE3oKh51SZK7inGatbK+I2j5dWeKj7ZxG UmUQJ9j/tYB+dQc9ZwPnrEQRVuzA3aQprreQATOuIeJW9JQB40nOATjdTqAiVh9Kit2Y Aiuw== X-Gm-Message-State: APjAAAW4fYBoE1N+bVdjBRJdUI/bQ8iAdsnARaoP7LkPfj1K2IAy9jat YD8R7IQbNFFDrLjzle2gdZOUMktyybc= X-Google-Smtp-Source: APXvYqwdsykxvaOISNNGQDaC194gKkcLiZnZ2qUq/NmcMin/7SFxFsMPYxniDL7twHznVzfL1MZrGA== X-Received: by 2002:adf:c74f:: with SMTP id b15mr15928939wrh.272.1575641219627; Fri, 06 Dec 2019 06:06:59 -0800 (PST) Received: from localhost (pD9E518ED.dip0.t-ipconnect.de. [217.229.24.237]) by smtp.gmail.com with ESMTPSA id f12sm3356148wmf.28.2019.12.06.06.06.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2019 06:06:58 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 02/10] usb: host: xhci-tegra: Separate firmware request and load Date: Fri, 6 Dec 2019 15:06:45 +0100 Message-Id: <20191206140653.2085561-3-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191206140653.2085561-1-thierry.reding@gmail.com> References: <20191206140653.2085561-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding Subsequent patches for system suspend/resume support will need to reload the firmware on resume. Since the firmware remains in system memory, the driver doesn't need to reload it from the filesystem. However, the XUSB controller will be reset across suspend/resume, so it needs to load the firmware into its microcontroller on resume. Split the firmware request and the firmware load code into two separate functions so that the driver can reuse the firmware in system memory to reload the microcontroller on resume. Based on work by JC Kuo . Signed-off-by: Thierry Reding --- drivers/usb/host/xhci-tegra.c | 40 ++++++++++++++++++++++++++--------- 1 file changed, 30 insertions(+), 10 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index aa1c4e5fd750..5cfd54862670 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -793,17 +793,10 @@ static int tegra_xusb_runtime_resume(struct device *dev) return err; } -static int tegra_xusb_load_firmware(struct tegra_xusb *tegra) +static int tegra_xusb_request_firmware(struct tegra_xusb *tegra) { - unsigned int code_tag_blocks, code_size_blocks, code_blocks; struct tegra_xusb_fw_header *header; - struct device *dev = tegra->dev; const struct firmware *fw; - unsigned long timeout; - time64_t timestamp; - struct tm time; - u64 address; - u32 value; int err; err = request_firmware(&fw, tegra->soc->firmware, tegra->dev); @@ -828,6 +821,24 @@ static int tegra_xusb_load_firmware(struct tegra_xusb *tegra) memcpy(tegra->fw.virt, fw->data, tegra->fw.size); release_firmware(fw); + return 0; +} + +static int tegra_xusb_load_firmware(struct tegra_xusb *tegra) +{ + unsigned int code_tag_blocks, code_size_blocks, code_blocks; + struct tegra_xusb_fw_header *header; + struct xhci_cap_regs __iomem *cap; + struct xhci_op_regs __iomem *op; + struct device *dev = tegra->dev; + unsigned long timeout; + time64_t timestamp; + struct tm time; + u64 address; + u32 value; + + header = (struct tegra_xusb_fw_header *)tegra->fw.virt; + if (csb_readl(tegra, XUSB_CSB_MP_ILOAD_BASE_LO) != 0) { dev_info(dev, "Firmware already loaded, Falcon state %#x\n", csb_readl(tegra, XUSB_FALC_CPUCTL)); @@ -1208,10 +1219,16 @@ static int tegra_xusb_probe(struct platform_device *pdev) goto put_rpm; } + err = tegra_xusb_request_firmware(tegra); + if (err < 0) { + dev_err(&pdev->dev, "failed to request firmware: %d\n", err); + goto disable_phy; + } + err = tegra_xusb_load_firmware(tegra); if (err < 0) { dev_err(&pdev->dev, "failed to load firmware: %d\n", err); - goto put_rpm; + goto free_firmware; } tegra->hcd->regs = tegra->regs; @@ -1221,7 +1238,7 @@ static int tegra_xusb_probe(struct platform_device *pdev) err = usb_add_hcd(tegra->hcd, tegra->xhci_irq, IRQF_SHARED); if (err < 0) { dev_err(&pdev->dev, "failed to add USB HCD: %d\n", err); - goto put_rpm; + goto free_firmware; } device_wakeup_enable(tegra->hcd->self.controller); @@ -1281,6 +1298,9 @@ static int tegra_xusb_probe(struct platform_device *pdev) tegra_xusb_runtime_suspend(&pdev->dev); put_hcd: usb_put_hcd(tegra->hcd); +free_firmware: + dma_free_coherent(&pdev->dev, tegra->fw.size, tegra->fw.virt, + tegra->fw.phys); disable_phy: tegra_xusb_phy_disable(tegra); pm_runtime_disable(&pdev->dev); From patchwork Fri Dec 6 14:06:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11276349 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 58B2B14B7 for ; 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[217.229.24.237]) by smtp.gmail.com with ESMTPSA id z12sm3541794wmd.16.2019.12.06.06.07.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2019 06:07:00 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 03/10] usb: host: xhci-tegra: Avoid a fixed duration sleep Date: Fri, 6 Dec 2019 15:06:46 +0100 Message-Id: <20191206140653.2085561-4-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191206140653.2085561-1-thierry.reding@gmail.com> References: <20191206140653.2085561-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding Do not use a fixed duration sleep to wait for the DMA controller to become ready. Instead, poll the L2IMEMOP_RESULT register for the VLD flag to determine when the XUSB controller's DMA master is ready. Based on work by JC Kuo . Signed-off-by: Thierry Reding --- drivers/usb/host/xhci-tegra.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index 5cfd54862670..e80fce712fd5 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -101,6 +102,8 @@ #define L2IMEMOP_ACTION_SHIFT 24 #define L2IMEMOP_INVALIDATE_ALL (0x40 << L2IMEMOP_ACTION_SHIFT) #define L2IMEMOP_LOAD_LOCKED_RESULT (0x11 << L2IMEMOP_ACTION_SHIFT) +#define XUSB_CSB_MEMPOOL_L2IMEMOP_RESULT 0x101a18 +#define L2IMEMOP_RESULT_VLD BIT(31) #define XUSB_CSB_MP_APMAP 0x10181c #define APMAP_BOOTPATH BIT(31) @@ -836,6 +839,7 @@ static int tegra_xusb_load_firmware(struct tegra_xusb *tegra) struct tm time; u64 address; u32 value; + int err; header = (struct tegra_xusb_fw_header *)tegra->fw.virt; @@ -893,7 +897,16 @@ static int tegra_xusb_load_firmware(struct tegra_xusb *tegra) csb_writel(tegra, 0, XUSB_FALC_DMACTL); - msleep(50); + /* wait for RESULT_VLD to get set */ +#define tegra_csb_readl(offset) csb_readl(tegra, offset) + err = readx_poll_timeout(tegra_csb_readl, + XUSB_CSB_MEMPOOL_L2IMEMOP_RESULT, value, + value & L2IMEMOP_RESULT_VLD, 100, 10000); + if (err < 0) { + dev_err(dev, "DMA controller not ready %#010x\n", value); + return err; + } +#undef tegra_csb_readl csb_writel(tegra, le32_to_cpu(header->boot_codetag), XUSB_FALC_BOOTVEC); From patchwork Fri Dec 6 14:06:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11276351 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4CACE138D for ; Fri, 6 Dec 2019 14:07:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 29DF824675 for ; Fri, 6 Dec 2019 14:07:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="mcpZUtg6" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726313AbfLFOHG (ORCPT ); Fri, 6 Dec 2019 09:07:06 -0500 Received: from mail-wr1-f66.google.com ([209.85.221.66]:40172 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726272AbfLFOHG (ORCPT ); Fri, 6 Dec 2019 09:07:06 -0500 Received: by mail-wr1-f66.google.com with SMTP id c14so7888838wrn.7; Fri, 06 Dec 2019 06:07:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=a6qGVGHfdM/Wp5RRvTX7w/dn6K0HWimE5nOttJ1eUSk=; b=mcpZUtg6092Qa5pY4jq0TT3fv6k3UagFoVoxPNMUy4Qx2JPqA79Cro60gKsgLcTW4U KSpQBmPCcfD8rjISG8vPPhyiLiNVpvOy1QJDJo1efQ8tR1eWcxaVvnGZTLjBROUeDB7f zjurhgichXf121gh39sMcl++ENXkFUhz5QN4CDvZB1RybSpu7kilEhaJU6D6G67tTjhi NIgdB0ffKLlbL9wGQyt9lzkVeS0wIaxlEqqbDffiEiqeLC5K+8ErnLaxlODbXcjrwkqr 3IANL8Qo+XEb0QpB9y9tbNIMNLDMXSktsdtE9qi6whTrn9JjdzaHs+dCgX77U/aqKrRT KBuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=a6qGVGHfdM/Wp5RRvTX7w/dn6K0HWimE5nOttJ1eUSk=; b=Pgq4qAXINduQBBatFkjZKPp6lwN07VeeSw7juXFie7xjf9F0PgHvGTCwFSbiD7ePE7 SnqPruN4F+WASXRkGOkofYluo8joDYZCXidJwLMu1pImU+nmcqWIf5LMigGgKPJGUQ2B n+ScKZarKvOlHvLHxqkqL7zqNNgbUpsTy5nekOcVmx1T1wAnx4cEuJn3zZDMyCW4t4YY XbhvpxP6GTMWCMinPRxcJqebBVFWJUj0k1cg8prEeq38DGLYwuwZT8Q5jlneZdZs6+Q2 ZNrAE+gleyIjglMJ5uInU2vOnGpLGypz9yN+T6YE7HFPDWCtMp0hqKBd4b69n/9IsXOW Lzag== X-Gm-Message-State: APjAAAU9O4fHOFK+7c5EgAICwDPfAxaIE8krTJxP8TH/5SJCA1/yFpSz mB7Vz3MrzR8n4ZcOrIPr3c/3NaH+gtM= X-Google-Smtp-Source: APXvYqxMOT9qUBfsvoexqn+Xb9cpF0Mx85XMHc5dBMzylOpDF4qcYzRi/DFxvMx1NiEbB6jWpZ83Mw== X-Received: by 2002:a5d:4c8c:: with SMTP id z12mr15820480wrs.222.1575641223565; Fri, 06 Dec 2019 06:07:03 -0800 (PST) Received: from localhost (pD9E518ED.dip0.t-ipconnect.de. [217.229.24.237]) by smtp.gmail.com with ESMTPSA id v14sm16337035wrm.28.2019.12.06.06.07.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2019 06:07:02 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 04/10] usb: host: xhci-tegra: Use CNR as firmware ready indicator Date: Fri, 6 Dec 2019 15:06:47 +0100 Message-Id: <20191206140653.2085561-5-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191206140653.2085561-1-thierry.reding@gmail.com> References: <20191206140653.2085561-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding The Falcon CPU state is a suboptimal indicator for firmware readiness, since the Falcon can be in a running state if the firmware is handling port state changes or running other tasks. Instead, the driver should check the STS_CNR bit to determine whether or not the firmware has been successfully loaded and is ready for XHCI operation. Based on work by JC Kuo . Signed-off-by: Thierry Reding --- drivers/usb/host/xhci-tegra.c | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index e80fce712fd5..eda5e1d50828 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -830,10 +830,10 @@ static int tegra_xusb_request_firmware(struct tegra_xusb *tegra) static int tegra_xusb_load_firmware(struct tegra_xusb *tegra) { unsigned int code_tag_blocks, code_size_blocks, code_blocks; + struct xhci_cap_regs __iomem *cap = tegra->regs; struct tegra_xusb_fw_header *header; - struct xhci_cap_regs __iomem *cap; - struct xhci_op_regs __iomem *op; struct device *dev = tegra->dev; + struct xhci_op_regs __iomem *op; unsigned long timeout; time64_t timestamp; struct tm time; @@ -842,6 +842,7 @@ static int tegra_xusb_load_firmware(struct tegra_xusb *tegra) int err; header = (struct tegra_xusb_fw_header *)tegra->fw.virt; + op = tegra->regs + HC_LENGTH(readl(&cap->hc_capbase)); if (csb_readl(tegra, XUSB_CSB_MP_ILOAD_BASE_LO) != 0) { dev_info(dev, "Firmware already loaded, Falcon state %#x\n", @@ -911,21 +912,23 @@ static int tegra_xusb_load_firmware(struct tegra_xusb *tegra) csb_writel(tegra, le32_to_cpu(header->boot_codetag), XUSB_FALC_BOOTVEC); - /* Boot Falcon CPU and wait for it to enter the STOPPED (idle) state. */ - timeout = jiffies + msecs_to_jiffies(5); - + /* Boot Falcon CPU and wait for USBSTS_CNR to get cleared. */ csb_writel(tegra, CPUCTL_STARTCPU, XUSB_FALC_CPUCTL); - while (time_before(jiffies, timeout)) { - if (csb_readl(tegra, XUSB_FALC_CPUCTL) == CPUCTL_STATE_STOPPED) + timeout = jiffies + msecs_to_jiffies(200); + + do { + value = readl(&op->status); + if ((value & STS_CNR) == 0) break; - usleep_range(100, 200); - } + usleep_range(1000, 2000); + } while (time_is_after_jiffies(timeout)); - if (csb_readl(tegra, XUSB_FALC_CPUCTL) != CPUCTL_STATE_STOPPED) { - dev_err(dev, "Falcon failed to start, state: %#x\n", - csb_readl(tegra, XUSB_FALC_CPUCTL)); + value = readl(&op->status); + if (value & STS_CNR) { + value = csb_readl(tegra, XUSB_FALC_CPUCTL); + dev_err(dev, "XHCI controller not read: %#010x\n", value); return -EIO; } From patchwork Fri Dec 6 14:06:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11276353 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A314114B7 for ; Fri, 6 Dec 2019 14:07:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 81AC524673 for ; Fri, 6 Dec 2019 14:07:08 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="KYIkiL5J" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726322AbfLFOHH (ORCPT ); Fri, 6 Dec 2019 09:07:07 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:46599 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726287AbfLFOHH (ORCPT ); Fri, 6 Dec 2019 09:07:07 -0500 Received: by mail-wr1-f65.google.com with SMTP id z7so7816107wrl.13; Fri, 06 Dec 2019 06:07:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=KiJRkyyJVEnwG3KmEZJWFAXbe3W+laaKaUqZ5aE7QB0=; b=KYIkiL5JxdLQp9QTamcoDSNJbgmYTLZIoA08JRhkgN5t3Zc6+pLBchpRrdVPA6+kIB kiEpPRScW8rtqu0pF+8fgblpft02xS1XlzgqynnsykoRHErubTJnkrKrqUbBlqU1sQei WJ7R3HVMCdwvuQl0V/GJu4jKbzuiN55katmvlfqAYMjyrpQnoR5N+Jwo0QTwEBhLmmNN wHHARAG6GcEvndk2UGglmCkq/mwys3VthbZEv0T+1mPK6bt/sDmKY4xqFGfz6PAHC0zE BJo+jp8yygO/R8JOZip+upTy0k2SGU746O5HGcmDE6WNQUZb30r84har/lwNrIGohOTN dOEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KiJRkyyJVEnwG3KmEZJWFAXbe3W+laaKaUqZ5aE7QB0=; b=Mo3HgLkXyjInyEsLXkgOs0gEyFxzMU8yC8n46nulWxZ6OT7eAvxUUeqwzbfoIQO7IA Qmlqv8iO2dRtx485Th5fq09df6JII74FGVZLeZEKQjxMGp4alPsgSeq9XcnzrfOK88e/ k3gT3VhBsa3S6ktQKuik/V137KwM2K7Xk8uE9QBwN4P4mPHWIdvVVaruUUwVKBcml2MS vAdPRAQE0RdFURVw5yYE9lrwqtIbvs6X3bcXqMhuaVcp7iqvxFMiWUR6kKoRmyBKyd63 yQRV2msnV0FKDEGEGXQZ62/Lrn93LdR3+L6q6TQV8h7+xLPMx40LQ4wxMqj4qgYyDP0q vQMg== X-Gm-Message-State: APjAAAUXSS+9XfaBvoiWpnx71cU1cPLVI4VrzJlTKBE5Euu6k79lNk0V a/of9cgpwVpwlJ3FS64c16g= X-Google-Smtp-Source: APXvYqyZnbhPZQEcTr7rYKRh6Y/ozEEyUlOhUnXVKEGS4j0NMNjXkHirHqtBaqmKorQyn0+U1APnUw== X-Received: by 2002:a5d:5308:: with SMTP id e8mr16122216wrv.77.1575641225698; Fri, 06 Dec 2019 06:07:05 -0800 (PST) Received: from localhost (pD9E518ED.dip0.t-ipconnect.de. [217.229.24.237]) by smtp.gmail.com with ESMTPSA id x7sm16092808wrq.41.2019.12.06.06.07.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2019 06:07:04 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 05/10] usb: host: xhci-tegra: Extract firmware enable helper Date: Fri, 6 Dec 2019 15:06:48 +0100 Message-Id: <20191206140653.2085561-6-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191206140653.2085561-1-thierry.reding@gmail.com> References: <20191206140653.2085561-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding Extract a helper that enables message generation from the firmware. This removes clutter from tegra_xusb_probe() and will also come in useful for subsequent patches that introduce suspend/resume support. Based on work by JC Kuo . Signed-off-by: Thierry Reding --- drivers/usb/host/xhci-tegra.c | 41 +++++++++++++++++++++++++---------- 1 file changed, 29 insertions(+), 12 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index eda5e1d50828..499104c05668 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -993,11 +993,37 @@ static int tegra_xusb_powerdomain_init(struct device *dev, return 0; } -static int tegra_xusb_probe(struct platform_device *pdev) +static int __tegra_xusb_enable_firmware_messages(struct tegra_xusb *tegra) { struct tegra_xusb_mbox_msg msg; - struct resource *regs; + int err; + + /* Enable firmware messages from controller. */ + msg.cmd = MBOX_CMD_MSG_ENABLED; + msg.data = 0; + + err = tegra_xusb_mbox_send(tegra, &msg); + if (err < 0) + dev_err(tegra->dev, "failed to enable messages: %d\n", err); + + return err; +} + +static int tegra_xusb_enable_firmware_messages(struct tegra_xusb *tegra) +{ + int err; + + mutex_lock(&tegra->lock); + err = __tegra_xusb_enable_firmware_messages(tegra); + mutex_unlock(&tegra->lock); + + return err; +} + +static int tegra_xusb_probe(struct platform_device *pdev) +{ struct tegra_xusb *tegra; + struct resource *regs; struct xhci_hcd *xhci; unsigned int i, j, k; struct phy *phy; @@ -1277,21 +1303,12 @@ static int tegra_xusb_probe(struct platform_device *pdev) goto put_usb3; } - mutex_lock(&tegra->lock); - - /* Enable firmware messages from controller. */ - msg.cmd = MBOX_CMD_MSG_ENABLED; - msg.data = 0; - - err = tegra_xusb_mbox_send(tegra, &msg); + err = tegra_xusb_enable_firmware_messages(tegra); if (err < 0) { dev_err(&pdev->dev, "failed to enable messages: %d\n", err); - mutex_unlock(&tegra->lock); goto remove_usb3; } - mutex_unlock(&tegra->lock); - err = devm_request_threaded_irq(&pdev->dev, tegra->mbox_irq, tegra_xusb_mbox_irq, tegra_xusb_mbox_thread, 0, From patchwork Fri Dec 6 14:06:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11276355 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D134B14B7 for ; Fri, 6 Dec 2019 14:07:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AF1DE24673 for ; Fri, 6 Dec 2019 14:07:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Ulby/W12" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726365AbfLFOHK (ORCPT ); Fri, 6 Dec 2019 09:07:10 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:41452 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726287AbfLFOHJ (ORCPT ); Fri, 6 Dec 2019 09:07:09 -0500 Received: by mail-wr1-f65.google.com with SMTP id c9so7895090wrw.8; Fri, 06 Dec 2019 06:07:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Kh+NvAHIuLaskgHhQ30Dq+xfYXMn71deaL+NXn7hou0=; b=Ulby/W12mRuN9YQCzGr/2hYNtO59waSS9kOPMlAiKcnhRfgF1azOQcG30XZ+6UrjZC R7FgaciJHDc4ZHILq2ABp4nmwoK2ZMsoeGP9A1e4+COgsA9hxSNKa0IjYo1QOzYtFfA8 CT4vXjTUK/wyAFpNGkX35JOA0LswVL6H2z5sH2vROXOMBBDrwZzteDV/xi1vJurHiIed klIKabxm2ywefMshBfUOPbv7mo21lNR0CffwPeowkb1QLRyfuSNITLUU8SJLYDP3Lp0H bxaSnp3aj4WwTNljSHVLrhXhXEDvobkHJ7D1Gw6SLelUcDZ5/EZLUYBAKoLNMQZlazHf hO6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Kh+NvAHIuLaskgHhQ30Dq+xfYXMn71deaL+NXn7hou0=; b=R8pjkQ/Y1RGtrL1vj70jyX1aa0u9KUWHP3AX9pkfme3xXXFXkEd7b1NI6B4eFS7wTQ 6utTX8J3BzteqYOrb6ITzzJkFKyNcUYtPgvP6W/xlS4IXDiwE0LMm4kUv8YZvk8ywLZh JuYDs/MOuPGmZ/qTcMjg/lZRSA+z2Rg+jLYAasrDZjExSNasMz6kA0rg5qQcrgs59iOS 6ovppSM6H8IuI+Gc9uEsJgRhajPcLe255UUGU5MuAE4AjprLap0NlJzWsSUDtxr4hevs E/f4bmJiEkKQvG2/tDyo1jI5PB1M90YNXor2Tme405ogI0OyzbM89aR9jMwKh4pQzH58 xegg== X-Gm-Message-State: APjAAAXoEZSdmn6vXFv8uRKmmJe6J8AEofFJm8vhDzy8dEarC4a2hvKA RTIyz79xMHQNq3kKVnZSQAU= X-Google-Smtp-Source: APXvYqxb5htIDG9DplYlR2/uaJ1U5HmtSk6bPNJOZem0JTmL+s7jvE7ocfnNkFl8mHY4xWqce23g2g== X-Received: by 2002:adf:f88c:: with SMTP id u12mr16808059wrp.323.1575641227789; Fri, 06 Dec 2019 06:07:07 -0800 (PST) Received: from localhost (pD9E518ED.dip0.t-ipconnect.de. [217.229.24.237]) by smtp.gmail.com with ESMTPSA id c15sm15918932wrt.1.2019.12.06.06.07.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2019 06:07:06 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 06/10] usb: host: xhci-tegra: Reuse stored register base address Date: Fri, 6 Dec 2019 15:06:49 +0100 Message-Id: <20191206140653.2085561-7-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191206140653.2085561-1-thierry.reding@gmail.com> References: <20191206140653.2085561-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding The base address of the XUSB controller's registers is already stored in the HCD. Move assignment to the HCD fields to an earlier point so that they can be reused in the tegra_xusb_config() function. This avoids the need to pass the base address as an extra parameter, which in turn comes in handy in subsequent patches that need to call this function from the suspend/resume paths where these values are no longer readily available. Based on work by JC Kuo . Signed-off-by: Thierry Reding --- drivers/usb/host/xhci-tegra.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index 499104c05668..31411f85e742 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -626,9 +626,9 @@ static irqreturn_t tegra_xusb_mbox_thread(int irq, void *data) return IRQ_HANDLED; } -static void tegra_xusb_config(struct tegra_xusb *tegra, - struct resource *regs) +static void tegra_xusb_config(struct tegra_xusb *tegra) { + u32 regs = tegra->hcd->rsrc_start; u32 value; if (tegra->soc->has_ipfs) { @@ -642,7 +642,7 @@ static void tegra_xusb_config(struct tegra_xusb *tegra, /* Program BAR0 space */ value = fpci_readl(tegra, XUSB_CFG_4); value &= ~(XUSB_BASE_ADDR_MASK << XUSB_BASE_ADDR_SHIFT); - value |= regs->start & (XUSB_BASE_ADDR_MASK << XUSB_BASE_ADDR_SHIFT); + value |= regs & (XUSB_BASE_ADDR_MASK << XUSB_BASE_ADDR_SHIFT); fpci_writel(tegra, value, XUSB_CFG_4); usleep_range(100, 200); @@ -1226,6 +1226,10 @@ static int tegra_xusb_probe(struct platform_device *pdev) goto put_powerdomains; } + tegra->hcd->regs = tegra->regs; + tegra->hcd->rsrc_start = regs->start; + tegra->hcd->rsrc_len = resource_size(regs); + /* * This must happen after usb_create_hcd(), because usb_create_hcd() * will overwrite the drvdata of the device with the hcd it creates. @@ -1249,7 +1253,7 @@ static int tegra_xusb_probe(struct platform_device *pdev) goto disable_phy; } - tegra_xusb_config(tegra, regs); + tegra_xusb_config(tegra); /* * The XUSB Falcon microcontroller can only address 40 bits, so set @@ -1273,10 +1277,6 @@ static int tegra_xusb_probe(struct platform_device *pdev) goto free_firmware; } - tegra->hcd->regs = tegra->regs; - tegra->hcd->rsrc_start = regs->start; - tegra->hcd->rsrc_len = resource_size(regs); - err = usb_add_hcd(tegra->hcd, tegra->xhci_irq, IRQF_SHARED); if (err < 0) { dev_err(&pdev->dev, "failed to add USB HCD: %d\n", err); From patchwork Fri Dec 6 14:06:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11276357 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3AF01138D for ; Fri, 6 Dec 2019 14:07:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 15A512464E for ; Fri, 6 Dec 2019 14:07:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="urXOq47m" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726366AbfLFOHM (ORCPT ); Fri, 6 Dec 2019 09:07:12 -0500 Received: from mail-wm1-f67.google.com ([209.85.128.67]:36770 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726234AbfLFOHM (ORCPT ); Fri, 6 Dec 2019 09:07:12 -0500 Received: by mail-wm1-f67.google.com with SMTP id p17so7473208wma.1; Fri, 06 Dec 2019 06:07:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YNu/4ywKxVv3kR8Xacc3PWSXrivLFb5NgyV45IDDumI=; b=urXOq47mjhvio339+yyX4agWorIAlWaHrl0IR97c89TwO7qTCKltperPNza69i93I2 xR3ne1MBefis2HVMyEqGwXQboc7mnByxFCiAC7Rfv3EwG8czh2Z7aYLDFPWlb8m9aLxX oJqe2X/2shD8GW2HYrGtM/uenKaNkdl7QHDg48oHLlMy7YV78undCZ6qSiRCcvYa0aVq E31GUWArkqyDUpvAZf5nqs/wgTed+I2xuhUWdqrQu8sWCr0Fx6NkLZptdL5wGnbxsqPk Q6egLyBWQy4UEWzyYBAD3Rq830WoMNfBEPSe0AMgpNGAgnOQKUbZTfjsqRh/e5i05lww nc0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YNu/4ywKxVv3kR8Xacc3PWSXrivLFb5NgyV45IDDumI=; b=XXUg4PrTjYiW/ksQvDr31R/8ZGQLDU/nYCg1RAsjzb0Ho0QllKU0h3o5i/2iV3jOJ8 TplPkQKEnmvAvdjCp2c37deirvfGWxBOjR5ginUl/ZR9ePmQ2aHhIx3oqtrHR26DqIJC K58B+fNs7suyJZrR3XELLS6AcZ8RmkGyc0kPox18E4mTYym+Ry1/6I8uZBKpL7/PSCvK BOtuJi6I+CCUJPk/179UQRMXs4Hbh+jFPDhl6tTMfAZERIUPu1rLLAIECIs7atb06az6 /umWoMpeFyuD74bzPbfk7HTT7pmX5eIxgk5/Zb576VeG9fNPxssXUKXkdg4nkOBV+TNv 9AMA== X-Gm-Message-State: APjAAAXP4msLxiyydNuKlBHIE4twd30EaQOoosBLHhvZdlp20o1QuoMG LGxxLVAWwkhQU6GUr5Xp9AY= X-Google-Smtp-Source: APXvYqxOQkva4hIGUU71MXuYn4KBRAQGb6azCBaX7yau5IJF34sth08WBT8sfc5vdiZpXEAFvLTogQ== X-Received: by 2002:a1c:7217:: with SMTP id n23mr10684715wmc.129.1575641230141; Fri, 06 Dec 2019 06:07:10 -0800 (PST) Received: from localhost (pD9E518ED.dip0.t-ipconnect.de. [217.229.24.237]) by smtp.gmail.com with ESMTPSA id h17sm16901847wrs.18.2019.12.06.06.07.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2019 06:07:08 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 07/10] usb: host: xhci-tegra: Enable runtime PM as late as possible Date: Fri, 6 Dec 2019 15:06:50 +0100 Message-Id: <20191206140653.2085561-8-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191206140653.2085561-1-thierry.reding@gmail.com> References: <20191206140653.2085561-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding A number of things can currently go wrong after the XUSB controller has been enabled, which means that it might need to be disabled again before it has ever been used. Avoid this by delaying runtime PM enablement until it's really required right before registers are accessed for the first time. Signed-off-by: Thierry Reding --- drivers/usb/host/xhci-tegra.c | 33 +++++++++++++++++---------------- 1 file changed, 17 insertions(+), 16 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index 31411f85e742..117e91b8ac6f 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -1242,19 +1242,6 @@ static int tegra_xusb_probe(struct platform_device *pdev) goto put_hcd; } - pm_runtime_enable(&pdev->dev); - if (pm_runtime_enabled(&pdev->dev)) - err = pm_runtime_get_sync(&pdev->dev); - else - err = tegra_xusb_runtime_resume(&pdev->dev); - - if (err < 0) { - dev_err(&pdev->dev, "failed to enable device: %d\n", err); - goto disable_phy; - } - - tegra_xusb_config(tegra); - /* * The XUSB Falcon microcontroller can only address 40 bits, so set * the DMA mask accordingly. @@ -1262,7 +1249,7 @@ static int tegra_xusb_probe(struct platform_device *pdev) err = dma_set_mask_and_coherent(tegra->dev, DMA_BIT_MASK(40)); if (err < 0) { dev_err(&pdev->dev, "failed to set DMA mask: %d\n", err); - goto put_rpm; + goto disable_phy; } err = tegra_xusb_request_firmware(tegra); @@ -1271,16 +1258,30 @@ static int tegra_xusb_probe(struct platform_device *pdev) goto disable_phy; } + pm_runtime_enable(&pdev->dev); + + if (!pm_runtime_enabled(&pdev->dev)) + err = tegra_xusb_runtime_resume(&pdev->dev); + else + err = pm_runtime_get_sync(&pdev->dev); + + if (err < 0) { + dev_err(&pdev->dev, "failed to enable device: %d\n", err); + goto free_firmware; + } + + tegra_xusb_config(tegra); + err = tegra_xusb_load_firmware(tegra); if (err < 0) { dev_err(&pdev->dev, "failed to load firmware: %d\n", err); - goto free_firmware; + goto put_rpm; } err = usb_add_hcd(tegra->hcd, tegra->xhci_irq, IRQF_SHARED); if (err < 0) { dev_err(&pdev->dev, "failed to add USB HCD: %d\n", err); - goto free_firmware; + goto put_rpm; } device_wakeup_enable(tegra->hcd->self.controller); From patchwork Fri Dec 6 14:06:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11276359 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 35CFE138D for ; Fri, 6 Dec 2019 14:07:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0ABB82464E for ; Fri, 6 Dec 2019 14:07:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="uWWdgggl" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726371AbfLFOHP (ORCPT ); Fri, 6 Dec 2019 09:07:15 -0500 Received: from mail-wr1-f66.google.com ([209.85.221.66]:35324 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726234AbfLFOHP (ORCPT ); Fri, 6 Dec 2019 09:07:15 -0500 Received: by mail-wr1-f66.google.com with SMTP id g17so7932956wro.2; Fri, 06 Dec 2019 06:07:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fERhwWBhSRj4I9HeZFZXrlVYXpadgU0FNGh7dPnYH00=; b=uWWdggglxgZ/hQQFiJP1dvpIJ79vFrNQ/XwcXQ54P2syBIBv9D4WtwoRMkxV15FeFl +uY4GKFTLtXchxHqrpevTQ0QTVvXuPa9082cZ8K9qPQJ5WzJmT0IXwnAtiYWu15yf4ln lKs5UL5NwAwBaxTgMIRHxogluDge7uT4NzcEuQcyv2sIYmzoaRcRcWRF5J0rSV0dsQOZ ECKQF8l4vAgClp+tv0rRkBGEc6DI4oexXkdxF+nbKVLuICgA80mNcr3/x1tmTs/YyL2/ y/OFVjjLo31J0FoVYJrKTIFHqeMJ+SpJgzTEiYKPJqmEWXEv7jdXM96tHmxlqR91alvV sWDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fERhwWBhSRj4I9HeZFZXrlVYXpadgU0FNGh7dPnYH00=; b=AYprd6w8Awm+onZpLQjjrFctrf9ubAF0z8WMjBmAEsLYChDenpW/VW8xyb1wN1UyjR OB73wsIrjP8W+A5WtUhFJ6ZICVL/naZJ5yXRM2pemDjMe1Uz+zHLUeIfxFtYgSdAKmHJ lfgVQZ0Rx9LZfuKGWw4ZBhn+d1XEtF1oTEz2IGtCig4OKIHagQBcNUN8wy36BkUnWQh+ E944e56N/Tftf0/momeQzrVEIZeCPv9oZRmmJL96M7mtiXilOvVRXV2Ybd0hwXXPbD53 40hdBBd3PAy+zQJIzRTDZ0UFuEMJg4FIS1rvQX7BKH1GpSZzRMu0AKkNBf0f74DWpIZa z2BA== X-Gm-Message-State: APjAAAXXRUR0ugUelxRp/Sal/CxO3CbxQ/erF4AgmNf7hRbAa4bSjqfS STPlFUK2+UKwQmI1+sPZBEA= X-Google-Smtp-Source: APXvYqwKtaKneucGRNyZ/UT3IFZhaziP3VjIJLK8EFCq/zvXiCegCy3VK4h7oVld8uCCz6m3dcqXow== X-Received: by 2002:a5d:6901:: with SMTP id t1mr15002723wru.94.1575641232178; Fri, 06 Dec 2019 06:07:12 -0800 (PST) Received: from localhost (pD9E518ED.dip0.t-ipconnect.de. [217.229.24.237]) by smtp.gmail.com with ESMTPSA id c2sm16408206wrp.46.2019.12.06.06.07.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2019 06:07:11 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 08/10] usb: host: xhci-tegra: Add support for XUSB context save/restore Date: Fri, 6 Dec 2019 15:06:51 +0100 Message-Id: <20191206140653.2085561-9-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191206140653.2085561-1-thierry.reding@gmail.com> References: <20191206140653.2085561-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding The XUSB controller contains registers that need to be saved on suspend and restored on resume in addition to the XHCI specific registers. Add support for saving and restoring the XUSB specific context. Based on work by JC Kuo . Signed-off-by: Thierry Reding --- drivers/usb/host/xhci-tegra.c | 102 +++++++++++++++++++++++++++++++++- 1 file changed, 100 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index 117e91b8ac6f..1b5e4ee313ce 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -155,12 +155,25 @@ struct tegra_xusb_mbox_regs { u16 owner; }; +struct tegra_xusb_context_soc { + struct { + const unsigned int *offsets; + unsigned int num_offsets; + } ipfs; + + struct { + const unsigned int *offsets; + unsigned int num_offsets; + } fpci; +}; + struct tegra_xusb_soc { const char *firmware; const char * const *supply_names; unsigned int num_supplies; const struct tegra_xusb_phy_type *phy_types; unsigned int num_types; + const struct tegra_xusb_context_soc *context; struct { struct { @@ -175,6 +188,11 @@ struct tegra_xusb_soc { bool has_ipfs; }; +struct tegra_xusb_context { + u32 *ipfs; + u32 *fpci; +}; + struct tegra_xusb { struct device *dev; void __iomem *regs; @@ -221,6 +239,8 @@ struct tegra_xusb { void *virt; dma_addr_t phys; } fw; + + struct tegra_xusb_context context; }; static struct hc_driver __read_mostly tegra_xhci_hc_driver; @@ -796,6 +816,37 @@ static int tegra_xusb_runtime_resume(struct device *dev) return err; } +#ifdef CONFIG_PM_SLEEP +static int tegra_xusb_init_context(struct tegra_xusb *tegra) +{ + const struct tegra_xusb_context_soc *soc = tegra->soc->context; + + /* + * Skip support for context save/restore if the SoC doesn't have any + * XUSB specific context that needs to be saved/restored. + */ + if (!soc) + return 0; + + tegra->context.ipfs = devm_kcalloc(tegra->dev, soc->ipfs.num_offsets, + sizeof(u32), GFP_KERNEL); + if (!tegra->context.ipfs) + return -ENOMEM; + + tegra->context.fpci = devm_kcalloc(tegra->dev, soc->ipfs.num_offsets, + sizeof(u32), GFP_KERNEL); + if (!tegra->context.fpci) + return -ENOMEM; + + return 0; +} +#else +static inline int tegra_xusb_init_context(struct tegra_xusb *tegra) +{ + return 0; +} +#endif + static int tegra_xusb_request_firmware(struct tegra_xusb *tegra) { struct tegra_xusb_fw_header *header; @@ -1039,6 +1090,10 @@ static int tegra_xusb_probe(struct platform_device *pdev) mutex_init(&tegra->lock); tegra->dev = &pdev->dev; + err = tegra_xusb_init_context(tegra); + if (err < 0) + return err; + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); tegra->regs = devm_ioremap_resource(&pdev->dev, regs); if (IS_ERR(tegra->regs)) @@ -1382,14 +1437,55 @@ static int tegra_xusb_remove(struct platform_device *pdev) } #ifdef CONFIG_PM_SLEEP +static void tegra_xusb_save_context(struct tegra_xusb *tegra) +{ + const struct tegra_xusb_context_soc *soc = tegra->soc->context; + struct tegra_xusb_context *ctx = &tegra->context; + unsigned int i; + + if (soc && soc->ipfs.num_offsets > 0) { + for (i = 0; i < soc->ipfs.num_offsets; i++) + ctx->ipfs[i] = ipfs_readl(tegra, soc->ipfs.offsets[i]); + } + + if (soc && soc->fpci.num_offsets > 0) { + for (i = 0; i < soc->fpci.num_offsets; i++) + ctx->fpci[i] = fpci_readl(tegra, soc->fpci.offsets[i]); + } +} + +static void tegra_xusb_restore_context(struct tegra_xusb *tegra) +{ + const struct tegra_xusb_context_soc *soc = tegra->soc->context; + struct tegra_xusb_context *ctx = &tegra->context; + unsigned int i; + + if (soc && soc->fpci.num_offsets > 0) { + for (i = 0; i < soc->fpci.num_offsets; i++) + fpci_writel(tegra, ctx->fpci[i], soc->fpci.offsets[i]); + } + + if (soc && soc->ipfs.num_offsets > 0) { + for (i = 0; i < soc->ipfs.num_offsets; i++) + ipfs_writel(tegra, ctx->ipfs[i], soc->ipfs.offsets[i]); + } +} + static int tegra_xusb_suspend(struct device *dev) { struct tegra_xusb *tegra = dev_get_drvdata(dev); struct xhci_hcd *xhci = hcd_to_xhci(tegra->hcd); bool wakeup = device_may_wakeup(dev); + int err; /* TODO: Powergate controller across suspend/resume. */ - return xhci_suspend(xhci, wakeup); + err = xhci_suspend(xhci, wakeup); + if (err < 0) + return err; + + tegra_xusb_save_context(tegra); + + return 0; } static int tegra_xusb_resume(struct device *dev) @@ -1397,7 +1493,9 @@ static int tegra_xusb_resume(struct device *dev) struct tegra_xusb *tegra = dev_get_drvdata(dev); struct xhci_hcd *xhci = hcd_to_xhci(tegra->hcd); - return xhci_resume(xhci, 0); + tegra_xusb_restore_context(tegra); + + return xhci_resume(xhci, false); } #endif From patchwork Fri Dec 6 14:06:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11276361 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CAB5414B7 for ; Fri, 6 Dec 2019 14:07:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9B6D524659 for ; Fri, 6 Dec 2019 14:07:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="qAzZ2Ym7" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726386AbfLFOHS (ORCPT ); Fri, 6 Dec 2019 09:07:18 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:46620 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726245AbfLFOHR (ORCPT ); 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[217.229.24.237]) by smtp.gmail.com with ESMTPSA id e8sm15969651wrt.7.2019.12.06.06.07.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2019 06:07:13 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 09/10] usb: host: xhci-tegra: Add XUSB controller context Date: Fri, 6 Dec 2019 15:06:52 +0100 Message-Id: <20191206140653.2085561-10-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191206140653.2085561-1-thierry.reding@gmail.com> References: <20191206140653.2085561-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding Define the offsets of the registers that need to be saved on suspend and restored on resume for the various NVIDIA Tegra generations supported by the XUSB driver. Based on work by JC Kuo . Signed-off-by: Thierry Reding --- drivers/usb/host/xhci-tegra.c | 80 ++++++++++++++++++++++++++++++----- 1 file changed, 69 insertions(+), 11 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index 1b5e4ee313ce..7f6657ad5ce5 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -39,7 +39,15 @@ #define XUSB_CFG_4 0x010 #define XUSB_BASE_ADDR_SHIFT 15 #define XUSB_BASE_ADDR_MASK 0x1ffff +#define XUSB_CFG_16 0x040 +#define XUSB_CFG_24 0x060 +#define XUSB_CFG_AXI_CFG 0x0f8 #define XUSB_CFG_ARU_C11_CSBRANGE 0x41c +#define XUSB_CFG_ARU_CONTEXT 0x43c +#define XUSB_CFG_ARU_CONTEXT_HS_PLS 0x478 +#define XUSB_CFG_ARU_CONTEXT_FS_PLS 0x47c +#define XUSB_CFG_ARU_CONTEXT_HSFS_SPEED 0x480 +#define XUSB_CFG_ARU_CONTEXT_HSFS_PP 0x484 #define XUSB_CFG_CSB_BASE_ADDR 0x800 /* FPCI mailbox registers */ @@ -63,11 +71,20 @@ #define MBOX_SMI_INTR_EN BIT(3) /* IPFS registers */ +#define IPFS_XUSB_HOST_MSI_BAR_SZ_0 0x0c0 +#define IPFS_XUSB_HOST_MSI_AXI_BAR_ST_0 0x0c4 +#define IPFS_XUSB_HOST_MSI_FPCI_BAR_ST_0 0x0c8 +#define IPFS_XUSB_HOST_MSI_VEC0_0 0x100 +#define IPFS_XUSB_HOST_MSI_EN_VEC0_0 0x140 #define IPFS_XUSB_HOST_CONFIGURATION_0 0x180 #define IPFS_EN_FPCI BIT(0) +#define IPFS_XUSB_HOST_FPCI_ERROR_MASKS_0 0x184 #define IPFS_XUSB_HOST_INTR_MASK_0 0x188 #define IPFS_IP_INT_MASK BIT(16) +#define IPFS_XUSB_HOST_INTR_ENABLE_0 0x198 +#define IPFS_XUSB_HOST_UFPCI_CONFIG_0 0x19c #define IPFS_XUSB_HOST_CLKGATE_HYSTERESIS_0 0x1bc +#define IPFS_XUSB_HOST_MCCIF_FIFOCTRL_0 0x1dc #define CSB_PAGE_SELECT_MASK 0x7fffff #define CSB_PAGE_SELECT_SHIFT 9 @@ -821,13 +838,6 @@ static int tegra_xusb_init_context(struct tegra_xusb *tegra) { const struct tegra_xusb_context_soc *soc = tegra->soc->context; - /* - * Skip support for context save/restore if the SoC doesn't have any - * XUSB specific context that needs to be saved/restored. - */ - if (!soc) - return 0; - tegra->context.ipfs = devm_kcalloc(tegra->dev, soc->ipfs.num_offsets, sizeof(u32), GFP_KERNEL); if (!tegra->context.ipfs) @@ -1443,12 +1453,12 @@ static void tegra_xusb_save_context(struct tegra_xusb *tegra) struct tegra_xusb_context *ctx = &tegra->context; unsigned int i; - if (soc && soc->ipfs.num_offsets > 0) { + if (soc->ipfs.num_offsets > 0) { for (i = 0; i < soc->ipfs.num_offsets; i++) ctx->ipfs[i] = ipfs_readl(tegra, soc->ipfs.offsets[i]); } - if (soc && soc->fpci.num_offsets > 0) { + if (soc->fpci.num_offsets > 0) { for (i = 0; i < soc->fpci.num_offsets; i++) ctx->fpci[i] = fpci_readl(tegra, soc->fpci.offsets[i]); } @@ -1460,12 +1470,12 @@ static void tegra_xusb_restore_context(struct tegra_xusb *tegra) struct tegra_xusb_context *ctx = &tegra->context; unsigned int i; - if (soc && soc->fpci.num_offsets > 0) { + if (soc->fpci.num_offsets > 0) { for (i = 0; i < soc->fpci.num_offsets; i++) fpci_writel(tegra, ctx->fpci[i], soc->fpci.offsets[i]); } - if (soc && soc->ipfs.num_offsets > 0) { + if (soc->ipfs.num_offsets > 0) { for (i = 0; i < soc->ipfs.num_offsets; i++) ipfs_writel(tegra, ctx->ipfs[i], soc->ipfs.offsets[i]); } @@ -1522,12 +1532,50 @@ static const struct tegra_xusb_phy_type tegra124_phy_types[] = { { .name = "hsic", .num = 2, }, }; +static const unsigned int tegra124_xusb_context_ipfs[] = { + IPFS_XUSB_HOST_MSI_BAR_SZ_0, + IPFS_XUSB_HOST_MSI_BAR_SZ_0, + IPFS_XUSB_HOST_MSI_AXI_BAR_ST_0, + IPFS_XUSB_HOST_MSI_FPCI_BAR_ST_0, + IPFS_XUSB_HOST_MSI_VEC0_0, + IPFS_XUSB_HOST_MSI_EN_VEC0_0, + IPFS_XUSB_HOST_FPCI_ERROR_MASKS_0, + IPFS_XUSB_HOST_INTR_MASK_0, + IPFS_XUSB_HOST_INTR_ENABLE_0, + IPFS_XUSB_HOST_UFPCI_CONFIG_0, + IPFS_XUSB_HOST_CLKGATE_HYSTERESIS_0, + IPFS_XUSB_HOST_MCCIF_FIFOCTRL_0, +}; + +static const unsigned int tegra124_xusb_context_fpci[] = { + XUSB_CFG_ARU_CONTEXT_HS_PLS, + XUSB_CFG_ARU_CONTEXT_FS_PLS, + XUSB_CFG_ARU_CONTEXT_HSFS_SPEED, + XUSB_CFG_ARU_CONTEXT_HSFS_PP, + XUSB_CFG_ARU_CONTEXT, + XUSB_CFG_AXI_CFG, + XUSB_CFG_24, + XUSB_CFG_16, +}; + +static const struct tegra_xusb_context_soc tegra124_xusb_context = { + .ipfs = { + .num_offsets = ARRAY_SIZE(tegra124_xusb_context_ipfs), + .offsets = tegra124_xusb_context_ipfs, + }, + .fpci = { + .num_offsets = ARRAY_SIZE(tegra124_xusb_context_fpci), + .offsets = tegra124_xusb_context_fpci, + }, +}; + static const struct tegra_xusb_soc tegra124_soc = { .firmware = "nvidia/tegra124/xusb.bin", .supply_names = tegra124_supply_names, .num_supplies = ARRAY_SIZE(tegra124_supply_names), .phy_types = tegra124_phy_types, .num_types = ARRAY_SIZE(tegra124_phy_types), + .context = &tegra124_xusb_context, .ports = { .usb2 = { .offset = 4, .count = 4, }, .hsic = { .offset = 6, .count = 2, }, @@ -1566,6 +1614,7 @@ static const struct tegra_xusb_soc tegra210_soc = { .num_supplies = ARRAY_SIZE(tegra210_supply_names), .phy_types = tegra210_phy_types, .num_types = ARRAY_SIZE(tegra210_phy_types), + .context = &tegra124_xusb_context, .ports = { .usb2 = { .offset = 4, .count = 4, }, .hsic = { .offset = 8, .count = 1, }, @@ -1591,12 +1640,20 @@ static const struct tegra_xusb_phy_type tegra186_phy_types[] = { { .name = "hsic", .num = 1, }, }; +static const struct tegra_xusb_context_soc tegra186_xusb_context = { + .fpci = { + .num_offsets = ARRAY_SIZE(tegra124_xusb_context_fpci), + .offsets = tegra124_xusb_context_fpci, + }, +}; + static const struct tegra_xusb_soc tegra186_soc = { .firmware = "nvidia/tegra186/xusb.bin", .supply_names = tegra186_supply_names, .num_supplies = ARRAY_SIZE(tegra186_supply_names), .phy_types = tegra186_phy_types, .num_types = ARRAY_SIZE(tegra186_phy_types), + .context = &tegra186_xusb_context, .ports = { .usb3 = { .offset = 0, .count = 3, }, .usb2 = { .offset = 3, .count = 3, }, @@ -1626,6 +1683,7 @@ static const struct tegra_xusb_soc tegra194_soc = { .num_supplies = ARRAY_SIZE(tegra194_supply_names), .phy_types = tegra194_phy_types, .num_types = ARRAY_SIZE(tegra194_phy_types), + .context = &tegra186_xusb_context, .ports = { .usb3 = { .offset = 0, .count = 4, }, .usb2 = { .offset = 4, .count = 4, }, From patchwork Fri Dec 6 14:06:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11276363 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 984D714B7 for ; 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[217.229.24.237]) by smtp.gmail.com with ESMTPSA id g17sm3440222wmc.37.2019.12.06.06.07.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2019 06:07:15 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 10/10] usb: host: xhci-tegra: Implement basic ELPG support Date: Fri, 6 Dec 2019 15:06:53 +0100 Message-Id: <20191206140653.2085561-11-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191206140653.2085561-1-thierry.reding@gmail.com> References: <20191206140653.2085561-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding This implements basic engine-level powergate support which allows the XUSB controller to be put into a low power mode on system sleep and get it out of that low power mode again on resume. Based on work by JC Kuo . Signed-off-by: Thierry Reding --- Changes in v2: - remove useless gotos --- drivers/usb/host/xhci-tegra.c | 127 +++++++++++++++++++++++++++++++--- 1 file changed, 119 insertions(+), 8 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index 7f6657ad5ce5..0b58ef3a7f7f 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -1447,6 +1447,45 @@ static int tegra_xusb_remove(struct platform_device *pdev) } #ifdef CONFIG_PM_SLEEP +static bool xhci_hub_ports_suspended(struct xhci_hub *hub) +{ + struct device *dev = hub->hcd->self.controller; + bool status = true; + unsigned int i; + u32 value; + + for (i = 0; i < hub->num_ports; i++) { + value = readl(hub->ports[i]->addr); + if ((value & PORT_PE) == 0) + continue; + + if ((value & PORT_PLS_MASK) != XDEV_U3) { + dev_info(dev, "%u-%u isn't suspended: %#010x\n", + hub->hcd->self.busnum, i + 1, value); + status = false; + } + } + + return status; +} + +static int tegra_xusb_check_ports(struct tegra_xusb *tegra) +{ + struct xhci_hcd *xhci = hcd_to_xhci(tegra->hcd); + unsigned long flags; + int err = 0; + + spin_lock_irqsave(&xhci->lock, flags); + + if (!xhci_hub_ports_suspended(&xhci->usb2_rhub) || + !xhci_hub_ports_suspended(&xhci->usb3_rhub)) + err = -EBUSY; + + spin_unlock_irqrestore(&xhci->lock, flags); + + return err; +} + static void tegra_xusb_save_context(struct tegra_xusb *tegra) { const struct tegra_xusb_context_soc *soc = tegra->soc->context; @@ -1481,31 +1520,103 @@ static void tegra_xusb_restore_context(struct tegra_xusb *tegra) } } -static int tegra_xusb_suspend(struct device *dev) +static int tegra_xusb_enter_elpg(struct tegra_xusb *tegra, bool wakeup) { - struct tegra_xusb *tegra = dev_get_drvdata(dev); struct xhci_hcd *xhci = hcd_to_xhci(tegra->hcd); - bool wakeup = device_may_wakeup(dev); int err; - /* TODO: Powergate controller across suspend/resume. */ + err = tegra_xusb_check_ports(tegra); + if (err < 0) { + dev_err(tegra->dev, "not all ports suspended: %d\n", err); + return err; + } + err = xhci_suspend(xhci, wakeup); - if (err < 0) + if (err < 0) { + dev_err(tegra->dev, "failed to suspend XHCI: %d\n", err); return err; + } tegra_xusb_save_context(tegra); + tegra_xusb_phy_disable(tegra); + tegra_xusb_clk_disable(tegra); return 0; } -static int tegra_xusb_resume(struct device *dev) +static int tegra_xusb_exit_elpg(struct tegra_xusb *tegra, bool wakeup) { - struct tegra_xusb *tegra = dev_get_drvdata(dev); struct xhci_hcd *xhci = hcd_to_xhci(tegra->hcd); + int err; + err = tegra_xusb_clk_enable(tegra); + if (err < 0) { + dev_err(tegra->dev, "failed to enable clocks: %d\n", err); + return err; + } + + err = tegra_xusb_phy_enable(tegra); + if (err < 0) { + dev_err(tegra->dev, "failed to enable PHYs: %d\n", err); + goto disable_clk; + } + + tegra_xusb_config(tegra); tegra_xusb_restore_context(tegra); - return xhci_resume(xhci, false); + err = tegra_xusb_load_firmware(tegra); + if (err < 0) { + dev_err(tegra->dev, "failed to load firmware: %d\n", err); + goto disable_phy; + } + + err = __tegra_xusb_enable_firmware_messages(tegra); + if (err < 0) { + dev_err(tegra->dev, "failed to enable messages: %d\n", err); + goto disable_phy; + } + + err = xhci_resume(xhci, true); + if (err < 0) { + dev_err(tegra->dev, "failed to resume XHCI: %d\n", err); + goto disable_phy; + } + + return 0; + +disable_phy: + tegra_xusb_phy_disable(tegra); +disable_clk: + tegra_xusb_clk_disable(tegra); + return err; +} + +static int tegra_xusb_suspend(struct device *dev) +{ + struct tegra_xusb *tegra = dev_get_drvdata(dev); + bool wakeup = device_may_wakeup(dev); + int err; + + synchronize_irq(tegra->mbox_irq); + + mutex_lock(&tegra->lock); + err = tegra_xusb_enter_elpg(tegra, wakeup); + mutex_unlock(&tegra->lock); + + return err; +} + +static int tegra_xusb_resume(struct device *dev) +{ + struct tegra_xusb *tegra = dev_get_drvdata(dev); + bool wakeup = device_may_wakeup(dev); + int err; + + mutex_lock(&tegra->lock); + err = tegra_xusb_exit_elpg(tegra, wakeup); + mutex_unlock(&tegra->lock); + + return err; } #endif