From patchwork Fri Dec 6 16:00:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean Pihet X-Patchwork-Id: 11276719 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 56E9B13B6 for ; Fri, 6 Dec 2019 16:00:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 34F502173E for ; Fri, 6 Dec 2019 16:00:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=newoldbits-com.20150623.gappssmtp.com header.i=@newoldbits-com.20150623.gappssmtp.com header.b="bmPSKSxZ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726312AbfLFQA0 (ORCPT ); Fri, 6 Dec 2019 11:00:26 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:39767 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726325AbfLFQAZ (ORCPT ); Fri, 6 Dec 2019 11:00:25 -0500 Received: by mail-wr1-f67.google.com with SMTP id y11so8310920wrt.6 for ; Fri, 06 Dec 2019 08:00:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=newoldbits-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7LlOYdOlwyOQe/T3jn5qpLPyeLc1jpyOUw2w7YnN5+A=; b=bmPSKSxZ15XLOFepLRVLG4iobsqRquo7BfqKAknB6/Ftq09A4iFtVSY6BB5pcRXt+7 0IXr+keD46nvi/CjA9XVA2sA13jKCxPoP53VOhpQdJVekW/9my0Gx7aIFjAXc3G6wLQL 6m2qFkDnl7FN8GF/kywLSjgLPaM1R3ghSwK7J0O2jA4hNyhnoPsrtySoAF9V4dUUZFqZ F0x7zAxuIlDuoM+1g3xuthtjTTDiTEcGIqHtWo27saBB/dX+iIgp2t++BzYIlkpdR14L a6pRVZy9Pxkp1jOGk6sjbjT8QB/n5adXfH5YfYJrjDhI80q5q4d1rEkr4PlywgvbGAiQ CtgQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7LlOYdOlwyOQe/T3jn5qpLPyeLc1jpyOUw2w7YnN5+A=; b=FVmJOgL4aKWNdUhBoaR5GXXv/HGZAgOeLpoP9u0fBYcCD1ovtIDfLnJMMCKU6fbWL5 n7r75MvW/0YFosIiWYxGPVavdTfCY/VRpEhwEmhTR2Ir1cWaDJRmxeWtER/ThKKANtxk 0To6nAcxkynKlVEEFNWbpcesqeoNbZDNZL5mST3u/Mo3JuyucRiJgP5mP4MaYFMuz3e5 JJ1lAT3LiMa9MbieSJ3YOyPOTLNYFn1wS62Nn34raktNn6AwWjRP+j0vp+prjkcAVFUZ gMNXVd1g4lo08PAxPRAssqDMf9w5vK3+/1WiNXTysXThSnURWUOqamHwImi7IQRoJwMr AQIQ== X-Gm-Message-State: APjAAAVm/tCvp/308OpimE7Tl8PHQkWYQKKLsZNj1iJk2r7rbHc582aw a/PtOsMN4+Y6RhPdjdA42UiZzQ== X-Google-Smtp-Source: APXvYqygtAC0GnCtoe88Jg0onEgQJqKm9U1HvdZxe4QiMPEQsCJG6hvoHDAVy6tOo795J1KH3+KCCA== X-Received: by 2002:a5d:50cf:: with SMTP id f15mr16476060wrt.381.1575648023717; Fri, 06 Dec 2019 08:00:23 -0800 (PST) Received: from msilabo.lan (241.33-200-80.adsl-dyn.isp.belgacom.be. [80.200.33.241]) by smtp.gmail.com with ESMTPSA id d19sm3891496wmd.38.2019.12.06.08.00.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2019 08:00:23 -0800 (PST) From: Jean Pihet To: Mark Brown , Tero Kristo Cc: linux-omap@vger.kernel.org, linux-spi@vger.kernel.org, Ryan Barnett , Conrad Ratschan , Jean Pihet Subject: [PATCH 1/3] TI QSPI: Fix fclk frequency Date: Fri, 6 Dec 2019 17:00:05 +0100 Message-Id: <20191206160007.331801-2-jean.pihet@newoldbits.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191206160007.331801-1-jean.pihet@newoldbits.com> References: <20191206160007.331801-1-jean.pihet@newoldbits.com> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org The QSPI IP is clocked by two clocks: - CORE_CLKOUTM4 / 2 (L3) as interface clock, - PER_CLKOUTM2 / 4 (L4) as functional clock, which is PER_CLKOUTM2 divided by 4, so at 192Mhz / 4 = 48MHz. Fix the use of the correct fclk by the driver and fix the frequency value so that the divider is correctly programmed to generate the desired frequency of QSPI_CLK. --- drivers/spi/spi-ti-qspi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c index 3cb65371ae3b..4680dad38ab2 100644 --- a/drivers/spi/spi-ti-qspi.c +++ b/drivers/spi/spi-ti-qspi.c @@ -79,7 +79,7 @@ struct ti_qspi { #define QSPI_COMPLETION_TIMEOUT msecs_to_jiffies(2000) -#define QSPI_FCLK 192000000 +#define QSPI_FCLK 48000000 /* Clock Control */ #define QSPI_CLK_EN (1 << 31) @@ -748,7 +748,7 @@ static int ti_qspi_probe(struct platform_device *pdev) } } - qspi->fclk = devm_clk_get(&pdev->dev, "fck"); + qspi->fclk = devm_clk_get(&pdev->dev, "dpll_per_m2_div4_ck"); if (IS_ERR(qspi->fclk)) { ret = PTR_ERR(qspi->fclk); dev_err(&pdev->dev, "could not get clk: %d\n", ret); From patchwork Fri Dec 6 16:00:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean Pihet X-Patchwork-Id: 11276723 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 43912109A for ; Fri, 6 Dec 2019 16:00:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 221232173E for ; Fri, 6 Dec 2019 16:00:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=newoldbits-com.20150623.gappssmtp.com header.i=@newoldbits-com.20150623.gappssmtp.com header.b="lwicLnoB" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726407AbfLFQA1 (ORCPT ); Fri, 6 Dec 2019 11:00:27 -0500 Received: from mail-wr1-f68.google.com ([209.85.221.68]:41765 "EHLO mail-wr1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726284AbfLFQA1 (ORCPT ); Fri, 6 Dec 2019 11:00:27 -0500 Received: by mail-wr1-f68.google.com with SMTP id c9so8324842wrw.8 for ; Fri, 06 Dec 2019 08:00:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=newoldbits-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0nG0AIEWyaDpD7iKL2b1aqMfl0IExioq+VFWLz9xErA=; b=lwicLnoBDRfFvepqChk+TjAYyRImgAnqWPlXZ7NbSsIqmxD+nG/T58pnFw8TfxVhWD dfDg9/rmlVzPF/y18cZ+HwgsPJKNicoHQxckMPLLrselZUo9gWa6vuPhPHuCm5c6+Pow 2D6ZAsITrsEjaZEH/hpOQI2OR0Nft2FqPNpQ3GQD8MFxduegzIWvt9P2o2M6p/45GJGH lkvgDnW9XVu+4PaBIBCN8IeTUICDCKBwa77MBjvkFa9sfUBIVnNBRxGNWRoGvmnYEYGF 7gXu+gPOyTnTSK7GEdsIRY5OrJW0S2r+2qFbto+3ZlyuYAohBXlkC0OUNbt9AU0cdWDN OiPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0nG0AIEWyaDpD7iKL2b1aqMfl0IExioq+VFWLz9xErA=; b=D/XF0nhmLaNF8LEYr8W9AQLnnmEFOw6RmNBVkByOyrY9GBoV15yYXP3WDgf3E42ilX fmjUzoYFEl6zQhry3Ea7G0mNV9h0jmEHxL5elvkkutiqOYivCxMZxpY3eNpnPVL8NHU+ LdrjBHv8Q21BIhEoO7cvleJYdO/O3GXy6w29rRq97GD6KqYiUHvBvHxJDJXZc2DgJn1Y VCSQeZGblhQ/EB23gw+1oKapKfPx/wcvh4qRYZsQ/ikVYi1kP0OXApusuKd3YtHXSWf+ QPQX44Cei53npuPhQL45yXL/2RMwKQsl7XklpCEqpw5cyda1MBmtjEnlqOFazZp0gyuo PSoQ== X-Gm-Message-State: APjAAAVt/wAp6MQcOOGsazxS5FJHLbv3RQPfz++Bt1Z2oAFtKxioxPQH 0L6J/nASHmpfb+xcw8B5xqhkwg== X-Google-Smtp-Source: APXvYqyXPyic6axNQaYXJiIt6c3rWgU55m6Iq2cyOkgc9/732vTB71+WfvXx6DseFGfgpXBaCmswtg== X-Received: by 2002:adf:dd52:: with SMTP id u18mr16768309wrm.131.1575648025066; Fri, 06 Dec 2019 08:00:25 -0800 (PST) Received: from msilabo.lan (241.33-200-80.adsl-dyn.isp.belgacom.be. [80.200.33.241]) by smtp.gmail.com with ESMTPSA id d19sm3891496wmd.38.2019.12.06.08.00.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2019 08:00:24 -0800 (PST) From: Jean Pihet To: Mark Brown , Tero Kristo Cc: linux-omap@vger.kernel.org, linux-spi@vger.kernel.org, Ryan Barnett , Conrad Ratschan , Jean Pihet Subject: [PATCH 2/3] TI QSPI: support large flash devices Date: Fri, 6 Dec 2019 17:00:06 +0100 Message-Id: <20191206160007.331801-3-jean.pihet@newoldbits.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191206160007.331801-1-jean.pihet@newoldbits.com> References: <20191206160007.331801-1-jean.pihet@newoldbits.com> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org The TI QSPI IP has limitations: - the MMIO region is 64MB in size - in non-MMIO mode, the transfer can handle 4096 words max. Add support for bigger devices. Use MMIO and DMA transfers below the 64MB boundary, use software generated transfers above. --- drivers/spi/spi-ti-qspi.c | 31 +++++++++++++++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c index 4680dad38ab2..13916232a959 100644 --- a/drivers/spi/spi-ti-qspi.c +++ b/drivers/spi/spi-ti-qspi.c @@ -524,6 +524,33 @@ static void ti_qspi_setup_mmap_read(struct spi_device *spi, u8 opcode, QSPI_SPI_SETUP_REG(spi->chip_select)); } +static int ti_qspi_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op) +{ + struct ti_qspi *qspi = spi_controller_get_devdata(mem->spi->master); + size_t max_len; + + if (op->data.dir == SPI_MEM_DATA_IN) { + if (op->addr.val < qspi->mmap_size) { + /* Limit MMIO to the mmaped region */ + if (op->addr.val + op->data.nbytes > qspi->mmap_size) { + max_len = qspi->mmap_size - op->addr.val; + op->data.nbytes = min(op->data.nbytes, max_len); + } + } else { + /* + * Use fallback mode (SW generated transfers) above the + * mmaped region. + * Adjust size to comply with the QSPI max frame length. + */ + max_len = QSPI_FRAME * op->data.buswidth; + max_len -= 1 + op->addr.nbytes + op->dummy.nbytes; + op->data.nbytes = min(op->data.nbytes, max_len); + } + } + + return 0; +} + static int ti_qspi_exec_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) { @@ -574,6 +601,7 @@ static int ti_qspi_exec_mem_op(struct spi_mem *mem, static const struct spi_controller_mem_ops ti_qspi_mem_ops = { .exec_op = ti_qspi_exec_mem_op, + .adjust_op_size = ti_qspi_adjust_op_size, }; static int ti_qspi_start_transfer_one(struct spi_master *master, @@ -599,12 +627,11 @@ static int ti_qspi_start_transfer_one(struct spi_master *master, frame_len_words = 0; list_for_each_entry(t, &m->transfers, transfer_list) frame_len_words += t->len / (t->bits_per_word >> 3); - frame_len_words = min_t(unsigned int, frame_len_words, QSPI_FRAME); /* setup command reg */ qspi->cmd = 0; qspi->cmd |= QSPI_EN_CS(spi->chip_select); - qspi->cmd |= QSPI_FLEN(frame_len_words); + qspi->cmd |= QSPI_FLEN(QSPI_FRAME); ti_qspi_write(qspi, qspi->dc, QSPI_SPI_DC_REG); From patchwork Fri Dec 6 16:00:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean Pihet X-Patchwork-Id: 11276727 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 10642109A for ; Fri, 6 Dec 2019 16:00:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E304D2173E for ; Fri, 6 Dec 2019 16:00:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=newoldbits-com.20150623.gappssmtp.com header.i=@newoldbits-com.20150623.gappssmtp.com header.b="VRHS39ZK" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726271AbfLFQA2 (ORCPT ); Fri, 6 Dec 2019 11:00:28 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:33736 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726403AbfLFQA2 (ORCPT ); Fri, 6 Dec 2019 11:00:28 -0500 Received: by mail-wr1-f67.google.com with SMTP id b6so8369198wrq.0 for ; Fri, 06 Dec 2019 08:00:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=newoldbits-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rFIvByA81LFz7lfVmJWwdH83asL5XC8YFzmQ8CPDf+M=; b=VRHS39ZKEQF6d1JgJtcM6SfYmjOG8APVHHlLzsDJRGbvPk5vJ7l7MwTEei6JGNZqaY 8riIjKsx2kfyKDmLp7kTo8usA9MdlKnl2cTJBR/tdOXBEp1GBLOsAz88JiiQYFmWLlOz hnQjsKCrHIyrhqJd2gw4M99BXOWOKlvTuF9gY5/31bfP2lTXHPRAIe1BjzGqUoGmBkil aZV8PniJHpdwqSQZS/GqCHsfXhEHa5hcvMBigX6jtEJpmNSlRymow+U/pww7SIHEAHDt PPZhhJscj1NkVE7+S6LNFkcvHf3X5AV9n3ZpLoiX5wbCgvy4qNTcFVCGJ+yy0xXsqO11 5H1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rFIvByA81LFz7lfVmJWwdH83asL5XC8YFzmQ8CPDf+M=; b=Zuhu001mc+u3TmUHjZMvEiIUZXVhkoyudhBTO26WeZjOzTnBavaGttQv6cYgfhn/xn 4l6LerlzWLgwXYdf1jTEQl3KtuOMDhXB3kg+pvWneWxnM2hCQkaIir77SNv18d4rHh5H ALfZHwIhFp7kyK2Ape07Ze0Wit9R5sX8VQ4yggf8xReezgVk0nNz2SQw1ehAKZb/pIUw X8QK5jtPwGyxmjvnueX8dmLnY38sfXZyghIKWwN+9856DC7EwtWQsh/JuJ0HEGcrsYTw 7xnMu/O//I4f3wD6xFATS8lB07RGOAWXuguQI/LZw53dzh7LH2u9Io63LnAkY7UALTyL t35g== X-Gm-Message-State: APjAAAWCkiTx9ckI2aSDqtltQj37NTPKqdZwOWE+tHrTscQONKo84pB6 HWXmhsIckD1c3ckrRNYpIWxMOQ== X-Google-Smtp-Source: APXvYqwsW9MIlkZXXKhO8CIVTJMfeF4j78dDHCcsdzZNu6m5M2Zbl2NHuLKYSrhMSxZSV+fbS2Z9QA== X-Received: by 2002:adf:c746:: with SMTP id b6mr15689207wrh.298.1575648026370; Fri, 06 Dec 2019 08:00:26 -0800 (PST) Received: from msilabo.lan (241.33-200-80.adsl-dyn.isp.belgacom.be. [80.200.33.241]) by smtp.gmail.com with ESMTPSA id d19sm3891496wmd.38.2019.12.06.08.00.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2019 08:00:25 -0800 (PST) From: Jean Pihet To: Mark Brown , Tero Kristo Cc: linux-omap@vger.kernel.org, linux-spi@vger.kernel.org, Ryan Barnett , Conrad Ratschan , Jean Pihet Subject: [PATCH 3/3] TI QSPI: optimize transfers for dual and quad read Date: Fri, 6 Dec 2019 17:00:07 +0100 Message-Id: <20191206160007.331801-4-jean.pihet@newoldbits.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191206160007.331801-1-jean.pihet@newoldbits.com> References: <20191206160007.331801-1-jean.pihet@newoldbits.com> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org By reading the 32 bits data register and copy the contents to the receive buffer, according to the single/dual/quad read mode and the data length to read. The speed improvement is 3.5x using quad read. --- drivers/spi/spi-ti-qspi.c | 48 ++++++++++++++++++++++++++------------- 1 file changed, 32 insertions(+), 16 deletions(-) diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c index 13916232a959..65ec3bcb25ae 100644 --- a/drivers/spi/spi-ti-qspi.c +++ b/drivers/spi/spi-ti-qspi.c @@ -313,24 +313,25 @@ static int qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t, static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t, int count) { - int wlen; unsigned int cmd; + u32 rx; u8 *rxbuf; + u8 xfer_len; rxbuf = t->rx_buf; cmd = qspi->cmd; + /* Optimize the transfers for dual and quad read */ switch (t->rx_nbits) { - case SPI_NBITS_DUAL: - cmd |= QSPI_RD_DUAL; - break; case SPI_NBITS_QUAD: - cmd |= QSPI_RD_QUAD; + cmd |= QSPI_RD_QUAD | QSPI_WLEN(32); + break; + case SPI_NBITS_DUAL: + cmd |= QSPI_RD_DUAL | QSPI_WLEN(16); break; default: - cmd |= QSPI_RD_SNGL; + cmd |= QSPI_RD_SNGL | QSPI_WLEN(8); break; } - wlen = t->bits_per_word >> 3; /* in bytes */ while (count) { dev_dbg(qspi->dev, "rx cmd %08x dc %08x\n", cmd, qspi->dc); @@ -342,19 +343,34 @@ static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t, dev_err(qspi->dev, "read timed out\n"); return -ETIMEDOUT; } - switch (wlen) { - case 1: - *rxbuf = readb(qspi->base + QSPI_SPI_DATA_REG); + + /* Optimize the transfers for dual and quad read */ + rx = readl(qspi->base + QSPI_SPI_DATA_REG); + switch (t->rx_nbits) { + case SPI_NBITS_QUAD: + if (count >= 1) + *rxbuf++ = rx >> 24; + if (count >= 2) + *rxbuf++ = rx >> 16; + if (count >= 3) + *rxbuf++ = rx >> 8; + if (count >= 4) + *rxbuf++ = rx; + xfer_len = min(count, 4); break; - case 2: - *((u16 *)rxbuf) = readw(qspi->base + QSPI_SPI_DATA_REG); + case SPI_NBITS_DUAL: + if (count >= 1) + *rxbuf++ = rx >> 8; + if (count >= 2) + *rxbuf++ = rx; + xfer_len = min(count, 2); break; - case 4: - *((u32 *)rxbuf) = readl(qspi->base + QSPI_SPI_DATA_REG); + default: + *rxbuf++ = rx; + xfer_len = 1; break; } - rxbuf += wlen; - count -= wlen; + count -= xfer_len; } return 0;