From patchwork Sat Dec 7 06:39:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11277279 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9BA4017EF for ; Sat, 7 Dec 2019 06:39:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 79B1924676 for ; Sat, 7 Dec 2019 06:39:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="dFQTnbuk" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726605AbfLGGjW (ORCPT ); Sat, 7 Dec 2019 01:39:22 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:39603 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725978AbfLGGjV (ORCPT ); Sat, 7 Dec 2019 01:39:21 -0500 X-UUID: 202a1b9ab8a94936b724c02845a026f3-20191207 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=qz9simjY54XSvDI25tNlpRELcfVBXCKb+vRfUEdSjks=; b=dFQTnbukODvJ272L2Xev50buLt/kQadssaH6YaHKPGQMKrdOMrZr4WNhc2grZoWy6XEWWenQsNJF6AyNleVL0LnVsjnf6pgraHf/fLQ0PtW8XQ+AV6xe7Sqw2va2ovBYrO/9a5weOgOOAZkjtPyctD4RLSpfeycKkRXpPIIoeSQ=; X-UUID: 202a1b9ab8a94936b724c02845a026f3-20191207 Received: from mtkmrs01.mediatek.inc [(172.21.131.159)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1401057786; Sat, 07 Dec 2019 14:39:11 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Sat, 7 Dec 2019 14:38:50 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Sat, 7 Dec 2019 14:38:44 +0800 From: Stanley Chu To: , , , , , , CC: , , , , , , , , , Stanley Chu Subject: [PATCH v1 1/2] soc: mediatek: add header for SiP service interface Date: Sat, 7 Dec 2019 14:39:07 +0800 Message-ID: <1575700748-28191-2-git-send-email-stanley.chu@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1575700748-28191-1-git-send-email-stanley.chu@mediatek.com> References: <1575700748-28191-1-git-send-email-stanley.chu@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Add a header for the SiP service interface defined to access the UFSHCI controller handling secure commands in MediaTek Chipsets. Signed-off-by: Stanley Chu --- include/linux/soc/mediatek/mtk_sip_svc.h | 26 ++++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 include/linux/soc/mediatek/mtk_sip_svc.h diff --git a/include/linux/soc/mediatek/mtk_sip_svc.h b/include/linux/soc/mediatek/mtk_sip_svc.h new file mode 100644 index 000000000000..7b69aa06f58d --- /dev/null +++ b/include/linux/soc/mediatek/mtk_sip_svc.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2019 MediaTek Inc. + */ + +#ifndef __MTK_SIP_SVC_H +#define __MTK_SIP_SVC_H + +/* Error Code */ +#define SIP_SVC_E_SUCCESS 0 +#define SIP_SVC_E_NOT_SUPPORTED -1 +#define SIP_SVC_E_INVALID_PARAMS -2 +#define SIP_SVC_E_INVALID_RANGE -3 +#define SIP_SVC_E_PERMISSION_DENIED -4 + +#ifdef CONFIG_ARM64 +#define MTK_SIP_SMC_AARCH_BIT 0x40000000 +#else +#define MTK_SIP_SMC_AARCH_BIT 0x00000000 +#endif + +/* UFS related SMC call */ +#define MTK_SIP_UFS_CONTROL \ + (0x82000276 | MTK_SIP_SMC_AARCH_BIT) + +#endif From patchwork Sat Dec 7 06:39:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11277275 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3B112112B for ; Sat, 7 Dec 2019 06:39:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1917524676 for ; Sat, 7 Dec 2019 06:39:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Ch2EJJRY" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726289AbfLGGjU (ORCPT ); Sat, 7 Dec 2019 01:39:20 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:8586 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726025AbfLGGjU (ORCPT ); Sat, 7 Dec 2019 01:39:20 -0500 X-UUID: 30520caad3a04d458a6e199ce99c9f6a-20191207 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=FsOPpGNcvyN3hqCpKWKad5Cxcn0GwUWSQI3FseIG2Rg=; b=Ch2EJJRY4iHukue/yzS8oQ9cnCLyxaAYDIp8wKWnk6b2vAHc5j440FyHfuc5usvXgozSluJe0PiAnf0NO/IOaFu68v3rDG8/39vFGnzV6jGZPPo/v+gUEuh2fKLUwUpiubf/r9KC6REHx8Q/NWhF6iF8b4IW2RFhgYTKgHFH2c0=; X-UUID: 30520caad3a04d458a6e199ce99c9f6a-20191207 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1158404149; Sat, 07 Dec 2019 14:39:11 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs05n1.mediatek.inc (172.21.101.15) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Sat, 7 Dec 2019 14:38:51 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Sat, 7 Dec 2019 14:38:44 +0800 From: Stanley Chu To: , , , , , , CC: , , , , , , , , , Stanley Chu Subject: [PATCH v1 2/2] scsi: ufs-mediatek: add device reset implementation Date: Sat, 7 Dec 2019 14:39:08 +0800 Message-ID: <1575700748-28191-3-git-send-email-stanley.chu@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1575700748-28191-1-git-send-email-stanley.chu@mediatek.com> References: <1575700748-28191-1-git-send-email-stanley.chu@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Add device reset vops implementation in MediaTek UFS driver. Signed-off-by: Stanley Chu --- drivers/scsi/ufs/ufs-mediatek.c | 27 +++++++++++++++++++++++++++ drivers/scsi/ufs/ufs-mediatek.h | 7 +++++++ 2 files changed, 34 insertions(+) diff --git a/drivers/scsi/ufs/ufs-mediatek.c b/drivers/scsi/ufs/ufs-mediatek.c index 83e28edc3ac5..6a3ec11b16db 100644 --- a/drivers/scsi/ufs/ufs-mediatek.c +++ b/drivers/scsi/ufs/ufs-mediatek.c @@ -6,10 +6,12 @@ * Peter Wang */ +#include #include #include #include #include +#include #include "ufshcd.h" #include "ufshcd-pltfrm.h" @@ -269,6 +271,30 @@ static int ufs_mtk_link_startup_notify(struct ufs_hba *hba, return ret; } +static void ufs_mtk_device_reset(struct ufs_hba *hba) +{ + struct arm_smccc_res res; + + arm_smccc_smc(MTK_SIP_UFS_CONTROL, UFS_MTK_SIP_DEVICE_RESET, + 0, 0, 0, 0, 0, 0, &res); + /* + * The reset signal is active low. UFS devices shall detect + * more than or equal to 1us of positive or negative RST_n + * pulse width. + * + * To be on safe side, keep the reset low for at least 10us. + */ + usleep_range(10, 15); + + arm_smccc_smc(MTK_SIP_UFS_CONTROL, UFS_MTK_SIP_DEVICE_RESET, + 1, 0, 0, 0, 0, 0, &res); + + /* Some devices may need time to respond to rst_n */ + usleep_range(10000, 15000); + + dev_info(hba->dev, "device reset done\n"); +} + static int ufs_mtk_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op) { struct ufs_mtk_host *host = ufshcd_get_variant(hba); @@ -303,6 +329,7 @@ static struct ufs_hba_variant_ops ufs_hba_mtk_vops = { .pwr_change_notify = ufs_mtk_pwr_change_notify, .suspend = ufs_mtk_suspend, .resume = ufs_mtk_resume, + .device_reset = ufs_mtk_device_reset, }; /** diff --git a/drivers/scsi/ufs/ufs-mediatek.h b/drivers/scsi/ufs/ufs-mediatek.h index 19f8c42fe06f..b03f601d3a9e 100644 --- a/drivers/scsi/ufs/ufs-mediatek.h +++ b/drivers/scsi/ufs/ufs-mediatek.h @@ -6,6 +6,8 @@ #ifndef _UFS_MEDIATEK_H #define _UFS_MEDIATEK_H +#include + /* * Vendor specific pre-defined parameters */ @@ -29,6 +31,11 @@ #define VS_SAVEPOWERCONTROL 0xD0A6 #define VS_UNIPROPOWERDOWNCONTROL 0xD0A8 +/* + * SiP commands + */ +#define UFS_MTK_SIP_DEVICE_RESET BIT(1) + /* * VS_DEBUGCLOCKENABLE */