From patchwork Sat Dec 7 12:22:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11277319 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AE7B6109A for ; Sat, 7 Dec 2019 12:22:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 897DE2176D for ; Sat, 7 Dec 2019 12:22:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Y8K7+Qrm" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726483AbfLGMWV (ORCPT ); Sat, 7 Dec 2019 07:22:21 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:65245 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726263AbfLGMWS (ORCPT ); Sat, 7 Dec 2019 07:22:18 -0500 X-UUID: f91f0e1067b141f890e90dde86fa0d88-20191207 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=WdphAW/gpXCO6Np9LJ/wLt5JaiJqP2sTAAv7fAToZng=; b=Y8K7+QrmVgzX5jprRcO+UT47F5AN5tPrAoMs+BIBGbdy8cBL3/r1EX1tM23AAq7lo5w4F+k4N6jE7gwQGRO2ljyZ1l9CFgJKShZdlCD83hVIzyvJC4UzNhLI1eRprvBpG6MMG0zgzcdEj/0TuU3EP3/wrwqoLMgYWHf943EGI+0=; X-UUID: f91f0e1067b141f890e90dde86fa0d88-20191207 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 785131563; Sat, 07 Dec 2019 20:22:08 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Sat, 7 Dec 2019 20:21:44 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Sat, 7 Dec 2019 20:21:55 +0800 From: Stanley Chu To: , , , , , , CC: , , , , , , , , Stanley Chu Subject: [PATCH v1 1/2] scsi: ufs: disable irq before disabling clocks Date: Sat, 7 Dec 2019 20:22:00 +0800 Message-ID: <1575721321-8071-2-git-send-email-stanley.chu@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1575721321-8071-1-git-send-email-stanley.chu@mediatek.com> References: <1575721321-8071-1-git-send-email-stanley.chu@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 2AF96748D5321DF6AB154895A2E1C9E3DE4982FA9A1F03C07B3D57554AB449A02000:8 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org During suspend flow, interrupt shall be disabled before disabling clocks to avoid potential system hang due to accessing host registers after host clocks are disabled. For example, if an interrupt comes with IRQF_IRQPOLL flag configured with the misrouted interrupt recovery feature enabled, ufshcd ISR may be triggered even if nothing shall be done for UFS. In this case, system hang may happen if UFS interrupt status register is accessed with host clocks disabled. Signed-off-by: Stanley Chu --- drivers/scsi/ufs/ufshcd.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index b5966faf3e98..f80bd4e811cb 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -7908,6 +7908,11 @@ static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op) ret = ufshcd_vops_suspend(hba, pm_op); if (ret) goto set_link_active; + /* + * Disable the host irq as host controller as there won't be any + * host controller transaction expected till resume. + */ + ufshcd_disable_irq(hba); if (!ufshcd_is_link_active(hba)) ufshcd_setup_clocks(hba, false); @@ -7917,11 +7922,7 @@ static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op) hba->clk_gating.state = CLKS_OFF; trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state); - /* - * Disable the host irq as host controller as there won't be any - * host controller transaction expected till resume. - */ - ufshcd_disable_irq(hba); + /* Put the host controller in low power mode if possible */ ufshcd_hba_vreg_set_lpm(hba); goto out; From patchwork Sat Dec 7 12:22:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11277321 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A36DA139A for ; Sat, 7 Dec 2019 12:22:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 806AB2253D for ; Sat, 7 Dec 2019 12:22:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Id0VyHB4" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726513AbfLGMW0 (ORCPT ); Sat, 7 Dec 2019 07:22:26 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:49668 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726509AbfLGMWZ (ORCPT ); Sat, 7 Dec 2019 07:22:25 -0500 X-UUID: 8c0becf7d94c4e7cab15a221e0e4a0d7-20191207 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=x9J++tnSYtzHVx3/Z80sxjIENo1114b2ATMpoEVh/84=; b=Id0VyHB4ckC5PZpX2mlw7STOS4+Ll+bfD1EspH7J8Mqq62vgfTwoVMznnCTkbdiOn30vVBtFukTpxEHTDNT98FlvO0nqb0L+lLMFlPltpO4+7/6gCjbpEKxI4+lB6uKthtAgVdfa1arqNgNLVlVh7IjxqvJ1HqLAQmH6R2qjL5Q=; X-UUID: 8c0becf7d94c4e7cab15a221e0e4a0d7-20191207 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1214669838; Sat, 07 Dec 2019 20:22:18 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs08n1.mediatek.inc (172.21.101.55) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Sat, 7 Dec 2019 20:21:58 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Sat, 7 Dec 2019 20:21:55 +0800 From: Stanley Chu To: , , , , , , CC: , , , , , , , , Stanley Chu Subject: [PATCH v1 2/2] scsi: ufs: disable interrupt during clock-gating Date: Sat, 7 Dec 2019 20:22:01 +0800 Message-ID: <1575721321-8071-3-git-send-email-stanley.chu@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1575721321-8071-1-git-send-email-stanley.chu@mediatek.com> References: <1575721321-8071-1-git-send-email-stanley.chu@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Similar to suspend, ufshcd interrupt can be disabled since there won't be any host controller transaction expected till clocks ungated. Signed-off-by: Stanley Chu Reviewed-by: Asutosh Das --- drivers/scsi/ufs/ufshcd.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index f80bd4e811cb..5de105e82c32 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -1490,6 +1490,8 @@ static void ufshcd_ungate_work(struct work_struct *work) spin_unlock_irqrestore(hba->host->host_lock, flags); ufshcd_setup_clocks(hba, true); + ufshcd_enable_irq(hba); + /* Exit from hibern8 */ if (ufshcd_can_hibern8_during_gating(hba)) { /* Prevent gating in this path */ @@ -1636,6 +1638,8 @@ static void ufshcd_gate_work(struct work_struct *work) ufshcd_set_link_hibern8(hba); } + ufshcd_disable_irq(hba); + if (!ufshcd_is_link_active(hba)) ufshcd_setup_clocks(hba, false); else