From patchwork Mon Dec 9 11:07:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Janusz Krzysztofik X-Patchwork-Id: 11279109 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7B51A6C1 for ; Mon, 9 Dec 2019 11:08:18 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 636DB2077B for ; Mon, 9 Dec 2019 11:08:18 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 636DB2077B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EFF1C6E39E; Mon, 9 Dec 2019 11:08:17 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 52AA76E0F7; Mon, 9 Dec 2019 11:08:16 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Dec 2019 03:08:15 -0800 X-IronPort-AV: E=Sophos;i="5.69,294,1571727600"; d="scan'208";a="202799359" Received: from jkrzyszt-desk.ger.corp.intel.com (HELO jkrzyszt-desk.igk.intel.com) ([172.22.244.17]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Dec 2019 03:08:12 -0800 From: Janusz Krzysztofik To: igt-dev@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Date: Mon, 9 Dec 2019 12:07:52 +0100 Message-Id: <20191209110752.12610-1-janusz.krzysztofik@linux.intel.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Subject: [Intel-gfx] [RFC PATCH i-g-t] test/prime_vgem: Examine blitter access path X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Micha=C5=82_Czapli=C5=84ski?= , Jari Tahvanainen , Daniel Vetter Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On future hardware with missing GGTT BAR we won't be able to exercise dma-buf access via that path. However, access to the dma sg list feature exposed by dma-buf can still be tested through blitter. Unfortunately we don't have any equivalently simple tests that use blitter. Provide them. Suggested-by: Daniel Vetter Signed-off-by: Janusz Krzysztofik Cc: Chris Wilson --- According to Trybot, these subtests are failing on Sandybridge (Gen6) and Haswell (G75), can you please advice how those platforms should be handled? Thanks, Janusz tests/prime_vgem.c | 189 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 189 insertions(+) diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c index 69ae8c9b..7b7bf1b0 100644 --- a/tests/prime_vgem.c +++ b/tests/prime_vgem.c @@ -23,6 +23,7 @@ #include "igt.h" #include "igt_vgem.h" +#include "intel_batchbuffer.h" #include #include @@ -171,6 +172,77 @@ static void test_fence_mmap(int i915, int vgem) close(slave[1]); } +static void test_fence_blt(int i915, int vgem) +{ + struct vgem_bo scratch; + uint32_t prime; + uint32_t *ptr; + uint32_t fence; + int dmabuf, i; + int master[2], slave[2]; + + igt_assert(pipe(master) == 0); + igt_assert(pipe(slave) == 0); + + scratch.width = 1024; + scratch.height = 1024; + scratch.bpp = 32; + vgem_create(vgem, &scratch); + + dmabuf = prime_handle_to_fd(vgem, scratch.handle); + prime = prime_fd_to_handle(i915, dmabuf); + close(dmabuf); + + igt_fork(child, 1) { + uint32_t native; + + close(master[0]); + close(slave[1]); + + native = gem_create(i915, scratch.size); + + ptr = gem_mmap__wc(i915, native, 0, scratch.size, PROT_READ); + for (i = 0; i < 1024; i++) + igt_assert_eq(ptr[1024 * i], 0); + + write(master[1], &child, sizeof(child)); + read(slave[0], &child, sizeof(child)); + + igt_blitter_fast_copy__raw(i915, prime, 0, + scratch.width * scratch.bpp / 8, + I915_TILING_NONE, 0, 0, + scratch.width, scratch.height, + scratch.bpp, native, 0, + scratch.width * scratch.bpp / 8, + I915_TILING_NONE, 0, 0); + gem_sync(i915, native); + + for (i = 0; i < 1024; i++) + igt_assert_eq(ptr[1024 * i], i); + + munmap(ptr, scratch.size); + gem_close(i915, native); + gem_close(i915, prime); + } + + close(master[1]); + close(slave[0]); + read(master[0], &i, sizeof(i)); + fence = vgem_fence_attach(vgem, &scratch, VGEM_FENCE_WRITE); + write(slave[1], &i, sizeof(i)); + + ptr = vgem_mmap(vgem, &scratch, PROT_WRITE); + for (i = 0; i < 1024; i++) + ptr[1024 * i] = i; + munmap(ptr, scratch.size); + vgem_fence_signal(vgem, fence); + gem_close(vgem, scratch.handle); + + igt_waitchildren(); + close(master[0]); + close(slave[1]); +} + static void test_write(int vgem, int i915) { struct vgem_bo scratch; @@ -236,6 +308,62 @@ static void test_gtt(int vgem, int i915) gem_close(vgem, scratch.handle); } +static void test_blt(int vgem, int i915) +{ + struct vgem_bo scratch; + uint32_t prime, native; + uint32_t *ptr; + int dmabuf, i; + + scratch.width = 1024; + scratch.height = 1024; + scratch.bpp = 32; + vgem_create(vgem, &scratch); + + dmabuf = prime_handle_to_fd(vgem, scratch.handle); + prime = prime_fd_to_handle(i915, dmabuf); + close(dmabuf); + + native = gem_create(i915, scratch.size); + + ptr = gem_mmap__wc(i915, native, 0, scratch.size, PROT_WRITE); + for (i = 0; i < 1024; i++) + ptr[1024 * i] = i; + munmap(ptr, scratch.size); + + igt_blitter_fast_copy__raw(i915, + native, 0, scratch.width * scratch.bpp / 8, + I915_TILING_NONE, 0, 0, + scratch.width, scratch.height, scratch.bpp, + prime, 0, scratch.width * scratch.bpp / 8, + I915_TILING_NONE, 0, 0); + gem_sync(i915, prime); + + ptr = vgem_mmap(vgem, &scratch, PROT_READ | PROT_WRITE); + for (i = 0; i < 1024; i++) { + igt_assert_eq(ptr[1024 * i], i); + ptr[1024 * i] = ~i; + } + munmap(ptr, scratch.size); + + igt_blitter_fast_copy__raw(i915, + prime, 0, scratch.width * scratch.bpp / 8, + I915_TILING_NONE, 0, 0, + scratch.width, scratch.height, scratch.bpp, + native, 0, scratch.width * scratch.bpp / 8, + I915_TILING_NONE, 0, 0); + gem_sync(i915, native); + + ptr = gem_mmap__wc(i915, native, 0, scratch.size, PROT_READ); + for (i = 0; i < 1024; i++) + igt_assert_eq(ptr[1024 * i], ~i); + munmap(ptr, scratch.size); + + gem_close(i915, native); + gem_close(i915, prime); + gem_close(vgem, scratch.handle); +} + static void test_shrink(int vgem, int i915) { struct vgem_bo scratch = { @@ -319,6 +447,59 @@ static void test_gtt_interleaved(int vgem, int i915) gem_close(vgem, scratch.handle); } +static void test_blt_interleaved(int vgem, int i915) +{ + struct vgem_bo scratch; + uint32_t prime, native; + uint32_t *foreign, *local; + int dmabuf, i; + + scratch.width = 1024; + scratch.height = 1024; + scratch.bpp = 32; + vgem_create(vgem, &scratch); + + dmabuf = prime_handle_to_fd(vgem, scratch.handle); + prime = prime_fd_to_handle(i915, dmabuf); + close(dmabuf); + + native = gem_create(i915, scratch.size); + + foreign = vgem_mmap(vgem, &scratch, PROT_WRITE); + local = gem_mmap__wc(i915, native, 0, scratch.size, PROT_WRITE); + + for (i = 0; i < 1024; i++) { + local[1024 * i] = i; + igt_blitter_fast_copy__raw(i915, native, 0, + scratch.width * scratch.bpp / 8, + I915_TILING_NONE, 0, i, + scratch.width, 1, scratch.bpp, + prime, 0, + scratch.width * scratch.bpp / 8, + I915_TILING_NONE, 0, i); + gem_sync(i915, prime); + igt_assert_eq(foreign[1024 * i], i); + + foreign[1024 * i] = ~i; + igt_blitter_fast_copy__raw(i915, prime, 0, + scratch.width * scratch.bpp / 8, + I915_TILING_NONE, 0, i, + scratch.width, 1, scratch.bpp, + native, 0, + scratch.width * scratch.bpp / 8, + I915_TILING_NONE, 0, i); + gem_sync(i915, native); + igt_assert_eq(local[1024 * i], ~i); + } + + munmap(local, scratch.size); + munmap(foreign, scratch.size); + + gem_close(i915, native); + gem_close(i915, prime); + gem_close(vgem, scratch.handle); +} + static bool prime_busy(int fd, bool excl) { struct pollfd pfd = { .fd = fd, .events = excl ? POLLOUT : POLLIN }; @@ -834,12 +1015,18 @@ igt_main igt_subtest("basic-gtt") test_gtt(vgem, i915); + igt_subtest("basic-blt") + test_blt(vgem, i915); + igt_subtest("shrink") test_shrink(vgem, i915); igt_subtest("coherency-gtt") test_gtt_interleaved(vgem, i915); + igt_subtest("coherency-blt") + test_blt_interleaved(vgem, i915); + for (e = intel_execution_engines; e->name; e++) { igt_subtest_f("%ssync-%s", e->exec_id == 0 ? "basic-" : "", @@ -886,6 +1073,8 @@ igt_main test_fence_read(i915, vgem); igt_subtest("basic-fence-mmap") test_fence_mmap(i915, vgem); + igt_subtest("basic-fence-blt") + test_fence_blt(i915, vgem); for (e = intel_execution_engines; e->name; e++) { igt_subtest_f("%sfence-wait-%s",