From patchwork Wed Dec 11 13:23:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jian Hu X-Patchwork-Id: 11284921 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 00F3114B7 for ; Wed, 11 Dec 2019 13:24:25 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CF8A8208C3 for ; Wed, 11 Dec 2019 13:24:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="PuEVcoqI" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CF8A8208C3 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=amlogic.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=1C/iNUvLrXhNuNAls5oVpVOWXOCDyfZInBB6WagPRls=; b=PuEVcoqIn4oD2V /pKmZVc1IWWESvwRRzMqbbnMdw1CvLqMbtgGQqITl10TKHKkPLpygWQKpWu+Z626Jc9SlclWEeBON QWHSKLT3ZXL07y1vXFvj1K4/OP0lTR1VlRoQUgXAKU+G4xSRsGa2NRzzV9l6jb3KJCnMvhslRi7iC WZjNwTnKhViVyxAdslbUNszTmm5D6qFDpHPOuiHZi+Wfa3eZ2Sb88T6ZEjIHGgo8NLgVzg0HAvdzW XTvVWYOZOu+yve8s7U+d0lijh2eertBY/4lr1eTMhPjxOpmJi4GP7BJxIIXGDUHjqhUKy51aQfVla 4C8B8V+7C51A+7703AmA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1if1yZ-00061E-PV; Wed, 11 Dec 2019 13:24:23 +0000 Received: from mail-sz.amlogic.com ([211.162.65.117]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1if1yR-0005tC-Kw; Wed, 11 Dec 2019 13:24:17 +0000 Received: from droid15-sz.amlogic.com (10.28.8.25) by mail-sz.amlogic.com (10.28.11.5) with Microsoft SMTP Server id 15.1.1591.10; Wed, 11 Dec 2019 21:24:35 +0800 From: Jian Hu To: Jerome Brunet , Neil Armstrong Subject: [PATCH v2] arm64: dts: meson: add A1 periphs and PLL clock nodes Date: Wed, 11 Dec 2019 21:23:59 +0800 Message-ID: <20191211132359.53647-1-jian.hu@amlogic.com> X-Mailer: git-send-email 2.24.0 MIME-Version: 1.0 X-Originating-IP: [10.28.8.25] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191211_052415_687641_50FD804A X-CRM114-Status: UNSURE ( 8.20 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Herring , Victor Wan , Jianxin Pan , devicetree@vger.kernel.org, Martin Blumenstingl , Kevin Hilman , Michael Turquette , linux-kernel@vger.kernel.org, Stephen Boyd , Jian Hu , linux-arm-kernel@lists.infradead.org, Qiufang Dai , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, Chandle Zou Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org Add A1 periphs and PLL clock controller nodes, Some clocks in periphs controller are the parents of PLL clocks, Meanwhile some clocks in PLL controller are those of periphs clocks. They rely on each other. Signed-off-by: Jian Hu --- Compared with the previous series, the register region is only for the clock. So syscon is not used in A1. This patch depends on A1 clock patchset at [0] Changes since v1 at [1]: -remove the compared message in commit description, And put it after the '---' -reorder order the includes -reorder the clock node -change the clock node name [0] https://lkml.kernel.org/r/20191206074052.15557-1-jian.hu@amlogic.com [1] https://lkml.kernel.org/r/20191211070835.83489-1-jian.hu@amlogic.com --- --- arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 26 +++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi index 7210ad049d1d..48ba3eba547d 100644 --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi @@ -3,6 +3,8 @@ * Copyright (c) 2019 Amlogic, Inc. All rights reserved. */ +#include +#include #include #include @@ -74,6 +76,21 @@ #size-cells = <2>; ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x1000000>; + clkc_periphs: clock-controller@800 { + compatible = "amlogic,a1-periphs-clkc"; + #clock-cells = <1>; + reg = <0 0x800 0 0x104>; + clocks = <&clkc_pll CLKID_FCLK_DIV2>, + <&clkc_pll CLKID_FCLK_DIV3>, + <&clkc_pll CLKID_FCLK_DIV5>, + <&clkc_pll CLKID_FCLK_DIV7>, + <&clkc_pll CLKID_HIFI_PLL>, + <&xtal>; + clock-names = "fclk_div2", "fclk_div3", + "fclk_div5", "fclk_div7", + "hifi_pll", "xtal"; + }; + uart_AO: serial@1c00 { compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; @@ -93,6 +110,15 @@ clock-names = "xtal", "pclk", "baud"; status = "disabled"; }; + + clkc_pll: clock-controller@7c80 { + compatible = "amlogic,a1-pll-clkc"; + #clock-cells = <1>; + reg = <0 0x7c80 0 0x21c>; + clocks = <&clkc_periphs CLKID_XTAL_FIXPLL>, + <&clkc_periphs CLKID_XTAL_HIFIPLL>; + clock-names = "xtal_fixpll", "xtal_hifipll"; + }; }; gic: interrupt-controller@ff901000 {