From patchwork Wed Dec 11 13:52:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 11284969 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2227518B8 for ; Wed, 11 Dec 2019 13:52:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 01C08205C9 for ; Wed, 11 Dec 2019 13:52:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729228AbfLKNwZ (ORCPT ); Wed, 11 Dec 2019 08:52:25 -0500 Received: from albert.telenet-ops.be ([195.130.137.90]:43012 "EHLO albert.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729511AbfLKNwZ (ORCPT ); Wed, 11 Dec 2019 08:52:25 -0500 Received: from ramsan ([84.195.182.253]) by albert.telenet-ops.be with bizsmtp id cdsP2100j5USYZQ06dsPi0; Wed, 11 Dec 2019 14:52:24 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan with esmtp (Exim 4.90_1) (envelope-from ) id 1if2Pf-00014C-MF; Wed, 11 Dec 2019 14:52:23 +0100 Received: from geert by rox.of.borg with local (Exim 4.90_1) (envelope-from ) id 1if2Pf-0006yb-LI; Wed, 11 Dec 2019 14:52:23 +0100 From: Geert Uytterhoeven To: Magnus Damm Cc: linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven Subject: [PATCH v2 1/4] ARM: dts: sh73a0: Rename twd clock to periph clock Date: Wed, 11 Dec 2019 14:52:19 +0100 Message-Id: <20191211135222.26770-2-geert+renesas@glider.be> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191211135222.26770-1-geert+renesas@glider.be> References: <20191211135222.26770-1-geert+renesas@glider.be> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org The "TWD" clock is actually the Cortex-A9 MPCore "PERIPHCLK" clock, which not only clocks the private timers and watchdogs (TWD), but also the interrupt controller and global timer. Hence rename it from "twd" to "periph". Signed-off-by: Geert Uytterhoeven --- v2: - No changes. --- arch/arm/boot/dts/sh73a0.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index 8b35ff4030ef9767..9093b3b9fc0cbd1d 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -43,7 +43,7 @@ compatible = "arm,cortex-a9-twd-timer"; reg = <0xf0000600 0x20>; interrupts = ; - clocks = <&twd_clk>; + clocks = <&periph_clk>; }; gic: interrupt-controller@f0001000 { @@ -812,7 +812,7 @@ clock-div = <13>; clock-mult = <1>; }; - twd_clk: twd { + periph_clk: periph { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks SH73A0_CLK_Z>; #clock-cells = <0>; From patchwork Wed Dec 11 13:52:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 11284963 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A0F8F139A for ; Wed, 11 Dec 2019 13:52:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7EFCF206A5 for ; Wed, 11 Dec 2019 13:52:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729513AbfLKNwZ (ORCPT ); Wed, 11 Dec 2019 08:52:25 -0500 Received: from baptiste.telenet-ops.be ([195.130.132.51]:57932 "EHLO baptiste.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729267AbfLKNwZ (ORCPT ); Wed, 11 Dec 2019 08:52:25 -0500 Received: from ramsan ([84.195.182.253]) by baptiste.telenet-ops.be with bizsmtp id cdsP2100G5USYZQ01dsPb9; Wed, 11 Dec 2019 14:52:23 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan with esmtp (Exim 4.90_1) (envelope-from ) id 1if2Pf-00014G-NI; Wed, 11 Dec 2019 14:52:23 +0100 Received: from geert by rox.of.borg with local (Exim 4.90_1) (envelope-from ) id 1if2Pf-0006yd-M1; Wed, 11 Dec 2019 14:52:23 +0100 From: Geert Uytterhoeven To: Magnus Damm Cc: linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven Subject: [PATCH v2 2/4] ARM: dts: sh73a0: Add device node for ARM global timer Date: Wed, 11 Dec 2019 14:52:20 +0100 Message-Id: <20191211135222.26770-3-geert+renesas@glider.be> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191211135222.26770-1-geert+renesas@glider.be> References: <20191211135222.26770-1-geert+renesas@glider.be> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Add a device node for the global timer, which is part of the Cortex-A9 MPCore. The global timer can serve as an accurate (3 ns) clock source for scheduling and delay loops. Signed-off-by: Geert Uytterhoeven --- v2: - No changes. --- arch/arm/boot/dts/sh73a0.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index 9093b3b9fc0cbd1d..7efe33c4d041a524 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -39,6 +39,13 @@ }; }; + timer@f0000200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0xf0000200 0x100>; + interrupts = ; + clocks = <&periph_clk>; + }; + timer@f0000600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xf0000600 0x20>; From patchwork Wed Dec 11 13:52:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 11284971 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 54B1018B6 for ; Wed, 11 Dec 2019 13:52:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 33AAC205C9 for ; Wed, 11 Dec 2019 13:52:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729511AbfLKNw0 (ORCPT ); Wed, 11 Dec 2019 08:52:26 -0500 Received: from baptiste.telenet-ops.be ([195.130.132.51]:57930 "EHLO baptiste.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728128AbfLKNwZ (ORCPT ); Wed, 11 Dec 2019 08:52:25 -0500 Received: from ramsan ([84.195.182.253]) by baptiste.telenet-ops.be with bizsmtp id cdsP2100H5USYZQ01dsPbA; Wed, 11 Dec 2019 14:52:23 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan with esmtp (Exim 4.90_1) (envelope-from ) id 1if2Pf-00014I-O7; Wed, 11 Dec 2019 14:52:23 +0100 Received: from geert by rox.of.borg with local (Exim 4.90_1) (envelope-from ) id 1if2Pf-0006yh-N0; Wed, 11 Dec 2019 14:52:23 +0100 From: Geert Uytterhoeven To: Magnus Damm Cc: linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven Subject: [PATCH v2 3/4] ARM: dts: r8a7779: Add device node for ARM global timer Date: Wed, 11 Dec 2019 14:52:21 +0100 Message-Id: <20191211135222.26770-4-geert+renesas@glider.be> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191211135222.26770-1-geert+renesas@glider.be> References: <20191211135222.26770-1-geert+renesas@glider.be> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Add a device node for the global timer, which is part of the Cortex-A9 MPCore. The global timer can serve as an accurate (4 ns) clock source for scheduling and delay loops. Signed-off-by: Geert Uytterhoeven --- v2: - No changes. --- arch/arm/boot/dts/r8a7779.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index ebf5b7cfe21599c6..63341635bddf873f 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -68,6 +68,14 @@ <0xf0000100 0x100>; }; + timer@f0000200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0xf0000200 0x100>; + interrupts = ; + clocks = <&cpg_clocks R8A7779_CLK_ZS>; + }; + timer@f0000600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xf0000600 0x20>; From patchwork Wed Dec 11 13:52:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 11284967 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EBA681593 for ; Wed, 11 Dec 2019 13:52:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D4641205C9 for ; Wed, 11 Dec 2019 13:52:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727851AbfLKNwZ (ORCPT ); Wed, 11 Dec 2019 08:52:25 -0500 Received: from baptiste.telenet-ops.be ([195.130.132.51]:57946 "EHLO baptiste.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729228AbfLKNwZ (ORCPT ); Wed, 11 Dec 2019 08:52:25 -0500 Received: from ramsan ([84.195.182.253]) by baptiste.telenet-ops.be with bizsmtp id cdsP2100J5USYZQ01dsPbB; Wed, 11 Dec 2019 14:52:23 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan with esmtp (Exim 4.90_1) (envelope-from ) id 1if2Pf-00014M-PC; Wed, 11 Dec 2019 14:52:23 +0100 Received: from geert by rox.of.borg with local (Exim 4.90_1) (envelope-from ) id 1if2Pf-0006yk-Nz; Wed, 11 Dec 2019 14:52:23 +0100 From: Geert Uytterhoeven To: Magnus Damm Cc: linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven Subject: [PATCH v2 4/4] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs Date: Wed, 11 Dec 2019 14:52:22 +0100 Message-Id: <20191211135222.26770-5-geert+renesas@glider.be> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191211135222.26770-1-geert+renesas@glider.be> References: <20191211135222.26770-1-geert+renesas@glider.be> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which includes a global timer. Enable the ARM global timer on these SoCs, which will be used for: - the scheduler clock, improving scheduler accuracy from 10 ms to 3 or 4 ns, - delay loops, allowing removal of calls to shmobile_init_delay() from the corresponding machine vectors. Note that when using an old DTB lacking the global timer, the kernel will still work. However, loops-per-jiffies will no longer be preset, and the delay loop will need to be calibrated during boot. Signed-off-by: Geert Uytterhoeven --- v2: - Rebased --- arch/arm/mach-shmobile/setup-r8a7779.c | 1 - arch/arm/mach-shmobile/setup-sh73a0.c | 1 - drivers/soc/renesas/Kconfig | 2 ++ 3 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index b13ec9088ce5354c..86406e3f9b22e31f 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -72,7 +72,6 @@ static const char *const r8a7779_compat_dt[] __initconst = { DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)") .smp = smp_ops(r8a7779_smp_ops), .map_io = r8a7779_map_io, - .init_early = shmobile_init_delay, .init_irq = r8a7779_init_irq_dt, .init_late = shmobile_init_late, .dt_compat = r8a7779_compat_dt, diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c index 4b7d07a36a24aa75..cac92edd2b8879cc 100644 --- a/arch/arm/mach-shmobile/setup-sh73a0.c +++ b/arch/arm/mach-shmobile/setup-sh73a0.c @@ -56,7 +56,6 @@ static const char *const sh73a0_boards_compat_dt[] __initconst = { DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)") .smp = smp_ops(sh73a0_smp_ops), .map_io = sh73a0_map_io, - .init_early = shmobile_init_delay, .init_machine = sh73a0_generic_init, .init_late = shmobile_init_late, .dt_compat = sh73a0_boards_compat_dt, diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig index 2d10e34cdbe4d117..f87a7466171c5eba 100644 --- a/drivers/soc/renesas/Kconfig +++ b/drivers/soc/renesas/Kconfig @@ -116,6 +116,7 @@ config ARCH_R8A7779 bool "R-Car H1 (R8A77790)" select ARCH_RCAR_GEN1 select ARM_ERRATA_754322 + select ARM_GLOBAL_TIMER select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP select SYSC_R8A7779 @@ -163,6 +164,7 @@ config ARCH_SH73A0 bool "SH-Mobile AG5 (R8A73A00)" select ARCH_RMOBILE select ARM_ERRATA_754322 + select ARM_GLOBAL_TIMER select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP select RENESAS_INTC_IRQPIN