From patchwork Fri Sep 21 07:06:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chuanhua Han X-Patchwork-Id: 10609193 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D3ACE6CB for ; Fri, 21 Sep 2018 07:06:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C32212DCD7 for ; Fri, 21 Sep 2018 07:06:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B5C7E2DCEF; Fri, 21 Sep 2018 07:06:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 731DC2DCD7 for ; Fri, 21 Sep 2018 07:06:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389327AbeIUMxq (ORCPT ); Fri, 21 Sep 2018 08:53:46 -0400 Received: from inva021.nxp.com ([92.121.34.21]:33100 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725887AbeIUMxq (ORCPT ); Fri, 21 Sep 2018 08:53:46 -0400 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 196CB200247; Fri, 21 Sep 2018 09:06:13 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 0368B200017; Fri, 21 Sep 2018 09:06:10 +0200 (CEST) Received: from mega.ap.freescale.net (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id C1847402DD; Fri, 21 Sep 2018 15:06:05 +0800 (SGT) From: Chuanhua Han To: broonie@kernel.org Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, eha@deif.com, boris.brezillon@bootlin.com, Chuanhua Han Subject: [PATCH 1/2] spi: spi-mem: Add the spi_set_xfer_bpw function Date: Fri, 21 Sep 2018 15:06:26 +0800 Message-Id: <20180921070628.35153-1-chuanhua.han@nxp.com> X-Mailer: git-send-email 2.17.1 X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Before we add this spi_transfer to the spi_message chain table, we need bits_per_word_mask based on spi_control to set the bits_per_word of this spi_transfer. Signed-off-by: Chuanhua Han --- drivers/spi/spi-mem.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index eb72dba71d83..717e711c0952 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -175,6 +175,41 @@ bool spi_mem_supports_op(struct spi_mem *mem, const struct spi_mem_op *op) } EXPORT_SYMBOL_GPL(spi_mem_supports_op); +/** + * spi_set_xfer_bpw() - Set the bits_per_word for each transfer based on + * the bits_per_word_mask of the spi controller + * @ctrl: the spi controller + * @xfer: the spi transfer + * + * This function sets the bits_per_word for each transfer based on the spi + * controller's bits_per_word_mask to improve the efficiency of spi transport. + * + * Return: 0 in case of success, a negative error code otherwise. + */ +int spi_set_xfer_bpw(struct spi_controller *ctlr, struct spi_transfer *xfer) +{ + if (!ctlr || !xfer) { + dev_err(&ctlr->dev, + "Fail to set bits_per_word for spi transfer\n"); + return -EINVAL; + } + + if (ctlr->bits_per_word_mask) { + if (!(xfer->len % 4)) { + if (ctlr->bits_per_word_mask & SPI_BPW_MASK(32)) + xfer->bits_per_word = 32; + } else if (!(xfer->len % 2)) { + if (ctlr->bits_per_word_mask & SPI_BPW_MASK(16)) + xfer->bits_per_word = 16; + } else { + xfer->bits_per_word = 8; + } + } + + return 0; +} +EXPORT_SYMBOL_GPL(spi_set_xfer_bpw); + /** * spi_mem_exec_op() - Execute a memory operation * @mem: the SPI memory @@ -252,6 +287,7 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) xfers[xferpos].tx_buf = tmpbuf; xfers[xferpos].len = sizeof(op->cmd.opcode); xfers[xferpos].tx_nbits = op->cmd.buswidth; + spi_set_xfer_bpw(ctlr, &xfers[xferpos]); spi_message_add_tail(&xfers[xferpos], &msg); xferpos++; totalxferlen++; @@ -266,6 +302,7 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) xfers[xferpos].tx_buf = tmpbuf + 1; xfers[xferpos].len = op->addr.nbytes; xfers[xferpos].tx_nbits = op->addr.buswidth; + spi_set_xfer_bpw(ctlr, &xfers[xferpos]); spi_message_add_tail(&xfers[xferpos], &msg); xferpos++; totalxferlen += op->addr.nbytes; @@ -276,6 +313,7 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) xfers[xferpos].tx_buf = tmpbuf + op->addr.nbytes + 1; xfers[xferpos].len = op->dummy.nbytes; xfers[xferpos].tx_nbits = op->dummy.buswidth; + spi_set_xfer_bpw(ctlr, &xfers[xferpos]); spi_message_add_tail(&xfers[xferpos], &msg); xferpos++; totalxferlen += op->dummy.nbytes; @@ -291,6 +329,7 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) } xfers[xferpos].len = op->data.nbytes; + spi_set_xfer_bpw(ctlr, &xfers[xferpos]); spi_message_add_tail(&xfers[xferpos], &msg); xferpos++; totalxferlen += op->data.nbytes; From patchwork Fri Sep 21 07:06:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chuanhua Han X-Patchwork-Id: 10609189 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C47D56CB for ; Fri, 21 Sep 2018 07:06:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B3C292D8F4 for ; Fri, 21 Sep 2018 07:06:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A776C2DCE1; Fri, 21 Sep 2018 07:06:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4BC432D8F4 for ; Fri, 21 Sep 2018 07:06:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389176AbeIUMxq (ORCPT ); Fri, 21 Sep 2018 08:53:46 -0400 Received: from inva020.nxp.com ([92.121.34.13]:54910 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388909AbeIUMxq (ORCPT ); Fri, 21 Sep 2018 08:53:46 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id E96881A02AF; Fri, 21 Sep 2018 09:06:13 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id D53BB1A02AC; Fri, 21 Sep 2018 09:06:10 +0200 (CEST) Received: from mega.ap.freescale.net (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id A06C6402E5; Fri, 21 Sep 2018 15:06:06 +0800 (SGT) From: Chuanhua Han To: broonie@kernel.org Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, eha@deif.com, boris.brezillon@bootlin.com, Chuanhua Han Subject: [PATCH 2/2] spi: spi-fsl-dspi: Fix support for XSPI transport mode Date: Fri, 21 Sep 2018 15:06:27 +0800 Message-Id: <20180921070628.35153-2-chuanhua.han@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180921070628.35153-1-chuanhua.han@nxp.com> References: <20180921070628.35153-1-chuanhua.han@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch fixes the problem that the XSPI mode of the dspi controller cannot transfer data properly. In XSPI mode, cmd_fifo is written before tx_fifo, which transforms the byte order of sending and receiving data. Signed-off-by: Chuanhua Han --- drivers/spi/spi-fsl-dspi.c | 29 +++++++++++++++++++---------- 1 file changed, 19 insertions(+), 10 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 3082e72e4f6c..44cc2bd0120e 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -220,9 +220,15 @@ static u32 dspi_pop_tx(struct fsl_dspi *dspi) if (dspi->bytes_per_word == 1) txdata = *(u8 *)dspi->tx; else if (dspi->bytes_per_word == 2) - txdata = *(u16 *)dspi->tx; + if (dspi->cur_chip->ctar_val & SPI_CTAR_LSBFE(1)) + txdata = cpu_to_le16(*(u16 *)dspi->tx); + else + txdata = cpu_to_be16(*(u16 *)dspi->tx); else /* dspi->bytes_per_word == 4 */ - txdata = *(u32 *)dspi->tx; + if (dspi->cur_chip->ctar_val & SPI_CTAR_LSBFE(1)) + txdata = cpu_to_le32(*(u32 *)dspi->tx); + else + txdata = cpu_to_be32(*(u32 *)dspi->tx); dspi->tx += dspi->bytes_per_word; } dspi->len -= dspi->bytes_per_word; @@ -243,15 +249,18 @@ static void dspi_push_rx(struct fsl_dspi *dspi, u32 rxdata) if (!dspi->rx) return; - /* Mask of undefined bits */ - rxdata &= (1 << dspi->bits_per_word) - 1; - if (dspi->bytes_per_word == 1) *(u8 *)dspi->rx = rxdata; else if (dspi->bytes_per_word == 2) - *(u16 *)dspi->rx = rxdata; + if (dspi->cur_chip->ctar_val & SPI_CTAR_LSBFE(1)) + *(u16 *)dspi->rx = be16_to_cpu(rxdata); + else + *(u16 *)dspi->rx = be16_to_cpu(rxdata); else /* dspi->bytes_per_word == 4 */ - *(u32 *)dspi->rx = rxdata; + if (dspi->cur_chip->ctar_val & SPI_CTAR_LSBFE(1)) + *(u32 *)dspi->rx = le32_to_cpu(rxdata); + else + *(u32 *)dspi->rx = be32_to_cpu(rxdata); dspi->rx += dspi->bytes_per_word; } @@ -593,16 +602,16 @@ static void dspi_tcfq_write(struct fsl_dspi *dspi) */ u32 data = dspi_pop_tx(dspi); + cmd_fifo_write(dspi); if (dspi->cur_chip->ctar_val & SPI_CTAR_LSBFE(1)) { /* LSB */ - tx_fifo_write(dspi, data & 0xFFFF); tx_fifo_write(dspi, data >> 16); + tx_fifo_write(dspi, data & 0xFFFF); } else { /* MSB */ - tx_fifo_write(dspi, data >> 16); tx_fifo_write(dspi, data & 0xFFFF); + tx_fifo_write(dspi, data >> 16); } - cmd_fifo_write(dspi); } else { /* Write one entry to both TX FIFO and CMD FIFO * simultaneously.