From patchwork Thu Dec 12 18:38:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kammela, Gayatri" X-Patchwork-Id: 11289143 X-Patchwork-Delegate: andy.shevchenko@gmail.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E573A6C1 for ; Thu, 12 Dec 2019 18:41:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id CE229206DA for ; Thu, 12 Dec 2019 18:41:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730406AbfLLSlB (ORCPT ); Thu, 12 Dec 2019 13:41:01 -0500 Received: from mga01.intel.com ([192.55.52.88]:22235 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730418AbfLLSkm (ORCPT ); Thu, 12 Dec 2019 13:40:42 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Dec 2019 10:40:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,306,1571727600"; d="scan'208";a="211205406" Received: from gayuk-dev-mach.sc.intel.com ([10.3.79.172]) by fmsmga008.fm.intel.com with ESMTP; 12 Dec 2019 10:40:42 -0800 From: Gayatri Kammela To: platform-driver-x86@vger.kernel.org Cc: vishwanath.somayaji@intel.com, dvhart@infradead.org, linux-kernel@vger.kernel.org, mika.westerberg@intel.com, charles.d.prestopine@intel.com, Gayatri Kammela , Peter Zijlstra , Srinivas Pandruvada , Andy Shevchenko , Kan Liang , "David E . Box" , Rajneesh Bhardwaj , Tony Luck Subject: [PATCH v4 1/5] platform/x86: intel_pmc_core: Clean up: Remove comma after the termination line Date: Thu, 12 Dec 2019 10:38:43 -0800 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: platform-driver-x86-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org It is common practice to place a comma after the last entry in an initialized array to avoid the need to add one in future patches that extend the array. But when the last element is a termination marker, the comma could be harmful. Any new entries must be added before the terminator (and the comma would prevent the compiler from issuing a warning about an entry after the terminator). Cc: Peter Zijlstra Cc: Srinivas Pandruvada Cc: Andy Shevchenko Cc: Kan Liang Cc: David E. Box Cc: Rajneesh Bhardwaj Cc: Tony Luck Suggested-by: Andy Shevchenko Reviewed-by: Tony Luck Signed-off-by: Gayatri Kammela --- drivers/platform/x86/intel_pmc_core.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index 571b4754477c..f7256168bb8f 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -49,7 +49,7 @@ static const struct pmc_bit_map spt_pll_map[] = { {"GEN2 USB2PCIE2 PLL", SPT_PMC_BIT_MPHY_CMN_LANE1}, {"DMIPCIE3 PLL", SPT_PMC_BIT_MPHY_CMN_LANE2}, {"SATA PLL", SPT_PMC_BIT_MPHY_CMN_LANE3}, - {}, + {} }; static const struct pmc_bit_map spt_mphy_map[] = { @@ -69,7 +69,7 @@ static const struct pmc_bit_map spt_mphy_map[] = { {"MPHY CORE LANE 13", SPT_PMC_BIT_MPHY_LANE13}, {"MPHY CORE LANE 14", SPT_PMC_BIT_MPHY_LANE14}, {"MPHY CORE LANE 15", SPT_PMC_BIT_MPHY_LANE15}, - {}, + {} }; static const struct pmc_bit_map spt_pfear_map[] = { @@ -113,7 +113,7 @@ static const struct pmc_bit_map spt_pfear_map[] = { {"CSME_SMS1", SPT_PMC_BIT_CSME_SMS1}, {"CSME_RTC", SPT_PMC_BIT_CSME_RTC}, {"CSME_PSF", SPT_PMC_BIT_CSME_PSF}, - {}, + {} }; static const struct pmc_bit_map spt_ltr_show_map[] = { @@ -300,7 +300,7 @@ static const struct pmc_bit_map *cnp_slps0_dbg_maps[] = { cnp_slps0_dbg0_map, cnp_slps0_dbg1_map, cnp_slps0_dbg2_map, - NULL, + NULL }; static const struct pmc_bit_map cnp_ltr_show_map[] = { @@ -823,7 +823,7 @@ MODULE_DEVICE_TABLE(x86cpu, intel_pmc_core_ids); static const struct pci_device_id pmc_pci_ids[] = { { PCI_VDEVICE(INTEL, SPT_PMC_PCI_DEVICE_ID), 0}, - { 0, }, + { 0, } }; /* From patchwork Thu Dec 12 18:38:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kammela, Gayatri" X-Patchwork-Id: 11289141 X-Patchwork-Delegate: andy.shevchenko@gmail.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 41C2F1593 for ; Thu, 12 Dec 2019 18:41:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 20C73206DA for ; Thu, 12 Dec 2019 18:41:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730525AbfLLSko (ORCPT ); Thu, 12 Dec 2019 13:40:44 -0500 Received: from mga01.intel.com ([192.55.52.88]:22235 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730506AbfLLSkn (ORCPT ); Thu, 12 Dec 2019 13:40:43 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Dec 2019 10:40:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,306,1571727600"; d="scan'208";a="211205409" Received: from gayuk-dev-mach.sc.intel.com ([10.3.79.172]) by fmsmga008.fm.intel.com with ESMTP; 12 Dec 2019 10:40:42 -0800 From: Gayatri Kammela To: platform-driver-x86@vger.kernel.org Cc: vishwanath.somayaji@intel.com, dvhart@infradead.org, linux-kernel@vger.kernel.org, mika.westerberg@intel.com, charles.d.prestopine@intel.com, Gayatri Kammela , Peter Zijlstra , Srinivas Pandruvada , Andy Shevchenko , Kan Liang , "David E . Box" , Rajneesh Bhardwaj , Tony Luck Subject: [PATCH v4 2/5] platform/x86: intel_pmc_core: Create platform dependent pmc bitmap structs Date: Thu, 12 Dec 2019 10:38:44 -0800 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: platform-driver-x86-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org The current implementation of pmc_core driver allows to reuse, but does not reflect the exact number and names of IPs for a newer platform which does not necessarily support all the IPs in the entries. The names and number of these IPs might differ from its previous platforms. The number of PCH IPs per platform is calculated based on PPFEAR_NUM_ENTRIES defined, where each entry represents a bucket (8 bits). The platform can support 'n' entries, but not necessarily all 'n*8' IPs. Create platform dependent bitmap structures to specify the exact number, names of IPs while reusing the existing IPs. The changes in this patch are preparatory to accommodate future SoCs that might reuse the CNL/ICL PCH IPs, and to reflect the exact number of IPs with its names. Cc: Peter Zijlstra Cc: Srinivas Pandruvada Cc: Andy Shevchenko Cc: Kan Liang Cc: David E. Box Cc: Rajneesh Bhardwaj Cc: Tony Luck Reviewed-by: Tony Luck Signed-off-by: Gayatri Kammela --- drivers/platform/x86/intel_pmc_core.c | 46 ++++++++++++++++++++------- drivers/platform/x86/intel_pmc_core.h | 2 +- 2 files changed, 35 insertions(+), 13 deletions(-) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index f7256168bb8f..2449756434db 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -116,6 +116,11 @@ static const struct pmc_bit_map spt_pfear_map[] = { {} }; +static const struct pmc_bit_map *ext_spt_pfear_map[] = { + spt_pfear_map, + NULL +}; + static const struct pmc_bit_map spt_ltr_show_map[] = { {"SOUTHPORT_A", SPT_PMC_LTR_SPA}, {"SOUTHPORT_B", SPT_PMC_LTR_SPB}, @@ -142,7 +147,7 @@ static const struct pmc_bit_map spt_ltr_show_map[] = { }; static const struct pmc_reg_map spt_reg_map = { - .pfear_sts = spt_pfear_map, + .pfear_sts = ext_spt_pfear_map, .mphy_sts = spt_mphy_map, .pll_sts = spt_pll_map, .ltr_show_sts = spt_ltr_show_map, @@ -234,7 +239,15 @@ static const struct pmc_bit_map cnp_pfear_map[] = { {"PSF6", BIT(5)}, {"PSF7", BIT(6)}, {"PSF8", BIT(7)}, + {} +}; + +static const struct pmc_bit_map *ext_cnp_pfear_map[] = { + cnp_pfear_map, + NULL +}; +static const struct pmc_bit_map icl_pfear_map[] = { /* Ice Lake generation onwards only */ {"RES_65", BIT(0)}, {"RES_66", BIT(1)}, @@ -247,6 +260,12 @@ static const struct pmc_bit_map cnp_pfear_map[] = { {} }; +static const struct pmc_bit_map *ext_icl_pfear_map[] = { + cnp_pfear_map, + icl_pfear_map, + NULL +}; + static const struct pmc_bit_map cnp_slps0_dbg0_map[] = { {"AUDIO_D3", BIT(0)}, {"OTG_D3", BIT(1)}, @@ -334,7 +353,7 @@ static const struct pmc_bit_map cnp_ltr_show_map[] = { }; static const struct pmc_reg_map cnp_reg_map = { - .pfear_sts = cnp_pfear_map, + .pfear_sts = ext_cnp_pfear_map, .slp_s0_offset = CNP_PMC_SLP_S0_RES_COUNTER_OFFSET, .slps0_dbg_maps = cnp_slps0_dbg_maps, .ltr_show_sts = cnp_ltr_show_map, @@ -350,7 +369,7 @@ static const struct pmc_reg_map cnp_reg_map = { }; static const struct pmc_reg_map icl_reg_map = { - .pfear_sts = cnp_pfear_map, + .pfear_sts = ext_icl_pfear_map, .slp_s0_offset = CNP_PMC_SLP_S0_RES_COUNTER_OFFSET, .slps0_dbg_maps = cnp_slps0_dbg_maps, .ltr_show_sts = cnp_ltr_show_map, @@ -412,20 +431,20 @@ static int pmc_core_check_read_lock_bit(void) #if IS_ENABLED(CONFIG_DEBUG_FS) static bool slps0_dbg_latch; -static void pmc_core_display_map(struct seq_file *s, int index, - u8 pf_reg, const struct pmc_bit_map *pf_map) +static void pmc_core_display_map(struct seq_file *s, int index, int idx, int ip, + u8 pf_reg, const struct pmc_bit_map **pf_map) { seq_printf(s, "PCH IP: %-2d - %-32s\tState: %s\n", - index, pf_map[index].name, - pf_map[index].bit_mask & pf_reg ? "Off" : "On"); + ip, pf_map[idx][index].name, + pf_map[idx][index].bit_mask & pf_reg ? "Off" : "On"); } static int pmc_core_ppfear_show(struct seq_file *s, void *unused) { struct pmc_dev *pmcdev = s->private; - const struct pmc_bit_map *map = pmcdev->map->pfear_sts; + const struct pmc_bit_map **maps = pmcdev->map->pfear_sts; u8 pf_regs[PPFEAR_MAX_NUM_ENTRIES]; - int index, iter; + int index, iter, idx, ip = 0; iter = pmcdev->map->ppfear0_offset; @@ -433,9 +452,12 @@ static int pmc_core_ppfear_show(struct seq_file *s, void *unused) index < PPFEAR_MAX_NUM_ENTRIES; index++, iter++) pf_regs[index] = pmc_core_reg_read_byte(pmcdev, iter); - for (index = 0; map[index].name && - index < pmcdev->map->ppfear_buckets * 8; index++) - pmc_core_display_map(s, index, pf_regs[index / 8], map); + for (idx = 0; maps[idx]; idx++) { + for (index = 0; maps[idx][index].name && + index < pmcdev->map->ppfear_buckets * 8; ip++, index++) + pmc_core_display_map(s, index, idx, ip, + pf_regs[index / 8], maps); + } return 0; } diff --git a/drivers/platform/x86/intel_pmc_core.h b/drivers/platform/x86/intel_pmc_core.h index fdee5772e532..4b9f9ad6b692 100644 --- a/drivers/platform/x86/intel_pmc_core.h +++ b/drivers/platform/x86/intel_pmc_core.h @@ -213,7 +213,7 @@ struct pmc_bit_map { * captures them to have a common implementation. */ struct pmc_reg_map { - const struct pmc_bit_map *pfear_sts; + const struct pmc_bit_map **pfear_sts; const struct pmc_bit_map *mphy_sts; const struct pmc_bit_map *pll_sts; const struct pmc_bit_map **slps0_dbg_maps; From patchwork Thu Dec 12 18:38:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kammela, Gayatri" X-Patchwork-Id: 11289139 X-Patchwork-Delegate: andy.shevchenko@gmail.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B8C05109A for ; Thu, 12 Dec 2019 18:40:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A1FD2206DA for ; Thu, 12 Dec 2019 18:40:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730536AbfLLSko (ORCPT ); Thu, 12 Dec 2019 13:40:44 -0500 Received: from mga01.intel.com ([192.55.52.88]:22235 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730393AbfLLSkn (ORCPT ); Thu, 12 Dec 2019 13:40:43 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Dec 2019 10:40:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,306,1571727600"; d="scan'208";a="211205412" Received: from gayuk-dev-mach.sc.intel.com ([10.3.79.172]) by fmsmga008.fm.intel.com with ESMTP; 12 Dec 2019 10:40:42 -0800 From: Gayatri Kammela To: platform-driver-x86@vger.kernel.org Cc: vishwanath.somayaji@intel.com, dvhart@infradead.org, linux-kernel@vger.kernel.org, mika.westerberg@intel.com, charles.d.prestopine@intel.com, Gayatri Kammela , Peter Zijlstra , Srinivas Pandruvada , Andy Shevchenko , Kan Liang , "David E . Box" , Rajneesh Bhardwaj , Tony Luck Subject: [PATCH v4 3/5] platform/x86: intel_pmc_core: Make debugfs entry for pch_ip_power_gating_status conditional Date: Thu, 12 Dec 2019 10:38:45 -0800 Message-Id: <07291defd4249764c89679df19d1d8e46e4cc497.1576105486.git.gayatri.kammela@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: platform-driver-x86-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Check if the platform supports and only then add a debugfs entry for PCH IP power gating status. Cc: Peter Zijlstra Cc: Srinivas Pandruvada Cc: Andy Shevchenko Cc: Kan Liang Cc: David E. Box Cc: Rajneesh Bhardwaj Cc: Tony Luck Reviewed-by: Tony Luck Signed-off-by: Gayatri Kammela --- drivers/platform/x86/intel_pmc_core.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index 2449756434db..1ff28199b599 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -789,8 +789,9 @@ static void pmc_core_dbgfs_register(struct pmc_dev *pmcdev) debugfs_create_file("slp_s0_residency_usec", 0444, dir, pmcdev, &pmc_core_dev_state); - debugfs_create_file("pch_ip_power_gating_status", 0444, dir, pmcdev, - &pmc_core_ppfear_fops); + if (pmcdev->map->pfear_sts) + debugfs_create_file("pch_ip_power_gating_status", 0444, dir, + pmcdev, &pmc_core_ppfear_fops); debugfs_create_file("ltr_ignore", 0644, dir, pmcdev, &pmc_core_ltr_ignore_ops); From patchwork Thu Dec 12 18:38:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kammela, Gayatri" X-Patchwork-Id: 11289137 X-Patchwork-Delegate: andy.shevchenko@gmail.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 39906109A for ; Thu, 12 Dec 2019 18:40:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 22D09206DA for ; Thu, 12 Dec 2019 18:40:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730439AbfLLSku (ORCPT ); Thu, 12 Dec 2019 13:40:50 -0500 Received: from mga01.intel.com ([192.55.52.88]:22236 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730519AbfLLSko (ORCPT ); Thu, 12 Dec 2019 13:40:44 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Dec 2019 10:40:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,306,1571727600"; d="scan'208";a="211205415" Received: from gayuk-dev-mach.sc.intel.com ([10.3.79.172]) by fmsmga008.fm.intel.com with ESMTP; 12 Dec 2019 10:40:42 -0800 From: Gayatri Kammela To: platform-driver-x86@vger.kernel.org Cc: vishwanath.somayaji@intel.com, dvhart@infradead.org, linux-kernel@vger.kernel.org, mika.westerberg@intel.com, charles.d.prestopine@intel.com, Gayatri Kammela , Peter Zijlstra , Srinivas Pandruvada , Andy Shevchenko , Kan Liang , "David E . Box" , Rajneesh Bhardwaj , Tony Luck Subject: [PATCH v4 4/5] platform/x86: intel_pmc_core: Add Tiger Lake (TGL) platform support to intel_pmc_core driver Date: Thu, 12 Dec 2019 10:38:46 -0800 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: platform-driver-x86-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Add Tiger Lake to the list of the platforms that intel_pmc_core driver supports for the pmc_core device. Just like Ice Lake, Tiger Lake can also reuse all the Cannon Lake PCH IPs. Since Tiger Lake has almost the same number of PCH IPs as Ice Lake, reuse Ice Lake's PPFEAR_NUM_ENTRIES instead of defining a new macro. Cc: Peter Zijlstra Cc: Srinivas Pandruvada Cc: Andy Shevchenko Cc: Kan Liang Cc: David E. Box Cc: Rajneesh Bhardwaj Cc: Tony Luck Reviewed-by: Tony Luck Signed-off-by: Gayatri Kammela --- drivers/platform/x86/intel_pmc_core.c | 46 +++++++++++++++++++++++++-- drivers/platform/x86/intel_pmc_core.h | 2 ++ 2 files changed, 46 insertions(+), 2 deletions(-) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index 1ff28199b599..b18782e48a5d 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -191,7 +191,10 @@ static const struct pmc_bit_map cnp_pfear_map[] = { {"SDX", BIT(4)}, {"SPE", BIT(5)}, {"Fuse", BIT(6)}, - /* Reserved for Cannon Lake but valid for Ice Lake and Comet Lake */ + /* + * Reserved for Cannon Lake but valid for Ice Lake, Comet Lake + * and Tiger Lake. + */ {"SBR8", BIT(7)}, {"CSME_FSC", BIT(0)}, @@ -235,7 +238,10 @@ static const struct pmc_bit_map cnp_pfear_map[] = { {"HDA_PGD4", BIT(2)}, {"HDA_PGD5", BIT(3)}, {"HDA_PGD6", BIT(4)}, - /* Reserved for Cannon Lake but valid for Ice Lake and Comet Lake */ + /* + * Reserved for Cannon Lake but valid for Ice Lake, Comet Lake + * and Tiger Lake. + */ {"PSF6", BIT(5)}, {"PSF7", BIT(6)}, {"PSF8", BIT(7)}, @@ -266,6 +272,24 @@ static const struct pmc_bit_map *ext_icl_pfear_map[] = { NULL }; +static const struct pmc_bit_map tgl_pfear_map[] = { + /* Tiger Lake generation onwards only */ + {"PSF9", BIT(0)}, + {"RES_66", BIT(1)}, + {"RES_67", BIT(2)}, + {"RES_68", BIT(3)}, + {"RES_69", BIT(4)}, + {"RES_70", BIT(5)}, + {"TBTLSX", BIT(6)}, + {} +}; + +static const struct pmc_bit_map *ext_tgl_pfear_map[] = { + cnp_pfear_map, + tgl_pfear_map, + NULL +}; + static const struct pmc_bit_map cnp_slps0_dbg0_map[] = { {"AUDIO_D3", BIT(0)}, {"OTG_D3", BIT(1)}, @@ -384,6 +408,22 @@ static const struct pmc_reg_map icl_reg_map = { .ltr_ignore_max = ICL_NUM_IP_IGN_ALLOWED, }; +static const struct pmc_reg_map tgl_reg_map = { + .pfear_sts = ext_tgl_pfear_map, + .slp_s0_offset = CNP_PMC_SLP_S0_RES_COUNTER_OFFSET, + .slps0_dbg_maps = cnp_slps0_dbg_maps, + .ltr_show_sts = cnp_ltr_show_map, + .msr_sts = msr_map, + .slps0_dbg_offset = CNP_PMC_SLPS0_DBG_OFFSET, + .ltr_ignore_offset = CNP_PMC_LTR_IGNORE_OFFSET, + .regmap_length = CNP_PMC_MMIO_REG_LEN, + .ppfear0_offset = CNP_PMC_HOST_PPFEAR0A, + .ppfear_buckets = ICL_PPFEAR_NUM_ENTRIES, + .pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET, + .pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT, + .ltr_ignore_max = TGL_NUM_IP_IGN_ALLOWED, +}; + static inline u8 pmc_core_reg_read_byte(struct pmc_dev *pmcdev, int offset) { return readb(pmcdev->regbase + offset); @@ -839,6 +879,8 @@ static const struct x86_cpu_id intel_pmc_core_ids[] = { INTEL_CPU_FAM6(ICELAKE_NNPI, icl_reg_map), INTEL_CPU_FAM6(COMETLAKE, cnp_reg_map), INTEL_CPU_FAM6(COMETLAKE_L, cnp_reg_map), + INTEL_CPU_FAM6(TIGERLAKE_L, tgl_reg_map), + INTEL_CPU_FAM6(TIGERLAKE, tgl_reg_map), {} }; diff --git a/drivers/platform/x86/intel_pmc_core.h b/drivers/platform/x86/intel_pmc_core.h index 4b9f9ad6b692..99acdc051342 100644 --- a/drivers/platform/x86/intel_pmc_core.h +++ b/drivers/platform/x86/intel_pmc_core.h @@ -186,6 +186,8 @@ enum ppfear_regs { #define ICL_NUM_IP_IGN_ALLOWED 20 #define ICL_PMC_LTR_WIGIG 0x1BFC +#define TGL_NUM_IP_IGN_ALLOWED 22 + struct pmc_bit_map { const char *name; u32 bit_mask; From patchwork Thu Dec 12 18:38:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kammela, Gayatri" X-Patchwork-Id: 11289135 X-Patchwork-Delegate: andy.shevchenko@gmail.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 18E976C1 for ; Thu, 12 Dec 2019 18:40:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 01889206DA for ; Thu, 12 Dec 2019 18:40:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730570AbfLLSku (ORCPT ); Thu, 12 Dec 2019 13:40:50 -0500 Received: from mga01.intel.com ([192.55.52.88]:22235 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730524AbfLLSko (ORCPT ); Thu, 12 Dec 2019 13:40:44 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Dec 2019 10:40:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,306,1571727600"; d="scan'208";a="211205418" Received: from gayuk-dev-mach.sc.intel.com ([10.3.79.172]) by fmsmga008.fm.intel.com with ESMTP; 12 Dec 2019 10:40:42 -0800 From: Gayatri Kammela To: platform-driver-x86@vger.kernel.org Cc: vishwanath.somayaji@intel.com, dvhart@infradead.org, linux-kernel@vger.kernel.org, mika.westerberg@intel.com, charles.d.prestopine@intel.com, Gayatri Kammela , Peter Zijlstra , Srinivas Pandruvada , Andy Shevchenko , Kan Liang , "David E . Box" , Rajneesh Bhardwaj , Tony Luck Subject: [PATCH v4 5/5] platform/x86: intel_pmc_core: Add Atom based Elkhart Lake (EHL) platform support to intel_pmc_core driver Date: Thu, 12 Dec 2019 10:38:47 -0800 Message-Id: <672ca6d153dd714687ab990f9fe5327296e9a242.1576105486.git.gayatri.kammela@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: platform-driver-x86-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Add Elkhart Lake to the list of the platforms that intel_pmc_core driver supports for pmc_core device. Just like Ice Lake and Tiger Lake, Elkhart Lake can also reuse all the Cannon Lake PCH IPs. Also, it uses the same PCH IPs of Tiger Lake, no additional effort is needed to enable but to simply reuse them. Cc: Peter Zijlstra Cc: Srinivas Pandruvada Cc: Andy Shevchenko Cc: Kan Liang Cc: David E. Box Cc: Rajneesh Bhardwaj Cc: Tony Luck Reviewed-by: Tony Luck Signed-off-by: Gayatri Kammela --- drivers/platform/x86/intel_pmc_core.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index b18782e48a5d..017776551cc5 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -192,8 +192,8 @@ static const struct pmc_bit_map cnp_pfear_map[] = { {"SPE", BIT(5)}, {"Fuse", BIT(6)}, /* - * Reserved for Cannon Lake but valid for Ice Lake, Comet Lake - * and Tiger Lake. + * Reserved for Cannon Lake but valid for Ice Lake, Comet Lake, + * Tiger Lake and Elkhart Lake. */ {"SBR8", BIT(7)}, @@ -239,8 +239,8 @@ static const struct pmc_bit_map cnp_pfear_map[] = { {"HDA_PGD5", BIT(3)}, {"HDA_PGD6", BIT(4)}, /* - * Reserved for Cannon Lake but valid for Ice Lake, Comet Lake - * and Tiger Lake. + * Reserved for Cannon Lake but valid for Ice Lake, Comet Lake, + * Tiger Lake and ELkhart Lake. */ {"PSF6", BIT(5)}, {"PSF7", BIT(6)}, @@ -273,7 +273,7 @@ static const struct pmc_bit_map *ext_icl_pfear_map[] = { }; static const struct pmc_bit_map tgl_pfear_map[] = { - /* Tiger Lake generation onwards only */ + /* Tiger Lake and Elkhart Lake generation onwards only */ {"PSF9", BIT(0)}, {"RES_66", BIT(1)}, {"RES_67", BIT(2)}, @@ -881,6 +881,7 @@ static const struct x86_cpu_id intel_pmc_core_ids[] = { INTEL_CPU_FAM6(COMETLAKE_L, cnp_reg_map), INTEL_CPU_FAM6(TIGERLAKE_L, tgl_reg_map), INTEL_CPU_FAM6(TIGERLAKE, tgl_reg_map), + INTEL_CPU_FAM6(ATOM_TREMONT, tgl_reg_map), {} };