From patchwork Mon Dec 16 22:37:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luc Van Oostenryck X-Patchwork-Id: 11296131 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E0CCB138D for ; Mon, 16 Dec 2019 22:38:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B4F9121739 for ; Mon, 16 Dec 2019 22:38:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="IvnMOe05" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727738AbfLPWiD (ORCPT ); Mon, 16 Dec 2019 17:38:03 -0500 Received: from mail-wm1-f67.google.com ([209.85.128.67]:39743 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727516AbfLPWiD (ORCPT ); Mon, 16 Dec 2019 17:38:03 -0500 Received: by mail-wm1-f67.google.com with SMTP id b72so990057wme.4 for ; Mon, 16 Dec 2019 14:38:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1/U26WewB/AAMCSiOm/EEQWs3r5bknC3LH3DUKjJQYo=; b=IvnMOe05OjRc3cgQuI8gVehL5y0BHE01P09lOAtr4XFhy5FzZYdNTNhIimXGsNnt+2 ucUKxxxqelAKHTPzateYtL/zqONl6PoZTwfvdQt/NKlE1Ya6fFeX6+w5PmA+0f7ecBWM xLmy6gt9XbI1cFpvSc+qTsUTtUS6PUquxdZE6Hb8jbI/o9YphxHh9y5It8D5RbyNcLuZ eys/ANMAHr1azoQF8UIOb1qcvp5iXzRREISCtHAb22a/q7mcJy/SDL0lCozZS+JtbtZ0 K2TsSHPxlkZYya31dnHUZIL8DZzhoRL73fckbYyl0rljLYG8myvVh3lStUtfrz7nQQbQ T6Iw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1/U26WewB/AAMCSiOm/EEQWs3r5bknC3LH3DUKjJQYo=; b=bEYoslsXQLpNOPKuYBwAglzNGFTY3iMQlSojIXfVvky+oskwHBlzcL1bo2uV5M5bAX nNiCRR58Hc3FKypP23fJMyyfWRa6Fwx9zn0xr1aBXBtPS9Xvi7lufvP+S4i1urMHAH0T kMpPcJGc2IXCsNh2otHWZCzsIg7IZiRidVFCzvmca8HRySLEFJgQPc1FaYUx0ql6DYnu eZC3r1P6amBloTkwjKTZu1dXpG+vfTBUdnuazOuOdE90p+C8D0kaGqrzO5doA27cKzg/ ui7RpwfrDg83Tuk7QnYpgGAyYYEpAG0HnjfuZcKMe72jzEiDxNoJUAVKoPFVsmbrYpKQ ylkw== X-Gm-Message-State: APjAAAVOYeERaYtmocn08MvYIRrooQrJqFoCUBOdau7V1/lOGUaWX/Jo jgfPdiv+vdH6G1AYFlLMH/6o/StO X-Google-Smtp-Source: APXvYqyyK1+sAl41Q54C2LyodWH0FQUBg6mVglrIXFWZuY/nYo/MFwRMJk44YDRpd1UWivyImb0KXg== X-Received: by 2002:a1c:a543:: with SMTP id o64mr1472638wme.108.1576535881095; Mon, 16 Dec 2019 14:38:01 -0800 (PST) Received: from localhost.localdomain ([2a02:a03f:40f6:4600:21c4:7316:325b:dfe0]) by smtp.gmail.com with ESMTPSA id h17sm24275709wrs.18.2019.12.16.14.38.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Dec 2019 14:38:00 -0800 (PST) From: Luc Van Oostenryck To: linux-sparse@vger.kernel.org Cc: Luc Van Oostenryck Subject: [PATCH 01/10] cgcc: add support for riscv32 Date: Mon, 16 Dec 2019 23:37:47 +0100 Message-Id: <20191216223756.2428-2-luc.vanoostenryck@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191216223756.2428-1-luc.vanoostenryck@gmail.com> References: <20191216223756.2428-1-luc.vanoostenryck@gmail.com> MIME-Version: 1.0 Sender: linux-sparse-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sparse@vger.kernel.org Signed-off-by: Luc Van Oostenryck --- cgcc | 3 +++ 1 file changed, 3 insertions(+) diff --git a/cgcc b/cgcc index f5a8b3529da2..fc6f50f103eb 100755 --- a/cgcc +++ b/cgcc @@ -294,6 +294,9 @@ sub add_specs { return (' -D_BIG_ENDIAN' . ' --arch=s390x' . &float_types (1, 1, 36, [24,8], [53,11], [113,15])); + } elsif ($spec eq 'riscv32') { + return (' --arch=riscv32' . + &float_types (1, 1, 33, [24,8], [53,11], [53,11])); } elsif ($spec eq 'riscv64') { return (' --arch=riscv64' . &float_types (1, 1, 33, [24,8], [53,11], [113,15])); From patchwork Mon Dec 16 22:37:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luc Van Oostenryck X-Patchwork-Id: 11296133 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BC2D96C1 for ; Mon, 16 Dec 2019 22:38:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9A08B21739 for ; Mon, 16 Dec 2019 22:38:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="S1InoPUp" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727516AbfLPWiE (ORCPT ); Mon, 16 Dec 2019 17:38:04 -0500 Received: from mail-wm1-f68.google.com ([209.85.128.68]:39745 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727505AbfLPWiE (ORCPT ); Mon, 16 Dec 2019 17:38:04 -0500 Received: by mail-wm1-f68.google.com with SMTP id b72so990088wme.4 for ; Mon, 16 Dec 2019 14:38:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YLFVyVBAo+GppIYCM6S67IuRzK5tnx9KslTPhUnJFlc=; b=S1InoPUpwLDzLcUoPJ5lt6+ALeq6rluKjqIgXkHvQlw63K0zL5r7lMbvWS8TdaD45N phM38mqoSfDnHMg/1PQflG4ugjmq/ZQv+i/JyljHspLsJ0hYrWrn4FcCtdJCrYjaCJEG ev/489fRRDq+I11zybTj5fXE5HXnzMjFXUpHj+8XhVp1I6DcPG4eTsNAHvCDNG+kGNHt dPQDw/b9l0jxSwkrr5nF9lCbrkm82asPe5iJBJTXGRcUM/8qA8OgJ/oZW2Iuv6Rbk5JD eNgGFU9cd68WVopBXq2L9iF1FJ9deXS5igOpej12UsSm/QnJj+l66jLFgJ9onugO8Wyt yUNw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YLFVyVBAo+GppIYCM6S67IuRzK5tnx9KslTPhUnJFlc=; b=Rd95tng8HqT/Ww7mAI9lyvaXTNh5hdJza/EPSX2JNjmlfeWs93ppA6IwWe9TWcyzjx NtxNqMUpR0OaKOXOz+68wZ5+uLDhCfg/MUcQwi3Wb3FMvr17Q0BveuHxW5P3SMyNs/B9 LrzDx++G7XFseCjtrqUJRMCAdd30A03lvj310tjepsAfcbGL3jA2/Sb5gGM4Y4owDxI0 aGaYqPjsEbRH807Y8vELNtukN5md3WFoKvsoxNONc02bizlb6qjYB5f9E9ttLCEW9JyL mJhHkvCaqeYGZAaMwxF6PDJ+ItziIILAtUzyWrqPQgXmy4CwIja2uMwzzmQORrOt1+9C 2RSg== X-Gm-Message-State: APjAAAVVZ8ae5dRfFjlrFdlj8iZrnBB0NTkk6AmLr1l6It4IwbWLFaAc dH4yJHEDCm/cd9gqpFEfiqn73Fkv X-Google-Smtp-Source: APXvYqw4kkIip5BZThTHo7LJO/oMnb9KHVSsvK/xuxV0QwmMYRuudq9rQKzFOlr8lT/+LDHnLKtDvQ== X-Received: by 2002:a1c:7918:: with SMTP id l24mr1491771wme.125.1576535882013; Mon, 16 Dec 2019 14:38:02 -0800 (PST) Received: from localhost.localdomain ([2a02:a03f:40f6:4600:21c4:7316:325b:dfe0]) by smtp.gmail.com with ESMTPSA id h17sm24275709wrs.18.2019.12.16.14.38.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Dec 2019 14:38:01 -0800 (PST) From: Luc Van Oostenryck To: linux-sparse@vger.kernel.org Cc: Luc Van Oostenryck Subject: [PATCH 02/10] cgcc: rename 'ppc64+{be,le}' to 'ppc64{be,le}' Date: Mon, 16 Dec 2019 23:37:48 +0100 Message-Id: <20191216223756.2428-3-luc.vanoostenryck@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191216223756.2428-1-luc.vanoostenryck@gmail.com> References: <20191216223756.2428-1-luc.vanoostenryck@gmail.com> MIME-Version: 1.0 Sender: linux-sparse-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sparse@vger.kernel.org The spec names 'ppc64+{be,le}' had the '+' to force them to be internal names but are also useful as external names (it helps to make systematic testing of the arch-specific code). So rename them to 'ppc64{be,le}'. Signed-off-by: Luc Van Oostenryck --- cgcc | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/cgcc b/cgcc index fc6f50f103eb..9c6ad88367c1 100755 --- a/cgcc +++ b/cgcc @@ -286,9 +286,9 @@ sub add_specs { return ( ' --arch=ppc64' . &float_types (1, 1, 21, [24,8], [53,11], [113,15])); - } elsif ($spec eq 'ppc64+be') { + } elsif ($spec eq 'ppc64be') { return &add_specs ('ppc64') . ' -mbig-endian -D_CALL_ELF=1'; - } elsif ($spec eq 'ppc64+le') { + } elsif ($spec eq 'ppc64le') { return &add_specs ('ppc64') . ' -mlittle-endian -D_CALL_ELF=2'; } elsif ($spec eq 's390x') { return (' -D_BIG_ENDIAN' . @@ -328,7 +328,7 @@ sub add_specs { } elsif ($gccmachine =~ '^i[23456]86-') { return &add_specs ('i386'); } elsif ($gccmachine =~ '^(powerpc|ppc)64le-') { - return &add_specs ('ppc64+le'); + return &add_specs ('ppc64le'); } elsif ($gccmachine =~ '^s390x-') { return &add_specs ('s390x'); } elsif ($gccmachine eq 'x86_64-linux-gnux32') { @@ -353,9 +353,9 @@ sub add_specs { } elsif ($arch =~ /^(ppc)$/i) { return &add_specs ('ppc'); } elsif ($arch =~ /^(ppc64)$/i) { - return &add_specs ('ppc64+be'); + return &add_specs ('ppc64be'); } elsif ($arch =~ /^(ppc64le)$/i) { - return &add_specs ('ppc64+le'); + return &add_specs ('ppc64le'); } elsif ($arch =~ /^(s390x)$/i) { return &add_specs ('s390x'); } elsif ($arch =~ /^(sparc64)$/i) { From patchwork Mon Dec 16 22:37:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luc Van Oostenryck X-Patchwork-Id: 11296141 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 288006C1 for ; Mon, 16 Dec 2019 22:38:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EFAFA21739 for ; Mon, 16 Dec 2019 22:38:08 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="CVmX0qsF" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727779AbfLPWiI (ORCPT ); Mon, 16 Dec 2019 17:38:08 -0500 Received: from mail-wm1-f67.google.com ([209.85.128.67]:35279 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727505AbfLPWiI (ORCPT ); Mon, 16 Dec 2019 17:38:08 -0500 Received: by mail-wm1-f67.google.com with SMTP id p17so1014875wmb.0 for ; Mon, 16 Dec 2019 14:38:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TRFfdhd/iVLOat/clesSFfDCPPisx7ahOFMLZoGQXgU=; b=CVmX0qsFeULReFeneoou1UNhX6jXmxsWBeyLsHsLaM88oRhYXUSMWv2ppCFZxm/6Em FvGdt3NIn0A7CMnlN5muB0a12e2d+P/gjfhJK+OdnVJ91BXIGTYLXjRiKTxaTRLgyFZJ tQdibYiB0a+qLYynKEl/ymjdjF5Y9DdyP2UGtf+2WGRuA7KsgiOB9BOROxnzqW3s5uu9 Ttm6exuDn+J5ybr6E7gfOwTBzfor3ngTyinxDkYmeR6lUdGSMKmGUuAIUaozYYOATLWE AoMYaSVNRQlgCyjC+bGnevBgXo86hKv+jib2PeAYFX7nw9CPH8zcubLzVJmBour0C9v9 Yy2A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TRFfdhd/iVLOat/clesSFfDCPPisx7ahOFMLZoGQXgU=; b=tDcYf1zHTkZWvFlmLughpeC3IITlh5SH1FS3X7q+7YpNTH0l2A9VOUnlI1ywnMf6Uf IhH2TPEb6agD2hj+lLW/5033gZ8/qmPJl1CLm9iHtKZa0mO2Z/O5N14K/qGvEIo+PcoO 273NA/HNMUMATgOyAnUOcnmtFcz28+GiUNnE67siEc9pQZupc0A6ikDlDQlU7IXGcmFx HfztVg151oGRhRSrKvZhw3UhCIoipcZEORIjvG1+G7C01FzVxE28XDKd0ss10rxcWORB yp9/7yIYiu75+JxZkHz7D4OuwucPC+b2StX8YXxg3DN3K74PBximPHvKaO8RcNGiB4j6 nBHQ== X-Gm-Message-State: APjAAAV7YeuwQMX6kacr8f6yMmPnxINA8amx013UVj8y6Ot2xt9vkLpV denoNYyKN3qC9NBrtn5IlBbxED2+ X-Google-Smtp-Source: APXvYqxYioQcv3ainVWzXsqaHhfZGPYgvkylxfNr8XJBzjkax8PChtyUiFtn0fUqEyPyPNhjpS3EhQ== X-Received: by 2002:a1c:14e:: with SMTP id 75mr1424288wmb.123.1576535883201; Mon, 16 Dec 2019 14:38:03 -0800 (PST) Received: from localhost.localdomain ([2a02:a03f:40f6:4600:21c4:7316:325b:dfe0]) by smtp.gmail.com with ESMTPSA id h17sm24275709wrs.18.2019.12.16.14.38.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Dec 2019 14:38:02 -0800 (PST) From: Luc Van Oostenryck To: linux-sparse@vger.kernel.org Cc: Luc Van Oostenryck Subject: [PATCH 03/10] arch: move arch-specificities to their own files Date: Mon, 16 Dec 2019 23:37:49 +0100 Message-Id: <20191216223756.2428-4-luc.vanoostenryck@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191216223756.2428-1-luc.vanoostenryck@gmail.com> References: <20191216223756.2428-1-luc.vanoostenryck@gmail.com> MIME-Version: 1.0 Sender: linux-sparse-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sparse@vger.kernel.org lib.c and even more so, target.c, become cluttered by the arch specific type initialization. It would be better to move this to arch-specific files, move the generics target related helpers to target.c and have sparse_initialize() to just call these helpers. For doing this: * introduce a struct to hold the configurations for each arch, * move the arch-specific type initialization to separate files, * make target.c generic. Also change the default types to LP64. Note: this is the first step to better handle other arch specificities like the predefines or the handling of some options. Signed-off-by: Luc Van Oostenryck --- Makefile | 10 +++ lib.c | 58 +++++++------ machine.h | 2 +- symbol.h | 1 - target-arm.c | 16 ++++ target-arm64.c | 14 ++++ target-default.c | 11 +++ target-m68k.c | 16 ++++ target-mips.c | 25 ++++++ target-ppc.c | 25 ++++++ target-riscv.c | 22 +++++ target-s390.c | 28 +++++++ target-sparc.c | 37 +++++++++ target-x86.c | 52 ++++++++++++ target.c | 207 +++++++++++++++++------------------------------ target.h | 44 ++++++++++ 16 files changed, 401 insertions(+), 167 deletions(-) create mode 100644 target-arm.c create mode 100644 target-arm64.c create mode 100644 target-default.c create mode 100644 target-m68k.c create mode 100644 target-mips.c create mode 100644 target-ppc.c create mode 100644 target-riscv.c create mode 100644 target-s390.c create mode 100644 target-sparc.c create mode 100644 target-x86.c diff --git a/Makefile b/Makefile index deab4897688e..e2d3a7de5498 100644 --- a/Makefile +++ b/Makefile @@ -65,6 +65,16 @@ LIB_OBJS += stats.o LIB_OBJS += storage.o LIB_OBJS += symbol.o LIB_OBJS += target.o +LIB_OBJS += target-arm.o +LIB_OBJS += target-arm64.o +LIB_OBJS += target-default.o +LIB_OBJS += target-m68k.o +LIB_OBJS += target-mips.o +LIB_OBJS += target-ppc.o +LIB_OBJS += target-riscv.o +LIB_OBJS += target-s390.o +LIB_OBJS += target-sparc.o +LIB_OBJS += target-x86.o LIB_OBJS += tokenize.o LIB_OBJS += unssa.o LIB_OBJS += utils.o diff --git a/lib.c b/lib.c index 711e8fbeff09..d759648a504a 100644 --- a/lib.c +++ b/lib.c @@ -314,7 +314,7 @@ unsigned long fpasses = ~0UL; int fpic = 0; int fpie = 0; int fshort_wchar = 0; -int funsigned_char = -1; +int funsigned_char = 0; int preprocess_only; @@ -728,6 +728,8 @@ static void handle_arch_finalize(void) if (fpie > fpic) fpic = fpie; + if (fshort_wchar) + wchar_ctype = &ushort_ctype; switch (arch_mach) { case MACH_ARM64: @@ -1137,24 +1139,23 @@ static char **handle_arch(char *arg, char **next) { static const struct arch { const char *name; - char mach; + enum machine mach; char bits; - bool big_endian:1; } archs[] = { - { "aarch64", MACH_ARM64, 64, 0 }, - { "arm64", MACH_ARM64, 64, 0 }, - { "arm", MACH_ARM, 32, 0 }, - { "i386", MACH_I386, 32, 0 }, - { "m68k", MACH_M68K, 32, 0 }, - { "mips", MACH_MIPS32, 0, 1 }, - { "powerpc", MACH_PPC32, 0, 1 }, - { "ppc", MACH_PPC32, 0, 1 }, - { "riscv", MACH_RISCV32, 0, 0 }, - { "s390x", MACH_S390X, 64, 1 }, - { "s390", MACH_S390, 32, 1 }, - { "sparc", MACH_SPARC32, 0, 1 }, - { "x86_64", MACH_X86_64, 64, 0 }, - { "x86-64", MACH_X86_64, 64, 0 }, + { "aarch64", MACH_ARM64, 64, }, + { "arm64", MACH_ARM64, 64, }, + { "arm", MACH_ARM, 32, }, + { "i386", MACH_I386, 32, }, + { "m68k", MACH_M68K, 32, }, + { "mips", MACH_MIPS32, 0, }, + { "powerpc", MACH_PPC32, 0, }, + { "ppc", MACH_PPC32, 0, }, + { "riscv", MACH_RISCV32, 0, }, + { "s390x", MACH_S390X, 64, }, + { "s390", MACH_S390, 32, }, + { "sparc", MACH_SPARC32, 0, }, + { "x86_64", MACH_X86_64, 64, }, + { "x86-64", MACH_X86_64, 64, }, { NULL }, }; const struct arch *p; @@ -1165,18 +1166,15 @@ static char **handle_arch(char *arg, char **next) for (p = &archs[0]; p->name; p++) { size_t len = strlen(p->name); if (strncmp(p->name, arg, len) == 0) { + enum machine mach = p->mach; const char *suf = arg + len; int bits = p->bits; - arch_mach = p->mach; if (bits == 0) { - if (!strcmp(suf, "")) { - bits = 32; - } else if (!strcmp(suf, "32")) { - bits = 32; + if (!strcmp(suf, "") || !strcmp(suf, "32")) { + ; } else if (!strcmp(suf, "64")) { - bits = 64; - arch_mach += 1; + mach += 1; } else { die("invalid architecture: %s", arg); } @@ -1185,12 +1183,7 @@ static char **handle_arch(char *arg, char **next) die("invalid architecture: %s", arg); } - // adjust the arch size (but keep x32 & llp64) - if (bits == 32) - arch_m64 = ARCH_LP32; - else if (bits == 64 && arch_m64 == ARCH_LP32) - arch_m64 = ARCH_LP64; - arch_big_endian = p->big_endian; + target_config(mach); break; } } @@ -1748,6 +1741,9 @@ struct symbol_list *sparse_initialize(int argc, char **argv, struct string_list // Initialize symbol stream first, so that we can add defines etc init_symbols(); + // initialize the default target to the native 'machine' + target_config(MACH_NATIVE); + args = argv; for (;;) { char *arg = *++args; @@ -1777,7 +1773,7 @@ struct symbol_list *sparse_initialize(int argc, char **argv, struct string_list list = NULL; if (filelist) { // Initialize type system - init_target(); + target_init(); handle_arch_finalize(); init_ctype(); diff --git a/machine.h b/machine.h index 6eba448cb81c..1fe933ce7c25 100644 --- a/machine.h +++ b/machine.h @@ -8,7 +8,7 @@ #endif -enum { +enum bitness { ARCH_LP32, ARCH_X32, ARCH_LP64, diff --git a/symbol.h b/symbol.h index e60d913651fc..9ef5a886172f 100644 --- a/symbol.h +++ b/symbol.h @@ -310,7 +310,6 @@ extern void init_symbols(void); extern void init_builtins(int stream); extern void declare_builtins(void); extern void init_ctype(void); -extern void init_target(void); extern struct symbol *alloc_symbol(struct position, int type); extern void show_type(struct symbol *); extern const char *modifier_string(unsigned long mod); diff --git a/target-arm.c b/target-arm.c new file mode 100644 index 000000000000..f5af04ee1fbb --- /dev/null +++ b/target-arm.c @@ -0,0 +1,16 @@ +#include "symbol.h" +#include "target.h" +#include "machine.h" + + +const struct target target_arm = { + .mach = MACH_ARM, + .bitness = ARCH_LP32, + .big_endian = 0, + .unsigned_char = 1, + + .wchar = &uint_ctype, + + .bits_in_longdouble = 64, + .max_fp_alignment = 8, +}; diff --git a/target-arm64.c b/target-arm64.c new file mode 100644 index 000000000000..bfada515b81f --- /dev/null +++ b/target-arm64.c @@ -0,0 +1,14 @@ +#include "symbol.h" +#include "target.h" +#include "machine.h" + + +const struct target target_arm64 = { + .mach = MACH_ARM64, + .bitness = ARCH_LP64, + + .big_endian = 0, + .unsigned_char = 1, + + .wchar = &uint_ctype, +}; diff --git a/target-default.c b/target-default.c new file mode 100644 index 000000000000..3a9e1726ffc5 --- /dev/null +++ b/target-default.c @@ -0,0 +1,11 @@ +#include "symbol.h" +#include "target.h" +#include "machine.h" + + +const struct target target_default = { + .mach = MACH_UNKNOWN, + .bitness = ARCH_LP64, + .big_endian = 0, + .unsigned_char = 0, +}; diff --git a/target-m68k.c b/target-m68k.c new file mode 100644 index 000000000000..1646fceb62aa --- /dev/null +++ b/target-m68k.c @@ -0,0 +1,16 @@ +#include "symbol.h" +#include "target.h" +#include "machine.h" + + +const struct target target_m68k = { + .mach = MACH_M68K, + .bitness = ARCH_LP32, + .big_endian = 1, + .unsigned_char = 0, + + .wchar = &long_ctype, + + .bits_in_longdouble = 96, + .max_fp_alignment = 4, +}; diff --git a/target-mips.c b/target-mips.c new file mode 100644 index 000000000000..7e2b44466f3e --- /dev/null +++ b/target-mips.c @@ -0,0 +1,25 @@ +#include "symbol.h" +#include "target.h" +#include "machine.h" + + +const struct target target_mips32 = { + .mach = MACH_MIPS32, + .bitness = ARCH_LP32, + .big_endian = 1, + .unsigned_char = 0, + + .bits_in_longdouble = 64, + .max_fp_alignment = 8, + + .target_64bit = &target_mips64, +}; + +const struct target target_mips64 = { + .mach = MACH_MIPS64, + .bitness = ARCH_LP64, + .big_endian = 1, + .unsigned_char = 0, + + .target_32bit = &target_mips32, +}; diff --git a/target-ppc.c b/target-ppc.c new file mode 100644 index 000000000000..e867d9fec299 --- /dev/null +++ b/target-ppc.c @@ -0,0 +1,25 @@ +#include "symbol.h" +#include "target.h" +#include "machine.h" + + +const struct target target_ppc32 = { + .mach = MACH_PPC32, + .bitness = ARCH_LP32, + .big_endian = 1, + .unsigned_char = 1, + + .wchar = &long_ctype, + + .target_64bit = &target_ppc64, +}; + + +const struct target target_ppc64 = { + .mach = MACH_PPC64, + .bitness = ARCH_LP64, + .big_endian = 1, + .unsigned_char = 1, + + .target_32bit = &target_ppc32, +}; diff --git a/target-riscv.c b/target-riscv.c new file mode 100644 index 000000000000..cbec76237d48 --- /dev/null +++ b/target-riscv.c @@ -0,0 +1,22 @@ +#include "symbol.h" +#include "target.h" +#include "machine.h" + + +const struct target target_riscv32 = { + .mach = MACH_RISCV32, + .bitness = ARCH_LP32, + .big_endian = 0, + .unsigned_char = 1, + + .target_64bit = &target_riscv64, +}; + +const struct target target_riscv64 = { + .mach = MACH_RISCV64, + .bitness = ARCH_LP64, + .big_endian = 0, + .unsigned_char = 1, + + .target_32bit = &target_riscv32, +}; diff --git a/target-s390.c b/target-s390.c new file mode 100644 index 000000000000..157779ce506b --- /dev/null +++ b/target-s390.c @@ -0,0 +1,28 @@ +#include "symbol.h" +#include "target.h" +#include "machine.h" + + +const struct target target_s390 = { + .mach = MACH_S390, + .bitness = ARCH_LP32, + .big_endian = 1, + .unsigned_char = 1, + + .bits_in_longdouble = 64, + .max_fp_alignment = 8, + + .target_64bit = &target_s390x, +}; + +const struct target target_s390x = { + .mach = MACH_S390X, + .bitness = ARCH_LP64, + .big_endian = 1, + .unsigned_char = 1, + + .bits_in_longdouble = 64, + .max_fp_alignment = 8, + + .target_32bit = &target_s390, +}; diff --git a/target-sparc.c b/target-sparc.c new file mode 100644 index 000000000000..ca9589f5b65c --- /dev/null +++ b/target-sparc.c @@ -0,0 +1,37 @@ +#include "symbol.h" +#include "target.h" +#include "machine.h" + + +static void init_sparc32(const struct target *target) +{ + if (arch_os == OS_SUNOS) { + wint_ctype = &long_ctype; + wchar_ctype = &long_ctype; + + bits_in_longdouble = 128; + max_fp_alignment = 16; + } +} + +const struct target target_sparc32 = { + .mach = MACH_SPARC32, + .bitness = ARCH_LP32, + .big_endian = 1, + .unsigned_char = 0, + + .bits_in_longdouble = 64, + .max_fp_alignment = 8, + + .init = init_sparc32, + .target_64bit = &target_sparc64, +}; + +const struct target target_sparc64 = { + .mach = MACH_SPARC64, + .bitness = ARCH_LP64, + .big_endian = 1, + .unsigned_char = 0, + + .target_32bit = &target_sparc32, +}; diff --git a/target-x86.c b/target-x86.c new file mode 100644 index 000000000000..eaca5e8bc507 --- /dev/null +++ b/target-x86.c @@ -0,0 +1,52 @@ +#include "symbol.h" +#include "target.h" +#include "machine.h" + + +static void init_x86(const struct target *target) +{ + switch (arch_os) { + case OS_CYGWIN: + wchar_ctype = &ushort_ctype; + break; + case OS_DARWIN: + int64_ctype = &llong_ctype; + uint64_ctype = &ullong_ctype; + wint_ctype = &int_ctype; + break; + case OS_FREEBSD: + wint_ctype = &int_ctype; + break; + case OS_OPENBSD: + wchar_ctype = &int_ctype; + wint_ctype = &int_ctype; + break; + } +} + +const struct target target_i386 = { + .mach = MACH_I386, + .bitness = ARCH_LP32, + .big_endian = 0, + .unsigned_char = 0, + + .wchar = &long_ctype, + .bits_in_longdouble = 96, + .max_fp_alignment = 4, + + .init = init_x86, + .target_64bit = &target_x86_64, +}; + +const struct target target_x86_64 = { + .mach = MACH_X86_64, + .bitness = ARCH_LP64, + .big_endian = 0, + .unsigned_char = 0, + + .bits_in_longdouble = 128, + .max_fp_alignment = 16, + + .init = init_x86, + .target_32bit = &target_i386, +}; diff --git a/target.c b/target.c index 76cbb954ab4b..f23ed30881bd 100644 --- a/target.c +++ b/target.c @@ -4,10 +4,10 @@ #include "target.h" #include "machine.h" -struct symbol *size_t_ctype = &uint_ctype; -struct symbol *ssize_t_ctype = &int_ctype; -struct symbol *intmax_ctype = &llong_ctype; -struct symbol *uintmax_ctype = &ullong_ctype; +struct symbol *size_t_ctype = &ulong_ctype; +struct symbol *ssize_t_ctype = &long_ctype; +struct symbol *intmax_ctype = &long_ctype; +struct symbol *uintmax_ctype = &ulong_ctype; struct symbol *int64_ctype = &long_ctype; struct symbol *uint64_ctype = &ulong_ctype; struct symbol *int32_ctype = &int_ctype; @@ -27,11 +27,11 @@ int bits_in_bool = 1; int bits_in_char = 8; int bits_in_short = 16; int bits_in_int = 32; -int bits_in_long = 32; +int bits_in_long = 64; int bits_in_longlong = 64; int bits_in_longlonglong = 128; -int max_int_alignment = 4; +int max_int_alignment = 8; /* * Floating point data types @@ -45,8 +45,8 @@ int max_fp_alignment = 16; /* * Pointer data type */ -int bits_in_pointer = 32; -int pointer_alignment = 4; +int bits_in_pointer = 64; +int pointer_alignment = 8; /* * Enum data types @@ -55,149 +55,88 @@ int bits_in_enum = 32; int enum_alignment = 4; -void init_target(void) +static const struct target *targets[] = { + [MACH_ARM] = &target_arm, + [MACH_ARM64] = &target_arm64, + [MACH_I386] = &target_i386, + [MACH_X86_64] = &target_x86_64, + [MACH_MIPS32] = &target_mips32, + [MACH_MIPS64] = &target_mips64, + [MACH_PPC32] = &target_ppc32, + [MACH_PPC64] = &target_ppc64, + [MACH_RISCV32] = &target_riscv32, + [MACH_RISCV64] = &target_riscv64, + [MACH_S390] = &target_s390, + [MACH_S390X] = &target_s390x, + [MACH_SPARC32] = &target_sparc32, + [MACH_SPARC64] = &target_sparc64, + [MACH_M68K] = &target_m68k, + [MACH_UNKNOWN] = &target_default, +}; +const struct target *arch_target = &target_default; + + +void target_config(enum machine mach) { - switch (arch_mach) { - case MACH_I386: - case MACH_MIPS32: - case MACH_PPC32: - case MACH_RISCV32: - case MACH_SPARC32: - case MACH_S390: - if (arch_m64 == ARCH_LP64) - arch_mach++; - break; - case MACH_X86_64: - case MACH_MIPS64: - case MACH_PPC64: - case MACH_RISCV64: - case MACH_SPARC64: - case MACH_S390X: - if (arch_m64 == ARCH_LP32) - arch_mach--; - break; - } + const struct target *target = targets[mach]; - switch (arch_mach) { - case MACH_I386: - wchar_ctype = &long_ctype; - /* fall through */ - case MACH_X86_64: - switch (arch_os) { - case OS_CYGWIN: - wchar_ctype = &ushort_ctype; - break; - case OS_DARWIN: - int64_ctype = &llong_ctype; - uint64_ctype = &ullong_ctype; - wint_ctype = &int_ctype; - break; - case OS_FREEBSD: - wint_ctype = &int_ctype; - break; - case OS_OPENBSD: - wchar_ctype = &int_ctype; - wint_ctype = &int_ctype; - break; - } - break; - case MACH_M68K: - case MACH_PPC32: - wchar_ctype = &long_ctype; - break; - case MACH_ARM: - case MACH_ARM64: - wchar_ctype = &uint_ctype; - break; - case MACH_SPARC32: - if (arch_os == OS_SUNOS) { - wint_ctype = &long_ctype; - wchar_ctype = &long_ctype; - } - break; - default: - break; - } - if (fshort_wchar) - wchar_ctype = &ushort_ctype; - - switch (arch_mach) { - case MACH_SPARC32: - if (arch_os == OS_SUNOS) - break; - /* fall through */ - case MACH_ARM: - case MACH_MIPS64: - // FIXME: ABI n32 & (n)64 have 128-bit ldouble - case MACH_MIPS32: - case MACH_S390: - case MACH_S390X: - bits_in_longdouble = 64; - max_fp_alignment = 8; - break; - case MACH_X86_64: - if (arch_m64 == ARCH_LP64 || arch_m64 == ARCH_X32) - break; - /* fall through */ - case MACH_I386: - case MACH_M68K: - bits_in_longdouble = 96; - max_fp_alignment = 4; - break; - default: - break; - } + arch_target = target; + arch_mach = target->mach; + arch_m64 = target->bitness; + arch_big_endian = target->big_endian; + + funsigned_char = target->unsigned_char; +} - switch (arch_mach) { - case MACH_ARM: - case MACH_ARM64: - case MACH_PPC32: - case MACH_PPC64: - case MACH_RISCV32: - case MACH_RISCV64: - case MACH_S390: - case MACH_S390X: - if (funsigned_char == -1) - funsigned_char = 1; - break; - default: - if (funsigned_char == -1) - funsigned_char = 0; - break; - } + +void target_init(void) +{ + const struct target *target = arch_target; switch (arch_m64) { - case ARCH_X32: - max_int_alignment = 8; - int64_ctype = &llong_ctype; - uint64_ctype = &ullong_ctype; - break; case ARCH_LP32: - /* default values */ + max_int_alignment = 4; + /* fallthrough */ + case ARCH_X32: + bits_in_long = 32; + bits_in_pointer = 32; + pointer_alignment = 4; + size_t_ctype = &uint_ctype; + ssize_t_ctype = &int_ctype; int64_ctype = &llong_ctype; uint64_ctype = &ullong_ctype; intmax_ctype = &llong_ctype; uintmax_ctype = &ullong_ctype; + if (target->target_32bit) + target = target->target_32bit; break; - case ARCH_LP64: - bits_in_long = 64; - max_int_alignment = 8; - size_t_ctype = &ulong_ctype; - ssize_t_ctype = &long_ctype; - intmax_ctype = &long_ctype; - uintmax_ctype = &ulong_ctype; - goto case_64bit_common; + case ARCH_LLP64: bits_in_long = 32; - max_int_alignment = 8; size_t_ctype = &ullong_ctype; ssize_t_ctype = &llong_ctype; int64_ctype = &llong_ctype; uint64_ctype = &ullong_ctype; - goto case_64bit_common; - case_64bit_common: - bits_in_pointer = 64; - pointer_alignment = 8; + intmax_ctype = &llong_ctype; + uintmax_ctype = &ullong_ctype; + /* fallthrough */ + case ARCH_LP64: + if (target->target_64bit) + target = target->target_64bit; break; } + arch_target = target; + arch_mach = target->mach; + + if (target->wchar) + wchar_ctype = target->wchar; + if (target->wint) + wint_ctype = target->wint; + if (target->bits_in_longdouble) + bits_in_longdouble = target->bits_in_longdouble; + if (target->max_fp_alignment) + max_fp_alignment = target->max_fp_alignment; + + if (target->init) + target->init(target); } diff --git a/target.h b/target.h index 8bbe494f89bb..0c45ecf41ea2 100644 --- a/target.h +++ b/target.h @@ -1,6 +1,8 @@ #ifndef TARGET_H #define TARGET_H +#include "machine.h" + extern struct symbol *size_t_ctype; extern struct symbol *ssize_t_ctype; extern struct symbol *intmax_ctype; @@ -51,6 +53,48 @@ extern int pointer_alignment; extern int bits_in_enum; extern int enum_alignment; + +struct target { + enum machine mach; + enum bitness bitness; + unsigned int big_endian:1; + unsigned int unsigned_char:1; + + struct symbol *wchar; + struct symbol *wint; + + unsigned int bits_in_longdouble; + unsigned int max_fp_alignment; + + const struct target *target_32bit; + const struct target *target_64bit; + + void (*init)(const struct target *self); +}; + +extern const struct target target_default; +extern const struct target target_arm; +extern const struct target target_arm64; +extern const struct target target_m68k; +extern const struct target target_mips32; +extern const struct target target_mips64; +extern const struct target target_ppc32; +extern const struct target target_ppc64; +extern const struct target target_riscv32; +extern const struct target target_riscv64; +extern const struct target target_s390; +extern const struct target target_s390x; +extern const struct target target_sparc32; +extern const struct target target_sparc64; +extern const struct target target_i386; +extern const struct target target_x86_64; + +/* target.c */ +extern const struct target *arch_target; + +void target_config(enum machine mach); +void target_init(void); + /* * Helper functions for converting bits to bytes and vice versa. */ From patchwork Mon Dec 16 22:37:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luc Van Oostenryck X-Patchwork-Id: 11296135 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6096E6C1 for ; Mon, 16 Dec 2019 22:38:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3CACF21739 for ; Mon, 16 Dec 2019 22:38:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="SJ/6qqIF" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727806AbfLPWiH (ORCPT ); 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Mon, 16 Dec 2019 14:38:03 -0800 (PST) From: Luc Van Oostenryck To: linux-sparse@vger.kernel.org Cc: Luc Van Oostenryck Subject: [PATCH 04/10] arch: move parsing of --arch= to target.c Date: Mon, 16 Dec 2019 23:37:50 +0100 Message-Id: <20191216223756.2428-5-luc.vanoostenryck@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191216223756.2428-1-luc.vanoostenryck@gmail.com> References: <20191216223756.2428-1-luc.vanoostenryck@gmail.com> MIME-Version: 1.0 Sender: linux-sparse-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sparse@vger.kernel.org So, the 2 tables indexed by arch are next to each other, both in target.c, making easier to add a new arch. Signed-off-by: Luc Van Oostenryck --- lib.c | 50 ++++---------------------------------------------- target.c | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++++ target.h | 1 + 3 files changed, 58 insertions(+), 46 deletions(-) diff --git a/lib.c b/lib.c index d759648a504a..82354af7eafa 100644 --- a/lib.c +++ b/lib.c @@ -1137,56 +1137,14 @@ static char **handle_switch_x(char *arg, char **next) static char **handle_arch(char *arg, char **next) { - static const struct arch { - const char *name; - enum machine mach; - char bits; - } archs[] = { - { "aarch64", MACH_ARM64, 64, }, - { "arm64", MACH_ARM64, 64, }, - { "arm", MACH_ARM, 32, }, - { "i386", MACH_I386, 32, }, - { "m68k", MACH_M68K, 32, }, - { "mips", MACH_MIPS32, 0, }, - { "powerpc", MACH_PPC32, 0, }, - { "ppc", MACH_PPC32, 0, }, - { "riscv", MACH_RISCV32, 0, }, - { "s390x", MACH_S390X, 64, }, - { "s390", MACH_S390, 32, }, - { "sparc", MACH_SPARC32, 0, }, - { "x86_64", MACH_X86_64, 64, }, - { "x86-64", MACH_X86_64, 64, }, - { NULL }, - }; - const struct arch *p; + enum machine mach; if (*arg++ != '=') die("missing argument for --arch option"); - for (p = &archs[0]; p->name; p++) { - size_t len = strlen(p->name); - if (strncmp(p->name, arg, len) == 0) { - enum machine mach = p->mach; - const char *suf = arg + len; - int bits = p->bits; - - if (bits == 0) { - if (!strcmp(suf, "") || !strcmp(suf, "32")) { - ; - } else if (!strcmp(suf, "64")) { - mach += 1; - } else { - die("invalid architecture: %s", arg); - } - } else { - if (strcmp(suf, "")) - die("invalid architecture: %s", arg); - } - - target_config(mach); - break; - } - } + mach = target_parse(arg); + if (mach != MACH_UNKNOWN) + target_config(mach); return next; } diff --git a/target.c b/target.c index f23ed30881bd..8d2d10588d60 100644 --- a/target.c +++ b/target.c @@ -1,4 +1,5 @@ #include +#include #include "symbol.h" #include "target.h" @@ -75,6 +76,58 @@ static const struct target *targets[] = { }; const struct target *arch_target = &target_default; +enum machine target_parse(const char *name) +{ + static const struct arch { + const char *name; + enum machine mach; + char bits; + } archs[] = { + { "aarch64", MACH_ARM64, 64, }, + { "arm64", MACH_ARM64, 64, }, + { "arm", MACH_ARM, 32, }, + { "i386", MACH_I386, 32, }, + { "m68k", MACH_M68K, 32, }, + { "mips", MACH_MIPS32, 0, }, + { "powerpc", MACH_PPC32, 0, }, + { "ppc", MACH_PPC32, 0, }, + { "riscv", MACH_RISCV32, 0, }, + { "s390x", MACH_S390X, 64, }, + { "s390", MACH_S390, 32, }, + { "sparc", MACH_SPARC32, 0, }, + { "x86_64", MACH_X86_64, 64, }, + { "x86-64", MACH_X86_64, 64, }, + { NULL }, + }; + const struct arch *p; + + for (p = &archs[0]; p->name; p++) { + size_t len = strlen(p->name); + if (strncmp(p->name, name, len) == 0) { + enum machine mach = p->mach; + const char *suf = name + len; + int bits = p->bits; + + if (bits == 0) { + if (!strcmp(suf, "") || !strcmp(suf, "32")) { + ; + } else if (!strcmp(suf, "64")) { + mach += 1; + } else { + die("invalid architecture: %s", name); + } + } else { + if (strcmp(suf, "")) + die("invalid architecture: %s", name); + } + + return mach; + } + } + + return MACH_UNKNOWN; +} + void target_config(enum machine mach) { diff --git a/target.h b/target.h index 0c45ecf41ea2..c6aef9592080 100644 --- a/target.h +++ b/target.h @@ -92,6 +92,7 @@ extern const struct target target_x86_64; /* target.c */ extern const struct target *arch_target; +enum machine target_parse(const char *name); void target_config(enum machine mach); void target_init(void); From patchwork Mon Dec 16 22:37:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luc Van Oostenryck X-Patchwork-Id: 11296139 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E6B40138D for ; Mon, 16 Dec 2019 22:38:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C20B821739 for ; Mon, 16 Dec 2019 22:38:08 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Mon, 16 Dec 2019 14:38:04 -0800 (PST) From: Luc Van Oostenryck To: linux-sparse@vger.kernel.org Cc: Luc Van Oostenryck Subject: [PATCH 05/10] arch: move handle_arch_finalize() into target_init() Date: Mon, 16 Dec 2019 23:37:51 +0100 Message-Id: <20191216223756.2428-6-luc.vanoostenryck@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191216223756.2428-1-luc.vanoostenryck@gmail.com> References: <20191216223756.2428-1-luc.vanoostenryck@gmail.com> MIME-Version: 1.0 Sender: linux-sparse-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sparse@vger.kernel.org Before initaializing the builtin types some 'finalizations' are needed. target_ini() already does most of this. So, move the arch-specific content of handle_arch_finalize() into the corresponding target files and the generic part to target_init(). Signed-off-by: Luc Van Oostenryck --- lib.c | 35 +---------------------------------- lib.h | 1 + target-arm64.c | 8 ++++++++ target-riscv.c | 12 ++++++++++++ target.c | 10 ++++++++++ 5 files changed, 32 insertions(+), 34 deletions(-) diff --git a/lib.c b/lib.c index 82354af7eafa..366acd45436a 100644 --- a/lib.c +++ b/lib.c @@ -320,7 +320,7 @@ int preprocess_only; enum standard standard = STANDARD_GNU89; -static int arch_msize_long = 0; +int arch_msize_long = 0; int arch_m64 = ARCH_M64_DEFAULT; int arch_big_endian = ARCH_BIG_ENDIAN; int arch_fp_abi = FP_ABI_NATIVE; @@ -714,38 +714,6 @@ static char **handle_switch_m(char *arg, char **next) return next; } -static void handle_arch_msize_long_finalize(void) -{ - if (arch_msize_long) { - size_t_ctype = &ulong_ctype; - ssize_t_ctype = &long_ctype; - } -} - -static void handle_arch_finalize(void) -{ - handle_arch_msize_long_finalize(); - - if (fpie > fpic) - fpic = fpie; - if (fshort_wchar) - wchar_ctype = &ushort_ctype; - - switch (arch_mach) { - case MACH_ARM64: - if (arch_cmodel == CMODEL_UNKNOWN) - arch_cmodel = CMODEL_SMALL; - break; - case MACH_RISCV32: - case MACH_RISCV64: - if (arch_cmodel == CMODEL_UNKNOWN) - arch_cmodel = CMODEL_MEDLOW; - if (fpic) - arch_cmodel = CMODEL_PIC; - break; - } -} - static char **handle_switch_o(char *arg, char **next) { if (!strcmp (arg, "o")) { // "-o foo" @@ -1732,7 +1700,6 @@ struct symbol_list *sparse_initialize(int argc, char **argv, struct string_list if (filelist) { // Initialize type system target_init(); - handle_arch_finalize(); init_ctype(); predefined_macros(); diff --git a/lib.h b/lib.h index 3e565c6fd02d..d0585e363bce 100644 --- a/lib.h +++ b/lib.h @@ -205,6 +205,7 @@ extern int fpie; extern int fshort_wchar; extern int funsigned_char; +extern int arch_msize_long; extern int arch_m64; extern int arch_big_endian; extern int arch_fp_abi; diff --git a/target-arm64.c b/target-arm64.c index bfada515b81f..1efd0899495d 100644 --- a/target-arm64.c +++ b/target-arm64.c @@ -3,6 +3,12 @@ #include "machine.h" +static void init_arm64(const struct target *self) +{ + if (arch_cmodel == CMODEL_UNKNOWN) + arch_cmodel = CMODEL_SMALL; +} + const struct target target_arm64 = { .mach = MACH_ARM64, .bitness = ARCH_LP64, @@ -11,4 +17,6 @@ const struct target target_arm64 = { .unsigned_char = 1, .wchar = &uint_ctype, + + .init = init_arm64, }; diff --git a/target-riscv.c b/target-riscv.c index cbec76237d48..09edfd7afeaf 100644 --- a/target-riscv.c +++ b/target-riscv.c @@ -3,6 +3,14 @@ #include "machine.h" +static void init_riscv(const struct target *self) +{ + if (arch_cmodel == CMODEL_UNKNOWN) + arch_cmodel = CMODEL_MEDLOW; + if (fpic) + arch_cmodel = CMODEL_PIC; +} + const struct target target_riscv32 = { .mach = MACH_RISCV32, .bitness = ARCH_LP32, @@ -10,6 +18,8 @@ const struct target target_riscv32 = { .unsigned_char = 1, .target_64bit = &target_riscv64, + + .init = init_riscv, }; const struct target target_riscv64 = { @@ -19,4 +29,6 @@ const struct target target_riscv64 = { .unsigned_char = 1, .target_32bit = &target_riscv32, + + .init = init_riscv, }; diff --git a/target.c b/target.c index 8d2d10588d60..006292cc00ba 100644 --- a/target.c +++ b/target.c @@ -181,6 +181,9 @@ void target_init(void) arch_target = target; arch_mach = target->mach; + if (fpie > fpic) + fpic = fpie; + if (target->wchar) wchar_ctype = target->wchar; if (target->wint) @@ -192,4 +195,11 @@ void target_init(void) if (target->init) target->init(target); + + if (arch_msize_long) { + size_t_ctype = &ulong_ctype; + ssize_t_ctype = &long_ctype; + } + if (fshort_wchar) + wchar_ctype = &ushort_ctype; } From patchwork Mon Dec 16 22:37:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luc Van Oostenryck X-Patchwork-Id: 11296137 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B88F4112B for ; Mon, 16 Dec 2019 22:38:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 93AAA21739 for ; Mon, 16 Dec 2019 22:38:08 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="VqL7qjH/" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727815AbfLPWiI (ORCPT ); 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Mon, 16 Dec 2019 14:38:05 -0800 (PST) From: Luc Van Oostenryck To: linux-sparse@vger.kernel.org Cc: Luc Van Oostenryck Subject: [PATCH 06/10] arch: use an arch-specific default for -msize-long Date: Mon, 16 Dec 2019 23:37:52 +0100 Message-Id: <20191216223756.2428-7-luc.vanoostenryck@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191216223756.2428-1-luc.vanoostenryck@gmail.com> References: <20191216223756.2428-1-luc.vanoostenryck@gmail.com> MIME-Version: 1.0 Sender: linux-sparse-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sparse@vger.kernel.org This is for completeness and only useful for S390 which is not exactly the most common arch. But since it's now easy to do this kind of thing ... Signed-off-by: Luc Van Oostenryck --- target-s390.c | 1 + target.c | 2 +- target.h | 1 + 3 files changed, 3 insertions(+), 1 deletion(-) diff --git a/target-s390.c b/target-s390.c index 157779ce506b..277e0909024f 100644 --- a/target-s390.c +++ b/target-s390.c @@ -8,6 +8,7 @@ const struct target target_s390 = { .bitness = ARCH_LP32, .big_endian = 1, .unsigned_char = 1, + .size_t_long = 1, .bits_in_longdouble = 64, .max_fp_alignment = 8, diff --git a/target.c b/target.c index 006292cc00ba..1c7a40836175 100644 --- a/target.c +++ b/target.c @@ -196,7 +196,7 @@ void target_init(void) if (target->init) target->init(target); - if (arch_msize_long) { + if (arch_msize_long || target->size_t_long) { size_t_ctype = &ulong_ctype; ssize_t_ctype = &long_ctype; } diff --git a/target.h b/target.h index c6aef9592080..ebd8f1b15ce6 100644 --- a/target.h +++ b/target.h @@ -59,6 +59,7 @@ struct target { enum bitness bitness; unsigned int big_endian:1; unsigned int unsigned_char:1; + unsigned int size_t_long:1; struct symbol *wchar; struct symbol *wint; From patchwork Mon Dec 16 22:37:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luc Van Oostenryck X-Patchwork-Id: 11296145 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3490B138D for ; Mon, 16 Dec 2019 22:38:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 07F7C21739 for ; Mon, 16 Dec 2019 22:38:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="lQoclnnK" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727799AbfLPWiK (ORCPT ); Mon, 16 Dec 2019 17:38:10 -0500 Received: from mail-wm1-f65.google.com ([209.85.128.65]:37344 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727751AbfLPWiK (ORCPT ); Mon, 16 Dec 2019 17:38:10 -0500 Received: by mail-wm1-f65.google.com with SMTP id f129so1002727wmf.2 for ; Mon, 16 Dec 2019 14:38:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=R015iISVnBATUZNCGpQtyo5zWqdusVxf/qk0xNmPJrQ=; b=lQoclnnKt2JOX2ZUWoxILpfrzLQspgAPeHDcowCxsDWAIl9M3EG7B/AfydhJ62zMw9 q/FXrhncoAwqF5LIH1pma5Gf6TS7StgsSMpV/Y7HSgLUmJiqN6NgHoiO+RWRWCyaN28K 3qEISb1qNN1K4nqz8d78YAvoZ0AWbsUAKGRcVfuSDBkyRNR9YUbYqTsfOLk9t3wH7GUT WswP1tQrxaNHRhYvQvB7pEXU5u/68jydM6Hpw4oDgxiKR9X+x7XkWIr3RBVonURTs8uz DAtT6gJbgK7TIAsca1l65rYkuCBQ6/qnYf6S5qqDVJZTsf0BxlKDhuCs9YZ+3bSscS1i /9HA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=R015iISVnBATUZNCGpQtyo5zWqdusVxf/qk0xNmPJrQ=; b=qO6miCy6/e2eDGKK2zIPj9Pcn8b0TB6bbC/NSqIcIZeBLlr2FcQxFlUzWmu0KpgCuY QmAU/RlI3nxeCtI/OW1hela2Bd2OoPHDBR3TNW5MGrrASJnO3P+yy/+QPPDFgZdWdsif SMlTe28QiF/vZpyNtMj87hiMnjaUby3oPNeO0Obexyesq34jsoqmFuagrPJ95sXUkmbD lgqr5jsE1Hzr9bd1zGG3inhTiSAsNbD2MEeZ9pJw8D8889ASwpoVpvqBWt8D5CyFH/GI mp6UQlbY+LqDDnK/fg9ZUQkN+2aeBXl5aZxt/rKf69c6f9NuHuzp8ddZjNl7hn09G88q N05Q== X-Gm-Message-State: APjAAAWWdXC7pM5V33numRHyWwf3ynv6jnVq9hBIN4sJu8W/1ubV1v0p mp2uOo3WZr9rNXsQuEuysZUyI3Pu X-Google-Smtp-Source: APXvYqzRUFidjm5rlr++y9hcwaKEIh4seZgNHnKg+d7Gw+eROgHE3EFd6qNt0fkLSpQXN11aEfySbw== X-Received: by 2002:a05:600c:2549:: with SMTP id e9mr1542613wma.6.1576535886857; Mon, 16 Dec 2019 14:38:06 -0800 (PST) Received: from localhost.localdomain ([2a02:a03f:40f6:4600:21c4:7316:325b:dfe0]) by smtp.gmail.com with ESMTPSA id h17sm24275709wrs.18.2019.12.16.14.38.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Dec 2019 14:38:06 -0800 (PST) From: Luc Van Oostenryck To: linux-sparse@vger.kernel.org Cc: Luc Van Oostenryck Subject: [PATCH 07/10] arch: move target-specific predefines to the target files. Date: Mon, 16 Dec 2019 23:37:53 +0100 Message-Id: <20191216223756.2428-8-luc.vanoostenryck@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191216223756.2428-1-luc.vanoostenryck@gmail.com> References: <20191216223756.2428-1-luc.vanoostenryck@gmail.com> MIME-Version: 1.0 Sender: linux-sparse-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sparse@vger.kernel.org Now that each supported arch has its own target file, move the arch-specific predefines to these files too. Signed-off-by: Luc Van Oostenryck --- lib.c | 87 ++------------------------------------------------ target-arm.c | 20 ++++++++++++ target-arm64.c | 6 ++++ target-m68k.c | 7 ++++ target-mips.c | 27 ++++++++++++++++ target-ppc.c | 32 +++++++++++++++++++ target-riscv.c | 8 +++++ target-s390.c | 18 +++++++++++ target-sparc.c | 28 ++++++++++++++++ target-x86.c | 20 ++++++++++++ target.h | 1 + 11 files changed, 169 insertions(+), 85 deletions(-) diff --git a/lib.c b/lib.c index 366acd45436a..a2514b420888 100644 --- a/lib.c +++ b/lib.c @@ -1446,91 +1446,6 @@ static void predefined_macros(void) break; } - switch (arch_mach) { - case MACH_ARM64: - predefine("__aarch64__", 1, "1"); - break; - case MACH_ARM: - predefine("__arm__", 1, "1"); - switch (arch_fp_abi) { - case FP_ABI_HARD: - predefine("__ARM_PCS_VFP", 1, "1"); - break; - case FP_ABI_SOFT: - predefine("__SOFTFP__", 1, "1"); - /* fall-through */ - case FP_ABI_HYBRID: - predefine("__ARM_PCS", 1, "1"); - break; - } - predefine("__VFP_FP__", 1, "1"); - break; - case MACH_M68K: - predefine("__m68k__", 1, "1"); - break; - case MACH_MIPS64: - predefine("__mips64", 1, "64"); - /* fall-through */ - case MACH_MIPS32: - predefine("__mips__", 1, "1"); - predefine("__mips", 1, "%d", ptr_ctype.bit_size); - predefine("_MIPS_SZINT", 1, "%d", int_ctype.bit_size); - predefine("_MIPS_SZLONG", 1, "%d", long_ctype.bit_size); - predefine("_MIPS_SZPTR", 1, "%d", ptr_ctype.bit_size); - break; - case MACH_PPC64: - predefine("__powerpc64__", 1, "1"); - predefine("__ppc64__", 1, "1"); - predefine("__PPC64__", 1, "1"); - predefine("_ARCH_PPC64", 1, "1"); - /* fall-through */ - case MACH_PPC32: - predefine("__powerpc__", 1, "1"); - predefine("__powerpc", 1, "1"); - predefine("__ppc__", 1, "1"); - predefine("__PPC__", 1, "1"); - predefine("__PPC", 1, "1"); - predefine("_ARCH_PPC", 1, "1"); - if (arch_big_endian) - predefine("_BIG_ENDIAN", 1, "1"); - break; - case MACH_RISCV64: - case MACH_RISCV32: - predefine("__riscv", 1, "1"); - predefine("__riscv_xlen", 1, "%d", ptr_ctype.bit_size); - break; - case MACH_S390X: - predefine("__zarch__", 1, "1"); - predefine("__s390x__", 1, "1"); - case MACH_S390: - predefine("__s390__", 1, "1"); - break; - case MACH_SPARC64: - predefine("__sparc_v9__", 1, "1"); - predefine("__sparcv9__", 1, "1"); - predefine("__sparcv9", 1, "1"); - predefine("__sparc64__", 1, "1"); - predefine("__arch64__", 1, "1"); - /* fall-through */ - case MACH_SPARC32: - predefine("__sparc__", 1, "1"); - predefine("__sparc", 1, "1"); - break; - case MACH_X86_64: - if (arch_m64 != ARCH_LP32) { - predefine("__x86_64__", 1, "1"); - predefine("__x86_64", 1, "1"); - predefine("__amd64__", 1, "1"); - predefine("__amd64", 1, "1"); - break; - } - /* fall-through */ - case MACH_I386: - predefine("__i386__", 1, "1"); - predefine("__i386", 1, "1"); - break; - } - if (fpic) { predefine("__pic__", 0, "%d", fpic); predefine("__PIC__", 0, "%d", fpic); @@ -1540,6 +1455,8 @@ static void predefined_macros(void) predefine("__PIE__", 0, "%d", fpie); } + if (arch_target->predefine) + arch_target->predefine(arch_target); predefined_cmodel(); } diff --git a/target-arm.c b/target-arm.c index f5af04ee1fbb..0d7c6134795f 100644 --- a/target-arm.c +++ b/target-arm.c @@ -3,6 +3,24 @@ #include "machine.h" +static void predefine_arm(const struct target *self) +{ + predefine("__arm__", 1, "1"); + predefine("__VFP_FP__", 1, "1"); + + switch (arch_fp_abi) { + case FP_ABI_HARD: + predefine("__ARM_PCS_VFP", 1, "1"); + break; + case FP_ABI_SOFT: + predefine("__SOFTFP__", 1, "1"); + /* fall-through */ + case FP_ABI_HYBRID: + predefine("__ARM_PCS", 1, "1"); + break; + } +} + const struct target target_arm = { .mach = MACH_ARM, .bitness = ARCH_LP32, @@ -13,4 +31,6 @@ const struct target target_arm = { .bits_in_longdouble = 64, .max_fp_alignment = 8, + + .predefine = predefine_arm, }; diff --git a/target-arm64.c b/target-arm64.c index 1efd0899495d..cddabb820085 100644 --- a/target-arm64.c +++ b/target-arm64.c @@ -9,6 +9,11 @@ static void init_arm64(const struct target *self) arch_cmodel = CMODEL_SMALL; } +static void predefine_arm64(const struct target *self) +{ + predefine("__aarch64__", 1, "1"); +} + const struct target target_arm64 = { .mach = MACH_ARM64, .bitness = ARCH_LP64, @@ -19,4 +24,5 @@ const struct target target_arm64 = { .wchar = &uint_ctype, .init = init_arm64, + .predefine = predefine_arm64, }; diff --git a/target-m68k.c b/target-m68k.c index 1646fceb62aa..ed4a92733efe 100644 --- a/target-m68k.c +++ b/target-m68k.c @@ -3,6 +3,11 @@ #include "machine.h" +static void predefine_m68k(const struct target *self) +{ + predefine("__m68k__", 1, "1"); +} + const struct target target_m68k = { .mach = MACH_M68K, .bitness = ARCH_LP32, @@ -13,4 +18,6 @@ const struct target target_m68k = { .bits_in_longdouble = 96, .max_fp_alignment = 4, + + .predefine = predefine_m68k, }; diff --git a/target-mips.c b/target-mips.c index 7e2b44466f3e..395e6ff13567 100644 --- a/target-mips.c +++ b/target-mips.c @@ -3,6 +3,21 @@ #include "machine.h" +static void predefine_mips(const struct target *self) +{ + predefine("__mips__", 1, "1"); + predefine("__mips", 1, "%d", ptr_ctype.bit_size); + predefine("_MIPS_SZINT", 1, "%d", int_ctype.bit_size); + predefine("_MIPS_SZLONG", 1, "%d", long_ctype.bit_size); + predefine("_MIPS_SZPTR", 1, "%d", ptr_ctype.bit_size); +} + + +static void predefine_mips32(const struct target *self) +{ + predefine_mips(self); +} + const struct target target_mips32 = { .mach = MACH_MIPS32, .bitness = ARCH_LP32, @@ -13,8 +28,18 @@ const struct target target_mips32 = { .max_fp_alignment = 8, .target_64bit = &target_mips64, + + .predefine = predefine_mips32, }; + +static void predefine_mips64(const struct target *self) +{ + predefine("__mips64", 1, "64"); + + predefine_mips(self); +} + const struct target target_mips64 = { .mach = MACH_MIPS64, .bitness = ARCH_LP64, @@ -22,4 +47,6 @@ const struct target target_mips64 = { .unsigned_char = 0, .target_32bit = &target_mips32, + + .predefine = predefine_mips64, }; diff --git a/target-ppc.c b/target-ppc.c index e867d9fec299..21ce86d813a4 100644 --- a/target-ppc.c +++ b/target-ppc.c @@ -3,6 +3,24 @@ #include "machine.h" +static void predefine_ppc(const struct target *self) +{ + predefine("__powerpc__", 1, "1"); + predefine("__powerpc", 1, "1"); + predefine("__ppc__", 1, "1"); + predefine("__PPC__", 1, "1"); + predefine("__PPC", 1, "1"); + predefine("_ARCH_PPC", 1, "1"); + if (arch_big_endian) + predefine("_BIG_ENDIAN", 1, "1"); +} + + +static void predefine_ppc32(const struct target *self) +{ + predefine_ppc(self); +} + const struct target target_ppc32 = { .mach = MACH_PPC32, .bitness = ARCH_LP32, @@ -12,9 +30,21 @@ const struct target target_ppc32 = { .wchar = &long_ctype, .target_64bit = &target_ppc64, + + .predefine = predefine_ppc32, }; +static void predefine_ppc64(const struct target *self) +{ + predefine("__powerpc64__", 1, "1"); + predefine("__ppc64__", 1, "1"); + predefine("__PPC64__", 1, "1"); + predefine("_ARCH_PPC64", 1, "1"); + + predefine_ppc(self); +} + const struct target target_ppc64 = { .mach = MACH_PPC64, .bitness = ARCH_LP64, @@ -22,4 +52,6 @@ const struct target target_ppc64 = { .unsigned_char = 1, .target_32bit = &target_ppc32, + + .predefine = predefine_ppc64, }; diff --git a/target-riscv.c b/target-riscv.c index 09edfd7afeaf..e7acb36349ad 100644 --- a/target-riscv.c +++ b/target-riscv.c @@ -11,6 +11,12 @@ static void init_riscv(const struct target *self) arch_cmodel = CMODEL_PIC; } +static void predefine_riscv(const struct target *self) +{ + predefine("__riscv", 1, "1"); + predefine("__riscv_xlen", 1, "%d", ptr_ctype.bit_size); +} + const struct target target_riscv32 = { .mach = MACH_RISCV32, .bitness = ARCH_LP32, @@ -20,6 +26,7 @@ const struct target target_riscv32 = { .target_64bit = &target_riscv64, .init = init_riscv, + .predefine = predefine_riscv, }; const struct target target_riscv64 = { @@ -31,4 +38,5 @@ const struct target target_riscv64 = { .target_32bit = &target_riscv32, .init = init_riscv, + .predefine = predefine_riscv, }; diff --git a/target-s390.c b/target-s390.c index 277e0909024f..159a6b1149b9 100644 --- a/target-s390.c +++ b/target-s390.c @@ -3,6 +3,11 @@ #include "machine.h" +static void predefine_s390(const struct target *self) +{ + predefine("__s390__", 1, "1"); +} + const struct target target_s390 = { .mach = MACH_S390, .bitness = ARCH_LP32, @@ -14,8 +19,19 @@ const struct target target_s390 = { .max_fp_alignment = 8, .target_64bit = &target_s390x, + + .predefine = predefine_s390, }; + +static void predefine_s390x(const struct target *self) +{ + predefine("__zarch__", 1, "1"); + predefine("__s390x__", 1, "1"); + + predefine_s390(self); +} + const struct target target_s390x = { .mach = MACH_S390X, .bitness = ARCH_LP64, @@ -26,4 +42,6 @@ const struct target target_s390x = { .max_fp_alignment = 8, .target_32bit = &target_s390, + + .predefine = predefine_s390x, }; diff --git a/target-sparc.c b/target-sparc.c index ca9589f5b65c..5267430f8bfd 100644 --- a/target-sparc.c +++ b/target-sparc.c @@ -3,6 +3,13 @@ #include "machine.h" +static void predefine_sparc(const struct target *self) +{ + predefine("__sparc__", 1, "1"); + predefine("__sparc", 1, "1"); +} + + static void init_sparc32(const struct target *target) { if (arch_os == OS_SUNOS) { @@ -14,6 +21,11 @@ static void init_sparc32(const struct target *target) } } +static void predefine_sparc32(const struct target *self) +{ + predefine_sparc(self); +} + const struct target target_sparc32 = { .mach = MACH_SPARC32, .bitness = ARCH_LP32, @@ -25,8 +37,22 @@ const struct target target_sparc32 = { .init = init_sparc32, .target_64bit = &target_sparc64, + + .predefine = predefine_sparc32, }; + +static void predefine_sparc64(const struct target *self) +{ + predefine("__sparc_v9__", 1, "1"); + predefine("__sparcv9__", 1, "1"); + predefine("__sparcv9", 1, "1"); + predefine("__sparc64__", 1, "1"); + predefine("__arch64__", 1, "1"); + + predefine_sparc(self); +} + const struct target target_sparc64 = { .mach = MACH_SPARC64, .bitness = ARCH_LP64, @@ -34,4 +60,6 @@ const struct target target_sparc64 = { .unsigned_char = 0, .target_32bit = &target_sparc32, + + .predefine = predefine_sparc64, }; diff --git a/target-x86.c b/target-x86.c index eaca5e8bc507..046e346e3b19 100644 --- a/target-x86.c +++ b/target-x86.c @@ -24,6 +24,13 @@ static void init_x86(const struct target *target) } } + +static void predefine_i386(const struct target *self) +{ + predefine("__i386__", 1, "1"); + predefine("__i386", 1, "1"); +} + const struct target target_i386 = { .mach = MACH_I386, .bitness = ARCH_LP32, @@ -36,8 +43,19 @@ const struct target target_i386 = { .init = init_x86, .target_64bit = &target_x86_64, + + .predefine = predefine_i386, }; + +static void predefine_x86_64(const struct target *self) +{ + predefine("__x86_64__", 1, "1"); + predefine("__x86_64", 1, "1"); + predefine("__amd64__", 1, "1"); + predefine("__amd64", 1, "1"); +} + const struct target target_x86_64 = { .mach = MACH_X86_64, .bitness = ARCH_LP64, @@ -49,4 +67,6 @@ const struct target target_x86_64 = { .init = init_x86, .target_32bit = &target_i386, + + .predefine = predefine_x86_64, }; diff --git a/target.h b/target.h index ebd8f1b15ce6..8f39abb8d875 100644 --- a/target.h +++ b/target.h @@ -71,6 +71,7 @@ struct target { const struct target *target_64bit; void (*init)(const struct target *self); + void (*predefine)(const struct target *self); }; extern const struct target target_default; From patchwork Mon Dec 16 22:37:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luc Van Oostenryck X-Patchwork-Id: 11296143 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E45EF112B for ; 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Mon, 16 Dec 2019 14:38:07 -0800 (PST) Received: from localhost.localdomain ([2a02:a03f:40f6:4600:21c4:7316:325b:dfe0]) by smtp.gmail.com with ESMTPSA id h17sm24275709wrs.18.2019.12.16.14.38.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Dec 2019 14:38:07 -0800 (PST) From: Luc Van Oostenryck To: linux-sparse@vger.kernel.org Cc: Luc Van Oostenryck Subject: [PATCH 08/10] arch: move cmodel predefines to the target files. Date: Mon, 16 Dec 2019 23:37:54 +0100 Message-Id: <20191216223756.2428-9-luc.vanoostenryck@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191216223756.2428-1-luc.vanoostenryck@gmail.com> References: <20191216223756.2428-1-luc.vanoostenryck@gmail.com> MIME-Version: 1.0 Sender: linux-sparse-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sparse@vger.kernel.org Now that each supported arch has its own target file, move the predefines for cmodel, which are arch-specific, to the target files. Signed-off-by: Luc Van Oostenryck --- lib.c | 50 -------------------------------------------------- lib.h | 1 + target-arm64.c | 10 ++++++++++ target-riscv.c | 10 ++++++++++ 4 files changed, 21 insertions(+), 50 deletions(-) diff --git a/lib.c b/lib.c index a2514b420888..de9c87c180cb 100644 --- a/lib.c +++ b/lib.c @@ -1275,55 +1275,6 @@ static void predefined_ctype(const char *name, struct symbol *type, int flags) predefined_width(name, bits); } -static void predefined_cmodel(void) -{ - const char *pre, *suf; - const char *def = NULL; - switch (arch_mach) { - case MACH_ARM64: - pre = "__AARCH64_CMODEL_"; - suf = "__"; - switch (arch_cmodel) { - case CMODEL_LARGE: - def = "LARGE"; - break; - case CMODEL_SMALL: - def = "SMALL"; - break; - case CMODEL_TINY: - def = "TINY"; - break; - default: - break; - } - break; - case MACH_RISCV32: - case MACH_RISCV64: - pre = "__riscv_cmodel_"; - suf = ""; - switch (arch_cmodel) { - case CMODEL_MEDLOW: - def = "medlow"; - break; - case CMODEL_MEDANY: - def = "medany"; - break; - case CMODEL_PIC: - def = "pic"; - break; - default: - break; - } - break; - default: - break; - } - - if (!def) - return; - add_pre_buffer("#weak_define %s%s%s 1\n", pre, def, suf); -} - static void predefined_macros(void) { predefine("__CHECKER__", 0, "1"); @@ -1457,7 +1408,6 @@ static void predefined_macros(void) if (arch_target->predefine) arch_target->predefine(arch_target); - predefined_cmodel(); } //////////////////////////////////////////////////////////////////////////////// diff --git a/lib.h b/lib.h index d0585e363bce..290cbc576abe 100644 --- a/lib.h +++ b/lib.h @@ -222,6 +222,7 @@ enum { CMODEL_PIC, CMODEL_SMALL, CMODEL_TINY, + CMODEL_LAST, }; extern int arch_cmodel; diff --git a/target-arm64.c b/target-arm64.c index cddabb820085..71db639cdf85 100644 --- a/target-arm64.c +++ b/target-arm64.c @@ -11,7 +11,17 @@ static void init_arm64(const struct target *self) static void predefine_arm64(const struct target *self) { + static const char *cmodels[CMODEL_LAST] = { + [CMODEL_LARGE] = "LARGE", + [CMODEL_SMALL] = "SMALL", + [CMODEL_TINY] = "TINY", + }; + const char *cmodel = cmodels[arch_cmodel]; + predefine("__aarch64__", 1, "1"); + + if (cmodel) + add_pre_buffer("#define __AARCH64_CMODEL_%s__ 1\n", cmodel); } const struct target target_arm64 = { diff --git a/target-riscv.c b/target-riscv.c index e7acb36349ad..bbb47e9d7a34 100644 --- a/target-riscv.c +++ b/target-riscv.c @@ -13,8 +13,18 @@ static void init_riscv(const struct target *self) static void predefine_riscv(const struct target *self) { + static const char *cmodels[CMODEL_LAST] = { + [CMODEL_MEDANY] = "medany", + [CMODEL_MEDLOW] = "medlow", + [CMODEL_PIC] = "pic", + }; + const char *cmodel = cmodels[arch_cmodel]; + predefine("__riscv", 1, "1"); predefine("__riscv_xlen", 1, "%d", ptr_ctype.bit_size); + + if (cmodel) + add_pre_buffer("#define __riscv_cmodel_%s 1\n", cmodel); } const struct target target_riscv32 = { From patchwork Mon Dec 16 22:37:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luc Van Oostenryck X-Patchwork-Id: 11296147 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5F5AE6C1 for ; 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Mon, 16 Dec 2019 14:38:08 -0800 (PST) Received: from localhost.localdomain ([2a02:a03f:40f6:4600:21c4:7316:325b:dfe0]) by smtp.gmail.com with ESMTPSA id h17sm24275709wrs.18.2019.12.16.14.38.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Dec 2019 14:38:08 -0800 (PST) From: Luc Van Oostenryck To: linux-sparse@vger.kernel.org Cc: Luc Van Oostenryck Subject: [PATCH 09/10] arch: use arch_target for INT128's predefine Date: Mon, 16 Dec 2019 23:37:55 +0100 Message-Id: <20191216223756.2428-10-luc.vanoostenryck@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191216223756.2428-1-luc.vanoostenryck@gmail.com> References: <20191216223756.2428-1-luc.vanoostenryck@gmail.com> MIME-Version: 1.0 Sender: linux-sparse-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sparse@vger.kernel.org The predefine for INT128 is still done with the generic predefines but are arch-specific. So, set a new flag for each arch supporting int128 and use this to determine if the predefine must be issued or not. Signed-off-by: Luc Van Oostenryck --- lib.c | 10 +--------- target-arm64.c | 1 + target-mips.c | 1 + target-ppc.c | 1 + target-riscv.c | 1 + target-s390.c | 1 + target-sparc.c | 1 + target-x86.c | 1 + target.h | 1 + 9 files changed, 9 insertions(+), 9 deletions(-) diff --git a/lib.c b/lib.c index de9c87c180cb..842423c63d25 100644 --- a/lib.c +++ b/lib.c @@ -1350,16 +1350,8 @@ static void predefined_macros(void) predefined_sizeof("DOUBLE", "", bits_in_double); predefined_sizeof("LONG_DOUBLE", "", bits_in_longdouble); - switch (arch_mach) { - case MACH_ARM64: - case MACH_MIPS64: - case MACH_PPC64: - case MACH_RISCV64: - case MACH_S390X: - case MACH_SPARC64: - case MACH_X86_64: + if (arch_target->has_int128) predefined_sizeof("INT128", "", 128); - } predefine("__ORDER_LITTLE_ENDIAN__", 1, "1234"); predefine("__ORDER_BIG_ENDIAN__", 1, "4321"); diff --git a/target-arm64.c b/target-arm64.c index 71db639cdf85..d491b65e5154 100644 --- a/target-arm64.c +++ b/target-arm64.c @@ -30,6 +30,7 @@ const struct target target_arm64 = { .big_endian = 0, .unsigned_char = 1, + .has_int128 = 1, .wchar = &uint_ctype, diff --git a/target-mips.c b/target-mips.c index 395e6ff13567..3d73236feffd 100644 --- a/target-mips.c +++ b/target-mips.c @@ -45,6 +45,7 @@ const struct target target_mips64 = { .bitness = ARCH_LP64, .big_endian = 1, .unsigned_char = 0, + .has_int128 = 1, .target_32bit = &target_mips32, diff --git a/target-ppc.c b/target-ppc.c index 21ce86d813a4..b138635b9103 100644 --- a/target-ppc.c +++ b/target-ppc.c @@ -50,6 +50,7 @@ const struct target target_ppc64 = { .bitness = ARCH_LP64, .big_endian = 1, .unsigned_char = 1, + .has_int128 = 1, .target_32bit = &target_ppc32, diff --git a/target-riscv.c b/target-riscv.c index bbb47e9d7a34..08d036ca04b7 100644 --- a/target-riscv.c +++ b/target-riscv.c @@ -44,6 +44,7 @@ const struct target target_riscv64 = { .bitness = ARCH_LP64, .big_endian = 0, .unsigned_char = 1, + .has_int128 = 1, .target_32bit = &target_riscv32, diff --git a/target-s390.c b/target-s390.c index 159a6b1149b9..8fe7d93677b2 100644 --- a/target-s390.c +++ b/target-s390.c @@ -37,6 +37,7 @@ const struct target target_s390x = { .bitness = ARCH_LP64, .big_endian = 1, .unsigned_char = 1, + .has_int128 = 1, .bits_in_longdouble = 64, .max_fp_alignment = 8, diff --git a/target-sparc.c b/target-sparc.c index 5267430f8bfd..70c440c2facf 100644 --- a/target-sparc.c +++ b/target-sparc.c @@ -58,6 +58,7 @@ const struct target target_sparc64 = { .bitness = ARCH_LP64, .big_endian = 1, .unsigned_char = 0, + .has_int128 = 1, .target_32bit = &target_sparc32, diff --git a/target-x86.c b/target-x86.c index 046e346e3b19..01d213ef46c2 100644 --- a/target-x86.c +++ b/target-x86.c @@ -61,6 +61,7 @@ const struct target target_x86_64 = { .bitness = ARCH_LP64, .big_endian = 0, .unsigned_char = 0, + .has_int128 = 1, .bits_in_longdouble = 128, .max_fp_alignment = 16, diff --git a/target.h b/target.h index 8f39abb8d875..a89e21b63563 100644 --- a/target.h +++ b/target.h @@ -60,6 +60,7 @@ struct target { unsigned int big_endian:1; unsigned int unsigned_char:1; unsigned int size_t_long:1; + unsigned int has_int128:1; struct symbol *wchar; struct symbol *wint; From patchwork Mon Dec 16 22:37:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luc Van Oostenryck X-Patchwork-Id: 11296159 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7B79F138D for ; Mon, 16 Dec 2019 22:38:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 594AD21835 for ; Mon, 16 Dec 2019 22:38:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="I1cq8Rhb" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727832AbfLPWiM (ORCPT ); Mon, 16 Dec 2019 17:38:12 -0500 Received: from mail-wr1-f66.google.com ([209.85.221.66]:40880 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727857AbfLPWiL (ORCPT ); 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Mon, 16 Dec 2019 14:38:09 -0800 (PST) Received: from localhost.localdomain ([2a02:a03f:40f6:4600:21c4:7316:325b:dfe0]) by smtp.gmail.com with ESMTPSA id h17sm24275709wrs.18.2019.12.16.14.38.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Dec 2019 14:38:09 -0800 (PST) From: Luc Van Oostenryck To: linux-sparse@vger.kernel.org Cc: Luc Van Oostenryck Subject: [PATCH 10/10] arch: arch_mach is not needed anymore Date: Mon, 16 Dec 2019 23:37:56 +0100 Message-Id: <20191216223756.2428-11-luc.vanoostenryck@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191216223756.2428-1-luc.vanoostenryck@gmail.com> References: <20191216223756.2428-1-luc.vanoostenryck@gmail.com> MIME-Version: 1.0 Sender: linux-sparse-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sparse@vger.kernel.org arch_target now points to a structure holding all the arch-specificities. So, arch_mach is not needed anymore. Remove arch_mach. Signed-off-by: Luc Van Oostenryck --- lib.c | 1 - lib.h | 1 - target.c | 2 -- 3 files changed, 4 deletions(-) diff --git a/lib.c b/lib.c index 842423c63d25..40e192a7e7cf 100644 --- a/lib.c +++ b/lib.c @@ -324,7 +324,6 @@ int arch_msize_long = 0; int arch_m64 = ARCH_M64_DEFAULT; int arch_big_endian = ARCH_BIG_ENDIAN; int arch_fp_abi = FP_ABI_NATIVE; -int arch_mach = MACH_NATIVE; int arch_os = OS_NATIVE; int arch_cmodel = CMODEL_UNKNOWN; diff --git a/lib.h b/lib.h index 290cbc576abe..236235259ab9 100644 --- a/lib.h +++ b/lib.h @@ -209,7 +209,6 @@ extern int arch_msize_long; extern int arch_m64; extern int arch_big_endian; extern int arch_fp_abi; -extern int arch_mach; extern int arch_os; enum { diff --git a/target.c b/target.c index 1c7a40836175..abfa975672b1 100644 --- a/target.c +++ b/target.c @@ -134,7 +134,6 @@ void target_config(enum machine mach) const struct target *target = targets[mach]; arch_target = target; - arch_mach = target->mach; arch_m64 = target->bitness; arch_big_endian = target->big_endian; @@ -179,7 +178,6 @@ void target_init(void) break; } arch_target = target; - arch_mach = target->mach; if (fpie > fpic) fpic = fpie;