From patchwork Tue Dec 17 11:40:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfram Sang X-Patchwork-Id: 11297373 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1C08A18EC for ; Tue, 17 Dec 2019 11:40:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0343020665 for ; Tue, 17 Dec 2019 11:40:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727402AbfLQLkp (ORCPT ); Tue, 17 Dec 2019 06:40:45 -0500 Received: from sauhun.de ([88.99.104.3]:52178 "EHLO pokefinder.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726383AbfLQLko (ORCPT ); Tue, 17 Dec 2019 06:40:44 -0500 Received: from localhost (p54B330AA.dip0.t-ipconnect.de [84.179.48.170]) by pokefinder.org (Postfix) with ESMTPSA id EB4742C2D6D; Tue, 17 Dec 2019 12:40:42 +0100 (CET) From: Wolfram Sang To: linux-mmc@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Yoshihiro Shimoda , Wolfram Sang Subject: [RFC PATCH v2 1/5] mmc: renesas_sdhi: remove double clear of automatic correction Date: Tue, 17 Dec 2019 12:40:30 +0100 Message-Id: <20191217114034.13290-2-wsa+renesas@sang-engineering.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191217114034.13290-1-wsa+renesas@sang-engineering.com> References: <20191217114034.13290-1-wsa+renesas@sang-engineering.com> MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org hw_reset() clears the automatic correction bit twice. I couldn't find anything in the docs recommending that. Removing one of them didn't cause any regressions here, so keep it simple. Reviewed-by: Yoshihiro Shimoda Signed-off-by: Wolfram Sang --- drivers/mmc/host/renesas_sdhi_core.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c index 35cb24cd45b4..519d91ae3373 100644 --- a/drivers/mmc/host/renesas_sdhi_core.c +++ b/drivers/mmc/host/renesas_sdhi_core.c @@ -531,10 +531,6 @@ static void renesas_sdhi_hw_reset(struct tmio_mmc_host *host) ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN & sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL)); - sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL, - ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN & - sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL)); - if (host->pdata->flags & TMIO_MMC_MIN_RCAR2) sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, TMIO_MASK_INIT_RCAR2); From patchwork Tue Dec 17 11:40:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfram Sang X-Patchwork-Id: 11297387 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 385D4112B for ; Tue, 17 Dec 2019 11:40:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1F035207FF for ; Tue, 17 Dec 2019 11:40:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726383AbfLQLkq (ORCPT ); Tue, 17 Dec 2019 06:40:46 -0500 Received: from sauhun.de ([88.99.104.3]:52190 "EHLO pokefinder.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726729AbfLQLkq (ORCPT ); Tue, 17 Dec 2019 06:40:46 -0500 Received: from localhost (p54B330AA.dip0.t-ipconnect.de [84.179.48.170]) by pokefinder.org (Postfix) with ESMTPSA id 5A5752C2D92; Tue, 17 Dec 2019 12:40:43 +0100 (CET) From: Wolfram Sang To: linux-mmc@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Yoshihiro Shimoda , Takeshi Saito , Wolfram Sang Subject: [RFC PATCH v2 2/5] mmc: renesas_sdhi: Add manual correction Date: Tue, 17 Dec 2019 12:40:31 +0100 Message-Id: <20191217114034.13290-3-wsa+renesas@sang-engineering.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191217114034.13290-1-wsa+renesas@sang-engineering.com> References: <20191217114034.13290-1-wsa+renesas@sang-engineering.com> MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Takeshi Saito This patch adds a manual correction mechanism for SDHI. Currently, SDHI uses automatic TAP position correction. However, TAP position can also be corrected manually via correction error status flags. Signed-off-by: Takeshi Saito Reviewed-by: Yoshihiro Shimoda Signed-off-by: Wolfram Sang --- drivers/mmc/host/renesas_sdhi.h | 1 + drivers/mmc/host/renesas_sdhi_core.c | 61 +++++++++++++++++++++++----- 2 files changed, 52 insertions(+), 10 deletions(-) diff --git a/drivers/mmc/host/renesas_sdhi.h b/drivers/mmc/host/renesas_sdhi.h index f524251d5113..11a0b2bca3aa 100644 --- a/drivers/mmc/host/renesas_sdhi.h +++ b/drivers/mmc/host/renesas_sdhi.h @@ -57,6 +57,7 @@ struct renesas_sdhi { void __iomem *scc_ctl; u32 scc_tappos; u32 scc_tappos_hs400; + bool doing_tune; }; #define host_to_priv(host) \ diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c index 519d91ae3373..6cedc0a10593 100644 --- a/drivers/mmc/host/renesas_sdhi_core.c +++ b/drivers/mmc/host/renesas_sdhi_core.c @@ -263,6 +263,8 @@ static int renesas_sdhi_start_signal_voltage_switch(struct mmc_host *mmc, #define SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN BIT(0) /* Definitions for values the SH_MOBILE_SDHI_SCC_RVSREQ register */ #define SH_MOBILE_SDHI_SCC_RVSREQ_RVSERR BIT(2) +#define SH_MOBILE_SDHI_SCC_RVSREQ_REQTAPUP BIT(1) +#define SH_MOBILE_SDHI_SCC_RVSREQ_REQTAPDOWN BIT(0) /* Definitions for values the SH_MOBILE_SDHI_SCC_TMPPORT2 register */ #define SH_MOBILE_SDHI_SCC_TMPPORT2_HS400OSEL BIT(4) #define SH_MOBILE_SDHI_SCC_TMPPORT2_HS400EN BIT(31) @@ -321,6 +323,8 @@ static void renesas_sdhi_prepare_tuning(struct tmio_mmc_host *host, { struct renesas_sdhi *priv = host_to_priv(host); + priv->doing_tune = true; + /* Set sampling clock position */ sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TAPSET, tap); } @@ -426,6 +430,8 @@ static int renesas_sdhi_select_tuning(struct tmio_mmc_host *host) unsigned long ntap; /* temporary counter of tuning success */ unsigned long i; + priv->doing_tune = false; + /* Clear SCC_RVSREQ */ sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ, 0); @@ -485,6 +491,47 @@ static int renesas_sdhi_select_tuning(struct tmio_mmc_host *host) return 0; } +static bool renesas_sdhi_manual_correction(struct tmio_mmc_host *host, bool use_4tap) +{ + struct renesas_sdhi *priv = host_to_priv(host); + u32 val; + + val = sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ); + if (!val) + return false; + + sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ, 0); + + /* Change TAP position according to correction status */ + if (val & SH_MOBILE_SDHI_SCC_RVSREQ_RVSERR) + return true; /* Need re-tune */ + else if (val & SH_MOBILE_SDHI_SCC_RVSREQ_REQTAPUP) + host->tap_set = (host->tap_set + 1) % host->tap_num; + else if (val & SH_MOBILE_SDHI_SCC_RVSREQ_REQTAPDOWN) + host->tap_set = (host->tap_set - 1) % host->tap_num; + else + return false; + + sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TAPSET, + host->tap_set / (use_4tap ? 2 : 1)); + + return false; +} + +static bool renesas_sdhi_auto_correction(struct tmio_mmc_host *host) +{ + struct renesas_sdhi *priv = host_to_priv(host); + + /* Check SCC error */ + if (sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ) & + SH_MOBILE_SDHI_SCC_RVSREQ_RVSERR) { + sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ, 0); + return true; + } + + return false; +} + static bool renesas_sdhi_check_scc_error(struct tmio_mmc_host *host) { struct renesas_sdhi *priv = host_to_priv(host); @@ -499,20 +546,14 @@ static bool renesas_sdhi_check_scc_error(struct tmio_mmc_host *host) !(host->mmc->ios.timing == MMC_TIMING_MMC_HS400 && !use_4tap)) return false; - if (mmc_doing_retune(host->mmc)) + if (mmc_doing_retune(host->mmc) || priv->doing_tune) return false; - /* Check SCC error */ if (sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL) & - SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN && - sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ) & - SH_MOBILE_SDHI_SCC_RVSREQ_RVSERR) { - /* Clear SCC error */ - sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ, 0); - return true; - } + SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN) + return renesas_sdhi_auto_correction(host); - return false; + return renesas_sdhi_manual_correction(host, use_4tap); } static void renesas_sdhi_hw_reset(struct tmio_mmc_host *host) From patchwork Tue Dec 17 11:40:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfram Sang X-Patchwork-Id: 11297381 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B4DC36C1 for ; Tue, 17 Dec 2019 11:40:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9C50D2146E for ; Tue, 17 Dec 2019 11:40:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727461AbfLQLkp (ORCPT ); Tue, 17 Dec 2019 06:40:45 -0500 Received: from sauhun.de ([88.99.104.3]:52198 "EHLO pokefinder.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727198AbfLQLkp (ORCPT ); Tue, 17 Dec 2019 06:40:45 -0500 Received: from localhost (p54B330AA.dip0.t-ipconnect.de [84.179.48.170]) by pokefinder.org (Postfix) with ESMTPSA id C4A6C2C2D94; Tue, 17 Dec 2019 12:40:43 +0100 (CET) From: Wolfram Sang To: linux-mmc@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Yoshihiro Shimoda , Takeshi Saito , Wolfram Sang Subject: [RFC PATCH v2 3/5] mmc: renesas_sdhi: only check CMD status for HS400 manual correction Date: Tue, 17 Dec 2019 12:40:32 +0100 Message-Id: <20191217114034.13290-4-wsa+renesas@sang-engineering.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191217114034.13290-1-wsa+renesas@sang-engineering.com> References: <20191217114034.13290-1-wsa+renesas@sang-engineering.com> MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Takeshi Saito R-Car Gen3 cannot use correction error status with HS400. HS200: CMD and DAT signal timing are based on CLK signal. HS400: CMD signal is based on CLK. DAT signal is based on DS signal. In HS400, CMD signal is 200MHz(SDR). DAT signal is 200MHz(DDR). Center position of signal is different between CMD and DAT. TAP position should be adjusted to the center position of CMD signal. DAT sampling timing is adjusted by HS400 calibration circuit regardless of TAP position. Refer to renesas_sdhi_adjust_hs400mode_enable(). However, correction error status contains CMD and DAT status in HS400 (DAT signal is not masked in HS400). Therefore, correction error status cannot use in HS400. It means that auto correction cannot be uses in HS400. Manual correction can change to the correct TAP position by ignoring DAT correction error status and using only CMD correction status. Signed-off-by: Takeshi Saito [wsa: refactored patch from BSP] Signed-off-by: Wolfram Sang Reviewed-by: Yoshihiro Shimoda --- drivers/mmc/host/renesas_sdhi_core.c | 41 ++++++++++++++++++++++------ 1 file changed, 33 insertions(+), 8 deletions(-) diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c index 6cedc0a10593..e5db96fd0a69 100644 --- a/drivers/mmc/host/renesas_sdhi_core.c +++ b/drivers/mmc/host/renesas_sdhi_core.c @@ -250,6 +250,7 @@ static int renesas_sdhi_start_signal_voltage_switch(struct mmc_host *mmc, #define SH_MOBILE_SDHI_SCC_CKSEL 0x006 #define SH_MOBILE_SDHI_SCC_RVSCNTL 0x008 #define SH_MOBILE_SDHI_SCC_RVSREQ 0x00A +#define SH_MOBILE_SDHI_SCC_SMPCMP 0x00C #define SH_MOBILE_SDHI_SCC_TMPPORT2 0x00E /* Definitions for values the SH_MOBILE_SDHI_SCC_DTCNTL register */ @@ -265,6 +266,10 @@ static int renesas_sdhi_start_signal_voltage_switch(struct mmc_host *mmc, #define SH_MOBILE_SDHI_SCC_RVSREQ_RVSERR BIT(2) #define SH_MOBILE_SDHI_SCC_RVSREQ_REQTAPUP BIT(1) #define SH_MOBILE_SDHI_SCC_RVSREQ_REQTAPDOWN BIT(0) +/* Definitions for values the SH_MOBILE_SDHI_SCC_SMPCMP register */ +#define SH_MOBILE_SDHI_SCC_SMPCMP_CMD_ERR (BIT(24) | BIT(8)) +#define SH_MOBILE_SDHI_SCC_SMPCMP_CMD_REQUP BIT(24) +#define SH_MOBILE_SDHI_SCC_SMPCMP_CMD_REQDOWN BIT(8) /* Definitions for values the SH_MOBILE_SDHI_SCC_TMPPORT2 register */ #define SH_MOBILE_SDHI_SCC_TMPPORT2_HS400OSEL BIT(4) #define SH_MOBILE_SDHI_SCC_TMPPORT2_HS400EN BIT(31) @@ -494,6 +499,7 @@ static int renesas_sdhi_select_tuning(struct tmio_mmc_host *host) static bool renesas_sdhi_manual_correction(struct tmio_mmc_host *host, bool use_4tap) { struct renesas_sdhi *priv = host_to_priv(host); + unsigned long new_tap = host->tap_set; u32 val; val = sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ); @@ -503,15 +509,34 @@ static bool renesas_sdhi_manual_correction(struct tmio_mmc_host *host, bool use_ sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ, 0); /* Change TAP position according to correction status */ - if (val & SH_MOBILE_SDHI_SCC_RVSREQ_RVSERR) - return true; /* Need re-tune */ - else if (val & SH_MOBILE_SDHI_SCC_RVSREQ_REQTAPUP) - host->tap_set = (host->tap_set + 1) % host->tap_num; - else if (val & SH_MOBILE_SDHI_SCC_RVSREQ_REQTAPDOWN) - host->tap_set = (host->tap_set - 1) % host->tap_num; - else - return false; + if (sd_ctrl_read16(host, CTL_VERSION) == SDHI_VER_GEN3_SDMMC && + host->mmc->ios.timing == MMC_TIMING_MMC_HS400) { + /* + * With HS400, the DAT signal is based on DS, not CLK. + * Therefore, use only CMD status. + */ + u32 smpcmp = sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_SMPCMP) & + SH_MOBILE_SDHI_SCC_SMPCMP_CMD_ERR; + if (!smpcmp) + return false; /* no error in CMD signal */ + else if (smpcmp == SH_MOBILE_SDHI_SCC_SMPCMP_CMD_REQUP) + new_tap++; + else if (smpcmp == SH_MOBILE_SDHI_SCC_SMPCMP_CMD_REQDOWN) + new_tap--; + else + return true; /* need retune */ + } else { + if (val & SH_MOBILE_SDHI_SCC_RVSREQ_RVSERR) + return true; /* need retune */ + else if (val & SH_MOBILE_SDHI_SCC_RVSREQ_REQTAPUP) + new_tap++; + else if (val & SH_MOBILE_SDHI_SCC_RVSREQ_REQTAPDOWN) + new_tap--; + else + return false; + } + host->tap_set = (new_tap % host->tap_num); sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TAPSET, host->tap_set / (use_4tap ? 2 : 1)); From patchwork Tue Dec 17 11:40:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfram Sang X-Patchwork-Id: 11297375 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 46D1A13B6 for ; Tue, 17 Dec 2019 11:40:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2452B20733 for ; Tue, 17 Dec 2019 11:40:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727407AbfLQLkp (ORCPT ); Tue, 17 Dec 2019 06:40:45 -0500 Received: from sauhun.de ([88.99.104.3]:52208 "EHLO pokefinder.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727216AbfLQLkp (ORCPT ); Tue, 17 Dec 2019 06:40:45 -0500 Received: from localhost (p54B330AA.dip0.t-ipconnect.de [84.179.48.170]) by pokefinder.org (Postfix) with ESMTPSA id 343CB2C2D98; Tue, 17 Dec 2019 12:40:44 +0100 (CET) From: Wolfram Sang To: linux-mmc@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Yoshihiro Shimoda , Wolfram Sang Subject: [RFC PATCH v2 4/5] mmc: renesas_sdhi: enforce manual correction for Gen3 Date: Tue, 17 Dec 2019 12:40:33 +0100 Message-Id: <20191217114034.13290-5-wsa+renesas@sang-engineering.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191217114034.13290-1-wsa+renesas@sang-engineering.com> References: <20191217114034.13290-1-wsa+renesas@sang-engineering.com> MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org HW engineers say that automatic tap correction cannot be used for HS400 in all R-Car Gen3 SoCs. So, check for that SDHI variant and disable it when HS400 is about to be enabled. Reviewed-by: Yoshihiro Shimoda Signed-off-by: Wolfram Sang --- drivers/mmc/host/renesas_sdhi_core.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c index e5db96fd0a69..04f502345b91 100644 --- a/drivers/mmc/host/renesas_sdhi_core.c +++ b/drivers/mmc/host/renesas_sdhi_core.c @@ -348,6 +348,12 @@ static void renesas_sdhi_hs400_complete(struct tmio_mmc_host *host) sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DT2FF, priv->scc_tappos_hs400); + /* Gen3 can't do automatic tap correction with HS400, so disable it */ + if (sd_ctrl_read16(host, CTL_VERSION) == SDHI_VER_GEN3_SDMMC) + sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL, + ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN & + sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL)); + sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TMPPORT2, (SH_MOBILE_SDHI_SCC_TMPPORT2_HS400EN | SH_MOBILE_SDHI_SCC_TMPPORT2_HS400OSEL) | From patchwork Tue Dec 17 11:40:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfram Sang X-Patchwork-Id: 11297385 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1672513B6 for ; Tue, 17 Dec 2019 11:40:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E88C3207FF for ; Tue, 17 Dec 2019 11:40:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727384AbfLQLkq (ORCPT ); Tue, 17 Dec 2019 06:40:46 -0500 Received: from sauhun.de ([88.99.104.3]:52230 "EHLO pokefinder.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726383AbfLQLkq (ORCPT ); Tue, 17 Dec 2019 06:40:46 -0500 Received: from localhost (p54B330AA.dip0.t-ipconnect.de [84.179.48.170]) by pokefinder.org (Postfix) with ESMTPSA id 9789F2C2D9A; Tue, 17 Dec 2019 12:40:44 +0100 (CET) From: Wolfram Sang To: linux-mmc@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Yoshihiro Shimoda , Wolfram Sang Subject: [RFC PATCH v2 5/5] mmc: renesas_sdhi: cleanup SCC defines Date: Tue, 17 Dec 2019 12:40:34 +0100 Message-Id: <20191217114034.13290-6-wsa+renesas@sang-engineering.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191217114034.13290-1-wsa+renesas@sang-engineering.com> References: <20191217114034.13290-1-wsa+renesas@sang-engineering.com> MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Use increasing BIT numbers consistently and remove some superfluous comments. Signed-off-by: Wolfram Sang Reviewed-by: Yoshihiro Shimoda --- drivers/mmc/host/renesas_sdhi_core.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c index 04f502345b91..6a112454ca26 100644 --- a/drivers/mmc/host/renesas_sdhi_core.c +++ b/drivers/mmc/host/renesas_sdhi_core.c @@ -253,24 +253,22 @@ static int renesas_sdhi_start_signal_voltage_switch(struct mmc_host *mmc, #define SH_MOBILE_SDHI_SCC_SMPCMP 0x00C #define SH_MOBILE_SDHI_SCC_TMPPORT2 0x00E -/* Definitions for values the SH_MOBILE_SDHI_SCC_DTCNTL register */ #define SH_MOBILE_SDHI_SCC_DTCNTL_TAPEN BIT(0) #define SH_MOBILE_SDHI_SCC_DTCNTL_TAPNUM_SHIFT 16 #define SH_MOBILE_SDHI_SCC_DTCNTL_TAPNUM_MASK 0xff -/* Definitions for values the SH_MOBILE_SDHI_SCC_CKSEL register */ #define SH_MOBILE_SDHI_SCC_CKSEL_DTSEL BIT(0) -/* Definitions for values the SH_MOBILE_SDHI_SCC_RVSCNTL register */ + #define SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN BIT(0) -/* Definitions for values the SH_MOBILE_SDHI_SCC_RVSREQ register */ -#define SH_MOBILE_SDHI_SCC_RVSREQ_RVSERR BIT(2) -#define SH_MOBILE_SDHI_SCC_RVSREQ_REQTAPUP BIT(1) + #define SH_MOBILE_SDHI_SCC_RVSREQ_REQTAPDOWN BIT(0) -/* Definitions for values the SH_MOBILE_SDHI_SCC_SMPCMP register */ -#define SH_MOBILE_SDHI_SCC_SMPCMP_CMD_ERR (BIT(24) | BIT(8)) -#define SH_MOBILE_SDHI_SCC_SMPCMP_CMD_REQUP BIT(24) +#define SH_MOBILE_SDHI_SCC_RVSREQ_REQTAPUP BIT(1) +#define SH_MOBILE_SDHI_SCC_RVSREQ_RVSERR BIT(2) + #define SH_MOBILE_SDHI_SCC_SMPCMP_CMD_REQDOWN BIT(8) -/* Definitions for values the SH_MOBILE_SDHI_SCC_TMPPORT2 register */ +#define SH_MOBILE_SDHI_SCC_SMPCMP_CMD_REQUP BIT(24) +#define SH_MOBILE_SDHI_SCC_SMPCMP_CMD_ERR (BIT(8) | BIT(24)) + #define SH_MOBILE_SDHI_SCC_TMPPORT2_HS400OSEL BIT(4) #define SH_MOBILE_SDHI_SCC_TMPPORT2_HS400EN BIT(31)