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Thu, 19 Dec 2019 05:36:55 -0800 Received: from SCSQMBX10.ad.analog.com (10.77.17.5) by SCSQMBX11.ad.analog.com (10.77.17.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1779.2; Thu, 19 Dec 2019 05:36:53 -0800 Received: from zeus.spd.analog.com (10.64.82.11) by SCSQMBX10.ad.analog.com (10.77.17.5) with Microsoft SMTP Server id 15.1.1779.2 via Frontend Transport; Thu, 19 Dec 2019 05:36:52 -0800 Received: from ben-Latitude-E6540.ad.analog.com ([10.48.65.231]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id xBJDal8d000582; Thu, 19 Dec 2019 08:36:48 -0500 From: Beniamin Bia To: CC: , , , , , , , , , Stefan Popa , Beniamin Bia Subject: [PATCH 1/3] iio: frequency: adf4371: Create a power down/up function Date: Thu, 19 Dec 2019 15:37:53 +0200 Message-ID: <20191219133755.26109-1-beniamin.bia@analog.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:137.71.25.57;IPV:;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(376002)(346002)(136003)(396003)(39860400002)(199004)(189003)(2906002)(5660300002)(7696005)(356004)(6666004)(4326008)(186003)(44832011)(70206006)(316002)(107886003)(1076003)(336012)(26005)(36756003)(426003)(6916009)(7636002)(2616005)(8936002)(86362001)(8676002)(246002)(478600001)(70586007)(54906003);DIR:OUT;SFP:1101;SCL:1;SRVR:BN3PR03MB2243;H:nwd2mta2.analog.com;FPR:;SPF:Pass;LANG:en;PTR:nwd2mail11.analog.com;A:1;MX:1; X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: d125a391-7fa3-44ba-ceda-08d784888478 X-MS-TrafficTypeDiagnostic: BN3PR03MB2243: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6108; X-Forefront-PRVS: 0256C18696 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: GVx5dEyhPYT9lYR+GL+WtGDIdHJYh2k2GTVSPGu1YfJYfDjz7kCoFgVc/kh21cfvMfsRrLSLEA6bQBpiPLqRNj34DzVfA1QlySvOrrhS+coYOSUGumPt0RDA7+rU62hPV9I6ph26eB26KpTAkeR9ZbFgGlJVjp+Tj93vYyBTXRqWN1SXf3+D4fniUjPR55Qn/Ll1taFa0pvX1cnD0kQgeqXFpvV+YCh9lMiJCSI3J2N1YHR3IobksevRCV/TiypLQJOc4VJ/0Ex+yqfXYXf/Yls470XLvx07jy+XPeyo2j7Td5c3cBGDOeugIvf790txg2hmF6sR6brvNwj9ExFsHR/wTsgvLtUVcq2MAYQg3YXhUo/Z+O4IHLxeut7Jnnn5HfVFfunwyYruMgFVjY4uYFmXqDT8hjWnc09nDYti5mX32WiwLSv4O4hcnbcfvwed X-OriginatorOrg: analog.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Dec 2019 13:36:56.7001 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d125a391-7fa3-44ba-ceda-08d784888478 X-MS-Exchange-CrossTenant-Id: eaa689b4-8f87-40e0-9c6f-7228de4d754a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=eaa689b4-8f87-40e0-9c6f-7228de4d754a;Ip=[137.71.25.57];Helo=[nwd2mta2.analog.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN3PR03MB2243 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,18.0.572 definitions=2019-12-19_01:2019-12-17,2019-12-19 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 impostorscore=0 suspectscore=1 phishscore=0 adultscore=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 spamscore=0 mlxscore=0 priorityscore=1501 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1910280000 definitions=main-1912190117 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Stefan Popa This patch creates a helper function which powers down/up the PLL output channels. Currently, this function is called only once, but it will be needed in future patches to support multiple features. Signed-off-by: Stefan Popa Signed-off-by: Beniamin Bia --- drivers/iio/frequency/adf4371.c | 30 +++++++++++++++++++----------- 1 file changed, 19 insertions(+), 11 deletions(-) diff --git a/drivers/iio/frequency/adf4371.c b/drivers/iio/frequency/adf4371.c index ff82863cbf42..7d77ebdbea82 100644 --- a/drivers/iio/frequency/adf4371.c +++ b/drivers/iio/frequency/adf4371.c @@ -321,6 +321,24 @@ static int adf4371_set_freq(struct adf4371_state *st, unsigned long long freq, return regmap_write(st->regmap, ADF4371_REG(0x10), st->integer & 0xFF); } +static int adf4371_channel_power_down(struct adf4371_state *st, + unsigned int channel, bool power_down) +{ + unsigned int bit, readval, reg; + int ret; + + reg = adf4371_pwrdown_ch[channel].reg; + bit = adf4371_pwrdown_ch[channel].bit; + ret = regmap_read(st->regmap, reg, &readval); + if (ret < 0) + return ret; + + readval &= ~BIT(bit); + readval |= (!power_down << bit); + + return regmap_write(st->regmap, reg, readval); +} + static ssize_t adf4371_read(struct iio_dev *indio_dev, uintptr_t private, const struct iio_chan_spec *chan, @@ -372,7 +390,6 @@ static ssize_t adf4371_write(struct iio_dev *indio_dev, struct adf4371_state *st = iio_priv(indio_dev); unsigned long long freq; bool power_down; - unsigned int bit, readval, reg; int ret; mutex_lock(&st->lock); @@ -389,16 +406,7 @@ static ssize_t adf4371_write(struct iio_dev *indio_dev, if (ret) break; - reg = adf4371_pwrdown_ch[chan->channel].reg; - bit = adf4371_pwrdown_ch[chan->channel].bit; - ret = regmap_read(st->regmap, reg, &readval); - if (ret < 0) - break; - - readval &= ~BIT(bit); - readval |= (!power_down << bit); - - ret = regmap_write(st->regmap, reg, readval); + ret = adf4371_channel_power_down(st, chan->channel, power_down); break; default: ret = -EINVAL; From patchwork Thu Dec 19 13:37:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Beniamin Bia X-Patchwork-Id: 11303601 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4082B921 for ; Thu, 19 Dec 2019 13:37:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 13E4D20684 for ; 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Thu, 19 Dec 2019 08:37:00 -0500 Received: from ben-Latitude-E6540.ad.analog.com ([10.48.65.231]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id xBJDal8e000582; Thu, 19 Dec 2019 08:36:56 -0500 From: Beniamin Bia To: CC: , , , , , , , , , Stefan Popa , Beniamin Bia Subject: [PATCH 2/3] iio: frequency: adf4371: Introduce channel child nodes Date: Thu, 19 Dec 2019 15:37:54 +0200 Message-ID: <20191219133755.26109-2-beniamin.bia@analog.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191219133755.26109-1-beniamin.bia@analog.com> References: <20191219133755.26109-1-beniamin.bia@analog.com> MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:137.71.25.57;IPV:;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(376002)(346002)(136003)(396003)(39860400002)(189003)(199004)(8936002)(186003)(2616005)(4326008)(426003)(7696005)(26005)(8676002)(356004)(6916009)(54906003)(70206006)(2906002)(36756003)(70586007)(5660300002)(7636002)(478600001)(107886003)(86362001)(44832011)(246002)(336012)(316002)(1076003);DIR:OUT;SFP:1101;SCL:1;SRVR:BN8PR03MB4818;H:nwd2mta2.analog.com;FPR:;SPF:Pass;LANG:en;PTR:nwd2mail11.analog.com;MX:1;A:1; X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 40df0c69-bf90-4ece-265f-08d784888919 X-MS-TrafficTypeDiagnostic: BN8PR03MB4818: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7219; X-Forefront-PRVS: 0256C18696 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: RP6D742haRzSuNkx6VTPZwjwJS9sFwzFgg/Qqthm80zdaU1+JqSCBjsA6Vk7e0Tg8mTdPowLVGQB2vPLd3FC3jrmTGhroD9Ga/nB8+r+wJMug4d1oUdlOrfzZIi1ZWAGSyIF9QNPg9TsUsT5Eruw9CaqYw09kqLF/z0r6Fu8ErgpXWFAVwavz/MwPeDgGVJCRnFFwyKB/rW9KqjjOu17Z8FuczAD+FD5aiAVRc3aHAc1z99uQMPHETRfTL6QGT4sVyS8c2lfktSg7WXEKzYlKSjwMG5WvQeWMOKgTms/E8HZQDBPWwV/OASprT0gzJcsTTY341i6f5zJst5OR4U49+28z7OyEPZefBQjTCndeUvR8GuCQx+CQInpmCZ95yOL7NYl9yrkohB0A2J75Jm/DeSuSq7NNdK/iwY2gfbufeByDG4KUMVKqgtJ4295uYGe X-OriginatorOrg: analog.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Dec 2019 13:37:04.5599 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 40df0c69-bf90-4ece-265f-08d784888919 X-MS-Exchange-CrossTenant-Id: eaa689b4-8f87-40e0-9c6f-7228de4d754a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=eaa689b4-8f87-40e0-9c6f-7228de4d754a;Ip=[137.71.25.57];Helo=[nwd2mta2.analog.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR03MB4818 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,18.0.572 definitions=2019-12-19_01:2019-12-17,2019-12-19 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 adultscore=0 suspectscore=1 impostorscore=0 malwarescore=0 mlxlogscore=999 clxscore=1015 mlxscore=0 priorityscore=1501 bulkscore=0 spamscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1910280000 definitions=main-1912190117 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Stefan Popa The ADF4371/ADF4372 devices support individual configurations for the output channels. Each child node represents a channel for which "power-up-frequency" and "output-enable" optional properties are currently supported. If the "power-up-frequency" is specified for a channel, the driver checks if the value provided is in sync with the frequencies set on the other channels. This limitation is due to the fact that all the channel frequencies are derived from the VCO fundamental frequency. If the "output-enable" property is specified, then the channel will be enabled, otherwise, the driver will initialize the defaults (RF8x will be the only enabled channel). Signed-off-by: Stefan Popa Signed-off-by: Beniamin Bia --- drivers/iio/frequency/adf4371.c | 79 ++++++++++++++++++++++++++++++++- 1 file changed, 77 insertions(+), 2 deletions(-) diff --git a/drivers/iio/frequency/adf4371.c b/drivers/iio/frequency/adf4371.c index 7d77ebdbea82..e2a599b912e5 100644 --- a/drivers/iio/frequency/adf4371.c +++ b/drivers/iio/frequency/adf4371.c @@ -154,10 +154,16 @@ struct adf4371_chip_info { const struct iio_chan_spec *channels; }; +struct adf4371_channel_config { + bool enable; + unsigned long long freq; +}; + struct adf4371_state { struct spi_device *spi; struct regmap *regmap; struct clk *clkin; + struct adf4371_channel_config channel_cfg[4]; /* * Lock for accessing device registers. Some operations require * multiple consecutive R/W operations, during which the device @@ -175,6 +181,7 @@ struct adf4371_state { unsigned int mod2; unsigned int rf_div_sel; unsigned int ref_div_factor; + bool mute_till_lock_en; u8 buf[10] ____cacheline_aligned; }; @@ -480,6 +487,36 @@ static const struct iio_info adf4371_info = { .debugfs_reg_access = &adf4371_reg_access, }; +static int adf4371_channel_config(struct adf4371_state *st) +{ + unsigned long long rate; + int i, ret; + + for (i = 0; i < st->chip_info->num_channels; i++) { + if (st->channel_cfg[i].freq == 0) + continue; + + rate = adf4371_pll_fract_n_get_rate(st, i); + if (rate == 0) { + ret = adf4371_set_freq(st, st->channel_cfg[i].freq, i); + if (ret < 0) + return ret; + } else if (rate != st->channel_cfg[i].freq) { + dev_err(&st->spi->dev, + "Clock rate for chanel %d is not in sync\n", i); + return -EINVAL; + } + /* Powerup channel if the property was specified in the dt */ + if (st->channel_cfg[i].enable) { + ret = adf4371_channel_power_down(st, i, false); + if (ret < 0) + return ret; + } + } + + return 0; +} + static int adf4371_setup(struct adf4371_state *st) { unsigned int synth_timeout = 2, timeout = 1, vco_alc_timeout = 1; @@ -497,7 +534,7 @@ static int adf4371_setup(struct adf4371_state *st) return ret; /* Mute to Lock Detect */ - if (device_property_read_bool(&st->spi->dev, "adi,mute-till-lock-en")) { + if (st->mute_till_lock_en) { ret = regmap_update_bits(st->regmap, ADF4371_REG(0x25), ADF4371_MUTE_LD_MSK, ADF4371_MUTE_LD(1)); @@ -545,7 +582,11 @@ static int adf4371_setup(struct adf4371_state *st) st->buf[3] = synth_timeout; st->buf[4] = ADF4371_VCO_ALC_TOUT(vco_alc_timeout); - return regmap_bulk_write(st->regmap, ADF4371_REG(0x30), st->buf, 5); + ret = regmap_bulk_write(st->regmap, ADF4371_REG(0x30), st->buf, 5); + if (ret < 0) + return 0; + + return adf4371_channel_config(st); } static void adf4371_clk_disable(void *data) @@ -555,6 +596,36 @@ static void adf4371_clk_disable(void *data) clk_disable_unprepare(st->clkin); } +static int adf4371_parse_dt(struct adf4371_state *st) +{ + unsigned char num_channels; + unsigned int channel; + struct fwnode_handle *child; + int ret; + + if (device_property_read_bool(&st->spi->dev, "adi,mute-till-lock-en")) + st->mute_till_lock_en = true; + + num_channels = device_get_child_node_count(&st->spi->dev); + if (num_channels > st->chip_info->num_channels) + return -EINVAL; + + device_for_each_child_node(&st->spi->dev, child) { + ret = fwnode_property_read_u32(child, "reg", &channel); + if (ret) + return ret; + + ret = fwnode_property_present(child, "adi,output-enable"); + st->channel_cfg[channel].enable = ret; + + fwnode_property_read_u64(child, + "adi,power-up-frequency", + &st->channel_cfg[channel].freq); + } + + return 0; +} + static int adf4371_probe(struct spi_device *spi) { const struct spi_device_id *id = spi_get_device_id(spi); @@ -602,6 +673,10 @@ static int adf4371_probe(struct spi_device *spi) st->clkin_freq = clk_get_rate(st->clkin); + ret = adf4371_parse_dt(st); + if (ret < 0) + return ret; + ret = adf4371_setup(st); if (ret < 0) { dev_err(&spi->dev, "ADF4371 setup failed\n"); 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Thu, 19 Dec 2019 05:37:13 -0800 Received: from SCSQMBX11.ad.analog.com (10.77.17.10) by ASHBMBX8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1779.2; Thu, 19 Dec 2019 08:37:06 -0500 Received: from zeus.spd.analog.com (10.64.82.11) by SCSQMBX11.ad.analog.com (10.77.17.10) with Microsoft SMTP Server id 15.1.1779.2 via Frontend Transport; Thu, 19 Dec 2019 05:37:05 -0800 Received: from ben-Latitude-E6540.ad.analog.com ([10.48.65.231]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id xBJDal8f000582; Thu, 19 Dec 2019 08:37:01 -0500 From: Beniamin Bia To: CC: , , , , , , , , , Beniamin Bia Subject: [PATCH 3/3] dt-binding: iio: Add documentation for ADF4371 channel child notes Date: Thu, 19 Dec 2019 15:37:55 +0200 Message-ID: <20191219133755.26109-3-beniamin.bia@analog.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191219133755.26109-1-beniamin.bia@analog.com> References: <20191219133755.26109-1-beniamin.bia@analog.com> MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:137.71.25.57;IPV:;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(396003)(39860400002)(376002)(136003)(346002)(189003)(199004)(426003)(1076003)(70206006)(70586007)(6916009)(7636002)(7696005)(2616005)(478600001)(54906003)(44832011)(8676002)(6666004)(36756003)(26005)(356004)(336012)(107886003)(246002)(5660300002)(86362001)(8936002)(186003)(2906002)(316002)(4326008);DIR:OUT;SFP:1101;SCL:1;SRVR:CY4PR03MB2918;H:nwd2mta2.analog.com;FPR:;SPF:Pass;LANG:en;PTR:nwd2mail11.analog.com;MX:1;A:1; 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Signed-off-by: Beniamin Bia --- .../bindings/iio/frequency/adf4371.yaml | 63 +++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml index 7ec3ec94356b..5339c929e883 100644 --- a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml +++ b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml @@ -40,12 +40,48 @@ properties: output stage will shut down until the ADF4371/ADF4372 achieves lock as measured by the digital lock detect circuitry. + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + required: - compatible - reg - clocks - clock-names + patternProperties: + "^channel@[01]$": + type: object + description: Represents the external channels which are connected to the device. + + properties: + reg: + description: | + The channel number. It can have up to 3 channels on adf4372 + and 4 channels on adf4371, numbered from 0 to 3. + maxItems: 1 + + adi,output-enable: + description: | + If this property is specified, the output channel will be enabled. + If left empty, the driver will initialize the defaults (RF8x, channel 0 + will be the only one enabled). + maxItems: 1 + + adi,power-up-frequency: + description: | + Set the frequency after power up for the channel. If this property is + specified, it has to be in sync with the power up frequency set on the + other channels. This limitation is due to the fact that all the channel + frequencies are derived from the VCO fundamental frequency. + maxItems: 1 + + required: + - reg + examples: - | spi0 { @@ -55,9 +91,36 @@ examples: frequency@0 { compatible = "adi,adf4371"; reg = <0>; + + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <1000000>; clocks = <&adf4371_clkin>; clock-names = "clkin"; + + channel@0 { + reg = <0>; + adi,output-enable; + adi,power-up-frequency = /bits/ 64 <8000000000>; + }; + + channel@1 { + reg = <1>; + adi,output-enable; + }; + + channel@2 { + reg = <2>; + adi,output-enable; + adi,power-up-frequency = /bits/ 64 <16000000000>; + }; + + channel@3 { + reg = <3>; + adi,output-enable; + adi,power-up-frequency = /bits/ 64 <32000000000>; + }; }; }; ...