From patchwork Fri Dec 20 15:31:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 11305775 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6E7AB109A for ; Fri, 20 Dec 2019 15:31:54 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 487D82146E for ; Fri, 20 Dec 2019 15:31:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="bwL9V+ed" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 487D82146E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=microchip.com Authentication-Results: mail.kernel.org; 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envelope-from="Claudiu.Beznea@microchip.com"; x-sender="postmaster@email.microchip.com"; x-conformance=spf_only Authentication-Results: esa6.microchip.iphmx.com; dkim=none (message not signed) header.i=none; spf=Pass smtp.mailfrom=Claudiu.Beznea@microchip.com; spf=None smtp.helo=postmaster@email.microchip.com; dmarc=pass (p=none dis=none) d=microchip.com IronPort-SDR: Wg3i4VSbUNNg8ON2QzDN5HgF7VLcTihk2EjuRR8WYzKOdZ2IX3jB7Osl1EGbRE90AA1uFxH1kb jHXqRnSyvrODDkKRgk5zBL6u+svn320qgkNkdPse9JjaJb0VxLYpgEqBemBVtbTy4ws1i0ijVV qXyCiRhwXQhp9vFFZ34c8ZZ1eW553hF2FjVa6qJKDkn6oTZU4X2U0BaT04xYb1PkPDvWDRJeW1 jgQC2bZuTkyEQjy3GZVrnmU5ALch443zDA+qkDci2cIqw+EtzqM4xjRlm4ahvOeHMwjnlFis0v 2Dw= X-IronPort-AV: E=Sophos;i="5.69,336,1571727600"; d="scan'208";a="58490679" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 20 Dec 2019 08:31:26 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Fri, 20 Dec 2019 08:31:30 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.85.251) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.1713.5 via Frontend Transport; Fri, 20 Dec 2019 08:31:24 -0700 From: Claudiu Beznea To: , , Subject: [PATCH v2 1/2] power: reset: at91-poweroff: introduce struct shdwc_reg_config Date: Fri, 20 Dec 2019 17:31:17 +0200 Message-ID: <1576855878-13213-2-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1576855878-13213-1-git-send-email-claudiu.beznea@microchip.com> References: <1576855878-13213-1-git-send-email-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191220_073133_756013_68896E93 X-CRM114-Status: UNSURE ( 9.63 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [216.71.154.253 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Claudiu Beznea , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This driver uses AT91_PMC_MCKR in poweroff() function. But the SAM9X60's PMC versions maps AT91_PMC_MCKR functionality at different offset compared to the SAMA5D2's one. This patch prepares the field so that different AT91_PMC_MCKR's offsets to be introduced in struct reg_config so that proper offset to be used for AT91_PMC_MCKR based on compatible string. Signed-off-by: Claudiu Beznea Acked-by: Nicolas Ferre --- drivers/power/reset/at91-sama5d2_shdwc.c | 54 +++++++++++++++++++------------- 1 file changed, 32 insertions(+), 22 deletions(-) diff --git a/drivers/power/reset/at91-sama5d2_shdwc.c b/drivers/power/reset/at91-sama5d2_shdwc.c index 1c18f465a245..84806d20846b 100644 --- a/drivers/power/reset/at91-sama5d2_shdwc.c +++ b/drivers/power/reset/at91-sama5d2_shdwc.c @@ -66,7 +66,7 @@ #define SHDW_CFG_NOT_USED (32) -struct shdwc_config { +struct shdwc_reg_config { u8 wkup_pin_input; u8 mr_rtcwk_shift; u8 mr_rttwk_shift; @@ -74,8 +74,12 @@ struct shdwc_config { u8 sr_rttwk_shift; }; +struct reg_config { + struct shdwc_reg_config shdwc; +}; + struct shdwc { - const struct shdwc_config *cfg; + const struct reg_config *rcfg; struct clk *sclk; void __iomem *shdwc_base; void __iomem *mpddrc_base; @@ -95,6 +99,7 @@ static const unsigned long long sdwc_dbc_period[] = { static void __init at91_wakeup_status(struct platform_device *pdev) { struct shdwc *shdw = platform_get_drvdata(pdev); + const struct reg_config *rcfg = shdw->rcfg; u32 reg; char *reason = "unknown"; @@ -106,11 +111,11 @@ static void __init at91_wakeup_status(struct platform_device *pdev) if (!reg) return; - if (SHDW_WK_PIN(reg, shdw->cfg)) + if (SHDW_WK_PIN(reg, &rcfg->shdwc)) reason = "WKUP pin"; - else if (SHDW_RTCWK(reg, shdw->cfg)) + else if (SHDW_RTCWK(reg, &rcfg->shdwc)) reason = "RTC"; - else if (SHDW_RTTWK(reg, shdw->cfg)) + else if (SHDW_RTTWK(reg, &rcfg->shdwc)) reason = "RTT"; pr_info("AT91: Wake-Up source: %s\n", reason); @@ -215,6 +220,7 @@ static u32 at91_shdwc_get_wakeup_input(struct platform_device *pdev, static void at91_shdwc_dt_configure(struct platform_device *pdev) { struct shdwc *shdw = platform_get_drvdata(pdev); + const struct reg_config *rcfg = shdw->rcfg; struct device_node *np = pdev->dev.of_node; u32 mode = 0, tmp, input; @@ -227,10 +233,10 @@ static void at91_shdwc_dt_configure(struct platform_device *pdev) mode |= AT91_SHDW_WKUPDBC(at91_shdwc_debouncer_value(pdev, tmp)); if (of_property_read_bool(np, "atmel,wakeup-rtc-timer")) - mode |= SHDW_RTCWKEN(shdw->cfg); + mode |= SHDW_RTCWKEN(&rcfg->shdwc); if (of_property_read_bool(np, "atmel,wakeup-rtt-timer")) - mode |= SHDW_RTTWKEN(shdw->cfg); + mode |= SHDW_RTTWKEN(&rcfg->shdwc); dev_dbg(&pdev->dev, "%s: mode = %#x\n", __func__, mode); writel(mode, shdw->shdwc_base + AT91_SHDW_MR); @@ -239,30 +245,34 @@ static void at91_shdwc_dt_configure(struct platform_device *pdev) writel(input, shdw->shdwc_base + AT91_SHDW_WUIR); } -static const struct shdwc_config sama5d2_shdwc_config = { - .wkup_pin_input = 0, - .mr_rtcwk_shift = 17, - .mr_rttwk_shift = SHDW_CFG_NOT_USED, - .sr_rtcwk_shift = 5, - .sr_rttwk_shift = SHDW_CFG_NOT_USED, +static const struct reg_config sama5d2_reg_config = { + .shdwc = { + .wkup_pin_input = 0, + .mr_rtcwk_shift = 17, + .mr_rttwk_shift = SHDW_CFG_NOT_USED, + .sr_rtcwk_shift = 5, + .sr_rttwk_shift = SHDW_CFG_NOT_USED, + }, }; -static const struct shdwc_config sam9x60_shdwc_config = { - .wkup_pin_input = 0, - .mr_rtcwk_shift = 17, - .mr_rttwk_shift = 16, - .sr_rtcwk_shift = 5, - .sr_rttwk_shift = 4, +static const struct reg_config sam9x60_reg_config = { + .shdwc = { + .wkup_pin_input = 0, + .mr_rtcwk_shift = 17, + .mr_rttwk_shift = 16, + .sr_rtcwk_shift = 5, + .sr_rttwk_shift = 4, + }, }; static const struct of_device_id at91_shdwc_of_match[] = { { .compatible = "atmel,sama5d2-shdwc", - .data = &sama5d2_shdwc_config, + .data = &sama5d2_reg_config, }, { .compatible = "microchip,sam9x60-shdwc", - .data = &sam9x60_shdwc_config, + .data = &sam9x60_reg_config, }, { /*sentinel*/ } @@ -303,7 +313,7 @@ static int __init at91_shdwc_probe(struct platform_device *pdev) } match = of_match_node(at91_shdwc_of_match, pdev->dev.of_node); - at91_shdwc->cfg = match->data; + at91_shdwc->rcfg = match->data; at91_shdwc->sclk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(at91_shdwc->sclk)) From patchwork Fri Dec 20 15:31:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 11305777 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9097A109A for ; Fri, 20 Dec 2019 15:32:06 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5BB892146E for ; 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client-ip=198.175.253.82; receiver=esa4.microchip.iphmx.com; envelope-from="Claudiu.Beznea@microchip.com"; x-sender="postmaster@email.microchip.com"; x-conformance=spf_only Authentication-Results: esa4.microchip.iphmx.com; dkim=none (message not signed) header.i=none; spf=Pass smtp.mailfrom=Claudiu.Beznea@microchip.com; spf=None smtp.helo=postmaster@email.microchip.com; dmarc=pass (p=none dis=none) d=microchip.com IronPort-SDR: FMqnboapz717VG/leNhoE9yn4xZSFAiHG/eNhNSSb9k35zssPXeFlF/xbXYOo4G80TnxyTDhuc ROuEzEEuGHSk+pIO7KeTFRnLOZGtZ3X1KSgnJKGyt+Lddfi1LDwMNvgn2nIGhcyxRO+ZaRFlxq wnNOlWgAXvN8mNjIaXLgUjYm01GrUa6/MrAccsdqhtf/uCUrFarSqh+HR0aaFfVJEHoMKD/Kjp +54/ju4KmERvbWKu9PGYiopK0yrnGYEEcxb1chydpYEQyE6390k7Jxwk9CJf1M2YUn4e03F/y0 4do= X-IronPort-AV: E=Sophos;i="5.69,336,1571727600"; d="scan'208";a="59174669" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 20 Dec 2019 08:31:37 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Fri, 20 Dec 2019 08:31:28 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.85.251) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.1713.5 via Frontend Transport; Fri, 20 Dec 2019 08:31:26 -0700 From: Claudiu Beznea To: , , Subject: [PATCH v2 2/2] power: reset: at91-poweroff: use proper master clock register offset Date: Fri, 20 Dec 2019 17:31:18 +0200 Message-ID: <1576855878-13213-3-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1576855878-13213-1-git-send-email-claudiu.beznea@microchip.com> References: <1576855878-13213-1-git-send-email-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191220_073143_399074_8650568C X-CRM114-Status: UNSURE ( 9.41 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [68.232.154.123 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Claudiu Beznea , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org SAM9X60's PMC uses different offset for master clock register. Add a member of type struct pmc_reg_config in struct reg_config, fill it correspondingly for SAMA5D2 and SAM9X60 and use it in poweroff() function. Signed-off-by: Claudiu Beznea Acked-by: Nicolas Ferre --- drivers/power/reset/at91-sama5d2_shdwc.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/power/reset/at91-sama5d2_shdwc.c b/drivers/power/reset/at91-sama5d2_shdwc.c index 84806d20846b..2fe3a627cb53 100644 --- a/drivers/power/reset/at91-sama5d2_shdwc.c +++ b/drivers/power/reset/at91-sama5d2_shdwc.c @@ -74,8 +74,13 @@ struct shdwc_reg_config { u8 sr_rttwk_shift; }; +struct pmc_reg_config { + u8 mckr; +}; + struct reg_config { struct shdwc_reg_config shdwc; + struct pmc_reg_config pmc; }; struct shdwc { @@ -136,9 +141,9 @@ static void at91_poweroff(void) " str %1, [%0, #" __stringify(AT91_DDRSDRC_LPR) "]\n\t" /* Switch the master clock source to slow clock. */ - "1: ldr r6, [%4, #" __stringify(AT91_PMC_MCKR) "]\n\t" + "1: ldr r6, [%4, %5]\n\t" " bic r6, r6, #" __stringify(AT91_PMC_CSS) "\n\t" - " str r6, [%4, #" __stringify(AT91_PMC_MCKR) "]\n\t" + " str r6, [%4, %5]\n\t" /* Wait for clock switch. */ "2: ldr r6, [%4, #" __stringify(AT91_PMC_SR) "]\n\t" " tst r6, #" __stringify(AT91_PMC_MCKRDY) "\n\t" @@ -153,7 +158,8 @@ static void at91_poweroff(void) "r" cpu_to_le32(AT91_DDRSDRC_LPDDR2_PWOFF), "r" (at91_shdwc->shdwc_base), "r" cpu_to_le32(AT91_SHDW_KEY | AT91_SHDW_SHDW), - "r" (at91_shdwc->pmc_base) + "r" (at91_shdwc->pmc_base), + "r" (at91_shdwc->rcfg->pmc.mckr) : "r6"); } @@ -253,6 +259,9 @@ static const struct reg_config sama5d2_reg_config = { .sr_rtcwk_shift = 5, .sr_rttwk_shift = SHDW_CFG_NOT_USED, }, + .pmc = { + .mckr = 0x30, + }, }; static const struct reg_config sam9x60_reg_config = { @@ -263,6 +272,9 @@ static const struct reg_config sam9x60_reg_config = { .sr_rtcwk_shift = 5, .sr_rttwk_shift = 4, }, + .pmc = { + .mckr = 0x28, + }, }; static const struct of_device_id at91_shdwc_of_match[] = {