From patchwork Thu Jan 2 13:18:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11315691 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C22546C1 for ; Thu, 2 Jan 2020 13:19:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8C6C721734 for ; Thu, 2 Jan 2020 13:19:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="TcRziYlA" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728355AbgABNS6 (ORCPT ); Thu, 2 Jan 2020 08:18:58 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:59428 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728165AbgABNS5 (ORCPT ); Thu, 2 Jan 2020 08:18:57 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 002DIuC3035032; Thu, 2 Jan 2020 07:18:56 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1577971136; bh=qhSl6S2PokY7SWx/2+1z+svLz5SGmP3rjo4sDU+QUDY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=TcRziYlAt7A14X5VJUr52YBIrwPMnaufw6q4YIAprk5ljG7R+QTP1OOSDiGAXm9J0 NyRpNlIIMf9jz+hJfqPj/LXhQWqpnDcWrx8vMVd2WS/i9bYpTX6Hp2rU1/jLjZQo4K 7dBUlpfsmPyyrxpTb2xgNo3QwGbsZ5nL9uvyih4I= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 002DIuSO089671 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 2 Jan 2020 07:18:56 -0600 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Thu, 2 Jan 2020 07:18:55 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Thu, 2 Jan 2020 07:18:55 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 002DIp3S075354; Thu, 2 Jan 2020 07:18:53 -0600 From: Tero Kristo To: , , CC: , , , , Tero Kristo Subject: [PATCHv4 01/14] dt-bindings: remoteproc: Add OMAP remoteproc bindings Date: Thu, 2 Jan 2020 15:18:32 +0200 Message-ID: <20200102131845.12992-2-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102131845.12992-1-t-kristo@ti.com> References: <20200102131845.12992-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna Add the device tree bindings document for the IPU and DSP remote processor devices on OMAP4+ SoCs. Signed-off-by: Suman Anna [t-kristo@ti.com: converted to schema] Signed-off-by: Tero Kristo --- v4: added ti,bootreg-shift and ti,autosuspend-delay properties .../remoteproc/ti,omap-remoteproc.yaml | 329 ++++++++++++++++++ 1 file changed, 329 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/ti,omap-remoteproc.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/ti,omap-remoteproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,omap-remoteproc.yaml new file mode 100644 index 000000000000..f53d58efaae3 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/ti,omap-remoteproc.yaml @@ -0,0 +1,329 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: OMAP4+ Remoteproc Devices + +maintainers: + - Suman Anna + +description: + The OMAP family of SoCs usually have one or more slave processor sub-systems + that are used to offload some of the processor-intensive tasks, or to manage + other hardware accelerators, for achieving various system level goals. + + The processor cores in the sub-system are usually behind an IOMMU, and may + contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2 + caches, an Interrupt Controller, a Cache Controller etc. + + The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor + sub-system. The DSP processor sub-system can contain any of the TI's C64x, + C66x or C67x family of DSP cores as the main execution unit. The IPU processor + sub-system usually contains either a Dual-Core Cortex-M3 or Dual-Core + Cortex-M4 processors. + + Each remote processor sub-system is represented as a single DT node. Each node + has a number of required or optional properties that enable the OS running on + the host processor (MPU) to perform the device management of the remote + processor and to communicate with the remote processor. The various properties + can be classified as constant or variable. The constant properties are + dictated by the SoC and does not change from one board to another having the + same SoC. Examples of constant properties include 'iommus', 'reg'. The + variable properties are dictated by the system integration aspects such as + memory on the board, or configuration used within the corresponding firmware + image. Examples of variable properties include 'mboxes', 'memory-region', + 'timers', 'watchdog-timers' etc. + +properties: + compatible: + enum: + - ti,omap4-dsp + - ti,omap5-dsp + - ti,dra7-dsp + - ti,omap4-ipu + - ti,omap5-ipu + - ti,dra7-ipu + + iommus: + minItems: 1 + maxItems: 2 + description: | + phandles to OMAP IOMMU nodes, that need to be programmed + for this remote processor to access any external RAM memory or + other peripheral device address spaces. This property usually + has only a single phandle. Multiple phandles are used only in + cases where the sub-system has different ports for different + sub-modules within the processor sub-system (eg: DRA7 DSPs), + and need the same programming in both the MMUs. + + mboxes: + minItems: 1 + maxItems: 2 + description: | + OMAP Mailbox specifier denoting the sub-mailbox, to be used for + communication with the remote processor. The specifier format is + as per the bindings, + Documentation/devicetree/bindings/mailbox/omap-mailbox.txt + This property should match with the sub-mailbox node used in + the firmware image. + + clocks: + description: | + Main functional clock for the remote processor + + resets: + description: | + Reset handles for the remote processor + + memory-region: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + phandle to the reserved memory node to be associated + with the remoteproc device. The reserved memory node + can be a CMA memory node, and should be defined as + per the bindings, + Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt + + firmware-name: + description: | + Default name of the firmware to load to the remote processor. + +# Optional properties: +# -------------------- +# Some of these properties are mandatory on some SoCs, and some are optional +# depending on the configuration of the firmware image to be executed on the +# remote processor. The conditions are mentioned for each property. +# +# The following are the optional properties: + + reg: + description: | + Address space for any remoteproc memories present on + the SoC. Should contain an entry for each value in + 'reg-names'. These are mandatory for all DSP and IPU + processors that have them (OMAP4/OMAP5 DSPs do not have + any RAMs) + + reg-names: + description: | + Required names for each of the address spaces defined in + the 'reg' property. Should contain a string from among + the following names, each representing the corresponding + internal RAM memory region. + minItems: 1 + maxItems: 3 + items: + - const: l2ram + - const: l1pram + - const: l1dram + + ti,bootreg: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + Should be a pair of the phandle to the System Control + Configuration region that contains the boot address + register, and the register offset of the boot address + register within the System Control module. This property + is required for all the DSP instances on OMAP4, OMAP5 + and DRA7xx SoCs. + + ti,bootreg-shift: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Describes the bit position of the boot address field within + the ti,bootreg. + + ti,autosuspend-delay: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Custom autosuspend delay for the remoteproc in milliseconds. + + ti,timers: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + One or more phandles to OMAP DMTimer nodes, that serve + as System/Tick timers for the OS running on the remote + processors. This will usually be a single timer if the + processor sub-system is running in SMP mode, or one per + core in the processor sub-system. This can also be used + to reserve specific timers to be dedicated to the + remote processors. + + This property is mandatory on remote processors requiring + external tick wakeup, and to support Power Management + features. The timers to be used should match with the + timers used in the firmware image. + + ti,watchdog-timers: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + One or more phandles to OMAP DMTimer nodes, used to + serve as Watchdog timers for the processor cores. This + will usually be one per executing processor core, even + if the processor sub-system is running a SMP OS. + + The timers to be used should match with the watchdog + timers used in the firmware image. + +if: + properties: + compatible: + enum: + - ti,dra7-dsp +then: + properties: + reg: + minItems: 3 + maxItems: 3 + ti,bootreg: + minItems: 1 + maxItems: 1 + ti,bootreg-shift: + minItems: 1 + maxItems: 1 + +else: + if: + properties: + compatible: + enum: + - ti,omap4-ipu + - ti,omap5-ipu + - ti,dra7-ipu + then: + properties: + reg: + minItems: 1 + maxItems: 1 + + else: + properties: + reg: + maxItems: 0 + ti,bootreg: + minItems: 1 + maxItems: 1 + +required: + - compatible + - iommus + - mboxes + - memory-region + - clocks + - resets + - firmware-name + +additionalProperties: false + +examples: + - | + + //Example 1: OMAP4 DSP + + /* DSP Reserved Memory node */ + #include + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + + dsp_memory_region: dsp-memory@98000000 { + compatible = "shared-dma-pool"; + reg = <0x98000000 0x800000>; + reusable; + }; + }; + + /* DSP node */ + ocp { + dsp: dsp { + compatible = "ti,omap4-dsp"; + ti,bootreg = <&scm_conf 0x304>; + iommus = <&mmu_dsp>; + mboxes = <&mailbox &mbox_dsp>; + memory-region = <&dsp_memory_region>; + ti,timers = <&timer5>; + ti,watchdog-timers = <&timer6>; + clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>; + resets = <&prm_tesla 0>, <&prm_tesla 1>; + firmware-name = "omap4-dsp-fw.xe64T"; + }; + }; + + - |+ + + //Example 2: OMAP5 IPU + + /* IPU Reserved Memory node */ + #include + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + + ipu_memory_region: ipu-memory@95800000 { + compatible = "shared-dma-pool"; + reg = <0 0x95800000 0 0x3800000>; + reusable; + }; + }; + + /* IPU node */ + ocp { + #address-cells = <1>; + #size-cells = <1>; + + ipu: ipu@55020000 { + compatible = "ti,omap5-ipu"; + reg = <0x55020000 0x10000>; + reg-names = "l2ram"; + iommus = <&mmu_ipu>; + mboxes = <&mailbox &mbox_ipu>; + memory-region = <&ipu_memory_region>; + ti,timers = <&timer3>, <&timer4>; + ti,watchdog-timers = <&timer9>, <&timer11>; + clocks = <&ipu_clkctrl OMAP5_MMU_IPU_CLKCTRL 0>; + resets = <&prm_core 2>; + firmware-name = "omap5-ipu-fw.xem"; + }; + }; + + - |+ + + //Example 3: DRA7xx/AM57xx DSP + + /* DSP1 Reserved Memory node */ + #include + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + + dsp1_memory_region: dsp1-memory@99000000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x99000000 0x0 0x4000000>; + reusable; + }; + }; + + /* DSP1 node */ + ocp { + #address-cells = <1>; + #size-cells = <1>; + + dsp1: dsp@40800000 { + compatible = "ti,dra7-dsp"; + reg = <0x40800000 0x48000>, + <0x40e00000 0x8000>, + <0x40f00000 0x8000>; + reg-names = "l2ram", "l1pram", "l1dram"; + ti,bootreg = <&scm_conf 0x55c>; + iommus = <&mmu0_dsp1>, <&mmu1_dsp1>; + mboxes = <&mailbox5 &mbox_dsp1_ipc3x>; + memory-region = <&dsp1_memory_region>; + ti,timers = <&timer5>; + ti,watchdog-timers = <&timer10>; + resets = <&prm_dsp1 0>; + clocks = <&dsp1_clkctrl DRA7_DSP1_MMU0_DSP1_CLKCTRL 0>; + firmware-name = "dra7-dsp1-fw.xe66"; + }; + }; From patchwork Thu Jan 2 13:18:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11315745 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C7DFF138C for ; Thu, 2 Jan 2020 13:19:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9C97D215A4 for ; Thu, 2 Jan 2020 13:19:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="swvJfNcW" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728368AbgABNTD (ORCPT ); Thu, 2 Jan 2020 08:19:03 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:42488 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728165AbgABNTC (ORCPT ); Thu, 2 Jan 2020 08:19:02 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 002DIwXa071279; Thu, 2 Jan 2020 07:18:58 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1577971138; bh=buqTIffKzm9v2GB9WD5qQsdHYJAgQKjnOQry0ATMLJY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=swvJfNcWVZ3+n1lIEwBjEbhQkWavcaOedgbz3DowDq/HGhbMnvARKODFB+iDctTSp GggDn9qkBA4Rb31yOOsLAQXvUJCsbRFZf2QfgZOf/VMIhBDXPgM9MrmI1ZZ4nL6I5m +p0YnbmCXSbGr9/TspixTelUbdxarDMbObi4yL9M= Received: from DLEE111.ent.ti.com (dlee111.ent.ti.com [157.170.170.22]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 002DIwqW069050 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 2 Jan 2020 07:18:58 -0600 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Thu, 2 Jan 2020 07:18:57 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Thu, 2 Jan 2020 07:18:57 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 002DIp3T075354; Thu, 2 Jan 2020 07:18:56 -0600 From: Tero Kristo To: , , CC: , , , , Tony Lindgren , Tero Kristo Subject: [PATCHv4 02/14] remoteproc/omap: Add device tree support Date: Thu, 2 Jan 2020 15:18:33 +0200 Message-ID: <20200102131845.12992-3-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102131845.12992-1-t-kristo@ti.com> References: <20200102131845.12992-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna OMAP4+ SoCs support device tree boot only. The OMAP remoteproc driver is enhanced to support remoteproc devices created through Device Tree, support for legacy platform devices has been deprecated. The current DT support handles the IPU and DSP processor subsystems on OMAP4 and OMAP5 SoCs. The OMAP remoteproc driver relies on the ti-sysc, reset, and syscon layers for performing clock, reset and boot vector management (DSP remoteprocs only) of the devices, but some of these are limited only to the machine-specific layers in arch/arm. The dependency against control module API for boot vector management of the DSP remoteprocs has now been removed with added logic to parse the boot register from the DT node and program it appropriately directly within the driver. The OMAP remoteproc driver expects the firmware names to be provided via device tree entries (firmware-name.) These are used to load the proper firmware during boot of the remote processor. Cc: Tony Lindgren Signed-off-by: Suman Anna [t-kristo@ti.com: converted to use ti-sysc framework] Signed-off-by: Tero Kristo --- v4: - error handling improvements - dropped has_bootreg from platform data (instead parsed from DT) drivers/remoteproc/omap_remoteproc.c | 177 ++++++++++++++++++++++++--- 1 file changed, 160 insertions(+), 17 deletions(-) diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 6398194075aa..fb4902e4dacf 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -2,7 +2,7 @@ /* * OMAP Remote Processor driver * - * Copyright (C) 2011 Texas Instruments, Inc. + * Copyright (C) 2011-2020 Texas Instruments Incorporated - http://www.ti.com/ * Copyright (C) 2011 Google, Inc. * * Ohad Ben-Cohen @@ -16,27 +16,51 @@ #include #include #include +#include #include #include #include #include #include - -#include +#include +#include +#include #include "omap_remoteproc.h" #include "remoteproc_internal.h" +/** + * struct omap_rproc_boot_data - boot data structure for the DSP omap rprocs + * @syscon: regmap handle for the system control configuration module + * @boot_reg: boot register offset within the @syscon regmap + */ +struct omap_rproc_boot_data { + struct regmap *syscon; + unsigned int boot_reg; +}; + /** * struct omap_rproc - omap remote processor state * @mbox: mailbox channel handle * @client: mailbox client to request the mailbox channel + * @boot_data: boot data structure for setting processor boot address * @rproc: rproc handle + * @reset: reset handle */ struct omap_rproc { struct mbox_chan *mbox; struct mbox_client client; + struct omap_rproc_boot_data *boot_data; struct rproc *rproc; + struct reset_control *reset; +}; + +/** + * struct omap_rproc_dev_data - device data for the omap remote processor + * @device_name: device name of the remote processor + */ +struct omap_rproc_dev_data { + const char *device_name; }; /** @@ -92,6 +116,21 @@ static void omap_rproc_kick(struct rproc *rproc, int vqid) ret); } +/** + * omap_rproc_write_dsp_boot_addr - set boot address for a DSP remote processor + * @rproc: handle of a remote processor + * + * Set boot address for a supported DSP remote processor. + */ +static void omap_rproc_write_dsp_boot_addr(struct rproc *rproc) +{ + struct omap_rproc *oproc = rproc->priv; + struct omap_rproc_boot_data *bdata = oproc->boot_data; + u32 offset = bdata->boot_reg; + + regmap_write(bdata->syscon, offset, rproc->bootaddr); +} + /* * Power up the remote processor. * @@ -103,13 +142,11 @@ static int omap_rproc_start(struct rproc *rproc) { struct omap_rproc *oproc = rproc->priv; struct device *dev = rproc->dev.parent; - struct platform_device *pdev = to_platform_device(dev); - struct omap_rproc_pdata *pdata = pdev->dev.platform_data; int ret; struct mbox_client *client = &oproc->client; - if (pdata->set_bootaddr) - pdata->set_bootaddr(rproc->bootaddr); + if (oproc->boot_data) + omap_rproc_write_dsp_boot_addr(rproc); client->dev = dev; client->tx_done = NULL; @@ -117,7 +154,7 @@ static int omap_rproc_start(struct rproc *rproc) client->tx_block = false; client->knows_txdone = false; - oproc->mbox = omap_mbox_request_channel(client, pdata->mbox_name); + oproc->mbox = mbox_request_channel(client, 0); if (IS_ERR(oproc->mbox)) { ret = -EBUSY; dev_err(dev, "mbox_request_channel failed: %ld\n", @@ -138,9 +175,9 @@ static int omap_rproc_start(struct rproc *rproc) goto put_mbox; } - ret = pdata->device_enable(pdev); + ret = reset_control_deassert(oproc->reset); if (ret) { - dev_err(dev, "omap_device_enable failed: %d\n", ret); + dev_err(dev, "reset control deassert failed: %d\n", ret); goto put_mbox; } @@ -154,13 +191,10 @@ static int omap_rproc_start(struct rproc *rproc) /* power off the remote processor */ static int omap_rproc_stop(struct rproc *rproc) { - struct device *dev = rproc->dev.parent; - struct platform_device *pdev = to_platform_device(dev); - struct omap_rproc_pdata *pdata = pdev->dev.platform_data; struct omap_rproc *oproc = rproc->priv; int ret; - ret = pdata->device_shutdown(pdev); + ret = reset_control_assert(oproc->reset); if (ret) return ret; @@ -175,12 +209,115 @@ static const struct rproc_ops omap_rproc_ops = { .kick = omap_rproc_kick, }; +static const struct omap_rproc_dev_data omap4_dsp_dev_data = { + .device_name = "dsp", +}; + +static const struct omap_rproc_dev_data omap4_ipu_dev_data = { + .device_name = "ipu", +}; + +static const struct omap_rproc_dev_data omap5_dsp_dev_data = { + .device_name = "dsp", +}; + +static const struct omap_rproc_dev_data omap5_ipu_dev_data = { + .device_name = "ipu", +}; + +static const struct of_device_id omap_rproc_of_match[] = { + { + .compatible = "ti,omap4-dsp", + .data = &omap4_dsp_dev_data, + }, + { + .compatible = "ti,omap4-ipu", + .data = &omap4_ipu_dev_data, + }, + { + .compatible = "ti,omap5-dsp", + .data = &omap5_dsp_dev_data, + }, + { + .compatible = "ti,omap5-ipu", + .data = &omap5_ipu_dev_data, + }, + { + /* end */ + }, +}; +MODULE_DEVICE_TABLE(of, omap_rproc_of_match); + +static const char *omap_rproc_get_firmware(struct platform_device *pdev) +{ + const char *fw_name; + int ret; + + ret = of_property_read_string(pdev->dev.of_node, "firmware-name", + &fw_name); + if (ret) + return ERR_PTR(ret); + + return fw_name; +} + +static int omap_rproc_get_boot_data(struct platform_device *pdev, + struct rproc *rproc) +{ + struct device_node *np = pdev->dev.of_node; + struct omap_rproc *oproc = rproc->priv; + const struct omap_rproc_dev_data *data; + int ret; + + data = of_device_get_match_data(&pdev->dev); + if (!data) + return -ENODEV; + + if (!of_property_read_bool(np, "ti,bootreg")) + return 0; + + oproc->boot_data = devm_kzalloc(&pdev->dev, sizeof(*oproc->boot_data), + GFP_KERNEL); + if (!oproc->boot_data) + return -ENOMEM; + + oproc->boot_data->syscon = + syscon_regmap_lookup_by_phandle(np, "ti,bootreg"); + if (IS_ERR(oproc->boot_data->syscon)) { + ret = PTR_ERR(oproc->boot_data->syscon); + return ret; + } + + if (of_property_read_u32_index(np, "ti,bootreg", 1, + &oproc->boot_data->boot_reg)) { + dev_err(&pdev->dev, "couldn't get the boot register\n"); + return -EINVAL; + } + + return 0; +} + static int omap_rproc_probe(struct platform_device *pdev) { - struct omap_rproc_pdata *pdata = pdev->dev.platform_data; + struct device_node *np = pdev->dev.of_node; struct omap_rproc *oproc; struct rproc *rproc; + const char *firmware; int ret; + struct reset_control *reset; + + if (!np) { + dev_err(&pdev->dev, "only DT-based devices are supported\n"); + return -ENODEV; + } + + reset = devm_reset_control_array_get_exclusive(&pdev->dev); + if (IS_ERR(reset)) + return PTR_ERR(reset); + + firmware = omap_rproc_get_firmware(pdev); + if (IS_ERR(firmware)) + return PTR_ERR(firmware); ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); if (ret) { @@ -188,16 +325,21 @@ static int omap_rproc_probe(struct platform_device *pdev) return ret; } - rproc = rproc_alloc(&pdev->dev, pdata->name, &omap_rproc_ops, - pdata->firmware, sizeof(*oproc)); + rproc = rproc_alloc(&pdev->dev, dev_name(&pdev->dev), &omap_rproc_ops, + firmware, sizeof(*oproc)); if (!rproc) return -ENOMEM; oproc = rproc->priv; oproc->rproc = rproc; + oproc->reset = reset; /* All existing OMAP IPU and DSP processors have an MMU */ rproc->has_iommu = true; + ret = omap_rproc_get_boot_data(pdev, rproc); + if (ret) + goto free_rproc; + platform_set_drvdata(pdev, rproc); ret = rproc_add(rproc); @@ -226,6 +368,7 @@ static struct platform_driver omap_rproc_driver = { .remove = omap_rproc_remove, .driver = { .name = "omap-rproc", + .of_match_table = omap_rproc_of_match, }, }; From patchwork Thu Jan 2 13:18:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11315743 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1D132138C for ; Thu, 2 Jan 2020 13:19:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EFC83217F4 for ; Thu, 2 Jan 2020 13:19:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="beXjmNeu" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728372AbgABNTD (ORCPT ); Thu, 2 Jan 2020 08:19:03 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:42496 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728322AbgABNTC (ORCPT ); Thu, 2 Jan 2020 08:19:02 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 002DJ1Tv071298; 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Thu, 2 Jan 2020 07:19:00 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 002DIp3U075354; Thu, 2 Jan 2020 07:18:58 -0600 From: Tero Kristo To: , , CC: , , , , Tero Kristo Subject: [PATCHv4 03/14] remoteproc/omap: Add a sanity check for DSP boot address alignment Date: Thu, 2 Jan 2020 15:18:34 +0200 Message-ID: <20200102131845.12992-4-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102131845.12992-1-t-kristo@ti.com> References: <20200102131845.12992-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna The DSP remote processors on OMAP SoCs require a boot register to be programmed with a boot address, and this boot address needs to be on a 1KB boundary. The current code is simply masking the boot address appropriately without performing any sanity checks before releasing the resets. An unaligned boot address results in an undefined execution behavior and can result in various bus errors like MMU Faults or L3 NoC errors. Such errors are hard to debug and can be easily avoided by adding a sanity check for the alignment before booting a DSP remote processor. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo Reviewed-by: Bjorn Andersson --- drivers/remoteproc/omap_remoteproc.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index fb4902e4dacf..557c439571c1 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -122,13 +122,22 @@ static void omap_rproc_kick(struct rproc *rproc, int vqid) * * Set boot address for a supported DSP remote processor. */ -static void omap_rproc_write_dsp_boot_addr(struct rproc *rproc) +static int omap_rproc_write_dsp_boot_addr(struct rproc *rproc) { + struct device *dev = rproc->dev.parent; struct omap_rproc *oproc = rproc->priv; struct omap_rproc_boot_data *bdata = oproc->boot_data; u32 offset = bdata->boot_reg; + if (rproc->bootaddr & (SZ_1K - 1)) { + dev_err(dev, "invalid boot address 0x%x, must be aligned on a 1KB boundary\n", + rproc->bootaddr); + return -EINVAL; + } + regmap_write(bdata->syscon, offset, rproc->bootaddr); + + return 0; } /* @@ -145,8 +154,11 @@ static int omap_rproc_start(struct rproc *rproc) int ret; struct mbox_client *client = &oproc->client; - if (oproc->boot_data) - omap_rproc_write_dsp_boot_addr(rproc); + if (oproc->boot_data) { + ret = omap_rproc_write_dsp_boot_addr(rproc); + if (ret) + return ret; + } client->dev = dev; client->tx_done = NULL; From patchwork Thu Jan 2 13:18:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11315741 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 94CFC1398 for ; Thu, 2 Jan 2020 13:19:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 73B37215A4 for ; Thu, 2 Jan 2020 13:19:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="qNeVQ7cQ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728381AbgABNTE (ORCPT ); Thu, 2 Jan 2020 08:19:04 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:36494 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728369AbgABNTE (ORCPT ); Thu, 2 Jan 2020 08:19:04 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 002DJ28Z020804; Thu, 2 Jan 2020 07:19:02 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1577971142; bh=ISRCmp1pNlWjfpjYRchA57+gaPN7NgeGPA5XLVjeSr0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=qNeVQ7cQasZZaoSd+2LPqSOh1lEUTFBAJM7xleoIGIkNBHV1m6Q6TY6s5GttvYV2M DqrRnI0WhMCfpJKBCPOLuUXHIFyxH8BeW1oSrfFWEsAxi5qR/UEpt5ulYyhxPR+RZy gJWaufalv1S5P/XmNNZ51ASAo2BwDffvsZjDEAkk= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 002DJ2gF089881 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 2 Jan 2020 07:19:02 -0600 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Thu, 2 Jan 2020 07:19:02 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Thu, 2 Jan 2020 07:19:02 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 002DIp3V075354; Thu, 2 Jan 2020 07:19:00 -0600 From: Tero Kristo To: , , CC: , , , , Tero Kristo Subject: [PATCHv4 04/14] remoteproc/omap: Add support to parse internal memories from DT Date: Thu, 2 Jan 2020 15:18:35 +0200 Message-ID: <20200102131845.12992-5-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102131845.12992-1-t-kristo@ti.com> References: <20200102131845.12992-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna The OMAP remoteproc driver has been enhanced to parse and store the kernel mappings for different internal RAM memories that may be present within each remote processor IP subsystem. Different devices have varying memories present on current SoCs. The current support handles the L2RAM for all IPU devices on OMAP4+ SoCs. The DSPs on OMAP4/OMAP5 only have Unicaches and do not have any L1 or L2 RAM memories. IPUs are expected to have the L2RAM at a fixed device address of 0x20000000, based on the current limitations on Attribute MMU configurations. NOTE: The current logic doesn't handle the parsing of memories for DRA7 remoteproc devices, and will be added alongside the DRA7 support. Signed-off-by: Suman Anna [t-kristo: converted to parse mem names / device addresses from pdata] Signed-off-by: Tero Kristo --- v4: - moved device data mem definitions under single struct drivers/remoteproc/omap_remoteproc.c | 89 ++++++++++++++++++++++++++++ 1 file changed, 89 insertions(+) diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 557c439571c1..e429b2296d7a 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -39,11 +39,27 @@ struct omap_rproc_boot_data { unsigned int boot_reg; }; +/** + * struct omap_rproc_mem - internal memory structure + * @cpu_addr: MPU virtual address of the memory region + * @bus_addr: bus address used to access the memory region + * @dev_addr: device address of the memory region from DSP view + * @size: size of the memory region + */ +struct omap_rproc_mem { + void __iomem *cpu_addr; + phys_addr_t bus_addr; + u32 dev_addr; + size_t size; +}; + /** * struct omap_rproc - omap remote processor state * @mbox: mailbox channel handle * @client: mailbox client to request the mailbox channel * @boot_data: boot data structure for setting processor boot address + * @mem: internal memory regions data + * @num_mems: number of internal memory regions * @rproc: rproc handle * @reset: reset handle */ @@ -51,16 +67,30 @@ struct omap_rproc { struct mbox_chan *mbox; struct mbox_client client; struct omap_rproc_boot_data *boot_data; + struct omap_rproc_mem *mem; + int num_mems; struct rproc *rproc; struct reset_control *reset; }; +/** + * struct omap_rproc_mem_data - memory definitions for an omap remote processor + * @mem_name: name for this memory entry + * @dev_addr: device address for the memory entry + */ +struct omap_rproc_mem_data { + const char *name; + const u32 dev_addr; +}; + /** * struct omap_rproc_dev_data - device data for the omap remote processor * @device_name: device name of the remote processor + * @mems: memory definitions for this remote processor */ struct omap_rproc_dev_data { const char *device_name; + const struct omap_rproc_mem_data *mems; }; /** @@ -221,12 +251,18 @@ static const struct rproc_ops omap_rproc_ops = { .kick = omap_rproc_kick, }; +static const struct omap_rproc_mem_data ipu_mems[] = { + { .name = "l2ram", .dev_addr = 0x20000000 }, + { }, +}; + static const struct omap_rproc_dev_data omap4_dsp_dev_data = { .device_name = "dsp", }; static const struct omap_rproc_dev_data omap4_ipu_dev_data = { .device_name = "ipu", + .mems = ipu_mems, }; static const struct omap_rproc_dev_data omap5_dsp_dev_data = { @@ -235,6 +271,7 @@ static const struct omap_rproc_dev_data omap5_dsp_dev_data = { static const struct omap_rproc_dev_data omap5_ipu_dev_data = { .device_name = "ipu", + .mems = ipu_mems, }; static const struct of_device_id omap_rproc_of_match[] = { @@ -309,6 +346,54 @@ static int omap_rproc_get_boot_data(struct platform_device *pdev, return 0; } +static int omap_rproc_of_get_internal_memories(struct platform_device *pdev, + struct rproc *rproc) +{ + struct omap_rproc *oproc = rproc->priv; + struct device *dev = &pdev->dev; + const struct omap_rproc_dev_data *data; + struct resource *res; + int num_mems; + int i; + + data = of_device_get_match_data(&pdev->dev); + if (!data) + return -ENODEV; + + if (!data->mems) + return 0; + + for (num_mems = 0; data->mems[num_mems].name; num_mems++) + ; + + oproc->mem = devm_kcalloc(dev, num_mems, sizeof(*oproc->mem), + GFP_KERNEL); + if (!oproc->mem) + return -ENOMEM; + + for (i = 0; i < num_mems; i++) { + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, + data->mems[i].name); + oproc->mem[i].cpu_addr = devm_ioremap_resource(dev, res); + if (IS_ERR(oproc->mem[i].cpu_addr)) { + dev_err(dev, "failed to parse and map %s memory\n", + data->mems[i].name); + return PTR_ERR(oproc->mem[i].cpu_addr); + } + oproc->mem[i].bus_addr = res->start; + oproc->mem[i].dev_addr = data->mems[i].dev_addr; + oproc->mem[i].size = resource_size(res); + + dev_dbg(dev, "memory %8s: bus addr %pa size 0x%x va %p da 0x%x\n", + data->mems[i].name, &oproc->mem[i].bus_addr, + oproc->mem[i].size, oproc->mem[i].cpu_addr, + oproc->mem[i].dev_addr); + } + oproc->num_mems = num_mems; + + return 0; +} + static int omap_rproc_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; @@ -348,6 +433,10 @@ static int omap_rproc_probe(struct platform_device *pdev) /* All existing OMAP IPU and DSP processors have an MMU */ rproc->has_iommu = true; + ret = omap_rproc_of_get_internal_memories(pdev, rproc); + if (ret) + goto free_rproc; + ret = omap_rproc_get_boot_data(pdev, rproc); if (ret) goto free_rproc; From patchwork Thu Jan 2 13:18:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11315735 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0E690138C for ; Thu, 2 Jan 2020 13:19:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E1194215A4 for ; Thu, 2 Jan 2020 13:19:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="hLLJcsjC" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728413AbgABNTK (ORCPT ); Thu, 2 Jan 2020 08:19:10 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:59462 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728330AbgABNTK (ORCPT ); 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Thu, 2 Jan 2020 07:19:04 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 002DIp3W075354; Thu, 2 Jan 2020 07:19:02 -0600 From: Tero Kristo To: , , CC: , , , , Tero Kristo Subject: [PATCHv4 05/14] remoteproc/omap: Add the rproc ops .da_to_va() implementation Date: Thu, 2 Jan 2020 15:18:36 +0200 Message-ID: <20200102131845.12992-6-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102131845.12992-1-t-kristo@ti.com> References: <20200102131845.12992-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna An implementation for the rproc ops .da_to_va() has been added that provides the address translation between device addresses to kernel virtual addresses for internal RAMs present on that particular remote processor device. The implementation provides the translations based on the addresses parsed and stored during the probe. This ops gets invoked by the exported rproc_da_to_va() function and allows the remoteproc core's ELF loader to be able to load program data directly into the internal memories. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- v4: - some whitespace fixes drivers/remoteproc/omap_remoteproc.c | 39 ++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index e429b2296d7a..9ca337f18ac2 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -245,10 +245,49 @@ static int omap_rproc_stop(struct rproc *rproc) return 0; } +/** + * omap_rproc_da_to_va() - internal memory translation helper + * @rproc: remote processor to apply the address translation for + * @da: device address to translate + * @len: length of the memory buffer + * + * Custom function implementing the rproc .da_to_va ops to provide address + * translation (device address to kernel virtual address) for internal RAMs + * present in a DSP or IPU device). The translated addresses can be used + * either by the remoteproc core for loading, or by any rpmsg bus drivers. + * Returns the translated virtual address in kernel memory space, or NULL + * in failure. + */ +static void *omap_rproc_da_to_va(struct rproc *rproc, u64 da, int len) +{ + struct omap_rproc *oproc = rproc->priv; + int i; + u32 offset; + + if (len <= 0) + return NULL; + + if (!oproc->num_mems) + return NULL; + + for (i = 0; i < oproc->num_mems; i++) { + if (da >= oproc->mem[i].dev_addr && da + len <= + oproc->mem[i].dev_addr + oproc->mem[i].size) { + offset = da - oproc->mem[i].dev_addr; + /* __force to make sparse happy with type conversion */ + return (__force void *)(oproc->mem[i].cpu_addr + + offset); + } + } + + return NULL; +} + static const struct rproc_ops omap_rproc_ops = { .start = omap_rproc_start, .stop = omap_rproc_stop, .kick = omap_rproc_kick, + .da_to_va = omap_rproc_da_to_va, }; static const struct omap_rproc_mem_data ipu_mems[] = { From patchwork Thu Jan 2 13:18:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11315737 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6415F138C for ; Thu, 2 Jan 2020 13:19:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 42E68215A4 for ; Thu, 2 Jan 2020 13:19:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="JV3JWnqq" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728402AbgABNTJ (ORCPT ); Thu, 2 Jan 2020 08:19:09 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:42516 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728398AbgABNTI (ORCPT ); Thu, 2 Jan 2020 08:19:08 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 002DJ7vL071423; Thu, 2 Jan 2020 07:19:07 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1577971147; bh=mEbH+4b+oEMVJDIZSWRNmHp3wFNUhyd0VWS7r1xzf8c=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=JV3JWnqq9qeaCsiN4G7zsNCJgrUAKlcBrYJpe2keD6E9TbAA1Dfv6BvSVLxfAwIwW CTo8wpz1Gm28pFu7y69+hQJeVL+PZR4UJHR7eXv11S5EUrh7uz2sLfbsKz3XaEEVdn 2PVl5I99h0XG6AHpb7XSWWOkwotrtZ4hIsSAKqPk= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 002DJ7dU035256 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 2 Jan 2020 07:19:07 -0600 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Thu, 2 Jan 2020 07:19:06 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Thu, 2 Jan 2020 07:19:06 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 002DIp3X075354; Thu, 2 Jan 2020 07:19:04 -0600 From: Tero Kristo To: , , CC: , , , , Tero Kristo Subject: [PATCHv4 06/14] remoteproc/omap: Initialize and assign reserved memory node Date: Thu, 2 Jan 2020 15:18:37 +0200 Message-ID: <20200102131845.12992-7-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102131845.12992-1-t-kristo@ti.com> References: <20200102131845.12992-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna The reserved memory nodes are not assigned to platform devices by default in the driver core to avoid the lookup for every platform device and incur a penalty as the real users are expected to be only a few devices. OMAP remoteproc devices fall into the above category and the OMAP remoteproc driver _requires_ specific CMA pools to be assigned for each device at the moment to align on the location of the vrings and vring buffers in the RTOS-side firmware images. So, use the of_reserved_mem_device_init/release() API appropriately to assign the corresponding reserved memory region to the OMAP remoteproc device. Note that only one region per device is allowed by the framework. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo Reviewed-by: Bjorn Andersson --- drivers/remoteproc/omap_remoteproc.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 9ca337f18ac2..8a6dd742a8b1 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -480,14 +481,22 @@ static int omap_rproc_probe(struct platform_device *pdev) if (ret) goto free_rproc; + ret = of_reserved_mem_device_init(&pdev->dev); + if (ret) { + dev_err(&pdev->dev, "device does not have specific CMA pool\n"); + goto free_rproc; + } + platform_set_drvdata(pdev, rproc); ret = rproc_add(rproc); if (ret) - goto free_rproc; + goto release_mem; return 0; +release_mem: + of_reserved_mem_device_release(&pdev->dev); free_rproc: rproc_free(rproc); return ret; @@ -499,6 +508,7 @@ static int omap_rproc_remove(struct platform_device *pdev) rproc_del(rproc); rproc_free(rproc); + of_reserved_mem_device_release(&pdev->dev); return 0; } From patchwork Thu Jan 2 13:18:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11315701 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A61766C1 for ; Thu, 2 Jan 2020 13:19:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7AC7E21734 for ; Thu, 2 Jan 2020 13:19:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="hgn5R3n1" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728419AbgABNTL (ORCPT ); Thu, 2 Jan 2020 08:19:11 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:42520 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728406AbgABNTK (ORCPT ); Thu, 2 Jan 2020 08:19:10 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 002DJ9D5071429; Thu, 2 Jan 2020 07:19:09 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1577971149; bh=0uniqSaMVaJeNpAvtB5rdpJz45K/HRoIkAwpaRhaGa8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=hgn5R3n1rvyO6y5fbk77sGFWU4beu1MgcejZwbjVxHTPEkU7WE/6r/g1Za+m2Y1UC xgT969aK3Fglj1+ODlp/aEv2jyqLzhnV0jlL2W11CJ9t1Tf1cBAPiWhBfOfRVnSgUS ha/4kptFugb+IJ+8J6NsF1U+rdR8+m+FM44AbV3E= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 002DJ9F2073759; Thu, 2 Jan 2020 07:19:09 -0600 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Thu, 2 Jan 2020 07:19:09 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Thu, 2 Jan 2020 07:19:08 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 002DIp3Y075354; Thu, 2 Jan 2020 07:19:07 -0600 From: Tero Kristo To: , , CC: , , , , Tero Kristo Subject: [PATCHv4 07/14] remoteproc/omap: Add support for DRA7xx remote processors Date: Thu, 2 Jan 2020 15:18:38 +0200 Message-ID: <20200102131845.12992-8-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102131845.12992-1-t-kristo@ti.com> References: <20200102131845.12992-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna DRA7xx/AM57xx SoCs have two IPU and up to two DSP processor subsystems for offloading different computation algorithms. The IPU processor subsystem contains dual-core ARM Cortex-M4 processors, and is very similar to those on OMAP5. The DSP processor subsystem is based on the TI's standard TMS320C66x DSP CorePac core. Support has been added to the OMAP remoteproc driver through new DRA7xx specific compatibles for properly probing and booting all the different processor subsystem instances on DRA7xx/AM57xx SoCs - IPU1, IPU2, DSP1 & DSP2. A build dependency with SOC_DRA7XX is added to enable the driver to be built in DRA7xx-only configuration. The DSP boot address programming needed enhancement for DRA7xx as the boot register fields are different on DRA7 compared to OMAP4 and OMAP5 SoCs. The register on DRA7xx contains additional fields within the register and the boot address bit-field is right-shifted by 10 bits. The internal memory parsing logic has also been updated to compute the device addresses for the L2 RAM for DSP devices using relative addressing logic, and to parse two additional RAMs at L1 level - L1P and L1D. This allows the remoteproc driver to support loading into these regions for a small subset of firmware images requiring as such. The most common usage would be to use the L1 programmable RAMs as L1 Caches. The firmware lookup logic also has to be adjusted for DRA7xx as there are (can be) more than one instance of both the IPU and DSP remote processors for the first time in OMAP4+ SoCs. Signed-off-by: Suman Anna [t-kristo@ti.com: moved address translation quirks to pdata] Signed-off-by: Tero Kristo --- v4: - data format change due to device data changes to mem layout drivers/remoteproc/Kconfig | 2 +- drivers/remoteproc/omap_remoteproc.c | 38 +++++++++++++++++++++++++++- 2 files changed, 38 insertions(+), 2 deletions(-) diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig index 94afdde4bc9f..d6450d7fcf92 100644 --- a/drivers/remoteproc/Kconfig +++ b/drivers/remoteproc/Kconfig @@ -25,7 +25,7 @@ config IMX_REMOTEPROC config OMAP_REMOTEPROC tristate "OMAP remoteproc support" - depends on ARCH_OMAP4 || SOC_OMAP5 + depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX depends on OMAP_IOMMU select MAILBOX select OMAP2PLUS_MBOX diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 8a6dd742a8b1..9140c528c416 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -34,10 +34,13 @@ * struct omap_rproc_boot_data - boot data structure for the DSP omap rprocs * @syscon: regmap handle for the system control configuration module * @boot_reg: boot register offset within the @syscon regmap + * @boot_reg_shift: bit-field shift required for the boot address value in + * @boot_reg */ struct omap_rproc_boot_data { struct regmap *syscon; unsigned int boot_reg; + unsigned int boot_reg_shift; }; /** @@ -159,6 +162,8 @@ static int omap_rproc_write_dsp_boot_addr(struct rproc *rproc) struct omap_rproc *oproc = rproc->priv; struct omap_rproc_boot_data *bdata = oproc->boot_data; u32 offset = bdata->boot_reg; + u32 value; + u32 mask; if (rproc->bootaddr & (SZ_1K - 1)) { dev_err(dev, "invalid boot address 0x%x, must be aligned on a 1KB boundary\n", @@ -166,7 +171,10 @@ static int omap_rproc_write_dsp_boot_addr(struct rproc *rproc) return -EINVAL; } - regmap_write(bdata->syscon, offset, rproc->bootaddr); + value = rproc->bootaddr >> bdata->boot_reg_shift; + mask = ~(SZ_1K - 1) >> bdata->boot_reg_shift; + + regmap_update_bits(bdata->syscon, offset, mask, value); return 0; } @@ -296,6 +304,13 @@ static const struct omap_rproc_mem_data ipu_mems[] = { { }, }; +static const struct omap_rproc_mem_data dra7_dsp_mems[] = { + { .name = "l2ram", .dev_addr = 0x800000 }, + { .name = "l1pram", .dev_addr = 0xe00000 }, + { .name = "l1dram", .dev_addr = 0xf00000 }, + { }, +}; + static const struct omap_rproc_dev_data omap4_dsp_dev_data = { .device_name = "dsp", }; @@ -314,6 +329,16 @@ static const struct omap_rproc_dev_data omap5_ipu_dev_data = { .mems = ipu_mems, }; +static const struct omap_rproc_dev_data dra7_dsp_dev_data = { + .device_name = "dsp", + .mems = dra7_dsp_mems, +}; + +static const struct omap_rproc_dev_data dra7_ipu_dev_data = { + .device_name = "ipu", + .mems = ipu_mems, +}; + static const struct of_device_id omap_rproc_of_match[] = { { .compatible = "ti,omap4-dsp", @@ -331,6 +356,14 @@ static const struct of_device_id omap_rproc_of_match[] = { .compatible = "ti,omap5-ipu", .data = &omap5_ipu_dev_data, }, + { + .compatible = "ti,dra7-dsp", + .data = &dra7_dsp_dev_data, + }, + { + .compatible = "ti,dra7-ipu", + .data = &dra7_ipu_dev_data, + }, { /* end */ }, @@ -383,6 +416,9 @@ static int omap_rproc_get_boot_data(struct platform_device *pdev, return -EINVAL; } + of_property_read_u32(np, "ti,bootreg-shift", + &oproc->boot_data->boot_reg_shift); + return 0; } From patchwork Thu Jan 2 13:18:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11315729 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C5FD3138C for ; Thu, 2 Jan 2020 13:19:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A497D21835 for ; Thu, 2 Jan 2020 13:19:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="RIpy2sZd" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728444AbgABNTj (ORCPT ); Thu, 2 Jan 2020 08:19:39 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:42526 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728330AbgABNTN (ORCPT ); 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Thu, 2 Jan 2020 07:19:11 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 002DIp3Z075354; Thu, 2 Jan 2020 07:19:09 -0600 From: Tero Kristo To: , , CC: , , , , Tero Kristo Subject: [PATCHv4 08/14] remoteproc/omap: remove the platform_data header Date: Thu, 2 Jan 2020 15:18:39 +0200 Message-ID: <20200102131845.12992-9-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102131845.12992-1-t-kristo@ti.com> References: <20200102131845.12992-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The platform data header for OMAP remoteproc is no longer used for anything post ti-sysc conversion, so just remove it completely. Signed-off-by: Tero Kristo Acked-by: Suman Anna --- v4: - new patch, to remove the platform data file completely compared to patches #8 / #9 in previous version of the series include/linux/platform_data/remoteproc-omap.h | 51 ------------------- 1 file changed, 51 deletions(-) delete mode 100644 include/linux/platform_data/remoteproc-omap.h diff --git a/include/linux/platform_data/remoteproc-omap.h b/include/linux/platform_data/remoteproc-omap.h deleted file mode 100644 index 7e3a16097672..000000000000 --- a/include/linux/platform_data/remoteproc-omap.h +++ /dev/null @@ -1,51 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Remote Processor - omap-specific bits - * - * Copyright (C) 2011 Texas Instruments, Inc. - * Copyright (C) 2011 Google, Inc. - */ - -#ifndef _PLAT_REMOTEPROC_H -#define _PLAT_REMOTEPROC_H - -struct rproc_ops; -struct platform_device; - -/* - * struct omap_rproc_pdata - omap remoteproc's platform data - * @name: the remoteproc's name - * @oh_name: omap hwmod device - * @oh_name_opt: optional, secondary omap hwmod device - * @firmware: name of firmware file to load - * @mbox_name: name of omap mailbox device to use with this rproc - * @ops: start/stop rproc handlers - * @device_enable: omap-specific handler for enabling a device - * @device_shutdown: omap-specific handler for shutting down a device - * @set_bootaddr: omap-specific handler for setting the rproc boot address - */ -struct omap_rproc_pdata { - const char *name; - const char *oh_name; - const char *oh_name_opt; - const char *firmware; - const char *mbox_name; - const struct rproc_ops *ops; - int (*device_enable)(struct platform_device *pdev); - int (*device_shutdown)(struct platform_device *pdev); - void (*set_bootaddr)(u32); -}; - -#if defined(CONFIG_OMAP_REMOTEPROC) || defined(CONFIG_OMAP_REMOTEPROC_MODULE) - -void __init omap_rproc_reserve_cma(void); - -#else - -static inline void __init omap_rproc_reserve_cma(void) -{ -} - -#endif - -#endif /* _PLAT_REMOTEPROC_H */ From patchwork Thu Jan 2 13:18:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11315725 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DC6E26C1 for ; Thu, 2 Jan 2020 13:19:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B13C0217F4 for ; Thu, 2 Jan 2020 13:19:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="u/jaqnff" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728406AbgABNTP (ORCPT ); Thu, 2 Jan 2020 08:19:15 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:59470 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728438AbgABNTO (ORCPT ); Thu, 2 Jan 2020 08:19:14 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 002DJDFU035119; Thu, 2 Jan 2020 07:19:13 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1577971153; bh=jakXIzBpuRKwldYFWuvALWkxUZuVvI3KvPrt3Sq4qi8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=u/jaqnffGzx97OTpjvX/ynfap+G1I9jI4kS9Q//MGgE7IrATJ37hH7Qah9buhx9cL BrRGL5p2h87qsTKYdlIFSFVqzRINd4ND7gO56ypSlrnyqv3WEaBRzYLK4WU+5K2nDJ Q+6FC4zkXTI+ewcp70d60XjmxDLSEsQ/mDgPKJJM= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 002DJDVk035413 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 2 Jan 2020 07:19:13 -0600 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Thu, 2 Jan 2020 07:19:13 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Thu, 2 Jan 2020 07:19:13 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 002DIp3a075354; Thu, 2 Jan 2020 07:19:11 -0600 From: Tero Kristo To: , , CC: , , , , Tero Kristo Subject: [PATCHv4 09/14] remoteproc/omap: Check for undefined mailbox messages Date: Thu, 2 Jan 2020 15:18:40 +0200 Message-ID: <20200102131845.12992-10-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102131845.12992-1-t-kristo@ti.com> References: <20200102131845.12992-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna Add some checks in the mailbox callback function to limit any processing in the mailbox callback function to only certain currently valid messages, and drop all the remaining messages. A debug message is added to print any such invalid messages when the appropriate trace control is enabled. Co-developed-by: Subramaniam Chanderashekarapuram Signed-off-by: Subramaniam Chanderashekarapuram Signed-off-by: Suman Anna Signed-off-by: Tero Kristo Reviewed-by: Bjorn Andersson --- drivers/remoteproc/omap_remoteproc.c | 6 ++++++ drivers/remoteproc/omap_remoteproc.h | 7 +++++++ 2 files changed, 13 insertions(+) diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 9140c528c416..ebf979e71dfd 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -130,6 +130,12 @@ static void omap_rproc_mbox_callback(struct mbox_client *client, void *data) dev_info(dev, "received echo reply from %s\n", name); break; default: + if (msg >= RP_MBOX_READY && msg < RP_MBOX_END_MSG) + return; + if (msg > oproc->rproc->max_notifyid) { + dev_dbg(dev, "dropping unknown message 0x%x", msg); + return; + } /* msg contains the index of the triggered vring */ if (rproc_vq_interrupt(oproc->rproc, msg) == IRQ_NONE) dev_dbg(dev, "no message was found in vqid %d\n", msg); diff --git a/drivers/remoteproc/omap_remoteproc.h b/drivers/remoteproc/omap_remoteproc.h index f6d2036d383d..72f656c93caa 100644 --- a/drivers/remoteproc/omap_remoteproc.h +++ b/drivers/remoteproc/omap_remoteproc.h @@ -56,6 +56,12 @@ * * @RP_MBOX_ABORT_REQUEST: a "please crash" request, used for testing the * recovery mechanism (to some extent). + * + * Introduce new message definitions if any here. + * + * @RP_MBOX_END_MSG: Indicates end of known/defined messages from remote core + * This should be the last definition. + * */ enum omap_rp_mbox_messages { RP_MBOX_READY = 0xFFFFFF00, @@ -64,6 +70,7 @@ enum omap_rp_mbox_messages { RP_MBOX_ECHO_REQUEST = 0xFFFFFF03, RP_MBOX_ECHO_REPLY = 0xFFFFFF04, RP_MBOX_ABORT_REQUEST = 0xFFFFFF05, + RP_MBOX_END_MSG = 0xFFFFFF06, }; #endif /* _OMAP_RPMSG_H */ From patchwork Thu Jan 2 13:18:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11315707 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 60F406C1 for ; Thu, 2 Jan 2020 13:19:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3FD54215A4 for ; Thu, 2 Jan 2020 13:19:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="E4SbwgLS" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728454AbgABNTS (ORCPT ); Thu, 2 Jan 2020 08:19:18 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:48378 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728334AbgABNTR (ORCPT ); Thu, 2 Jan 2020 08:19:17 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 002DJGBS011963; Thu, 2 Jan 2020 07:19:16 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1577971156; bh=J52G8/097WLLSRnOFoiQ0fu0xNoBWhzXrvd0SKvwokk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=E4SbwgLSKHXvB3I6OamjEsLKGxQPBv3jrHEm56kGSQilfgAq0YDxohmYFj1kDk7M4 lFBW9JYDk0keRrFRBekSKPZj1rvfnf5lYNbdvig9W1mohLofNKd5h1uXpIVm5hPYxY tpuEEkZ16indMEgscqGf+dDdwYPeuRaxNc1ImDIQ= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 002DJGAU073830; Thu, 2 Jan 2020 07:19:16 -0600 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Thu, 2 Jan 2020 07:19:15 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Thu, 2 Jan 2020 07:19:15 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 002DIp3b075354; Thu, 2 Jan 2020 07:19:13 -0600 From: Tero Kristo To: , , CC: , , , , Tero Kristo Subject: [PATCHv4 10/14] remoteproc/omap: Request a timer(s) for remoteproc usage Date: Thu, 2 Jan 2020 15:18:41 +0200 Message-ID: <20200102131845.12992-11-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102131845.12992-1-t-kristo@ti.com> References: <20200102131845.12992-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna The remote processors in OMAP4+ SoCs are equipped with internal timers, like the internal SysTick timer in a Cortex M3/M4 NVIC or the CTM timer within Unicache in IPU & DSP. However, these timers are gated when the processor subsystem clock is gated, making them rather difficult to use as OS tick sources. They will not be able to wakeup the processor from any processor-sleep induced clock-gating states. This can be avoided by using an external timer as the tick source, which can be controlled independently by the OMAP remoteproc driver code, but still allowing the processor subsystem clock to be auto-gated when the remoteproc cores are idle. This patch adds the support for OMAP remote processors to request timer(s) to be used by the remoteproc. The timers are enabled and disabled in line with the enabling/disabling of the remoteproc. The timer data is not mandatory if the advanced device management features are not required. The core timer functionality is provided by the OMAP DMTimer clocksource driver, which does not export any API. The logic is implemented through the timer device's platform data ops. The OMAP remoteproc driver mainly requires ops to request/free a dmtimer, and to start/stop a timer. The split ops helps in controlling the timer state without having to request and release a timer everytime it needs to use the timer. NOTE: If the gptimer is already in use by the time IPU and/or DSP are loaded, the processors will fail to boot. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- v4: - error handling hardenings - use kcalloc instead of kzalloc drivers/remoteproc/omap_remoteproc.c | 275 ++++++++++++++++++++++++++- 1 file changed, 274 insertions(+), 1 deletion(-) diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index ebf979e71dfd..fd4700861a14 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -26,6 +26,9 @@ #include #include #include +#include + +#include #include "omap_remoteproc.h" #include "remoteproc_internal.h" @@ -57,6 +60,16 @@ struct omap_rproc_mem { size_t size; }; +/** + * struct omap_rproc_timer - data structure for a timer used by a omap rproc + * @odt: timer pointer + * @timer_ops: OMAP dmtimer ops for @odt timer + */ +struct omap_rproc_timer { + struct omap_dm_timer *odt; + const struct omap_dm_timer_ops *timer_ops; +}; + /** * struct omap_rproc - omap remote processor state * @mbox: mailbox channel handle @@ -64,6 +77,8 @@ struct omap_rproc_mem { * @boot_data: boot data structure for setting processor boot address * @mem: internal memory regions data * @num_mems: number of internal memory regions + * @num_timers: number of rproc timer(s) + * @timers: timer(s) info used by rproc * @rproc: rproc handle * @reset: reset handle */ @@ -73,6 +88,8 @@ struct omap_rproc { struct omap_rproc_boot_data *boot_data; struct omap_rproc_mem *mem; int num_mems; + int num_timers; + struct omap_rproc_timer *timers; struct rproc *rproc; struct reset_control *reset; }; @@ -97,6 +114,226 @@ struct omap_rproc_dev_data { const struct omap_rproc_mem_data *mems; }; +/** + * omap_rproc_request_timer() - request a timer for a remoteproc + * @dev: device requesting the timer + * @np: device node pointer to the desired timer + * @timer: handle to a struct omap_rproc_timer to return the timer handle + * + * This helper function is used primarily to request a timer associated with + * a remoteproc. The returned handle is stored in the .odt field of the + * @timer structure passed in, and is used to invoke other timer specific + * ops (like starting a timer either during device initialization or during + * a resume operation, or for stopping/freeing a timer). + * + * Returns 0 on success, otherwise an appropriate failure + */ +static int omap_rproc_request_timer(struct device *dev, struct device_node *np, + struct omap_rproc_timer *timer) +{ + int ret; + + timer->odt = timer->timer_ops->request_by_node(np); + if (!timer->odt) { + dev_err(dev, "request for timer node %p failed\n", np); + return -EBUSY; + } + + ret = timer->timer_ops->set_source(timer->odt, OMAP_TIMER_SRC_SYS_CLK); + if (ret) { + dev_err(dev, "error setting OMAP_TIMER_SRC_SYS_CLK as source for timer node %p\n", + np); + timer->timer_ops->free(timer->odt); + return ret; + } + + /* clean counter, remoteproc code will set the value */ + timer->timer_ops->set_load(timer->odt, 0, 0); + + return 0; +} + +/** + * omap_rproc_start_timer - start a timer for a remoteproc + * @timer: handle to a OMAP rproc timer + * + * This helper function is used to start a timer associated with a remoteproc, + * obtained using the request_timer ops. The helper function needs to be + * invoked by the driver to start the timer (during device initialization) + * or to just resume the timer. + * + * Returns 0 on success, otherwise a failure as returned by DMTimer ops + */ +static inline int omap_rproc_start_timer(struct omap_rproc_timer *timer) +{ + return timer->timer_ops->start(timer->odt); +} + +/** + * omap_rproc_stop_timer - stop a timer for a remoteproc + * @timer: handle to a OMAP rproc timer + * + * This helper function is used to disable a timer associated with a + * remoteproc, and needs to be called either during a device shutdown + * or suspend operation. The separate helper function allows the driver + * to just stop a timer without having to release the timer during a + * suspend operation. + * + * Returns 0 on success, otherwise a failure as returned by DMTimer ops + */ +static inline int omap_rproc_stop_timer(struct omap_rproc_timer *timer) +{ + return timer->timer_ops->stop(timer->odt); +} + +/** + * omap_rproc_release_timer - release a timer for a remoteproc + * @timer: handle to a OMAP rproc timer + * + * This helper function is used primarily to release a timer associated + * with a remoteproc. The dmtimer will be available for other clients to + * use once released. + * + * Returns 0 on success, otherwise a failure as returned by DMTimer ops + */ +static inline int omap_rproc_release_timer(struct omap_rproc_timer *timer) +{ + return timer->timer_ops->free(timer->odt); +} + +/** + * omap_rproc_enable_timers - enable the timers for a remoteproc + * @rproc: handle of a remote processor + * @configure: boolean flag used to acquire and configure the timer handle + * + * This function is used primarily to enable the timers associated with + * a remoteproc. The configure flag is provided to allow the driver to + * to either acquire and start a timer (during device initialization) or + * to just start a timer (during a resume operation). + */ +static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) +{ + int i; + int ret = 0; + struct platform_device *tpdev; + struct dmtimer_platform_data *tpdata; + const struct omap_dm_timer_ops *timer_ops; + struct omap_rproc *oproc = rproc->priv; + struct omap_rproc_timer *timers = oproc->timers; + struct device *dev = rproc->dev.parent; + struct device_node *np = NULL; + + if (!oproc->num_timers) + return 0; + + if (!configure) + goto start_timers; + + for (i = 0; i < oproc->num_timers; i++) { + np = of_parse_phandle(dev->of_node, "ti,timers", i); + if (!np) { + ret = -ENXIO; + dev_err(dev, "device node lookup for timer at index %d failed: %d\n", + i, ret); + goto free_timers; + } + + tpdev = of_find_device_by_node(np); + if (!tpdev) { + ret = -ENODEV; + dev_err(dev, "could not get timer platform device\n"); + goto put_node; + } + + tpdata = dev_get_platdata(&tpdev->dev); + put_device(&tpdev->dev); + if (!tpdata) { + ret = -EINVAL; + dev_err(dev, "dmtimer pdata structure NULL\n"); + goto put_node; + } + + timer_ops = tpdata->timer_ops; + if (!timer_ops || !timer_ops->request_by_node || + !timer_ops->set_source || !timer_ops->set_load || + !timer_ops->free || !timer_ops->start || + !timer_ops->stop) { + ret = -EINVAL; + dev_err(dev, "device does not have required timer ops\n"); + goto put_node; + } + + timers[i].timer_ops = timer_ops; + ret = omap_rproc_request_timer(dev, np, &timers[i]); + if (ret) { + dev_err(dev, "request for timer %p failed: %d\n", np, + ret); + goto put_node; + } + of_node_put(np); + } + +start_timers: + for (i = 0; i < num_timers; i++) { + ret = omap_rproc_start_timer(&timers[i]); + if (ret) { + dev_err(dev, "start timer %p failed failed: %d\n", np, + ret); + break; + } + } + if (ret) { + while (i >= 0) { + omap_rproc_stop_timer(&timers[i]); + i--; + } + goto put_node; + } + return 0; + +put_node: + of_node_put(np); +free_timers: + while (i--) { + omap_rproc_release_timer(&timers[i]); + timers[i].odt = NULL; + timers[i].timer_ops = NULL; + } + + return ret; +} + +/** + * omap_rproc_disable_timers - disable the timers for a remoteproc + * @rproc: handle of a remote processor + * @configure: boolean flag used to release the timer handle + * + * This function is used primarily to disable the timers associated with + * a remoteproc. The configure flag is provided to allow the driver to + * to either stop and release a timer (during device shutdown) or to just + * stop a timer (during a suspend operation). + */ +static int omap_rproc_disable_timers(struct rproc *rproc, bool configure) +{ + int i; + struct omap_rproc *oproc = rproc->priv; + struct omap_rproc_timer *timers = oproc->timers; + + if (!oproc->num_timers) + return 0; + + for (i = 0; i < oproc->num_timers; i++) { + omap_rproc_stop_timer(&timers[i]); + if (configure) { + omap_rproc_release_timer(&timers[i]); + timers[i].odt = NULL; + timers[i].timer_ops = NULL; + } + } + + return 0; +} + /** * omap_rproc_mbox_callback() - inbound mailbox message handler * @client: mailbox client pointer used for requesting the mailbox channel @@ -232,14 +469,22 @@ static int omap_rproc_start(struct rproc *rproc) goto put_mbox; } + ret = omap_rproc_enable_timers(rproc, true); + if (ret) { + dev_err(dev, "omap_rproc_enable_timers failed: %d\n", ret); + goto put_mbox; + } + ret = reset_control_deassert(oproc->reset); if (ret) { dev_err(dev, "reset control deassert failed: %d\n", ret); - goto put_mbox; + goto disable_timers; } return 0; +disable_timers: + omap_rproc_disable_timers(rproc, true); put_mbox: mbox_free_channel(oproc->mbox); return ret; @@ -255,6 +500,10 @@ static int omap_rproc_stop(struct rproc *rproc) if (ret) return ret; + ret = omap_rproc_disable_timers(rproc, true); + if (ret) + return ret; + mbox_free_channel(oproc->mbox); return 0; @@ -523,6 +772,30 @@ static int omap_rproc_probe(struct platform_device *pdev) if (ret) goto free_rproc; + /* + * Timer nodes are directly used in client nodes as phandles, so + * retrieve the count using appropriate size + */ + oproc->num_timers = of_count_phandle_with_args(np, "ti,timers", NULL); + if (oproc->num_timers <= 0) { + dev_dbg(&pdev->dev, "device does not have timers, status = %d\n", + oproc->num_timers); + oproc->num_timers = 0; + } + + if (oproc->num_timers) { + oproc->timers = devm_kcalloc(&pdev->dev, oproc->num_timers, + sizeof(*oproc->timers), + GFP_KERNEL); + if (!oproc->timers) { + ret = -ENOMEM; + goto free_rproc; + } + + dev_dbg(&pdev->dev, "device has %d tick timers\n", + oproc->num_timers); + } + ret = of_reserved_mem_device_init(&pdev->dev); if (ret) { dev_err(&pdev->dev, "device does not have specific CMA pool\n"); From patchwork Thu Jan 2 13:18:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11315717 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5DA46138C for ; Thu, 2 Jan 2020 13:19:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 31DC6215A4 for ; Thu, 2 Jan 2020 13:19:34 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="mVPWMw19" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728468AbgABNTW (ORCPT ); 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Thu, 2 Jan 2020 07:19:17 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Thu, 2 Jan 2020 07:19:17 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 002DIp3c075354; Thu, 2 Jan 2020 07:19:15 -0600 From: Tero Kristo To: , , CC: , , , , Tero Kristo Subject: [PATCHv4 11/14] remoteproc/omap: add support for system suspend/resume Date: Thu, 2 Jan 2020 15:18:42 +0200 Message-ID: <20200102131845.12992-12-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102131845.12992-1-t-kristo@ti.com> References: <20200102131845.12992-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna This patch adds the support for system suspend/resume to the OMAP remoteproc driver so that the OMAP remoteproc devices can be suspended/resumed during a system suspend/resume. The support is added through the driver PM .suspend/.resume callbacks, and requires appropriate support from the OS running on the remote processors. The IPU & DSP remote processors typically have their own private modules like registers, internal memories, caches etc. The context of these modules need to be saved and restored properly for a suspend/resume to work. These are in general not accessible from the MPU, so the remote processors themselves have to implement the logic for the context save & restore of these modules. The OMAP remoteproc driver initiates a suspend by sending a mailbox message requesting the remote processor to save its context and enter into an idle/standby state. The remote processor should usually stop whatever processing it is doing to switch to a context save mode. The OMAP remoteproc driver detects the completion of the context save by checking the module standby status for the remoteproc device. It also stops any resources used by the remote processors like the timers. The timers need to be running only when the processor is active and executing, and need to be stopped otherwise to allow the timer driver to reach low-power states. The IOMMUs are automatically suspended by the PM core during the late suspend stage, after the remoteproc suspend process is completed by putting the remote processor cores into reset. Thereafter, the Linux kernel can put the domain into further lower power states as possible. The resume sequence undoes the operations performed in the PM suspend callback, by starting the timers and finally releasing the processors from reset. This requires that the remote processor side OS be able to distinguish a power-resume boot from a power-on/cold boot, restore the context of its private modules saved during the suspend phase, and resume executing code from where it was suspended. The IOMMUs would have been resumed by the PM core during early resume, so they are already enabled by the time remoteproc resume callback gets invoked. The remote processors should save their context into System RAM (DDR), as any internal memories are not guaranteed to retain context as it depends on the lowest power domain that the remote processor device is put into. The management of the DDR contents will be managed by the Linux kernel. Signed-off-by: Suman Anna [t-kristo@ti.com: converted to use ti-sysc instead of hwmod] Signed-off-by: Tero Kristo --- v4: - include headers sorted by name - using #ifdef CONFIG_PM_SLEEP for suspend/resume ops drivers/remoteproc/omap_remoteproc.c | 181 +++++++++++++++++++++++++++ drivers/remoteproc/omap_remoteproc.h | 18 ++- 2 files changed, 197 insertions(+), 2 deletions(-) diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index fd4700861a14..2a333565a9c1 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -15,13 +15,17 @@ #include #include +#include +#include #include +#include #include #include #include #include #include #include +#include #include #include #include @@ -81,6 +85,9 @@ struct omap_rproc_timer { * @timers: timer(s) info used by rproc * @rproc: rproc handle * @reset: reset handle + * @pm_comp: completion primitive to sync for suspend response + * @fck: functional clock for the remoteproc + * @suspend_acked: state machine flag to store the suspend request ack */ struct omap_rproc { struct mbox_chan *mbox; @@ -92,6 +99,9 @@ struct omap_rproc { struct omap_rproc_timer *timers; struct rproc *rproc; struct reset_control *reset; + struct completion pm_comp; + struct clk *fck; + bool suspend_acked; }; /** @@ -366,6 +376,12 @@ static void omap_rproc_mbox_callback(struct mbox_client *client, void *data) case RP_MBOX_ECHO_REPLY: dev_info(dev, "received echo reply from %s\n", name); break; + case RP_MBOX_SUSPEND_ACK: + /* Fall through */ + case RP_MBOX_SUSPEND_CANCEL: + oproc->suspend_acked = msg == RP_MBOX_SUSPEND_ACK; + complete(&oproc->pm_comp); + break; default: if (msg >= RP_MBOX_READY && msg < RP_MBOX_END_MSG) return; @@ -554,6 +570,158 @@ static const struct rproc_ops omap_rproc_ops = { .da_to_va = omap_rproc_da_to_va, }; +#ifdef CONFIG_PM +static bool _is_rproc_in_standby(struct omap_rproc *oproc) +{ + return ti_clk_is_in_standby(oproc->fck); +} + +/* 1 sec is long enough time to let the remoteproc side suspend the device */ +#define DEF_SUSPEND_TIMEOUT 1000 +static int _omap_rproc_suspend(struct rproc *rproc) +{ + struct device *dev = rproc->dev.parent; + struct omap_rproc *oproc = rproc->priv; + unsigned long to = msecs_to_jiffies(DEF_SUSPEND_TIMEOUT); + unsigned long ta = jiffies + to; + int ret; + + reinit_completion(&oproc->pm_comp); + oproc->suspend_acked = false; + ret = mbox_send_message(oproc->mbox, (void *)RP_MBOX_SUSPEND_SYSTEM); + if (ret < 0) { + dev_err(dev, "PM mbox_send_message failed: %d\n", ret); + return ret; + } + + ret = wait_for_completion_timeout(&oproc->pm_comp, to); + if (!oproc->suspend_acked) + return -EBUSY; + + /* + * The remoteproc side is returning the ACK message before saving the + * context, because the context saving is performed within a SYS/BIOS + * function, and it cannot have any inter-dependencies against the IPC + * layer. Also, as the SYS/BIOS needs to preserve properly the processor + * register set, sending this ACK or signalling the completion of the + * context save through a shared memory variable can never be the + * absolute last thing to be executed on the remoteproc side, and the + * MPU cannot use the ACK message as a sync point to put the remoteproc + * into reset. The only way to ensure that the remote processor has + * completed saving the context is to check that the module has reached + * STANDBY state (after saving the context, the SYS/BIOS executes the + * appropriate target-specific WFI instruction causing the module to + * enter STANDBY). + */ + while (!_is_rproc_in_standby(oproc)) { + if (time_after(jiffies, ta)) + return -ETIME; + schedule(); + } + + reset_control_assert(oproc->reset); + + ret = omap_rproc_disable_timers(rproc, false); + if (ret) { + dev_err(dev, "disabling timers during suspend failed %d\n", + ret); + goto enable_device; + } + + return 0; + +enable_device: + reset_control_deassert(oproc->reset); + return ret; +} + +static int _omap_rproc_resume(struct rproc *rproc) +{ + struct device *dev = rproc->dev.parent; + struct omap_rproc *oproc = rproc->priv; + int ret; + + /* boot address could be lost after suspend, so restore it */ + if (oproc->boot_data) { + ret = omap_rproc_write_dsp_boot_addr(rproc); + if (ret) { + dev_err(dev, "boot address restore failed %d\n", ret); + goto out; + } + } + + ret = omap_rproc_enable_timers(rproc, false); + if (ret) { + dev_err(dev, "enabling timers during resume failed %d\n", ret); + goto out; + } + + reset_control_deassert(oproc->reset); + +out: + return ret; +} + +#ifdef CONFIG_PM_SLEEP +static int omap_rproc_suspend(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct rproc *rproc = platform_get_drvdata(pdev); + int ret = 0; + + mutex_lock(&rproc->lock); + if (rproc->state == RPROC_OFFLINE) + goto out; + + if (rproc->state == RPROC_SUSPENDED) + goto out; + + if (rproc->state != RPROC_RUNNING) { + ret = -EBUSY; + goto out; + } + + ret = _omap_rproc_suspend(rproc); + if (ret) { + dev_err(dev, "suspend failed %d\n", ret); + goto out; + } + + rproc->state = RPROC_SUSPENDED; +out: + mutex_unlock(&rproc->lock); + return ret; +} + +static int omap_rproc_resume(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct rproc *rproc = platform_get_drvdata(pdev); + int ret = 0; + + mutex_lock(&rproc->lock); + if (rproc->state == RPROC_OFFLINE) + goto out; + + if (rproc->state != RPROC_SUSPENDED) { + ret = -EBUSY; + goto out; + } + + ret = _omap_rproc_resume(rproc); + if (ret) { + dev_err(dev, "resume failed %d\n", ret); + goto out; + } + + rproc->state = RPROC_RUNNING; +out: + mutex_unlock(&rproc->lock); + return ret; +} +#endif /* CONFIG_PM_SLEEP */ +#endif /* CONFIG_PM */ + static const struct omap_rproc_mem_data ipu_mems[] = { { .name = "l2ram", .dev_addr = 0x20000000 }, { }, @@ -796,6 +964,14 @@ static int omap_rproc_probe(struct platform_device *pdev) oproc->num_timers); } + init_completion(&oproc->pm_comp); + + oproc->fck = devm_clk_get(&pdev->dev, 0); + if (IS_ERR(oproc->fck)) { + ret = PTR_ERR(oproc->fck); + goto free_rproc; + } + ret = of_reserved_mem_device_init(&pdev->dev); if (ret) { dev_err(&pdev->dev, "device does not have specific CMA pool\n"); @@ -828,11 +1004,16 @@ static int omap_rproc_remove(struct platform_device *pdev) return 0; } +static const struct dev_pm_ops omap_rproc_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(omap_rproc_suspend, omap_rproc_resume) +}; + static struct platform_driver omap_rproc_driver = { .probe = omap_rproc_probe, .remove = omap_rproc_remove, .driver = { .name = "omap-rproc", + .pm = &omap_rproc_pm_ops, .of_match_table = omap_rproc_of_match, }, }; diff --git a/drivers/remoteproc/omap_remoteproc.h b/drivers/remoteproc/omap_remoteproc.h index 72f656c93caa..8af37e46aa73 100644 --- a/drivers/remoteproc/omap_remoteproc.h +++ b/drivers/remoteproc/omap_remoteproc.h @@ -1,7 +1,7 @@ /* * Remote processor messaging * - * Copyright (C) 2011 Texas Instruments, Inc. + * Copyright (C) 2011-2020 Texas Instruments, Inc. * Copyright (C) 2011 Google, Inc. * All rights reserved. * @@ -57,6 +57,16 @@ * @RP_MBOX_ABORT_REQUEST: a "please crash" request, used for testing the * recovery mechanism (to some extent). * + * @RP_MBOX_SUSPEND_AUTO: auto suspend request for the remote processor + * + * @RP_MBOX_SUSPEND_SYSTEM: system suspend request for the remote processor + * + * @RP_MBOX_SUSPEND_ACK: successful response from remote processor for a + * suspend request + * + * @RP_MBOX_SUSPEND_CANCEL: a cancel suspend response from a remote processor + * on a suspend request + * * Introduce new message definitions if any here. * * @RP_MBOX_END_MSG: Indicates end of known/defined messages from remote core @@ -70,7 +80,11 @@ enum omap_rp_mbox_messages { RP_MBOX_ECHO_REQUEST = 0xFFFFFF03, RP_MBOX_ECHO_REPLY = 0xFFFFFF04, RP_MBOX_ABORT_REQUEST = 0xFFFFFF05, - RP_MBOX_END_MSG = 0xFFFFFF06, + RP_MBOX_SUSPEND_AUTO = 0xFFFFFF10, + RP_MBOX_SUSPEND_SYSTEM = 0xFFFFFF11, + RP_MBOX_SUSPEND_ACK = 0xFFFFFF12, + RP_MBOX_SUSPEND_CANCEL = 0xFFFFFF13, + RP_MBOX_END_MSG = 0xFFFFFF14, }; #endif /* _OMAP_RPMSG_H */ From patchwork Thu Jan 2 13:18:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11315721 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2EAD41398 for ; Thu, 2 Jan 2020 13:19:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0C727217F4 for ; Thu, 2 Jan 2020 13:19:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="HbfgOOo5" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728356AbgABNTd (ORCPT ); Thu, 2 Jan 2020 08:19:33 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:48382 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728465AbgABNTX (ORCPT ); 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Thu, 2 Jan 2020 07:19:20 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 002DIp3d075354; Thu, 2 Jan 2020 07:19:18 -0600 From: Tero Kristo To: , , CC: , , , , Tero Kristo Subject: [PATCHv4 12/14] remoteproc/omap: add support for runtime auto-suspend/resume Date: Thu, 2 Jan 2020 15:18:43 +0200 Message-ID: <20200102131845.12992-13-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102131845.12992-1-t-kristo@ti.com> References: <20200102131845.12992-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna This patch enhances the PM support in the OMAP remoteproc driver to support the runtime auto-suspend. A remoteproc may not be required to be running all the time, and typically will need to be active only during certain usecases. As such, to save power, it should be turned off during potential long periods of inactivity between usecases. This suspend and resume of the device is a relatively heavy process in terms of latencies, so a remoteproc should be suspended only after a certain period of prolonged inactivity. The OMAP remoteproc driver leverages the runtime pm framework's auto_suspend feature to accomplish this functionality. This feature is automatically enabled when a remote processor has successfully booted. The 'autosuspend_delay_ms' for each device dictates the inactivity period/time to wait for before suspending the device. The runtime auto-suspend design relies on marking the last busy time on every communication (virtqueue kick) to and from the remote processor. When there has been no activity for 'autosuspend_delay_ms' time, the runtime PM framework invokes the driver's runtime pm suspend callback to suspend the device. The remote processor will be woken up on the initiation of the next communication message through the runtime pm resume callback. The current auto-suspend design also allows a remote processor to deny a auto-suspend attempt, if it wishes to, by sending a NACK response to the initial suspend request message sent to the remote processor as part of the suspend process. The auto-suspend request is also only attempted if the remote processor is idled and in standby at the time of inactivity timer expiry. This choice is made to avoid unnecessary messaging, and the auto-suspend is simply rescheduled to be attempted again after a further lapse of autosuspend_delay_ms. The runtime pm callbacks functionality in this patch reuses most of the core logic from the suspend/resume support code, and make use of an additional auto_suspend flag to differentiate the logic in common code from system suspend. The system suspend/resume sequences are also updated to reflect the proper pm_runtime statuses, and also to really perform a suspend/resume only if the remoteproc has not been auto-suspended at the time of request. The remote processor is left in suspended state on a system resume if it has been auto-suspended before, and will be woken up only when a usecase needs to run. The OMAP remoteproc driver currently uses a default value of 10 seconds for all OMAP remoteprocs, and a different value can be chosen either by choosing a positive value for the 'ti,autosuspend-delay' under DT or by updating the 'autosuspend_delay_ms' field at runtime through the sysfs interface. Eg: To use 25 seconds for IPU2 on DRA7xx, echo 25000 > /sys/bus/platform/devices/55020000.ipu/power/autosuspend_delay_ms The runtime suspend feature can also be similarly enabled or disabled by writing 'auto' or 'on' to the device's 'control' power field. The default is enabled. Eg: To disable auto-suspend for IPU2 on DRA7xx SoC, echo on > /sys/bus/platform/devices/55020000.ipu/power/control Signed-off-by: Suman Anna [t-kristo@ti.com: converted to use ti-sysc instead of hwmod] Signed-off-by: Tero Kristo --- v4: - moved autosuspend delay config to DT - re-factored PM runtime call usage drivers/remoteproc/omap_remoteproc.c | 172 +++++++++++++++++++++++++-- 1 file changed, 165 insertions(+), 7 deletions(-) diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 2a333565a9c1..06e269983ea1 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -37,6 +38,9 @@ #include "omap_remoteproc.h" #include "remoteproc_internal.h" +/* default auto-suspend delay (ms) */ +#define DEFAULT_AUTOSUSPEND_DELAY 10000 + /** * struct omap_rproc_boot_data - boot data structure for the DSP omap rprocs * @syscon: regmap handle for the system control configuration module @@ -83,6 +87,8 @@ struct omap_rproc_timer { * @num_mems: number of internal memory regions * @num_timers: number of rproc timer(s) * @timers: timer(s) info used by rproc + * @autosuspend_delay: auto-suspend delay value to be used for runtime pm + * @need_resume: if true a resume is needed in the system resume callback * @rproc: rproc handle * @reset: reset handle * @pm_comp: completion primitive to sync for suspend response @@ -97,6 +103,8 @@ struct omap_rproc { int num_mems; int num_timers; struct omap_rproc_timer *timers; + int autosuspend_delay; + bool need_resume; struct rproc *rproc; struct reset_control *reset; struct completion pm_comp; @@ -402,11 +410,23 @@ static void omap_rproc_kick(struct rproc *rproc, int vqid) struct device *dev = rproc->dev.parent; int ret; + /* wake up the rproc before kicking it */ + ret = pm_runtime_get_sync(dev); + if (WARN_ON(ret < 0)) { + dev_err(dev, "pm_runtime_get_sync() failed during kick, ret = %d\n", + ret); + pm_runtime_put_noidle(dev); + return; + } + /* send the index of the triggered virtqueue in the mailbox payload */ ret = mbox_send_message(oproc->mbox, (void *)vqid); if (ret < 0) dev_err(dev, "failed to send mailbox message, status = %d\n", ret); + + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); } /** @@ -497,6 +517,10 @@ static int omap_rproc_start(struct rproc *rproc) goto disable_timers; } + pm_runtime_get_sync(dev); + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); + return 0; disable_timers: @@ -509,6 +533,7 @@ static int omap_rproc_start(struct rproc *rproc) /* power off the remote processor */ static int omap_rproc_stop(struct rproc *rproc) { + struct device *dev = rproc->dev.parent; struct omap_rproc *oproc = rproc->priv; int ret; @@ -522,6 +547,12 @@ static int omap_rproc_stop(struct rproc *rproc) mbox_free_channel(oproc->mbox); + /* + * update the runtime pm states and status now that the remoteproc + * has stopped + */ + pm_runtime_put_noidle(dev); + return 0; } @@ -578,17 +609,19 @@ static bool _is_rproc_in_standby(struct omap_rproc *oproc) /* 1 sec is long enough time to let the remoteproc side suspend the device */ #define DEF_SUSPEND_TIMEOUT 1000 -static int _omap_rproc_suspend(struct rproc *rproc) +static int _omap_rproc_suspend(struct rproc *rproc, bool auto_suspend) { struct device *dev = rproc->dev.parent; struct omap_rproc *oproc = rproc->priv; unsigned long to = msecs_to_jiffies(DEF_SUSPEND_TIMEOUT); unsigned long ta = jiffies + to; + u32 suspend_msg = auto_suspend ? + RP_MBOX_SUSPEND_AUTO : RP_MBOX_SUSPEND_SYSTEM; int ret; reinit_completion(&oproc->pm_comp); oproc->suspend_acked = false; - ret = mbox_send_message(oproc->mbox, (void *)RP_MBOX_SUSPEND_SYSTEM); + ret = mbox_send_message(oproc->mbox, (void *)suspend_msg); if (ret < 0) { dev_err(dev, "PM mbox_send_message failed: %d\n", ret); return ret; @@ -628,36 +661,71 @@ static int _omap_rproc_suspend(struct rproc *rproc) goto enable_device; } + /* + * IOMMUs would have to be disabled specifically for runtime suspend. + * They are handled automatically through System PM callbacks for + * regular system suspend + */ + if (auto_suspend) { + ret = omap_iommu_domain_deactivate(rproc->domain); + if (ret) { + dev_err(dev, "iommu domain deactivate failed %d\n", + ret); + goto enable_timers; + } + } + return 0; +enable_timers: + /* ignore errors on re-enabling code */ + omap_rproc_enable_timers(rproc, false); enable_device: reset_control_deassert(oproc->reset); return ret; } -static int _omap_rproc_resume(struct rproc *rproc) +static int _omap_rproc_resume(struct rproc *rproc, bool auto_suspend) { struct device *dev = rproc->dev.parent; struct omap_rproc *oproc = rproc->priv; int ret; + /* + * IOMMUs would have to be enabled specifically for runtime resume. + * They would have been already enabled automatically through System + * PM callbacks for regular system resume + */ + if (auto_suspend) { + ret = omap_iommu_domain_activate(rproc->domain); + if (ret) { + dev_err(dev, "omap_iommu activate failed %d\n", ret); + goto out; + } + } + /* boot address could be lost after suspend, so restore it */ if (oproc->boot_data) { ret = omap_rproc_write_dsp_boot_addr(rproc); if (ret) { dev_err(dev, "boot address restore failed %d\n", ret); - goto out; + goto suspend_iommu; } } ret = omap_rproc_enable_timers(rproc, false); if (ret) { dev_err(dev, "enabling timers during resume failed %d\n", ret); - goto out; + goto suspend_iommu; } reset_control_deassert(oproc->reset); + return 0; + +suspend_iommu: + if (auto_suspend) + omap_iommu_domain_deactivate(rproc->domain); out: return ret; } @@ -667,6 +735,7 @@ static int omap_rproc_suspend(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); struct rproc *rproc = platform_get_drvdata(pdev); + struct omap_rproc *oproc = rproc->priv; int ret = 0; mutex_lock(&rproc->lock); @@ -681,13 +750,19 @@ static int omap_rproc_suspend(struct device *dev) goto out; } - ret = _omap_rproc_suspend(rproc); + ret = _omap_rproc_suspend(rproc, false); if (ret) { dev_err(dev, "suspend failed %d\n", ret); goto out; } + /* + * remoteproc is running at the time of system suspend, so remember + * it so as to wake it up during system resume + */ + oproc->need_resume = true; rproc->state = RPROC_SUSPENDED; + out: mutex_unlock(&rproc->lock); return ret; @@ -697,6 +772,7 @@ static int omap_rproc_resume(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); struct rproc *rproc = platform_get_drvdata(pdev); + struct omap_rproc *oproc = rproc->priv; int ret = 0; mutex_lock(&rproc->lock); @@ -708,18 +784,89 @@ static int omap_rproc_resume(struct device *dev) goto out; } - ret = _omap_rproc_resume(rproc); + /* + * remoteproc was auto-suspended at the time of system suspend, + * so no need to wake-up the processor (leave it in suspended + * state, will be woken up during a subsequent runtime_resume) + */ + if (!oproc->need_resume) + goto out; + + ret = _omap_rproc_resume(rproc, false); if (ret) { dev_err(dev, "resume failed %d\n", ret); goto out; } + oproc->need_resume = false; rproc->state = RPROC_RUNNING; + + pm_runtime_mark_last_busy(dev); + out: mutex_unlock(&rproc->lock); return ret; } #endif /* CONFIG_PM_SLEEP */ + +static int omap_rproc_runtime_suspend(struct device *dev) +{ + struct rproc *rproc = dev_get_drvdata(dev); + struct omap_rproc *oproc = rproc->priv; + int ret; + + if (rproc->state == RPROC_CRASHED) { + dev_dbg(dev, "rproc cannot be runtime suspended when crashed!\n"); + return -EBUSY; + } + + if (WARN_ON(rproc->state != RPROC_RUNNING)) { + dev_err(dev, "rproc cannot be runtime suspended when not running!\n"); + return -EBUSY; + } + + /* + * do not even attempt suspend if the remote processor is not + * idled for runtime auto-suspend + */ + if (!_is_rproc_in_standby(oproc)) { + ret = -EBUSY; + goto abort; + } + + ret = _omap_rproc_suspend(rproc, true); + if (ret) + goto abort; + + rproc->state = RPROC_SUSPENDED; + return 0; + +abort: + pm_runtime_mark_last_busy(dev); + return ret; +} + +static int omap_rproc_runtime_resume(struct device *dev) +{ + struct rproc *rproc = dev_get_drvdata(dev); + int ret; + + if (WARN_ON(rproc->state != RPROC_SUSPENDED && + rproc->state != RPROC_OFFLINE)) { + dev_err(dev, "rproc cannot be runtime resumed if not suspended! state=%d\n", rproc->state); + return -EBUSY; + } + + ret = _omap_rproc_resume(rproc, rproc->state == RPROC_SUSPENDED); + if (ret) { + dev_err(dev, "runtime resume failed %d\n", ret); + return ret; + } + + rproc->state = RPROC_RUNNING; + + return 0; +} #endif /* CONFIG_PM */ static const struct omap_rproc_mem_data ipu_mems[] = { @@ -965,6 +1112,14 @@ static int omap_rproc_probe(struct platform_device *pdev) } init_completion(&oproc->pm_comp); + oproc->autosuspend_delay = DEFAULT_AUTOSUSPEND_DELAY; + + of_property_read_u32(pdev->dev.of_node, "ti,autosuspend-delay", + &oproc->autosuspend_delay); + + pm_runtime_set_autosuspend_delay(&pdev->dev, oproc->autosuspend_delay); + pm_runtime_use_autosuspend(&pdev->dev); + pm_runtime_enable(&pdev->dev); oproc->fck = devm_clk_get(&pdev->dev, 0); if (IS_ERR(oproc->fck)) { @@ -1000,12 +1155,15 @@ static int omap_rproc_remove(struct platform_device *pdev) rproc_del(rproc); rproc_free(rproc); of_reserved_mem_device_release(&pdev->dev); + pm_runtime_disable(&pdev->dev); return 0; } static const struct dev_pm_ops omap_rproc_pm_ops = { SET_SYSTEM_SLEEP_PM_OPS(omap_rproc_suspend, omap_rproc_resume) + SET_RUNTIME_PM_OPS(omap_rproc_runtime_suspend, + omap_rproc_runtime_resume, NULL) }; static struct platform_driver omap_rproc_driver = { From patchwork Thu Jan 2 13:18:44 2020 Content-Type: text/plain; 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Thu, 2 Jan 2020 07:19:22 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 002DIp3e075354; Thu, 2 Jan 2020 07:19:20 -0600 From: Tero Kristo To: , , CC: , , , , Tero Kristo Subject: [PATCHv4 13/14] remoteproc/omap: report device exceptions and trigger recovery Date: Thu, 2 Jan 2020 15:18:44 +0200 Message-ID: <20200102131845.12992-14-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102131845.12992-1-t-kristo@ti.com> References: <20200102131845.12992-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna The OMAP remote processors send a special mailbox message (RP_MBOX_CRASH) when they crash and detect an internal device exception. Add support to the mailbox handling function upon detection of this special message to report this crash to the remoteproc core. The remoteproc core can trigger a recovery using the prevailing recovery mechanism, already in use for MMU Fault recovery. Co-developed-by: Subramaniam Chanderashekarapuram Signed-off-by: Subramaniam Chanderashekarapuram Signed-off-by: Suman Anna Signed-off-by: Tero Kristo Reviewed-by: Bjorn Andersson --- drivers/remoteproc/omap_remoteproc.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 06e269983ea1..0318cde3d1fb 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -378,8 +378,12 @@ static void omap_rproc_mbox_callback(struct mbox_client *client, void *data) switch (msg) { case RP_MBOX_CRASH: - /* just log this for now. later, we'll also do recovery */ + /* + * remoteproc detected an exception, notify the rproc core. + * The remoteproc core will handle the recovery. + */ dev_err(dev, "omap rproc %s crashed\n", name); + rproc_report_crash(oproc->rproc, RPROC_FATAL_ERROR); break; case RP_MBOX_ECHO_REPLY: dev_info(dev, "received echo reply from %s\n", name); From patchwork Thu Jan 2 13:18:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11315713 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CFBE26C1 for ; Thu, 2 Jan 2020 13:19:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A4CE821D7D for ; Thu, 2 Jan 2020 13:19:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="jmirxxvb" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728314AbgABNT2 (ORCPT ); Thu, 2 Jan 2020 08:19:28 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:36522 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728472AbgABNT1 (ORCPT ); Thu, 2 Jan 2020 08:19:27 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 002DJPhM020914; Thu, 2 Jan 2020 07:19:25 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1577971165; bh=BKhoMTmH9uvOeLhhevapULuK6FCbOQOXX1M7kNuR8tI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=jmirxxvbq6wysk68RThHNrF6sxWCE0RM4xT9kmBdo9CKT4j+Fr1E0m+gyb2aR7w5B dBlln2JPH8RSF0qmHnKRJHIWSotee79++hHLakj9ifMYp/hDgVPJnbdMNW5A+6qf82 hn9euBoegW7ONHBDubrxcLsX/CIAK5Dk8qIfgRCQ= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 002DJPpo090391 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 2 Jan 2020 07:19:25 -0600 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Thu, 2 Jan 2020 07:19:24 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Thu, 2 Jan 2020 07:19:24 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 002DIp3f075354; Thu, 2 Jan 2020 07:19:22 -0600 From: Tero Kristo To: , , CC: , , , , Tero Kristo Subject: [PATCHv4 14/14] remoteproc/omap: add watchdog functionality for remote processors Date: Thu, 2 Jan 2020 15:18:45 +0200 Message-ID: <20200102131845.12992-15-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102131845.12992-1-t-kristo@ti.com> References: <20200102131845.12992-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna Remote processors can be stuck in a loop, and may not be recoverable if they do not have a built-in watchdog. The watchdog implementation for OMAP remote processors uses external gptimers that can be used to interrupt both the Linux host as well as the remote processor. Each remote processor is responsible for refreshing the timer during normal behavior - during OS task scheduling or entering the idle loop properly. During a watchdog condition (executing a tight loop causing no scheduling), the host processor gets interrupts and schedules a recovery for the corresponding remote processor. The remote processor may also get interrupted to be able to print a back trace. A menuconfig option has also been added to enable/disable the Watchdog functionality, with the default as disabled. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- v4: - some error handling code enhancements - use kcalloc instead of kzalloc drivers/remoteproc/Kconfig | 12 +++ drivers/remoteproc/omap_remoteproc.c | 150 +++++++++++++++++++++++++-- 2 files changed, 153 insertions(+), 9 deletions(-) diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig index d6450d7fcf92..b2eaa18ad503 100644 --- a/drivers/remoteproc/Kconfig +++ b/drivers/remoteproc/Kconfig @@ -42,6 +42,18 @@ config OMAP_REMOTEPROC It's safe to say N here if you're not interested in multimedia offloading or just want a bare minimum kernel. +config OMAP_REMOTEPROC_WATCHDOG + bool "OMAP remoteproc watchdog timer" + depends on OMAP_REMOTEPROC + default n + help + Say Y here to enable watchdog timer for remote processors. + + This option controls the watchdog functionality for the remote + processors in OMAP. Dedicated OMAP DMTimers are used by the remote + processors and triggers the timer interrupt upon a watchdog + detection. + config WKUP_M3_RPROC tristate "AMx3xx Wakeup M3 remoteproc support" depends on SOC_AM33XX || SOC_AM43XX diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 0318cde3d1fb..7f289db9826d 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -72,10 +73,12 @@ struct omap_rproc_mem { * struct omap_rproc_timer - data structure for a timer used by a omap rproc * @odt: timer pointer * @timer_ops: OMAP dmtimer ops for @odt timer + * @irq: timer irq */ struct omap_rproc_timer { struct omap_dm_timer *odt; const struct omap_dm_timer_ops *timer_ops; + int irq; }; /** @@ -86,6 +89,7 @@ struct omap_rproc_timer { * @mem: internal memory regions data * @num_mems: number of internal memory regions * @num_timers: number of rproc timer(s) + * @num_wd_timers: number of rproc watchdog timers * @timers: timer(s) info used by rproc * @autosuspend_delay: auto-suspend delay value to be used for runtime pm * @need_resume: if true a resume is needed in the system resume callback @@ -102,6 +106,7 @@ struct omap_rproc { struct omap_rproc_mem *mem; int num_mems; int num_timers; + int num_wd_timers; struct omap_rproc_timer *timers; int autosuspend_delay; bool need_resume; @@ -219,6 +224,81 @@ static inline int omap_rproc_release_timer(struct omap_rproc_timer *timer) return timer->timer_ops->free(timer->odt); } +/** + * omap_rproc_get_timer_irq - get the irq for a timer + * @timer - handle to a OMAP rproc timer + * + * This function is used to get the irq associated with a watchdog timer. The + * function is called by the OMAP remoteproc driver to register a interrupt + * handler to handle watchdog events on the remote processor. + * + * Returns the irq id on success, otherwise a failure as returned by DMTimer ops + */ +static inline int omap_rproc_get_timer_irq(struct omap_rproc_timer *timer) +{ + return timer->timer_ops->get_irq(timer->odt); +} + +/** + * omap_rproc_ack_timer_irq - acknowledge a timer irq + * @timer: handle to a OMAP rproc timer + * + * This function is used to clear the irq associated with a watchdog timer. The + * The function is called by the OMAP remoteproc upon a watchdog event on the + * remote processor to clear the interrupt status of the watchdog timer. + * + * Returns the irq id on success, otherwise a failure as returned by DMTimer ops + */ +static inline void omap_rproc_ack_timer_irq(struct omap_rproc_timer *timer) +{ + timer->timer_ops->write_status(timer->odt, OMAP_TIMER_INT_OVERFLOW); +} + +/** + * omap_rproc_watchdog_isr - Watchdog ISR handler for remoteproc device + * @irq: IRQ number associated with a watchdog timer + * @data: IRQ handler data + * + * This ISR routine executes the required necessary low-level code to + * acknowledge a watchdog timer interrupt. There can be multiple watchdog + * timers associated with a rproc (like IPUs which have 2 watchdog timers, + * one per Cortex M3/M4 core), so a lookup has to be performed to identify + * the timer to acknowledge its interrupt. + * + * The function also invokes rproc_report_crash to report the watchdog event + * to the remoteproc driver core, to trigger a recovery. + * + * Return: IRQ_HANDLED or IRQ_NONE + */ +static irqreturn_t omap_rproc_watchdog_isr(int irq, void *data) +{ + struct rproc *rproc = data; + struct omap_rproc *oproc = rproc->priv; + struct device *dev = rproc->dev.parent; + struct omap_rproc_timer *timers = oproc->timers; + struct omap_rproc_timer *wd_timer = NULL; + int num_timers = oproc->num_timers + oproc->num_wd_timers; + int i; + + for (i = oproc->num_timers; i < num_timers; i++) { + if (timers[i].irq > 0 && irq == timers[i].irq) { + wd_timer = &timers[i]; + break; + } + } + + if (!wd_timer) { + dev_err(dev, "invalid timer\n"); + return IRQ_NONE; + } + + omap_rproc_ack_timer_irq(wd_timer); + + rproc_report_crash(rproc, RPROC_WATCHDOG); + + return IRQ_HANDLED; +} + /** * omap_rproc_enable_timers - enable the timers for a remoteproc * @rproc: handle of a remote processor @@ -240,6 +320,7 @@ static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) struct omap_rproc_timer *timers = oproc->timers; struct device *dev = rproc->dev.parent; struct device_node *np = NULL; + int num_timers = oproc->num_timers + oproc->num_wd_timers; if (!oproc->num_timers) return 0; @@ -247,12 +328,18 @@ static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) if (!configure) goto start_timers; - for (i = 0; i < oproc->num_timers; i++) { - np = of_parse_phandle(dev->of_node, "ti,timers", i); + for (i = 0; i < num_timers; i++) { + if (i < oproc->num_timers) + np = of_parse_phandle(dev->of_node, "ti,timers", i); + else + np = of_parse_phandle(dev->of_node, + "ti,watchdog-timers", + (i - oproc->num_timers)); if (!np) { ret = -ENXIO; dev_err(dev, "device node lookup for timer at index %d failed: %d\n", - i, ret); + i < oproc->num_timers ? i : + i - oproc->num_timers, ret); goto free_timers; } @@ -275,12 +362,14 @@ static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) if (!timer_ops || !timer_ops->request_by_node || !timer_ops->set_source || !timer_ops->set_load || !timer_ops->free || !timer_ops->start || - !timer_ops->stop) { + !timer_ops->stop || !timer_ops->get_irq || + !timer_ops->write_status) { ret = -EINVAL; dev_err(dev, "device does not have required timer ops\n"); goto put_node; } + timers[i].irq = -1; timers[i].timer_ops = timer_ops; ret = omap_rproc_request_timer(dev, np, &timers[i]); if (ret) { @@ -289,6 +378,29 @@ static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) goto put_node; } of_node_put(np); + + if (i >= oproc->num_timers) { + timers[i].irq = omap_rproc_get_timer_irq(&timers[i]); + if (timers[i].irq < 0) { + dev_err(dev, "get_irq for timer %p failed: %d\n", + np, timers[i].irq); + ret = -EBUSY; + goto free_timers; + } + + ret = request_irq(timers[i].irq, + omap_rproc_watchdog_isr, IRQF_SHARED, + "rproc-wdt", rproc); + if (ret) { + dev_err(dev, "error requesting irq for timer %p\n", + np); + omap_rproc_release_timer(&timers[i]); + timers[i].odt = NULL; + timers[i].timer_ops = NULL; + timers[i].irq = -1; + goto free_timers; + } + } } start_timers: @@ -307,15 +419,19 @@ static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) } goto put_node; } + return 0; put_node: of_node_put(np); free_timers: while (i--) { + if (i >= oproc->num_timers) + free_irq(timers[i].irq, rproc); omap_rproc_release_timer(&timers[i]); timers[i].odt = NULL; timers[i].timer_ops = NULL; + timers[i].irq = -1; } return ret; @@ -336,16 +452,20 @@ static int omap_rproc_disable_timers(struct rproc *rproc, bool configure) int i; struct omap_rproc *oproc = rproc->priv; struct omap_rproc_timer *timers = oproc->timers; + int num_timers = oproc->num_timers + oproc->num_wd_timers; if (!oproc->num_timers) return 0; - for (i = 0; i < oproc->num_timers; i++) { + for (i = 0; i < num_timers; i++) { omap_rproc_stop_timer(&timers[i]); if (configure) { + if (i >= oproc->num_timers) + free_irq(timers[i].irq, rproc); omap_rproc_release_timer(&timers[i]); timers[i].odt = NULL; timers[i].timer_ops = NULL; + timers[i].irq = -1; } } @@ -1050,6 +1170,7 @@ static int omap_rproc_probe(struct platform_device *pdev) struct omap_rproc *oproc; struct rproc *rproc; const char *firmware; + int num_timers; int ret; struct reset_control *reset; @@ -1102,8 +1223,19 @@ static int omap_rproc_probe(struct platform_device *pdev) oproc->num_timers = 0; } - if (oproc->num_timers) { - oproc->timers = devm_kcalloc(&pdev->dev, oproc->num_timers, +#ifdef CONFIG_OMAP_REMOTEPROC_WATCHDOG + oproc->num_wd_timers = + of_count_phandle_with_args(np, "ti,watchdog-timers", NULL); + if (oproc->num_wd_timers <= 0) { + dev_dbg(&pdev->dev, "device does not have watchdog timers, status = %d\n", + oproc->num_wd_timers); + oproc->num_wd_timers = 0; + } +#endif + + if (oproc->num_timers || oproc->num_wd_timers) { + num_timers = oproc->num_timers + oproc->num_wd_timers; + oproc->timers = devm_kcalloc(&pdev->dev, num_timers, sizeof(*oproc->timers), GFP_KERNEL); if (!oproc->timers) { @@ -1111,8 +1243,8 @@ static int omap_rproc_probe(struct platform_device *pdev) goto free_rproc; } - dev_dbg(&pdev->dev, "device has %d tick timers\n", - oproc->num_timers); + dev_dbg(&pdev->dev, "device has %d tick timers and %d watchdog timers\n", + oproc->num_timers, oproc->num_wd_timers); } init_completion(&oproc->pm_comp);