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[77.136.150.251]) by smtp.gmail.com with ESMTPSA id y206-v6sm1523828wmg.14.2018.09.25.02.04.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 25 Sep 2018 02:04:30 -0700 (PDT) From: Daniel Lezcano To: edubezval@gmail.com Subject: [PATCH 08/14] ARM64: dts: hisilicon: Add tsensor interrupt name Date: Tue, 25 Sep 2018 11:03:06 +0200 Message-Id: <1537866192-12320-9-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537866192-12320-1-git-send-email-daniel.lezcano@linaro.org> References: <1537866192-12320-1-git-send-email-daniel.lezcano@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180925_020503_584855_AA2F425C X-CRM114-Status: GOOD ( 16.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-pm@vger.kernel.org, daniel.lezcano@linaro.org, linux-kernel@vger.kernel.org, Wei Xu , Rob Herring , leo.yan@linaro.org, Zhang Rui , "moderated list:ARM/HISILICON SOC SUPPORT" MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add the interrupt names for the sensors, so the code can rely on them instead of dealing with index which are prone to error. The name comes from the Hisilicon documentation found on internet. Signed-off-by: Daniel Lezcano --- .../bindings/thermal/hisilicon-thermal.txt | 3 ++ arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 63 +++++++++++----------- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 1 + 3 files changed, 36 insertions(+), 31 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt index cef716a..3edfae3 100644 --- a/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt @@ -7,6 +7,7 @@ region. - interrupt: The interrupt number to the cpu. Defines the interrupt used by /SOCTHERM/tsensor. +- interrupt-names: The interrupt names for the different sensors - clock-names: Input clock name, should be 'thermal_clk'. - clocks: phandles for clock specified in "clock-names" property. - #thermal-sensor-cells: Should be 1. See ./thermal.txt for a description. @@ -18,6 +19,7 @@ for Hi6220: compatible = "hisilicon,tsensor"; reg = <0x0 0xf7030700 0x0 0x1000>; interrupts = <0 7 0x4>; + interrupt-names = "tsensor_intr"; clocks = <&sys_ctrl HI6220_TSENSOR_CLK>; clock-names = "thermal_clk"; #thermal-sensor-cells = <1>; @@ -28,5 +30,6 @@ for Hi3660: compatible = "hisilicon,hi3660-tsensor"; reg = <0x0 0xfff30000 0x0 0x1000>; interrupts = ; + interrupt-names = "tsensor_a73"; #thermal-sensor-cells = <1>; }; diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index f432b0a..bf8a479 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -1081,46 +1081,47 @@ compatible = "hisilicon,hi3660-tsensor"; reg = <0x0 0xfff30000 0x0 0x1000>; interrupts = ; + interrupt-names = "tsensor_a73"; #thermal-sensor-cells = <1>; }; - thermal-zones { + thermal-zones { - cls0: cls0 { - polling-delay = <1000>; - polling-delay-passive = <100>; - sustainable-power = <4500>; + cls0: cls0 { + polling-delay = <1000>; + polling-delay-passive = <100>; + sustainable-power = <4500>; - /* sensor ID */ - thermal-sensors = <&tsensor 1>; + /* sensor ID */ + thermal-sensors = <&tsensor 1>; - trips { - threshold: trip-point@0 { - temperature = <65000>; - hysteresis = <1000>; - type = "passive"; - }; + trips { + threshold: trip-point@0 { + temperature = <65000>; + hysteresis = <1000>; + type = "passive"; + }; - target: trip-point@1 { - temperature = <75000>; - hysteresis = <1000>; - type = "passive"; - }; - }; + target: trip-point@1 { + temperature = <75000>; + hysteresis = <1000>; + type = "passive"; + }; + }; - cooling-maps { + cooling-maps { map0 { - trip = <&target>; - contribution = <1024>; - cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; + trip = <&target>; + contribution = <1024>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; map1 { - trip = <&target>; - contribution = <512>; - cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - }; + trip = <&target>; + contribution = <512>; + cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; }; }; diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 247024d..9eae986 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -841,6 +841,7 @@ compatible = "hisilicon,tsensor"; reg = <0x0 0xf7030700 0x0 0x1000>; interrupts = ; + interrupt-names = "tsensor_intr"; clocks = <&sys_ctrl 22>; clock-names = "thermal_clk"; #thermal-sensor-cells = <1>; From patchwork Tue Sep 25 09:03:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 10613741 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3A31C15E8 for ; Tue, 25 Sep 2018 09:07:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2ABC12836F for ; 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[77.136.150.251]) by smtp.gmail.com with ESMTPSA id y206-v6sm1523828wmg.14.2018.09.25.02.04.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 25 Sep 2018 02:04:36 -0700 (PDT) From: Daniel Lezcano To: edubezval@gmail.com Subject: [PATCH 10/14] ARM64: dts: hisilicon: Add interrupt names for the tsensors Date: Tue, 25 Sep 2018 11:03:08 +0200 Message-Id: <1537866192-12320-11-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537866192-12320-1-git-send-email-daniel.lezcano@linaro.org> References: <1537866192-12320-1-git-send-email-daniel.lezcano@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180925_020516_918338_C3F41DF3 X-CRM114-Status: GOOD ( 12.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-pm@vger.kernel.org, daniel.lezcano@linaro.org, linux-kernel@vger.kernel.org, Wei Xu , Rob Herring , leo.yan@linaro.org, Zhang Rui , "moderated list:ARM/HISILICON SOC SUPPORT" MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add the missing interrupts for the temperature sensors as well as their names. Signed-off-by: Daniel Lezcano --- Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt | 8 ++++++-- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8 ++++++-- 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt index 3edfae3..4cb8add 100644 --- a/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt @@ -29,7 +29,11 @@ for Hi3660: tsensor: tsensor@fff30000 { compatible = "hisilicon,hi3660-tsensor"; reg = <0x0 0xfff30000 0x0 0x1000>; - interrupts = ; - interrupt-names = "tsensor_a73"; + interrupts = , + , + , + ; + interrupt-names = "tsensor_a73", "tsensor_a53", + "tsensor_g3d", "tsensor_modem"; #thermal-sensor-cells = <1>; }; diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index bf8a479..dd398cb 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -1080,8 +1080,12 @@ tsensor: tsensor@fff30000 { compatible = "hisilicon,hi3660-tsensor"; reg = <0x0 0xfff30000 0x0 0x1000>; - interrupts = ; - interrupt-names = "tsensor_a73"; + interrupts = , + , + , + ; + interrupt-names = "tsensor_a73", "tsensor_a53", + "tsensor_g3d", "tsensor_modem"; #thermal-sensor-cells = <1>; }; From patchwork Tue Sep 25 09:03:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 10613743 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DF029112B for ; Tue, 25 Sep 2018 09:07:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CF8A12836F for ; Tue, 25 Sep 2018 09:07:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C41062967B; Tue, 25 Sep 2018 09:07:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 079072836F for ; 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[77.136.150.251]) by smtp.gmail.com with ESMTPSA id y206-v6sm1523828wmg.14.2018.09.25.02.04.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 25 Sep 2018 02:04:57 -0700 (PDT) From: Daniel Lezcano To: edubezval@gmail.com Subject: [PATCH 13/14] ARM64: dts: hisilicon: Add dual clusters thermal zones for hi3660 Date: Tue, 25 Sep 2018 11:03:11 +0200 Message-Id: <1537866192-12320-14-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537866192-12320-1-git-send-email-daniel.lezcano@linaro.org> References: <1537866192-12320-1-git-send-email-daniel.lezcano@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180925_020528_288377_CF9B263A X-CRM114-Status: GOOD ( 13.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-pm@vger.kernel.org, daniel.lezcano@linaro.org, linux-kernel@vger.kernel.org, Wei Xu , Rob Herring , leo.yan@linaro.org, "moderated list:ARM/HISILICON SOC SUPPORT" MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add a thermal zone for the little cluster, so we can handle two sensors managing each a cluster on the SoC. Signed-off-by: Daniel Lezcano --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 97 ++++++++++++++++++++----------- 1 file changed, 63 insertions(+), 34 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index dd398cb..6df7d9f 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -1090,42 +1090,71 @@ }; thermal-zones { + tz_a53: tz_a53 { + polling-delay = <1000>; + polling-delay-passive = <100>; + sustainable-power = <4500>; + + /* sensor ID */ + thermal-sensors = <&tsensor 0>; + + trips { + a53_temp_threshold: trip-point@0 { + temperature = <65000>; + hysteresis = <1000>; + type = "passive"; + }; + + a53_temp_target: trip-point@1 { + temperature = <75000>; + hysteresis = <1000>; + type = "passive"; + }; + }; - cls0: cls0 { - polling-delay = <1000>; - polling-delay-passive = <100>; - sustainable-power = <4500>; - - /* sensor ID */ - thermal-sensors = <&tsensor 1>; - - trips { - threshold: trip-point@0 { - temperature = <65000>; - hysteresis = <1000>; - type = "passive"; - }; - - target: trip-point@1 { - temperature = <75000>; - hysteresis = <1000>; - type = "passive"; - }; - }; - - cooling-maps { + cooling-maps { map0 { - trip = <&target>; - contribution = <1024>; - cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - map1 { - trip = <&target>; - contribution = <512>; - cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; + trip = <&a53_temp_target>; + contribution = <512>; + cooling-device = <&cpu0 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + tz_a73: tz_a73 { + polling-delay = <1000>; + polling-delay-passive = <100>; + sustainable-power = <4500>; + + /* sensor ID */ + thermal-sensors = <&tsensor 1>; + + trips { + a73_temp_threshold: trip-point@0 { + temperature = <65000>; + hysteresis = <1000>; + type = "passive"; + }; + + a73_temp_target: trip-point@1 { + temperature = <75000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + + cooling-maps { + map0 { + trip = <&a73_temp_target>; + contribution = <1024>; + cooling-device = <&cpu4 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; }; }; };