From patchwork Tue Jan 14 12:41:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean Pihet X-Patchwork-Id: 11332099 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 32BAB6C1 for ; Tue, 14 Jan 2020 12:41:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1176F2467C for ; Tue, 14 Jan 2020 12:41:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=newoldbits-com.20150623.gappssmtp.com header.i=@newoldbits-com.20150623.gappssmtp.com header.b="ZUOk1W2D" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726265AbgANMln (ORCPT ); Tue, 14 Jan 2020 07:41:43 -0500 Received: from mail-wr1-f66.google.com ([209.85.221.66]:33941 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726121AbgANMln (ORCPT ); Tue, 14 Jan 2020 07:41:43 -0500 Received: by mail-wr1-f66.google.com with SMTP id t2so12039867wrr.1 for ; Tue, 14 Jan 2020 04:41:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=newoldbits-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pEa4178Nhc6GAYjGzu95rHH0vJo43KEdBZ4GRcOPeuc=; b=ZUOk1W2DbG3aejm9qsIWCm6mPgJtoDvxDUdOww6Mq62e3mrr+pJ54NC9MQmz3XwsS1 x/vdyETC/dn3Bf5upRriG12WgW+Un9/jP0hALQU1D3r/XMmLMMYI7RKyjwOArnGLj3aq PQKbkGt/McXMZp9UPMT45arE9Z4NHtKm7k1lexgrntwBTsLkoNYnpTZzA6lDvUbHvlpq rM929+uUxR8rWRYU0DuaJaQx+Q7eN2yBTN3cAGwkdA9bdADobYTOYZ6P+AY1fnt+98Cf Kf1e3q2QHsGpTGI8J3Cty7F9H3PqgsOO73LZY/M57t//VZZYdXGcBblkgNqShH4fAUDL l+OQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pEa4178Nhc6GAYjGzu95rHH0vJo43KEdBZ4GRcOPeuc=; b=fR3sSGwIeCXi2C0e5k+2+0n1lvhouhdGKkNLWjVRfCaVdEW2fS7y1RLJk83PZjQ/XB ct8qofXD0ddXQ14qKBmqE+eRLUssp8vrxkiPZEhmUqw/3jH1PZKAxwQMaAEA1Wzad+8/ zzk0lfuuv4MfgAQ8z0jq5NFCAONvwPd8TsLa+lXl9EhiAFN0bqwHjZE2EKvWiEFvZbir RgtLu3fESsfKMOOte37Y2G8iqXd+ScO6sX16Z3wTvk/OzQVSzCG33uHM0/L71Txt2ZG/ 1/1OFebjl9/XbH4umXy8Jp3ouYFNx8TM4enHQPT3rLg9gjXPZjE1aAS3oo4l+TE/FPA4 l7Zg== X-Gm-Message-State: APjAAAUW3nGBkdDbqQl4V20HaDQgr1wbNeEYCXV35fMAUImEI7+0gTi+ V4c0GXt/arcPsrJV2yYAlQhTPg== X-Google-Smtp-Source: APXvYqzkntDcQtAd1BxT8+cRFMOwZf+WAh9KLRXPzCb+fnAJjUF0BFTZjP9SGjinvASsCW8gFJq3CQ== X-Received: by 2002:adf:ea42:: with SMTP id j2mr24860614wrn.270.1579005701521; Tue, 14 Jan 2020 04:41:41 -0800 (PST) Received: from msilabo.lan (241.33-200-80.adsl-dyn.isp.belgacom.be. [80.200.33.241]) by smtp.gmail.com with ESMTPSA id i5sm18260185wml.31.2020.01.14.04.41.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Jan 2020 04:41:40 -0800 (PST) From: Jean Pihet To: Mark Brown , Tony Lindgren , Vignesh Raghavendra Cc: linux-omap@vger.kernel.org, linux-spi@vger.kernel.org, Ryan Barnett , Conrad Ratschan , Arnout Vandecappelle , Jean Pihet Subject: [PATCH 1/2] spi: spi-ti-qspi: support large flash devices Date: Tue, 14 Jan 2020 13:41:24 +0100 Message-Id: <20200114124125.361429-2-jean.pihet@newoldbits.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200114124125.361429-1-jean.pihet@newoldbits.com> References: <20200114124125.361429-1-jean.pihet@newoldbits.com> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org The TI QSPI IP has limitations: - the MMIO region is 64MB in size - in non-MMIO mode, the transfer can handle 4096 words max. Add support for bigger devices. Use MMIO and DMA transfers below the 64MB boundary, use software generated transfers above. Signed-off-by: Jean Pihet Cc: Ryan Barnett Cc: Conrad Ratschan Cc: Arnout Vandecappelle --- drivers/spi/spi-ti-qspi.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c index ad2942b3d0a9..0334e2926998 100644 --- a/drivers/spi/spi-ti-qspi.c +++ b/drivers/spi/spi-ti-qspi.c @@ -525,6 +525,35 @@ static void ti_qspi_setup_mmap_read(struct spi_device *spi, u8 opcode, QSPI_SPI_SETUP_REG(spi->chip_select)); } +static int ti_qspi_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op) +{ + struct ti_qspi *qspi = spi_controller_get_devdata(mem->spi->master); + size_t max_len; + + if (op->data.dir == SPI_MEM_DATA_IN) { + if (op->addr.val < qspi->mmap_size) { + /* Limit MMIO to the mmaped region */ + if (op->addr.val + op->data.nbytes > qspi->mmap_size) { + max_len = qspi->mmap_size - op->addr.val; + op->data.nbytes = min((size_t) op->data.nbytes, + max_len); + } + } else { + /* + * Use fallback mode (SW generated transfers) above the + * mmaped region. + * Adjust size to comply with the QSPI max frame length. + */ + max_len = QSPI_FRAME; + max_len -= 1 + op->addr.nbytes + op->dummy.nbytes; + op->data.nbytes = min((size_t) op->data.nbytes, + max_len); + } + } + + return 0; +} + static int ti_qspi_exec_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) { @@ -575,6 +604,7 @@ static int ti_qspi_exec_mem_op(struct spi_mem *mem, static const struct spi_controller_mem_ops ti_qspi_mem_ops = { .exec_op = ti_qspi_exec_mem_op, + .adjust_op_size = ti_qspi_adjust_op_size, }; static int ti_qspi_start_transfer_one(struct spi_master *master, From patchwork Tue Jan 14 12:41:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean Pihet X-Patchwork-Id: 11332101 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2FCEA6C1 for ; Tue, 14 Jan 2020 12:41:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0E4592467C for ; Tue, 14 Jan 2020 12:41:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=newoldbits-com.20150623.gappssmtp.com header.i=@newoldbits-com.20150623.gappssmtp.com header.b="P/9NID94" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726342AbgANMlo (ORCPT ); Tue, 14 Jan 2020 07:41:44 -0500 Received: from mail-wm1-f68.google.com ([209.85.128.68]:35425 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726106AbgANMlo (ORCPT ); Tue, 14 Jan 2020 07:41:44 -0500 Received: by mail-wm1-f68.google.com with SMTP id p17so13567338wmb.0 for ; Tue, 14 Jan 2020 04:41:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=newoldbits-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RuFcvURIwl3QEskF2/O6O3xS34vena8ygMjl8ypgEHw=; b=P/9NID945fj+tW2UHMVnT3ozdvK2MzX6RDZJWoGW/ef3oxygVKB0rhf9IH2tpkG/tD J1NpL8DdhBEGPGhVlh6XBrtOx12B0aIGuikoUKUgvePAvztiK0AB9+cgQIDycBdlYgrW Np/eTUdbmsO6q3ju5kjPxFgN5YhhjDDIZeoFbbl4TJQ/eQtPyy9YAw9TLqSLG9VnjZwA gxUG9b3kg/kSug+Q1nq/quSe58QI/+XBycrL/Jkptpx3huukjy/IaPn8iCDFvftz/20U cZuQwzapdRI3mzzR7PZ1M9OKlovGodHmoo9jznr6vt5G0URAXoWzOjsvDXf1snqHlGBK 5zlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RuFcvURIwl3QEskF2/O6O3xS34vena8ygMjl8ypgEHw=; b=tfFqVDXIdHcR4ESwLe1HFpslaxoed1/t0lNvQRmBe3ciHQ4lc/0KRFYImIaXmivjiA TRwMtyG7eVo6OIE1hWv8LBa0xkOZeBfIwYM/JjddBScCVDJ7vuz0mNDSUvC1eEUalfv8 AqCgB76DmjfXcJw/j2tXqG2R637F6HRW5EpaqLDsU1IMg98FdCdTlaZrPRHHbmPH+DCl 2RnBZ2OTwIyyjehePGKJnh66LV2WtWYe7p9X75ePc9IFbFGrsUEiUM/c/UryWqHxgoK5 sk+nEG0ITqMY6tvA8SGgUMHMdWMWzKXxpmMUdL1JtMIffbjkB7RVmxdRmkKGbohFYp4x qyNw== X-Gm-Message-State: APjAAAUjeeef+6X07yrjmnX55ZnhhtQrTKVLWto5V6NYxzXi1VaR/2lZ 6PWp18iYf9nLuFy3ULw2QQYfug== X-Google-Smtp-Source: APXvYqyz9OBeckCVBa1MPx1CpVOp9iXJMMupsGydT1vzHC77j7stWudOPiXkh82lnDgkCPBhBesxew== X-Received: by 2002:a1c:f20c:: with SMTP id s12mr27616650wmc.173.1579005702690; Tue, 14 Jan 2020 04:41:42 -0800 (PST) Received: from msilabo.lan (241.33-200-80.adsl-dyn.isp.belgacom.be. [80.200.33.241]) by smtp.gmail.com with ESMTPSA id i5sm18260185wml.31.2020.01.14.04.41.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Jan 2020 04:41:42 -0800 (PST) From: Jean Pihet To: Mark Brown , Tony Lindgren , Vignesh Raghavendra Cc: linux-omap@vger.kernel.org, linux-spi@vger.kernel.org, Ryan Barnett , Conrad Ratschan , Arnout Vandecappelle , Jean Pihet Subject: [PATCH 2/2] spi: spi-ti-qspi: optimize byte-transfers Date: Tue, 14 Jan 2020 13:41:25 +0100 Message-Id: <20200114124125.361429-3-jean.pihet@newoldbits.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200114124125.361429-1-jean.pihet@newoldbits.com> References: <20200114124125.361429-1-jean.pihet@newoldbits.com> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Optimize the 8-bit based transfers, as used by the SPI flash devices, by reading the data registers by 32 and 128 bits when possible and copy the contents to the receive buffer. The speed improvement is 4.9x using quad read. Signed-off-by: Jean Pihet Cc: Ryan Barnett Cc: Conrad Ratschan Cc: Arnout Vandecappelle --- drivers/spi/spi-ti-qspi.c | 54 ++++++++++++++++++++++++++++++++++++--- 1 file changed, 51 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c index 0334e2926998..858fda8ac73e 100644 --- a/drivers/spi/spi-ti-qspi.c +++ b/drivers/spi/spi-ti-qspi.c @@ -314,6 +314,8 @@ static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t, { int wlen; unsigned int cmd; + u32 rx; + u8 rxlen, rx_wlen; u8 *rxbuf; rxbuf = t->rx_buf; @@ -336,14 +338,60 @@ static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t, if (qspi_is_busy(qspi)) return -EBUSY; + switch (wlen) { + case 1: + /* + * Optimize the 8-bit words transfers, as used by + * the SPI flash devices. + */ + if (count >= QSPI_WLEN_MAX_BYTES) { + rxlen = QSPI_WLEN_MAX_BYTES; + } else { + rxlen = min(count, 4); + } + rx_wlen = rxlen << 3; + cmd &= ~QSPI_WLEN_MASK; + cmd |= QSPI_WLEN(rx_wlen); + break; + default: + rxlen = wlen; + break; + } + ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG); if (ti_qspi_poll_wc(qspi)) { dev_err(qspi->dev, "read timed out\n"); return -ETIMEDOUT; } + switch (wlen) { case 1: - *rxbuf = readb(qspi->base + QSPI_SPI_DATA_REG); + /* + * Optimize the 8-bit words transfers, as used by + * the SPI flash devices. + */ + if (count >= QSPI_WLEN_MAX_BYTES) { + u32 *rxp = (u32 *) rxbuf; + rx = readl(qspi->base + QSPI_SPI_DATA_REG_3); + *rxp++ = be32_to_cpu(rx); + rx = readl(qspi->base + QSPI_SPI_DATA_REG_2); + *rxp++ = be32_to_cpu(rx); + rx = readl(qspi->base + QSPI_SPI_DATA_REG_1); + *rxp++ = be32_to_cpu(rx); + rx = readl(qspi->base + QSPI_SPI_DATA_REG); + *rxp++ = be32_to_cpu(rx); + } else { + u8 *rxp = rxbuf; + rx = readl(qspi->base + QSPI_SPI_DATA_REG); + if (rx_wlen >= 8) + *rxp++ = rx >> (rx_wlen - 8); + if (rx_wlen >= 16) + *rxp++ = rx >> (rx_wlen - 16); + if (rx_wlen >= 24) + *rxp++ = rx >> (rx_wlen - 24); + if (rx_wlen >= 32) + *rxp++ = rx; + } break; case 2: *((u16 *)rxbuf) = readw(qspi->base + QSPI_SPI_DATA_REG); @@ -352,8 +400,8 @@ static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t, *((u32 *)rxbuf) = readl(qspi->base + QSPI_SPI_DATA_REG); break; } - rxbuf += wlen; - count -= wlen; + rxbuf += rxlen; + count -= rxlen; } return 0;