From patchwork Mon Jan 20 16:30:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 11342573 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A5A466C1 for ; Mon, 20 Jan 2020 16:32:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8431D22464 for ; Mon, 20 Jan 2020 16:32:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="G2IagIBO" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729464AbgATQcl (ORCPT ); Mon, 20 Jan 2020 11:32:41 -0500 Received: from mail-wm1-f65.google.com ([209.85.128.65]:38155 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728783AbgATQau (ORCPT ); Mon, 20 Jan 2020 11:30:50 -0500 Received: by mail-wm1-f65.google.com with SMTP id u2so216499wmc.3 for ; Mon, 20 Jan 2020 08:30:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=qsI/xaPXMqNdKm9K1igbwkE2PA4fRpWtUntr4tiEc9c=; b=G2IagIBOWzh/x16MmgeTD8wsIydKubQXPVKg1rv4Z4RR14LDQWt4zUhDU1HfrMHczS g2r9eRIVi4i/ydvfIil0I54FM5sMKiwf39RnsBZSyhht06aVtE2SnZ0ieVphedo49NHE jyM9X8ahmWECdxjbEEEKkrA8C6jqWVGjCx3+mWK3UP1CKmMc7ZJeoiUO+sWU5PGFXemw zpIi9XvkZfWSNzY6KYAnoZbZJ4XiUdOJl7/BKzSETmz/GahtWUPtDVdmLoNqDJwfDswp 38kre8EH+B9ShaUuYJ3dKFx96kX7u04ZL+AN6b+ayfcCPPkyHlf/ntH6qcrqH+/Dk+05 LwsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qsI/xaPXMqNdKm9K1igbwkE2PA4fRpWtUntr4tiEc9c=; b=q6oXbshhDue/mkRKzw5Bsz0EiClLfko91O595ItPgqdym7GC2bLQXF6qytWAOzM5h3 6HoMT3d8lVffd/5vVf80bUeNgqG3mgFXkINGFSeaGLV35WMx4jtQpgj/yapGx7nnumZv 5S4fFEkyQaxRiKyO1Y+vDve3ydH2SWELcckOn8zN+trwviqB/cEsgzi96tVLfD3CaSSe wH2a1+dhCV6qhXeJ6My5ncCY9BiZSN94YMgwVc4LPOqz2bEysD2xuyqDdsvRi/yyRNJ2 2r8J4KTvwuwIISBIFvaCqaKMpCnLVELSVqWHab6Ji6Q9b2xrAyUSnYs2A6di2MBPS6eV P5aQ== X-Gm-Message-State: APjAAAXDbCAgSovQR6X4Y7VrEV7G2YdpWDLIMg+Z7vgsokUi2PXfQYF3 s9bTkDyWgR67NTeXM+20GmiW4TODlQU= X-Google-Smtp-Source: APXvYqzzFJTUL2uBj8UC6wtxz6N+1fzM94B2exU3q07GUKuUf2SDhArGvq1P2gzxo5nwlVOdim5jTg== X-Received: by 2002:a1c:22c6:: with SMTP id i189mr165624wmi.15.1579537847957; Mon, 20 Jan 2020 08:30:47 -0800 (PST) Received: from localhost.localdomain ([176.61.57.127]) by smtp.gmail.com with ESMTPSA id p26sm22631756wmc.24.2020.01.20.08.30.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jan 2020 08:30:47 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, balbi@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, Jorge Ramirez-Ortiz , Jorge Ramirez-Ortiz , Bryan O'Donoghue Subject: [PATCH v2 01/19] dt-bindings: phy: remove qcom-dwc3-usb-phy Date: Mon, 20 Jan 2020 16:30:58 +0000 Message-Id: <20200120163116.1197682-2-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> References: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Jorge Ramirez-Ortiz This binding is not used by any driver. Signed-off-by: Jorge Ramirez-Ortiz Cc: Jorge Ramirez-Ortiz Signed-off-by: Bryan O'Donoghue --- .../bindings/phy/qcom-dwc3-usb-phy.txt | 37 ------------------- 1 file changed, 37 deletions(-) delete mode 100644 Documentation/devicetree/bindings/phy/qcom-dwc3-usb-phy.txt diff --git a/Documentation/devicetree/bindings/phy/qcom-dwc3-usb-phy.txt b/Documentation/devicetree/bindings/phy/qcom-dwc3-usb-phy.txt deleted file mode 100644 index a1697c27aecd..000000000000 --- a/Documentation/devicetree/bindings/phy/qcom-dwc3-usb-phy.txt +++ /dev/null @@ -1,37 +0,0 @@ -Qualcomm DWC3 HS AND SS PHY CONTROLLER --------------------------------------- - -DWC3 PHY nodes are defined to describe on-chip Synopsis Physical layer -controllers. Each DWC3 PHY controller should have its own node. - -Required properties: -- compatible: should contain one of the following: - - "qcom,dwc3-hs-usb-phy" for High Speed Synopsis PHY controller - - "qcom,dwc3-ss-usb-phy" for Super Speed Synopsis PHY controller -- reg: offset and length of the DWC3 PHY controller register set -- #phy-cells: must be zero -- clocks: a list of phandles and clock-specifier pairs, one for each entry in - clock-names. -- clock-names: Should contain "ref" for the PHY reference clock - -Optional clocks: - "xo" External reference clock - -Example: - phy@100f8800 { - compatible = "qcom,dwc3-hs-usb-phy"; - reg = <0x100f8800 0x30>; - clocks = <&gcc USB30_0_UTMI_CLK>; - clock-names = "ref"; - #phy-cells = <0>; - - }; - - phy@100f8830 { - compatible = "qcom,dwc3-ss-usb-phy"; - reg = <0x100f8830 0x30>; - clocks = <&gcc USB30_0_MASTER_CLK>; - clock-names = "ref"; - #phy-cells = <0>; - - }; From patchwork Mon Jan 20 16:30:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 11342491 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 76B056C1 for ; Mon, 20 Jan 2020 16:30:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5475822525 for ; Mon, 20 Jan 2020 16:30:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="E3TUXDLF" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729281AbgATQav (ORCPT ); Mon, 20 Jan 2020 11:30:51 -0500 Received: from mail-wr1-f68.google.com ([209.85.221.68]:40171 "EHLO mail-wr1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729190AbgATQau (ORCPT ); Mon, 20 Jan 2020 11:30:50 -0500 Received: by mail-wr1-f68.google.com with SMTP id c14so84705wrn.7 for ; Mon, 20 Jan 2020 08:30:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nTFFco0gWzvhgT9KdZyGts1IZHmn3ADc6A60yVAjcjA=; b=E3TUXDLFsRf1DDHWwkKh7tckR0wSSQmYwx7t2OpjARissZgKnYrJ/ZSN7y8mj9ZxJK SPb/Uwj1ZoYSJtQWV04eIYbHRTFMVXAxCrS0tzNJnSHEZwKTlLg/JOg4p/2WOVe90Ksl tLwyAdhOiQsJyrf3GAS0wOK/vWnvek13HtVnymYsZ7+wSUkdK6HWPoBt7eE+s7wYF26D qOeMrFrCSi2Hy/gmtRWe//9MGWj9Td0DnEShAMcRRwJktAuTyfBnOF+x+w56mLA2bDac Mf4PmJwc6ZZTRIK6N2QNrfsP6qcaimBat6dycGo86hUR9oPUyqXLS4p+7mFMVkPVBGaS 24dg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nTFFco0gWzvhgT9KdZyGts1IZHmn3ADc6A60yVAjcjA=; b=mmBtrQ7AKeIz3K8/Ip0AiwjZHsiq8xQ4OKJlzYfMw095+RbtSkThDTf/MM7IU+NCdt USwhroegrRyWp8OfbRDl216TdhVcqLBYqaOH+1KnHQU4YR0Qx8c7Tf1k1hWw7C6pecRu 3CQtQNTaWby7PuiaDAUNNuapQr8v4Hhpmnl6PXGU94Ryn+laP+ciqpaAtlcYUI9zTPPp FhLua8nhWXwKqzL59xlacsAjJ+7DJhbyiCeNS4672YiwdMFLOI9DA/6WVh4yUaUSjlc4 NHFQoGPm4jUr7E6AHDj2stkdIiMoBboXn/HhTKKMPp9SGkKyvLFc80nL1Dwg3gp1CoyB K3KA== X-Gm-Message-State: APjAAAXlpR6n8x8RmDf2gCg3OJNhWKMRdL84wJB3By7JB5ZO0UV5S6z6 6HlJTAy2uWl/DLq3u0YSS399oA== X-Google-Smtp-Source: APXvYqwQd9Ak+wLCPW1MjhuwABPMU2OcpO5+S4zND3DZkbpw3Va8L9RDfryhgP5CaMmMUnDRqPlwwg== X-Received: by 2002:adf:f508:: with SMTP id q8mr341639wro.334.1579537849345; Mon, 20 Jan 2020 08:30:49 -0800 (PST) Received: from localhost.localdomain ([176.61.57.127]) by smtp.gmail.com with ESMTPSA id p26sm22631756wmc.24.2020.01.20.08.30.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jan 2020 08:30:48 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, balbi@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, Sriharsha Allenki , Anu Ramanathan , Shawn Guo , Andy Gross , Kishon Vijay Abraham I , Rob Herring , Mark Rutland , Jorge Ramirez-Ortiz , devicetree@vger.kernel.org, Bryan O'Donoghue Subject: [PATCH v2 02/19] dt-bindings: phy: Add Qualcomm Synopsys Hi-Speed USB PHY binding Date: Mon, 20 Jan 2020 16:30:59 +0000 Message-Id: <20200120163116.1197682-3-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> References: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Sriharsha Allenki Adds bindings for QCS404 USB PHY supporting Low-Speed, Full-Speed and Hi-Speed USB connectivity on Qualcomm chipsets. [bod: Converted to YAML. Changed name dropping snps, 28nm components] Signed-off-by: Sriharsha Allenki Signed-off-by: Anu Ramanathan Signed-off-by: Bjorn Andersson Signed-off-by: Shawn Guo Cc: Andy Gross Cc: Bjorn Andersson Cc: Kishon Vijay Abraham I Cc: Rob Herring Cc: Mark Rutland Cc: Jorge Ramirez-Ortiz Cc: linux-arm-msm@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Signed-off-by: Bryan O'Donoghue --- .../bindings/phy/qcom,qcs404-usb-hs.yaml | 77 +++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/qcom,qcs404-usb-hs.yaml diff --git a/Documentation/devicetree/bindings/phy/qcom,qcs404-usb-hs.yaml b/Documentation/devicetree/bindings/phy/qcom,qcs404-usb-hs.yaml new file mode 100644 index 000000000000..d71beb822ae2 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,qcs404-usb-hs.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/qcom,qcs404-usb-hs.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm Synopsys QCS-404 High-Speed PHY + +maintainers: + - Bryan O'Donoghue + +description: | + Qualcomm QCS-404 Low-Speed, Full-Speed, Hi-Speed USB PHY + +properties: + compatible: + enum: + - qcom,qcs404-usb-hsphy + + reg: + maxItems: 1 + description: USB PHY base address and length of the register map. + + "#phy-cells": + const: 0 + description: Should be 0. See phy/phy-bindings.txt for details. + + clocks: + minItems: 3 + maxItems: 3 + description: phandles to rpmcc ref clock, PHY AHB clock, rentention clock. + + clock-names: + items: + - const: ref + - const: phy + - const: sleep + + resets: + items: + - description: PHY core reset + - description: POR reset + + reset-names: + items: + - const: phy + - const: por + + vdd-supply: + maxItems: 1 + description: phandle to the regulator VDD supply node. + + vdda1p8-supply: + maxItems: 1 + description: phandle to the regulator 1.8V supply node. + + vdda3p3-supply: + maxItems: 1 + description: phandle to the regulator 3.3V supply node. + +examples: + - | + #include + #include + usb2_phy_prim: phy@7a000 { + compatible = "qcom,qcs404-usb-hsphy"; + reg = <0x0007a000 0x200>; + #phy-cells = <0>; + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, + <&gcc GCC_USB2A_PHY_SLEEP_CLK>; + clock-names = "ref", "phy", "sleep"; + resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_BCR>, + <&gcc GCC_USB2A_PHY_BCR>; + reset-names = "phy", "por"; + }; +... From patchwork Mon Jan 20 16:31:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 11342569 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 781B66C1 for ; Mon, 20 Jan 2020 16:32:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 43C0122525 for ; Mon, 20 Jan 2020 16:32:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="qcs9p5Jc" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729860AbgATQcg (ORCPT ); Mon, 20 Jan 2020 11:32:36 -0500 Received: from mail-wm1-f67.google.com ([209.85.128.67]:55514 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729285AbgATQay (ORCPT ); Mon, 20 Jan 2020 11:30:54 -0500 Received: by mail-wm1-f67.google.com with SMTP id q9so191134wmj.5 for ; Mon, 20 Jan 2020 08:30:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FIB8X4KTMSMav9IDv7FsBm+HOZtjyAZ9FH0A+hL6eL0=; b=qcs9p5JcmW2r+77XD45BXAYQtxkigFSgl6mx9RuivEMqEIOpfVKKWsQL5bStvnuFRO gLBxrPwmYXAtcr02lFZmcTcMN+OOEUhKZ7J1+COASDkcmIUA4YFifai+5AoW5LIiXXWS CZVRzOkV7by98h2Rbik5MzMGTUO/+zBBKZFvwjxjmwqtdIDfI8QIDnHOlgYwg58PkJl0 iReA5ENtLboXugSOHei3z3fDKeT1QrTDT8f+0sro3NZ7PIcEJ9PnuY6lAzr6DNuaGZw5 qXpOsB/kwaqMDWWFfIX3cXjYzuG4PunnD3Ee6biwrJMlizyhWomWJmk9WltMC8sjgoGo jxDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FIB8X4KTMSMav9IDv7FsBm+HOZtjyAZ9FH0A+hL6eL0=; b=qozmUUdVBeWMMV7r2pVK28g0m8J5745yZG1p40x4kZVLXATS/XdBuaFaCeRUzNljLP x0mqUnCRkz0sKbI/1gsaLwKKikjRIYYcP9HzR72VQoEru4GAbaYumeoJwmLFGuNz47ge NG6DClj8W0rzjgmQaWFS8J7TkLXZ/48sw20hzTEcFDYraefoqknpMae6Coh+iy/4gM6V B1noEqxPMHxeCxCz2a8IL1myriCLLV2AAyNR1h7Bvvk//2VboOdz77prEQpXVbfMVGX/ seiKzqA6PctwgVp31NtgE8H68ftJTDGbxKl7vF3HL8CQYpYGdfMKtxS7ec3vT0sOR7zT ECRw== X-Gm-Message-State: APjAAAV8bZqt59p+C3qCp7lNN01mfSZbEY8P4K4vRkkQQcsn2zfAeRTj XffD6ZcelKjjhIZZsdf0C5bZ7Q== X-Google-Smtp-Source: APXvYqx3eoAWLsQGc56aB9fnyuVxlVv5VSmTrsS83u6ZCDRd9abn0bfAqIMD+LLyw2IkwuQNVMcyRQ== X-Received: by 2002:a1c:541b:: with SMTP id i27mr153340wmb.137.1579537850534; Mon, 20 Jan 2020 08:30:50 -0800 (PST) Received: from localhost.localdomain ([176.61.57.127]) by smtp.gmail.com with ESMTPSA id p26sm22631756wmc.24.2020.01.20.08.30.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jan 2020 08:30:50 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, balbi@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, Shawn Guo , Andy Gross , Kishon Vijay Abraham I , Philipp Zabel , Jorge Ramirez-Ortiz , Bryan O'Donoghue Subject: [PATCH v2 03/19] phy: qualcomm: Add Synopsys Hi-Speed USB PHY driver Date: Mon, 20 Jan 2020 16:31:00 +0000 Message-Id: <20200120163116.1197682-4-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> References: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Shawn Guo Adds Qualcomm QCS404 Hi-Speed USB PHY driver support. This PHY is usually is usually paired with Synopsys DWC3 USB controllers on Qualcomm SoCs. [bod: Updated qcom_snps_hsphy_set_mode to match new method signature Added disjunct on mode > 0 Removed regulator_set_voltage() in favour of setting floor in dts Removed 'snps' and '28nm' from driver name] Signed-off-by: Shawn Guo Cc: Andy Gross Cc: Bjorn Andersson Cc: Kishon Vijay Abraham I Cc: Philipp Zabel Cc: Jorge Ramirez-Ortiz Cc: linux-arm-msm@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Bryan O'Donoghue --- drivers/phy/qualcomm/Kconfig | 10 + drivers/phy/qualcomm/Makefile | 1 + drivers/phy/qualcomm/phy-qcom-qcs404-usb-hs.c | 415 ++++++++++++++++++ 3 files changed, 426 insertions(+) create mode 100644 drivers/phy/qualcomm/phy-qcom-qcs404-usb-hs.c diff --git a/drivers/phy/qualcomm/Kconfig b/drivers/phy/qualcomm/Kconfig index e46824da29f6..cc3f2bb01ad1 100644 --- a/drivers/phy/qualcomm/Kconfig +++ b/drivers/phy/qualcomm/Kconfig @@ -91,3 +91,13 @@ config PHY_QCOM_USB_HSIC select GENERIC_PHY help Support for the USB HSIC ULPI compliant PHY on QCOM chipsets. + +config PHY_QCOM_QCS404_USB_HS + tristate "Qualcomm QCS404 Hi-Speed USB PHY driver" + depends on ARCH_QCOM || COMPILE_TEST + depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in + select GENERIC_PHY + help + Enable this to support the Qualcomm QCS404 USB Hi-Speed PHY driver. + This driver supports the Hi-Speed PHY which is usually paired with + either the ChipIdea or Synopsys DWC3 USB IPs on MSM SOCs. diff --git a/drivers/phy/qualcomm/Makefile b/drivers/phy/qualcomm/Makefile index 283251d6a5d9..a4a3b21240fa 100644 --- a/drivers/phy/qualcomm/Makefile +++ b/drivers/phy/qualcomm/Makefile @@ -10,3 +10,4 @@ obj-$(CONFIG_PHY_QCOM_UFS_14NM) += phy-qcom-ufs-qmp-14nm.o obj-$(CONFIG_PHY_QCOM_UFS_20NM) += phy-qcom-ufs-qmp-20nm.o obj-$(CONFIG_PHY_QCOM_USB_HS) += phy-qcom-usb-hs.o obj-$(CONFIG_PHY_QCOM_USB_HSIC) += phy-qcom-usb-hsic.o +obj-$(CONFIG_PHY_QCOM_QCS404_USB_HS) += phy-qcom-qcs404-usb-hs.o diff --git a/drivers/phy/qualcomm/phy-qcom-qcs404-usb-hs.c b/drivers/phy/qualcomm/phy-qcom-qcs404-usb-hs.c new file mode 100644 index 000000000000..0ea7c32941dd --- /dev/null +++ b/drivers/phy/qualcomm/phy-qcom-qcs404-usb-hs.c @@ -0,0 +1,415 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2009-2018, Linux Foundation. All rights reserved. + * Copyright (c) 2018-2020, Linaro Limited + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* PHY register and bit definitions */ +#define PHY_CTRL_COMMON0 0x078 +#define SIDDQ BIT(2) +#define PHY_IRQ_CMD 0x0d0 +#define PHY_INTR_MASK0 0x0d4 +#define PHY_INTR_CLEAR0 0x0dc +#define DPDM_MASK 0x1e +#define DP_1_0 BIT(4) +#define DP_0_1 BIT(3) +#define DM_1_0 BIT(2) +#define DM_0_1 BIT(1) + +enum hsphy_voltage { + VOL_NONE, + VOL_MIN, + VOL_MAX, + VOL_NUM, +}; + +enum hsphy_vreg { + VDD, + VDDA_1P8, + VDDA_3P3, + VREG_NUM, +}; + +struct hsphy_init_seq { + int offset; + int val; + int delay; +}; + +struct hsphy_data { + const struct hsphy_init_seq *init_seq; + unsigned int init_seq_num; +}; + +struct hsphy_priv { + void __iomem *base; + struct clk_bulk_data *clks; + int num_clks; + struct reset_control *phy_reset; + struct reset_control *por_reset; + struct regulator_bulk_data vregs[VREG_NUM]; + const struct hsphy_data *data; + enum phy_mode mode; +}; + +static int qcom_snps_hsphy_set_mode(struct phy *phy, enum phy_mode mode, + int submode) +{ + struct hsphy_priv *priv = phy_get_drvdata(phy); + + priv->mode = PHY_MODE_INVALID; + + if (mode > 0) + priv->mode = mode; + + return 0; +} + +static void qcom_snps_hsphy_enable_hv_interrupts(struct hsphy_priv *priv) +{ + u32 val; + + /* Clear any existing interrupts before enabling the interrupts */ + val = readb(priv->base + PHY_INTR_CLEAR0); + val |= DPDM_MASK; + writeb(val, priv->base + PHY_INTR_CLEAR0); + + writeb(0x0, priv->base + PHY_IRQ_CMD); + usleep_range(200, 220); + writeb(0x1, priv->base + PHY_IRQ_CMD); + + /* Make sure the interrupts are cleared */ + usleep_range(200, 220); + + val = readb(priv->base + PHY_INTR_MASK0); + switch (priv->mode) { + case PHY_MODE_USB_HOST_HS: + case PHY_MODE_USB_HOST_FS: + case PHY_MODE_USB_DEVICE_HS: + case PHY_MODE_USB_DEVICE_FS: + val |= DP_1_0 | DM_0_1; + break; + case PHY_MODE_USB_HOST_LS: + case PHY_MODE_USB_DEVICE_LS: + val |= DP_0_1 | DM_1_0; + break; + default: + /* No device connected */ + val |= DP_0_1 | DM_0_1; + break; + } + writeb(val, priv->base + PHY_INTR_MASK0); +} + +static void qcom_snps_hsphy_disable_hv_interrupts(struct hsphy_priv *priv) +{ + u32 val; + + val = readb(priv->base + PHY_INTR_MASK0); + val &= ~DPDM_MASK; + writeb(val, priv->base + PHY_INTR_MASK0); + + /* Clear any pending interrupts */ + val = readb(priv->base + PHY_INTR_CLEAR0); + val |= DPDM_MASK; + writeb(val, priv->base + PHY_INTR_CLEAR0); + + writeb(0x0, priv->base + PHY_IRQ_CMD); + usleep_range(200, 220); + + writeb(0x1, priv->base + PHY_IRQ_CMD); + usleep_range(200, 220); +} + +static void qcom_snps_hsphy_enter_retention(struct hsphy_priv *priv) +{ + u32 val; + + val = readb(priv->base + PHY_CTRL_COMMON0); + val |= SIDDQ; + writeb(val, priv->base + PHY_CTRL_COMMON0); +} + +static void qcom_snps_hsphy_exit_retention(struct hsphy_priv *priv) +{ + u32 val; + + val = readb(priv->base + PHY_CTRL_COMMON0); + val &= ~SIDDQ; + writeb(val, priv->base + PHY_CTRL_COMMON0); +} + +static int qcom_snps_hsphy_power_on(struct phy *phy) +{ + struct hsphy_priv *priv = phy_get_drvdata(phy); + int ret; + + ret = regulator_bulk_enable(VREG_NUM, priv->vregs); + if (ret) + return ret; + ret = clk_bulk_prepare_enable(priv->num_clks, priv->clks); + if (ret) + goto err_disable_regulator; + qcom_snps_hsphy_disable_hv_interrupts(priv); + qcom_snps_hsphy_exit_retention(priv); + + return 0; + +err_disable_regulator: + regulator_bulk_disable(VREG_NUM, priv->vregs); + + return ret; +} + +static int qcom_snps_hsphy_power_off(struct phy *phy) +{ + struct hsphy_priv *priv = phy_get_drvdata(phy); + + qcom_snps_hsphy_enter_retention(priv); + qcom_snps_hsphy_enable_hv_interrupts(priv); + clk_bulk_disable_unprepare(priv->num_clks, priv->clks); + regulator_bulk_disable(VREG_NUM, priv->vregs); + + return 0; +} + +static int qcom_snps_hsphy_reset(struct hsphy_priv *priv) +{ + int ret; + + ret = reset_control_assert(priv->phy_reset); + if (ret) + return ret; + + usleep_range(10, 15); + + ret = reset_control_deassert(priv->phy_reset); + if (ret) + return ret; + + usleep_range(80, 100); + + return 0; +} + +static void qcom_snps_hsphy_init_sequence(struct hsphy_priv *priv) +{ + const struct hsphy_data *data = priv->data; + const struct hsphy_init_seq *seq; + int i; + + /* Device match data is optional. */ + if (!data) + return; + + seq = data->init_seq; + + for (i = 0; i < data->init_seq_num; i++, seq++) { + writeb(seq->val, priv->base + seq->offset); + if (seq->delay) + usleep_range(seq->delay, seq->delay + 10); + } +} + +static int qcom_snps_hsphy_por_reset(struct hsphy_priv *priv) +{ + int ret; + + ret = reset_control_assert(priv->por_reset); + if (ret) + return ret; + + /* + * The Femto PHY is POR reset in the following scenarios. + * + * 1. After overriding the parameter registers. + * 2. Low power mode exit from PHY retention. + * + * Ensure that SIDDQ is cleared before bringing the PHY + * out of reset. + */ + qcom_snps_hsphy_exit_retention(priv); + + /* + * As per databook, 10 usec delay is required between + * PHY POR assert and de-assert. + */ + usleep_range(10, 20); + ret = reset_control_deassert(priv->por_reset); + if (ret) + return ret; + + /* + * As per databook, it takes 75 usec for PHY to stabilize + * after the reset. + */ + usleep_range(80, 100); + + return 0; +} + +static int qcom_snps_hsphy_init(struct phy *phy) +{ + struct hsphy_priv *priv = phy_get_drvdata(phy); + int ret; + + ret = qcom_snps_hsphy_reset(priv); + if (ret) + return ret; + + qcom_snps_hsphy_init_sequence(priv); + + ret = qcom_snps_hsphy_por_reset(priv); + if (ret) + return ret; + + return 0; +} + +static const struct phy_ops qcom_snps_hsphy_ops = { + .init = qcom_snps_hsphy_init, + .power_on = qcom_snps_hsphy_power_on, + .power_off = qcom_snps_hsphy_power_off, + .set_mode = qcom_snps_hsphy_set_mode, + .owner = THIS_MODULE, +}; + +static const char * const qcom_snps_hsphy_clks[] = { + "ref", + "phy", + "sleep", +}; + +static int qcom_snps_hsphy_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct phy_provider *provider; + struct hsphy_priv *priv; + struct phy *phy; + int ret; + int i; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + priv->num_clks = ARRAY_SIZE(qcom_snps_hsphy_clks); + priv->clks = devm_kcalloc(dev, priv->num_clks, sizeof(*priv->clks), + GFP_KERNEL); + if (!priv->clks) + return -ENOMEM; + + for (i = 0; i < priv->num_clks; i++) + priv->clks[i].id = qcom_snps_hsphy_clks[i]; + + ret = devm_clk_bulk_get(dev, priv->num_clks, priv->clks); + if (ret) + return ret; + + priv->phy_reset = devm_reset_control_get_exclusive(dev, "phy"); + if (IS_ERR(priv->phy_reset)) + return PTR_ERR(priv->phy_reset); + + priv->por_reset = devm_reset_control_get_exclusive(dev, "por"); + if (IS_ERR(priv->por_reset)) + return PTR_ERR(priv->por_reset); + + priv->vregs[VDD].supply = "vdd"; + priv->vregs[VDDA_1P8].supply = "vdda1p8"; + priv->vregs[VDDA_3P3].supply = "vdda3p3"; + + ret = devm_regulator_bulk_get(dev, VREG_NUM, priv->vregs); + if (ret) + return ret; + + /* Get device match data */ + priv->data = device_get_match_data(dev); + + phy = devm_phy_create(dev, dev->of_node, &qcom_snps_hsphy_ops); + if (IS_ERR(phy)) + return PTR_ERR(phy); + + phy_set_drvdata(phy, priv); + + provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + if (IS_ERR(provider)) + return PTR_ERR(provider); + + ret = regulator_set_load(priv->vregs[VDDA_1P8].consumer, 19000); + if (ret < 0) + return ret; + + ret = regulator_set_load(priv->vregs[VDDA_3P3].consumer, 16000); + if (ret < 0) + goto unset_1p8_load; + + return 0; + +unset_1p8_load: + regulator_set_load(priv->vregs[VDDA_1P8].consumer, 0); + + return ret; +} + +/* + * The macro is used to define an initialization sequence. Each tuple + * is meant to program 'value' into phy register at 'offset' with 'delay' + * in us followed. + */ +#define HSPHY_INIT_CFG(o, v, d) { .offset = o, .val = v, .delay = d, } + +static const struct hsphy_init_seq init_seq_qcs404[] = { + HSPHY_INIT_CFG(0xc0, 0x01, 0), + HSPHY_INIT_CFG(0xe8, 0x0d, 0), + HSPHY_INIT_CFG(0x74, 0x12, 0), + HSPHY_INIT_CFG(0x98, 0x63, 0), + HSPHY_INIT_CFG(0x9c, 0x03, 0), + HSPHY_INIT_CFG(0xa0, 0x1d, 0), + HSPHY_INIT_CFG(0xa4, 0x03, 0), + HSPHY_INIT_CFG(0x8c, 0x23, 0), + HSPHY_INIT_CFG(0x78, 0x08, 0), + HSPHY_INIT_CFG(0x7c, 0xdc, 0), + HSPHY_INIT_CFG(0x90, 0xe0, 20), + HSPHY_INIT_CFG(0x74, 0x10, 0), + HSPHY_INIT_CFG(0x90, 0x60, 0), +}; + +static const struct hsphy_data hsphy_data_qcs404 = { + .init_seq = init_seq_qcs404, + .init_seq_num = ARRAY_SIZE(init_seq_qcs404), +}; + +static const struct of_device_id qcom_snps_hsphy_match[] = { + { .compatible = "qcom,qcs404-usb-hsphy", .data = &hsphy_data_qcs404, }, + { }, +}; +MODULE_DEVICE_TABLE(of, qcom_snps_hsphy_match); + +static struct platform_driver qcom_snps_hsphy_driver = { + .probe = qcom_snps_hsphy_probe, + .driver = { + .name = "qcom-qcs404-usb-hsphy", + .of_match_table = qcom_snps_hsphy_match, + }, +}; +module_platform_driver(qcom_snps_hsphy_driver); + +MODULE_DESCRIPTION("Qualcomm QCS404 Hi-Speed USB PHY driver"); +MODULE_LICENSE("GPL v2"); From patchwork Mon Jan 20 16:31:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 11342563 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A37B0921 for ; Mon, 20 Jan 2020 16:32:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 770C022464 for ; Mon, 20 Jan 2020 16:32:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="nE0CkDt5" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729855AbgATQcd (ORCPT ); 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Mon, 20 Jan 2020 08:30:51 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, balbi@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, Jorge Ramirez-Ortiz , Jorge Ramirez-Ortiz , Rob Herring , Mark Rutland , devicetree@vger.kernel.org, Bryan O'Donoghue Subject: [PATCH v2 04/19] dt-bindings: Add Qualcomm USB SuperSpeed PHY bindings Date: Mon, 20 Jan 2020 16:31:01 +0000 Message-Id: <20200120163116.1197682-5-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> References: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Jorge Ramirez-Ortiz Binding description for Qualcomm's Synopsys 1.0.0 SuperSpeed phy controller embedded in QCS404. Based on Sriharsha Allenki's original definitions. [bod: converted to yaml format] Signed-off-by: Jorge Ramirez-Ortiz Cc: Jorge Ramirez-Ortiz Cc: Rob Herring Cc: Mark Rutland Cc: Bjorn Andersson Cc: Jorge Ramirez-Ortiz Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Bryan O'Donoghue --- .../devicetree/bindings/phy/qcom,usb-ss.yaml | 75 +++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-ss.yaml diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-ss.yaml b/Documentation/devicetree/bindings/phy/qcom,usb-ss.yaml new file mode 100644 index 000000000000..4206b8f36bdd --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,usb-ss.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/qcom,usb-ss.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm Synopsys 1.0.0 SuperSpeed USB PHY + +maintainers: + - Bryan O'Donoghue + +description: | + Qualcomm Synopsys 1.0.0 SuperSpeed USB PHY + +properties: + compatible: + enum: + - qcom,usb-ssphy + + reg: + maxItems: 1 + description: USB PHY base address and length of the register map. + + "#phy-cells": + const: 0 + description: Should be 0. See phy/phy-bindings.txt for details. + + clocks: + maxItems: 3 + minItems: 3 + description: phandles for rpmcc clock, PHY AHB clock, SuperSpeed pipe clock. + + clock-names: + items: + - const: ref + - const: phy + - const: sleep + + vdd-supply: + maxItems: 1 + description: phandle to the regulator VDD supply node. + + vdda1p8-supply: + maxItems: 1 + description: phandle to the regulator 1.8V supply node. + + resets: + items: + - description: COM reset + - description: PHY reset line + + reset-names: + items: + - const: com + - const: phy + +examples: + - | + #include + #include + usb3_phy: usb3-phy@78000 { + compatible = "qcom,usb-ssphy"; + reg = <0x78000 0x400>; + #phy-cells = <0>; + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, + <&gcc GCC_USB3_PHY_PIPE_CLK>; + clock-names = "ref", "phy", "pipe"; + resets = <&gcc GCC_USB3_PHY_BCR>, + <&gcc GCC_USB3PHY_PHY_BCR>; + reset-names = "com", "phy"; + vdd-supply = <&vreg_l3_1p05>; + vdda1p8-supply = <&vreg_l5_1p8>; + }; +... From patchwork Mon Jan 20 16:31:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 11342565 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BF7D26C1 for ; Mon, 20 Jan 2020 16:32:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 89B3122464 for ; Mon, 20 Jan 2020 16:32:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="zJaL5XME" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729380AbgATQcc (ORCPT ); Mon, 20 Jan 2020 11:32:32 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:36837 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729377AbgATQaz (ORCPT ); Mon, 20 Jan 2020 11:30:55 -0500 Received: by mail-wr1-f65.google.com with SMTP id z3so116443wru.3 for ; Mon, 20 Jan 2020 08:30:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=y15m04gvntz7WNCQA03ONSTkoLY+O6LkN7qRvt1gs5Y=; b=zJaL5XMEaV6uQhlMlRA3A0iar6FOYjw+Skv4hEwkB88ValBM9/FzzgZAgw9AYhIpqc a4ok0zAA5N6LmpNz4AO0qjfD8SZnMBlzK9f/3vwwV8bZ4voAAvIGke0CrAYIkJW7W65T Iepcj04HzLU9QOeceXOPPvPlk6ZIJMWKSAi+DWLC8RgN63mQv0bt5nh9ZrspG0AGxNRK VuX1x30HimKFe+6DED/4c6fFUIPeD9w1gDiL3JfZ1IY8L0JTmK+robKwfgQI6L8O6ZRK upiJijAHQHnzA6rgW3l9y1ROwWfB4MJWgqU0YbOjIrd8FWd7YhmcLIspCfVUx/FQVhFI LUxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=y15m04gvntz7WNCQA03ONSTkoLY+O6LkN7qRvt1gs5Y=; b=XUe3/nRHPoXaGwEZauuYUvMB+MpiHKGSCrq6uuyoFIJRSTxBRyzqt9BPkPVIBnLtjx BEdeyK7+DQIQ6Txo8iiC+48Gvy+lzIoO93zKjpwTiFkhUzXDDNYv0tg+ONbsMiQT1JYm MmudTmiWtTRV3QhWGbfO1iVDc69pcsqBZx2NHKOVOYSI53YpSLLYS3GJuG3G4SC1qG+g ue1xY8EkkvS07HVZVAutYkqF1jeZ0+FJj6oxUlR1W//mDtPv5LP1RQU7gpGDtEEdnNfx lDQTeAPv03+sXLqO3Z1AytCj+HYA5tx0el4muCrSA6mKdKJ4HI8TZ2kRYKnneG680z74 0jvA== X-Gm-Message-State: APjAAAVwF1qLhfaWbcHb7D7Q9JFcpGx/3QIvWqaa4IQFjg+kSdKADiKk Z0HC3Q5C05Y4KO/PX800aXVGCw== X-Google-Smtp-Source: APXvYqy9XA0lZosI0z+/zhQawgTEsM44oKKMow/uFb3cSL+p/BI7NUyedHHCjjHecXhP0qt71nPkkA== X-Received: by 2002:adf:cd92:: with SMTP id q18mr288819wrj.261.1579537853350; Mon, 20 Jan 2020 08:30:53 -0800 (PST) Received: from localhost.localdomain ([176.61.57.127]) by smtp.gmail.com with ESMTPSA id p26sm22631756wmc.24.2020.01.20.08.30.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jan 2020 08:30:52 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, balbi@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, Jorge Ramirez-Ortiz , Jorge Ramirez-Ortiz , Sriharsha Allenki's , Andy Gross , Kishon Vijay Abraham I , Philipp Zabel , Bryan O'Donoghue Subject: [PATCH v2 05/19] phy: qualcomm: usb: Add SuperSpeed PHY driver Date: Mon, 20 Jan 2020 16:31:02 +0000 Message-Id: <20200120163116.1197682-6-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> References: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Jorge Ramirez-Ortiz Controls Qualcomm's SS phy 1.0.0 implemented in the QCS404 and some other Qualcomm platforms. Based on Sriharsha Allenki's original code. [bod: Removed dependency on extcon. Switched to gpio-usb-conn to handle VBUS On/Off Switched to usb-role-switch to bind gpio-usb-conn to DWC3] Signed-off-by: Jorge Ramirez-Ortiz Cc: Jorge Ramirez-Ortiz Cc: Sriharsha Allenki's Cc: Andy Gross Cc: Bjorn Andersson Cc: Kishon Vijay Abraham I Cc: Philipp Zabel Cc: linux-arm-msm@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Bryan O'Donoghue --- drivers/phy/qualcomm/Kconfig | 11 ++ drivers/phy/qualcomm/Makefile | 1 + drivers/phy/qualcomm/phy-qcom-usb-ss.c | 246 +++++++++++++++++++++++++ 3 files changed, 258 insertions(+) create mode 100644 drivers/phy/qualcomm/phy-qcom-usb-ss.c diff --git a/drivers/phy/qualcomm/Kconfig b/drivers/phy/qualcomm/Kconfig index cc3f2bb01ad1..d95602ec6515 100644 --- a/drivers/phy/qualcomm/Kconfig +++ b/drivers/phy/qualcomm/Kconfig @@ -101,3 +101,14 @@ config PHY_QCOM_QCS404_USB_HS Enable this to support the Qualcomm QCS404 USB Hi-Speed PHY driver. This driver supports the Hi-Speed PHY which is usually paired with either the ChipIdea or Synopsys DWC3 USB IPs on MSM SOCs. + +config PHY_QCOM_USB_SS + tristate "Qualcomm USB SS PHY driver" + depends on ARCH_QCOM || COMPILE_TEST + depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in + select GENERIC_PHY + help + Enable this to support the Super-Speed USB transceiver on Qualcomm + chips. This driver supports the PHY which uses the QSCRATCH-based + register set for its control sequences, normally paired with newer + DWC3-based Super-Speed controllers on Qualcomm SoCs. diff --git a/drivers/phy/qualcomm/Makefile b/drivers/phy/qualcomm/Makefile index a4a3b21240fa..e8c7137cdbed 100644 --- a/drivers/phy/qualcomm/Makefile +++ b/drivers/phy/qualcomm/Makefile @@ -11,3 +11,4 @@ obj-$(CONFIG_PHY_QCOM_UFS_20NM) += phy-qcom-ufs-qmp-20nm.o obj-$(CONFIG_PHY_QCOM_USB_HS) += phy-qcom-usb-hs.o obj-$(CONFIG_PHY_QCOM_USB_HSIC) += phy-qcom-usb-hsic.o obj-$(CONFIG_PHY_QCOM_QCS404_USB_HS) += phy-qcom-qcs404-usb-hs.o +obj-$(CONFIG_PHY_QCOM_USB_SS) += phy-qcom-usb-ss.o diff --git a/drivers/phy/qualcomm/phy-qcom-usb-ss.c b/drivers/phy/qualcomm/phy-qcom-usb-ss.c new file mode 100644 index 000000000000..bc4951ddcc09 --- /dev/null +++ b/drivers/phy/qualcomm/phy-qcom-usb-ss.c @@ -0,0 +1,246 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2012-2014,2017 The Linux Foundation. All rights reserved. + * Copyright (c) 2018-2020, Linaro Limited + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define PHY_CTRL0 0x6C +#define PHY_CTRL1 0x70 +#define PHY_CTRL2 0x74 +#define PHY_CTRL4 0x7C + +/* PHY_CTRL bits */ +#define REF_PHY_EN BIT(0) +#define LANE0_PWR_ON BIT(2) +#define SWI_PCS_CLK_SEL BIT(4) +#define TST_PWR_DOWN BIT(4) +#define PHY_RESET BIT(7) + +#define NUM_BULK_CLKS 3 +#define NUM_BULK_REGS 2 + +struct ssphy_priv { + void __iomem *base; + struct device *dev; + struct reset_control *reset_com; + struct reset_control *reset_phy; + struct regulator_bulk_data regs[NUM_BULK_REGS]; + struct clk_bulk_data clks[NUM_BULK_CLKS]; + enum phy_mode mode; +}; + +static inline void qcom_ssphy_updatel(void __iomem *addr, u32 mask, u32 val) +{ + writel((readl(addr) & ~mask) | val, addr); +} + +static int qcom_ssphy_do_reset(struct ssphy_priv *priv) +{ + int ret; + + if (!priv->reset_com) { + qcom_ssphy_updatel(priv->base + PHY_CTRL1, PHY_RESET, + PHY_RESET); + usleep_range(10, 20); + qcom_ssphy_updatel(priv->base + PHY_CTRL1, PHY_RESET, 0); + } else { + ret = reset_control_assert(priv->reset_com); + if (ret) { + dev_err(priv->dev, "Failed to assert reset com\n"); + return ret; + } + + ret = reset_control_assert(priv->reset_phy); + if (ret) { + dev_err(priv->dev, "Failed to assert reset phy\n"); + return ret; + } + + usleep_range(10, 20); + + ret = reset_control_deassert(priv->reset_com); + if (ret) { + dev_err(priv->dev, "Failed to deassert reset com\n"); + return ret; + } + + ret = reset_control_deassert(priv->reset_phy); + if (ret) { + dev_err(priv->dev, "Failed to deassert reset phy\n"); + return ret; + } + } + + return 0; +} + +static int qcom_ssphy_power_on(struct phy *phy) +{ + struct ssphy_priv *priv = phy_get_drvdata(phy); + int ret; + + ret = regulator_bulk_enable(NUM_BULK_REGS, priv->regs); + if (ret) + return ret; + + ret = clk_bulk_prepare_enable(NUM_BULK_CLKS, priv->clks); + if (ret) + goto err_disable_regulator; + + ret = qcom_ssphy_do_reset(priv); + if (ret) + goto err_disable_clock; + + writeb(SWI_PCS_CLK_SEL, priv->base + PHY_CTRL0); + qcom_ssphy_updatel(priv->base + PHY_CTRL4, LANE0_PWR_ON, LANE0_PWR_ON); + qcom_ssphy_updatel(priv->base + PHY_CTRL2, REF_PHY_EN, REF_PHY_EN); + qcom_ssphy_updatel(priv->base + PHY_CTRL4, TST_PWR_DOWN, 0); + + return 0; +err_disable_clock: + clk_bulk_disable_unprepare(NUM_BULK_CLKS, priv->clks); +err_disable_regulator: + regulator_bulk_disable(NUM_BULK_REGS, priv->regs); + + return ret; +} + +static int qcom_ssphy_power_off(struct phy *phy) +{ + struct ssphy_priv *priv = phy_get_drvdata(phy); + + qcom_ssphy_updatel(priv->base + PHY_CTRL4, LANE0_PWR_ON, 0); + qcom_ssphy_updatel(priv->base + PHY_CTRL2, REF_PHY_EN, 0); + qcom_ssphy_updatel(priv->base + PHY_CTRL4, TST_PWR_DOWN, TST_PWR_DOWN); + + clk_bulk_disable_unprepare(NUM_BULK_CLKS, priv->clks); + regulator_bulk_disable(NUM_BULK_REGS, priv->regs); + + return 0; +} + +static int qcom_ssphy_init_clock(struct ssphy_priv *priv) +{ + priv->clks[0].id = "ref"; + priv->clks[1].id = "phy"; + priv->clks[2].id = "pipe"; + + return devm_clk_bulk_get(priv->dev, NUM_BULK_CLKS, priv->clks); +} + +static int qcom_ssphy_init_regulator(struct ssphy_priv *priv) +{ + int ret; + + priv->regs[0].supply = "vdd"; + priv->regs[1].supply = "vdda1p8"; + ret = devm_regulator_bulk_get(priv->dev, NUM_BULK_REGS, priv->regs); + if (ret) { + if (ret != -EPROBE_DEFER) + dev_err(priv->dev, "Failed to get regulators\n"); + return ret; + } + + return ret; +} + +static int qcom_ssphy_init_reset(struct ssphy_priv *priv) +{ + priv->reset_com = devm_reset_control_get_optional_exclusive(priv->dev, "com"); + if (IS_ERR(priv->reset_com)) { + dev_err(priv->dev, "Failed to get reset control com\n"); + return PTR_ERR(priv->reset_com); + } + + if (priv->reset_com) { + /* if reset_com is present, reset_phy is no longer optional */ + priv->reset_phy = devm_reset_control_get_exclusive(priv->dev, "phy"); + if (IS_ERR(priv->reset_phy)) { + dev_err(priv->dev, "Failed to get reset control phy\n"); + return PTR_ERR(priv->reset_phy); + } + } + + return 0; +} + +static const struct phy_ops qcom_ssphy_ops = { + .power_off = qcom_ssphy_power_off, + .power_on = qcom_ssphy_power_on, + .owner = THIS_MODULE, +}; + +static int qcom_ssphy_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct phy_provider *provider; + struct ssphy_priv *priv; + struct phy *phy; + int ret; + + priv = devm_kzalloc(dev, sizeof(struct ssphy_priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->dev = dev; + priv->mode = PHY_MODE_INVALID; + + priv->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + ret = qcom_ssphy_init_clock(priv); + if (ret) + return ret; + + ret = qcom_ssphy_init_reset(priv); + if (ret) + return ret; + + ret = qcom_ssphy_init_regulator(priv); + if (ret) + return ret; + + phy = devm_phy_create(dev, dev->of_node, &qcom_ssphy_ops); + if (IS_ERR(phy)) { + dev_err(dev, "Failed to create the SS phy\n"); + return PTR_ERR(phy); + } + + phy_set_drvdata(phy, priv); + + provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + + return PTR_ERR_OR_ZERO(provider); +} + +static const struct of_device_id qcom_ssphy_match[] = { + { .compatible = "qcom,usb-ssphy", }, + { }, +}; +MODULE_DEVICE_TABLE(of, qcom_ssphy_match); + +static struct platform_driver qcom_ssphy_driver = { + .probe = qcom_ssphy_probe, + .driver = { + .name = "qcom-usb-ssphy", + .of_match_table = qcom_ssphy_match, + }, +}; +module_platform_driver(qcom_ssphy_driver); + +MODULE_DESCRIPTION("Qualcomm SuperSpeed USB PHY driver"); +MODULE_LICENSE("GPL v2"); From patchwork Mon Jan 20 16:31:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 11342559 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A32246C1 for ; Mon, 20 Jan 2020 16:32:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 807E922522 for ; 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Mon, 20 Jan 2020 08:30:53 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, balbi@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, Bryan O'Donoghue , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 06/19] dt-bindings: usb: dwc3: Add a gpio-usb-connector description Date: Mon, 20 Jan 2020 16:31:03 +0000 Message-Id: <20200120163116.1197682-7-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> References: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org A USB connector should be a child node of the USB controller connector/usb-connector.txt. This patch adds a property "gpio_usb_connector" which declares a connector child device. Code in the DWC3 driver will then - Search for "gpio_usb_controller" - Do an of_platform_populate() if found This will have the effect of making the declared node a child of the USB controller and will make sure that USB role-switch events detected with the gpio_usb_controller driver propagate into the DWC3 controller code appropriately. Cc: Greg Kroah-Hartman Cc: Rob Herring Cc: Mark Rutland Cc: linux-usb@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Bryan O'Donoghue --- Documentation/devicetree/bindings/usb/dwc3.txt | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index 66780a47ad85..b019bd472f83 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -108,6 +108,9 @@ Optional properties: When just one value, which means INCRX burst mode enabled. When more than one value, which means undefined length INCR burst type enabled. The values can be 1, 4, 8, 16, 32, 64, 128 and 256. + - gpio_usb_connector: Declares a USB connector named 'gpio_usb_connector' as a + child node of the DWC3 block. Use when modelling a USB + connector based on the gpio-usb-b-connector driver. - in addition all properties from usb-xhci.txt from the current directory are supported as well @@ -121,4 +124,12 @@ dwc3@4a030000 { interrupts = <0 92 4> usb-phy = <&usb2_phy>, <&usb3,phy>; snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + usb_con: gpio_usb_connector { + compatible = "gpio-usb-b-connector"; + id-gpio = <&tlmm 116 GPIO_ACTIVE_HIGH>; + vbus-gpio = <&pms405_gpios 12 GPIO_ACTIVE_HIGH>; + vbus-supply = <&usb3_vbus_reg>; + pinctrl-names = "default"; + pinctrl-0 = <&usb3_id_pin>, <&usb3_vbus_pin>; + }; }; From patchwork Mon Jan 20 16:31:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 11342551 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 998446C1 for ; Mon, 20 Jan 2020 16:32:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6D1602087E for ; Mon, 20 Jan 2020 16:32:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Sm7pg3yw" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729473AbgATQa7 (ORCPT ); Mon, 20 Jan 2020 11:30:59 -0500 Received: from mail-wm1-f66.google.com ([209.85.128.66]:37488 "EHLO mail-wm1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729437AbgATQa6 (ORCPT ); Mon, 20 Jan 2020 11:30:58 -0500 Received: by mail-wm1-f66.google.com with SMTP id f129so224205wmf.2 for ; Mon, 20 Jan 2020 08:30:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=e20aOreCjy5ntKA5ZsHalS2qITKl4gNKBg3VYWDWJIk=; b=Sm7pg3ywb6rQ6g2muVIKhQMEdA8V+eBrgMoc7JEkJ69k+c5ivlaPXO+47WxbE5Zfw2 MI1xskC/cBNHw2YUdjsjj28+BEkr4iVnhWJA0WmWDkSoIi7NsWae7CtI6NwpsrwybDdm z6dHa4KDeQ+OEtQMfRfLWNCwqb7Do4SfCKOOXg5gTQUmOYQNGqdtt4w1CYQGVbvVgsXL EJLjxJTArrc1ATdINzICXPUH8qpnUPKje/VgSZTBJxywKnaVnPAyuEawslkY/k2RSlFd 6XTHkhuTmzEu8FAj2RG+pfo/rqFIAjzcjUZLvLnn5n1rrehd6CPmE2JWXJi9c7Q6CH3m sMbQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=e20aOreCjy5ntKA5ZsHalS2qITKl4gNKBg3VYWDWJIk=; b=GxG0Pco45zB1sFFYsDNOcmOeFV9toXPHED9H0ERStf1NfaQ/Z/cpdUR9Qv3M/b7ivc vXFJUziAC3X7NGjD8lcJyMHL/eB+574IPChUOPwjU6z9EMnw0NFtA55bqvBL8iJJthrN sAnjM02nEe3bOYmhG/hMvGm0g8TwKxOYLPGvvZdw8HLGZpkqXU+zpWhjMwzZWTaxq+po 9ybJxxL/bl25kJLyCQ1TZXZ/FhOeTE5nZ0dSwxqEpKtEMJe13rtC0Uxv7BsYJS9MR33Q ChiwgbMSBZDCdhxmn1cfyqzcuAIS1MFtw06ioRxS8HvbbwF9QY/LsUvb1sqULcyYLxa6 7OAQ== X-Gm-Message-State: APjAAAWjEY6BW0DVMcL9xnXQp0TuRMt/uWVz1ithGwzuO/r9Wvauufxq 7ccDjxNg+UzZiz3xXSaNh7yUlg== X-Google-Smtp-Source: APXvYqxs0Usm5GVQxdot5TQSnVaKHclSDVKPLv/EsFZYpEfogw6Nvcob3lFb2pS8Yo0dxHNrQr3xLA== X-Received: by 2002:a05:600c:2301:: with SMTP id 1mr144737wmo.147.1579537856051; Mon, 20 Jan 2020 08:30:56 -0800 (PST) Received: from localhost.localdomain ([176.61.57.127]) by smtp.gmail.com with ESMTPSA id p26sm22631756wmc.24.2020.01.20.08.30.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jan 2020 08:30:55 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, balbi@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, Yu Chen , Rob Herring , Mark Rutland , ShuFan Lee , Heikki Krogerus , Suzuki K Poulose , Chunfeng Yun , Hans de Goede , Andy Shevchenko , Jun Li , Valentin Schneider , devicetree@vger.kernel.org, John Stultz , Bryan O'Donoghue Subject: [PATCH v2 07/19] usb: dwc3: Registering a role switch in the DRD code. Date: Mon, 20 Jan 2020 16:31:04 +0000 Message-Id: <20200120163116.1197682-8-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> References: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Yu Chen The Type-C drivers use USB role switch API to inform the system about the negotiated data role, so registering a role switch in the DRD code in order to support platforms with USB Type-C connectors. Cc: Greg Kroah-Hartman Cc: Rob Herring Cc: Mark Rutland CC: ShuFan Lee Cc: Heikki Krogerus Cc: Suzuki K Poulose Cc: Chunfeng Yun Cc: Yu Chen Cc: Felipe Balbi Cc: Hans de Goede Cc: Andy Shevchenko Cc: Jun Li Cc: Valentin Schneider Cc: Jack Pham Cc: linux-usb@vger.kernel.org Cc: devicetree@vger.kernel.org Suggested-by: Heikki Krogerus Signed-off-by: Yu Chen Signed-off-by: John Stultz Signed-off-by: Bryan O'Donoghue --- drivers/usb/dwc3/core.h | 3 ++ drivers/usb/dwc3/drd.c | 77 ++++++++++++++++++++++++++++++++++++++++- 2 files changed, 79 insertions(+), 1 deletion(-) diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 77c4a9abe365..a99e57636172 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -25,6 +25,7 @@ #include #include #include +#include #include #include @@ -953,6 +954,7 @@ struct dwc3_scratchpad_array { * @hsphy_mode: UTMI phy mode, one of following: * - USBPHY_INTERFACE_MODE_UTMI * - USBPHY_INTERFACE_MODE_UTMIW + * @role_sw: usb_role_switch handle * @usb2_phy: pointer to USB2 PHY * @usb3_phy: pointer to USB3 PHY * @usb2_generic_phy: pointer to USB2 PHY @@ -1086,6 +1088,7 @@ struct dwc3 { struct extcon_dev *edev; struct notifier_block edev_nb; enum usb_phy_interface hsphy_mode; + struct usb_role_switch *role_sw; u32 fladj; u32 irq_gadget; diff --git a/drivers/usb/dwc3/drd.c b/drivers/usb/dwc3/drd.c index c946d64142ad..3b57d2ddda93 100644 --- a/drivers/usb/dwc3/drd.c +++ b/drivers/usb/dwc3/drd.c @@ -476,6 +476,73 @@ static struct extcon_dev *dwc3_get_extcon(struct dwc3 *dwc) return edev; } +#ifdef CONFIG_USB_ROLE_SWITCH +#define ROLE_SWITCH 1 +static int dwc3_usb_role_switch_set(struct device *dev, enum usb_role role) +{ + struct dwc3 *dwc = dev_get_drvdata(dev); + u32 mode; + + switch (role) { + case USB_ROLE_HOST: + mode = DWC3_GCTL_PRTCAP_HOST; + break; + case USB_ROLE_DEVICE: + mode = DWC3_GCTL_PRTCAP_DEVICE; + break; + default: + mode = DWC3_GCTL_PRTCAP_DEVICE; + break; + } + + dwc3_set_mode(dwc, mode); + return 0; +} + +static enum usb_role dwc3_usb_role_switch_get(struct device *dev) +{ + struct dwc3 *dwc = dev_get_drvdata(dev); + unsigned long flags; + enum usb_role role; + + spin_lock_irqsave(&dwc->lock, flags); + switch (dwc->current_dr_role) { + case DWC3_GCTL_PRTCAP_HOST: + role = USB_ROLE_HOST; + break; + case DWC3_GCTL_PRTCAP_DEVICE: + role = USB_ROLE_DEVICE; + break; + case DWC3_GCTL_PRTCAP_OTG: + role = dwc->current_otg_role; + break; + default: + role = USB_ROLE_DEVICE; + break; + } + spin_unlock_irqrestore(&dwc->lock, flags); + return role; +} + +static int dwc3_setup_role_switch(struct dwc3 *dwc) +{ + struct usb_role_switch_desc dwc3_role_switch = {NULL}; + + dwc3_role_switch.fwnode = dev_fwnode(dwc->dev); + dwc3_role_switch.set = dwc3_usb_role_switch_set; + dwc3_role_switch.get = dwc3_usb_role_switch_get; + dwc->role_sw = usb_role_switch_register(dwc->dev, &dwc3_role_switch); + if (IS_ERR(dwc->role_sw)) + return PTR_ERR(dwc->role_sw); + + dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_DEVICE); + return 0; +} +#else +#define ROLE_SWITCH 0 +#define dwc3_setup_role_switch(x) 0 +#endif + int dwc3_drd_init(struct dwc3 *dwc) { int ret, irq; @@ -484,7 +551,12 @@ int dwc3_drd_init(struct dwc3 *dwc) if (IS_ERR(dwc->edev)) return PTR_ERR(dwc->edev); - if (dwc->edev) { + if (ROLE_SWITCH && + device_property_read_bool(dwc->dev, "usb-role-switch")) { + ret = dwc3_setup_role_switch(dwc); + if (ret < 0) + return ret; + } else if (dwc->edev) { dwc->edev_nb.notifier_call = dwc3_drd_notifier; ret = extcon_register_notifier(dwc->edev, EXTCON_USB_HOST, &dwc->edev_nb); @@ -531,6 +603,9 @@ void dwc3_drd_exit(struct dwc3 *dwc) { unsigned long flags; + if (dwc->role_sw) + usb_role_switch_unregister(dwc->role_sw); + if (dwc->edev) extcon_unregister_notifier(dwc->edev, EXTCON_USB_HOST, &dwc->edev_nb); From patchwork Mon Jan 20 16:31:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 11342555 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 31895921 for ; Mon, 20 Jan 2020 16:32:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 106E722525 for ; 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Mon, 20 Jan 2020 08:30:56 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, balbi@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, John Stultz , Rob Herring , Mark Rutland , ShuFan Lee , Heikki Krogerus , Suzuki K Poulose , Chunfeng Yun , Yu Chen , Hans de Goede , Andy Shevchenko , Jun Li , Valentin Schneider , devicetree@vger.kernel.org, Rob Herring , Bryan O'Donoghue Subject: [PATCH v2 08/19] dt-bindings: usb: generic: Add role-switch-default-mode binding Date: Mon, 20 Jan 2020 16:31:05 +0000 Message-Id: <20200120163116.1197682-9-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> References: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: John Stultz Add binding to configure the default role the controller assumes is host mode when the usb role is USB_ROLE_NONE. Cc: Greg Kroah-Hartman Cc: Rob Herring Cc: Mark Rutland CC: ShuFan Lee Cc: Heikki Krogerus Cc: Suzuki K Poulose Cc: Chunfeng Yun Cc: Yu Chen Cc: Felipe Balbi Cc: Hans de Goede Cc: Andy Shevchenko Cc: Jun Li Cc: Valentin Schneider Cc: Jack Pham Cc: linux-usb@vger.kernel.org Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring Signed-off-by: John Stultz Signed-off-by: Bryan O'Donoghue --- Documentation/devicetree/bindings/usb/generic.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/generic.txt b/Documentation/devicetree/bindings/usb/generic.txt index cf5a1ad456e6..dd733fa81fad 100644 --- a/Documentation/devicetree/bindings/usb/generic.txt +++ b/Documentation/devicetree/bindings/usb/generic.txt @@ -34,6 +34,12 @@ Optional properties: the USB data role (USB host or USB device) for a given USB connector, such as Type-C, Type-B(micro). see connector/usb-connector.txt. + - role-switch-default-mode: indicating if usb-role-switch is enabled, the + device default operation mode of controller while usb + role is USB_ROLE_NONE. Valid arguments are "host" and + "peripheral". Defaults to "peripheral" if not + specified. + This is an attribute to a USB controller such as: From patchwork Mon Jan 20 16:31:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 11342499 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 062F06C1 for ; Mon, 20 Jan 2020 16:31:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D86A022525 for ; Mon, 20 Jan 2020 16:31:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="oAtAlBz0" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729501AbgATQa7 (ORCPT ); Mon, 20 Jan 2020 11:30:59 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:33307 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729456AbgATQa7 (ORCPT ); Mon, 20 Jan 2020 11:30:59 -0500 Received: by mail-wr1-f67.google.com with SMTP id b6so139845wrq.0 for ; Mon, 20 Jan 2020 08:30:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=W1LoqEm0ztBHlPFj+2nWtTXi63kWnlasBU3cowxgKSk=; b=oAtAlBz0j3CEm0MG/eUM2ytu1Pr7fdDvkG2V/jic5vVHQduTabLbGWERZd+kcIw+Js uME5Mz3eE7Uvtp2aKuO+ViqVIHZ5+8tWEHSWiwfU0r2BliO6gX3/6XniMJL16PaTGy4h sqIq8ladaH/AV7uJWDJKd/WF7I9Y+iZX4NmiK+lXFvIFvr0S79Yxr4ad/oBAJ86KHGtx 4VKELNfk9JBFBHg3UTK4Ub5kgxv3PXkeCqCB7RaH979hTlRB5G1BgYic4QGDPd+0FAcI HEzU30jw0vNzkwbRIIYydMyDmRgMJe3ijKvbU7tBWZmyud1DHhgrSakwdKbdrPp+WcK8 Q5tw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=W1LoqEm0ztBHlPFj+2nWtTXi63kWnlasBU3cowxgKSk=; b=gohPjJa34rRoekb62nk8uoClHv6B3pBXMAQEpyk8k9Rysa7+HNY+xmtubsX77ooZRm cDu3f9mypE/bilm7dklwJ3S/Aeqs0WN9/gpde42wddLgIwHRsNLmpUMlXtJ60sShlfbs +vdsQDThJ/vx25Kchx4xg/nOHqyUfCAlDC3DtbFlePjQk3GU0VrJSo/MUMsBbXsV2+tw gXPymG2aSj0JGc4FLrQFA2Cd0HmO/VUQCUsAeQSpeRlLttFKhl8zRHld/Ae/kkbnLa99 9w2c7LD9bHfKTJvHyk7GJrZ78za38kSFYEs/yRmsTtkvSzemD7/1BFaFtEOwGcn99geG gs8w== X-Gm-Message-State: APjAAAWldZZ94HJOMdr/XSjYv3VuAkOgMgoHhqmgW2Nyb0D8N/HlLKVw 3+M60s0p9M+VoiO54kmBKYHtPA== X-Google-Smtp-Source: APXvYqwkFiL33sqy5xbiGj+0nzVQXhkjZppSqoT9DlRfUDlfYgR3VkOmgDDlIBdFJtk3sKHLnuC+Aw== X-Received: by 2002:a5d:6b03:: with SMTP id v3mr282795wrw.289.1579537858380; Mon, 20 Jan 2020 08:30:58 -0800 (PST) Received: from localhost.localdomain ([176.61.57.127]) by smtp.gmail.com with ESMTPSA id p26sm22631756wmc.24.2020.01.20.08.30.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jan 2020 08:30:57 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, balbi@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, Bryan O'Donoghue , Andy Gross , Lee Jones , Philipp Zabel Subject: [PATCH v2 09/19] usb: dwc3: qcom: Override VBUS when using gpio_usb_connector Date: Mon, 20 Jan 2020 16:31:06 +0000 Message-Id: <20200120163116.1197682-10-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> References: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Using the gpio_usb_connector driver also means that we are not supplying VBUS via the SoC but by an external PMIC directly. This patch searches for a gpio_usb_connector as a child node of the core DWC3 block and if found switches on the VBUS over-ride, leaving it up to the role-switching code in gpio-usb-connector to switch off and on VBUS. Cc: Andy Gross Cc: Bjorn Andersson Cc: Lee Jones Cc: Felipe Balbi Cc: Greg Kroah-Hartman Cc: Philipp Zabel Cc: linux-arm-msm@vger.kernel.org Cc: linux-usb@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Bryan O'Donoghue --- drivers/usb/dwc3/dwc3-qcom.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index 261af9e38ddd..73f9f3bcec59 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -550,6 +550,16 @@ static const struct dwc3_acpi_pdata sdm845_acpi_pdata = { .ss_phy_irq_index = 2 }; +static bool dwc3_qcom_find_gpio_usb_connector(struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; + + if (of_get_child_by_name(np, "gpio_usb_connector")) + return true; + + return false; +} + static int dwc3_qcom_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; @@ -557,7 +567,7 @@ static int dwc3_qcom_probe(struct platform_device *pdev) struct dwc3_qcom *qcom; struct resource *res, *parent_res = NULL; int ret, i; - bool ignore_pipe_clk; + bool ignore_pipe_clk, gpio_usb_conn; qcom = devm_kzalloc(&pdev->dev, sizeof(*qcom), GFP_KERNEL); if (!qcom) @@ -649,9 +659,10 @@ static int dwc3_qcom_probe(struct platform_device *pdev) } qcom->mode = usb_get_dr_mode(&qcom->dwc3->dev); + gpio_usb_conn = dwc3_qcom_find_gpio_usb_connector(qcom->dwc3); - /* enable vbus override for device mode */ - if (qcom->mode == USB_DR_MODE_PERIPHERAL) + /* enable vbus override for device mode or GPIO USB connector mode */ + if (qcom->mode == USB_DR_MODE_PERIPHERAL || gpio_usb_conn) dwc3_qcom_vbus_overrride_enable(qcom, true); /* register extcon to override sw_vbus on Vbus change later */ From patchwork Mon Jan 20 16:31:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 11342501 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 73EC0921 for ; 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Mon, 20 Jan 2020 08:30:59 -0800 (PST) Received: from localhost.localdomain ([176.61.57.127]) by smtp.gmail.com with ESMTPSA id p26sm22631756wmc.24.2020.01.20.08.30.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jan 2020 08:30:59 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, balbi@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, John Stultz , Rob Herring , Mark Rutland , ShuFan Lee , Heikki Krogerus , Suzuki K Poulose , Chunfeng Yun , Yu Chen , Hans de Goede , Andy Shevchenko , Jun Li , Valentin Schneider , devicetree@vger.kernel.org, Bryan O'Donoghue Subject: [PATCH v2 10/19] usb: dwc3: Add support for role-switch-default-mode binding Date: Mon, 20 Jan 2020 16:31:07 +0000 Message-Id: <20200120163116.1197682-11-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> References: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: John Stultz Support the new role-switch-default-mode binding for configuring the default role the controller assumes as when the usb role is USB_ROLE_NONE This patch was split out from a larger patch originally by Yu Chen Cc: Greg Kroah-Hartman Cc: Rob Herring Cc: Mark Rutland CC: ShuFan Lee Cc: Heikki Krogerus Cc: Suzuki K Poulose Cc: Chunfeng Yun Cc: Yu Chen Cc: Felipe Balbi Cc: Hans de Goede Cc: Andy Shevchenko Cc: Jun Li Cc: Valentin Schneider Cc: Jack Pham Cc: linux-usb@vger.kernel.org Cc: devicetree@vger.kernel.org Signed-off-by: John Stultz Signed-off-by: Bryan O'Donoghue --- drivers/usb/dwc3/core.h | 3 +++ drivers/usb/dwc3/drd.c | 25 ++++++++++++++++++++++--- 2 files changed, 25 insertions(+), 3 deletions(-) diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index a99e57636172..57d549a1ad0b 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -955,6 +955,8 @@ struct dwc3_scratchpad_array { * - USBPHY_INTERFACE_MODE_UTMI * - USBPHY_INTERFACE_MODE_UTMIW * @role_sw: usb_role_switch handle + * @role_switch_default_mode: default operation mode of controller while + * usb role is USB_ROLE_NONE. * @usb2_phy: pointer to USB2 PHY * @usb3_phy: pointer to USB3 PHY * @usb2_generic_phy: pointer to USB2 PHY @@ -1089,6 +1091,7 @@ struct dwc3 { struct notifier_block edev_nb; enum usb_phy_interface hsphy_mode; struct usb_role_switch *role_sw; + enum usb_dr_mode role_switch_default_mode; u32 fladj; u32 irq_gadget; diff --git a/drivers/usb/dwc3/drd.c b/drivers/usb/dwc3/drd.c index 3b57d2ddda93..865341facece 100644 --- a/drivers/usb/dwc3/drd.c +++ b/drivers/usb/dwc3/drd.c @@ -491,7 +491,10 @@ static int dwc3_usb_role_switch_set(struct device *dev, enum usb_role role) mode = DWC3_GCTL_PRTCAP_DEVICE; break; default: - mode = DWC3_GCTL_PRTCAP_DEVICE; + if (dwc->role_switch_default_mode == USB_DR_MODE_HOST) + mode = DWC3_GCTL_PRTCAP_HOST; + else + mode = DWC3_GCTL_PRTCAP_DEVICE; break; } @@ -517,7 +520,10 @@ static enum usb_role dwc3_usb_role_switch_get(struct device *dev) role = dwc->current_otg_role; break; default: - role = USB_ROLE_DEVICE; + if (dwc->role_switch_default_mode == USB_DR_MODE_HOST) + role = USB_ROLE_HOST; + else + role = USB_ROLE_DEVICE; break; } spin_unlock_irqrestore(&dwc->lock, flags); @@ -527,6 +533,19 @@ static enum usb_role dwc3_usb_role_switch_get(struct device *dev) static int dwc3_setup_role_switch(struct dwc3 *dwc) { struct usb_role_switch_desc dwc3_role_switch = {NULL}; + const char *str; + u32 mode; + int ret; + + ret = device_property_read_string(dwc->dev, "role-switch-default-mode", + &str); + if (ret >= 0 && !strncmp(str, "host", strlen("host"))) { + dwc->role_switch_default_mode = USB_DR_MODE_HOST; + mode = DWC3_GCTL_PRTCAP_HOST; + } else { + dwc->role_switch_default_mode = USB_DR_MODE_PERIPHERAL; + mode = DWC3_GCTL_PRTCAP_DEVICE; + } dwc3_role_switch.fwnode = dev_fwnode(dwc->dev); dwc3_role_switch.set = dwc3_usb_role_switch_set; @@ -535,7 +554,7 @@ static int dwc3_setup_role_switch(struct dwc3 *dwc) if (IS_ERR(dwc->role_sw)) return PTR_ERR(dwc->role_sw); - dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_DEVICE); + dwc3_set_mode(dwc, mode); return 0; } #else From patchwork Mon Jan 20 16:31:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 11342503 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B7B9D1820 for ; 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Mon, 20 Jan 2020 08:31:00 -0800 (PST) Received: from localhost.localdomain ([176.61.57.127]) by smtp.gmail.com with ESMTPSA id p26sm22631756wmc.24.2020.01.20.08.30.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jan 2020 08:31:00 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, balbi@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, Bryan O'Donoghue , John Stultz , Lee Jones , Rob Herring , Mark Rutland , ShuFan Lee , Heikki Krogerus , Suzuki K Poulose , Chunfeng Yun , Yu Chen , Hans de Goede , Andy Shevchenko , Jun Li , Valentin Schneider , devicetree@vger.kernel.org Subject: [PATCH v2 11/19] usb: dwc3: Add support for usb-conn-gpio connectors Date: Mon, 20 Jan 2020 16:31:08 +0000 Message-Id: <20200120163116.1197682-12-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> References: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org This patch adds the ability to probe and enumerate a connector based on usb-conn-gpio. A device node label gpio_usb_connector is used to identify a usb-conn-gpio as a child of the USB interface. You would use usb-conn-gpio when a regulator in your system provides VBUS directly to the connector instead of supplying via the USB PHY. The parent device must have the "usb-role-switch" property, so that when the usb-conn-gpio driver calls usb_role_switch_set_role() the notification in dwc3 will run and the block registers will be updated to match the state detected at the connector. Cc: John Stultz Cc: Bjorn Andersson Cc: Lee Jones Cc: Greg Kroah-Hartman Cc: Rob Herring Cc: Mark Rutland CC: ShuFan Lee Cc: Heikki Krogerus Cc: Suzuki K Poulose Cc: Chunfeng Yun Cc: Yu Chen Cc: Felipe Balbi Cc: Hans de Goede Cc: Andy Shevchenko Cc: Jun Li Cc: Valentin Schneider Cc: Jack Pham Cc: linux-usb@vger.kernel.org Cc: devicetree@vger.kernel.org Signed-off-by: Bryan O'Donoghue --- drivers/usb/dwc3/drd.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/usb/dwc3/drd.c b/drivers/usb/dwc3/drd.c index 865341facece..c6bb7cb809d5 100644 --- a/drivers/usb/dwc3/drd.c +++ b/drivers/usb/dwc3/drd.c @@ -11,6 +11,7 @@ #include #include #include +#include #include "debug.h" #include "core.h" @@ -557,9 +558,32 @@ static int dwc3_setup_role_switch(struct dwc3 *dwc) dwc3_set_mode(dwc, mode); return 0; } + +static int dwc3_register_gpio_usb_connector(struct dwc3 *dwc) +{ + struct device *dev = dwc->dev; + struct device_node *np = dev->of_node, *con_np; + int ret; + + con_np = of_get_child_by_name(np, "gpio_usb_connector"); + if (!np) { + dev_dbg(dev, "no usb_connector child node specified\n"); + return 0; + } + + ret = of_platform_populate(np, NULL, NULL, dev); + if (ret) { + dev_err(dev, "failed to register usb_connector - %d\n", ret); + return ret; + } + + return 0; +} + #else #define ROLE_SWITCH 0 #define dwc3_setup_role_switch(x) 0 +#define dwc3_register_gpio_usb_connector(x) 0 #endif int dwc3_drd_init(struct dwc3 *dwc) @@ -575,6 +599,9 @@ int dwc3_drd_init(struct dwc3 *dwc) ret = dwc3_setup_role_switch(dwc); if (ret < 0) return ret; + ret = dwc3_register_gpio_usb_connector(dwc); + if (ret < 0) + return ret; } else if (dwc->edev) { dwc->edev_nb.notifier_call = dwc3_drd_notifier; ret = extcon_register_notifier(dwc->edev, EXTCON_USB_HOST, From patchwork Mon Jan 20 16:31:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 11342545 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 547FD6C1 for ; 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Mon, 20 Jan 2020 08:31:02 -0800 (PST) Received: from localhost.localdomain ([176.61.57.127]) by smtp.gmail.com with ESMTPSA id p26sm22631756wmc.24.2020.01.20.08.31.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jan 2020 08:31:01 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, balbi@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, Vinod Koul , Shawn Guo , Andy Gross , Rob Herring , Mark Rutland , devicetree@vger.kernel.org, Bryan O'Donoghue Subject: [PATCH v2 12/19] arm64: dts: qcom: qcs404: Add USB devices and PHYs Date: Mon, 20 Jan 2020 16:31:09 +0000 Message-Id: <20200120163116.1197682-13-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> References: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Bjorn Andersson QCS404 sports HS and SS USB controllers based on dwc3 block with two HS PHYs and one SS PHY. Add nodes for these devices and enable them for EVB board. Signed-off-by: Bjorn Andersson Signed-off-by: Vinod Koul Signed-off-by: Shawn Guo Cc: Andy Gross Cc: Rob Herring Cc: Mark Rutland Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Bryan O'Donoghue --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 100 +++++++++++++++++++++++++++ 1 file changed, 100 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index f5f0c4c9cb16..73565a5b99d1 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -272,6 +272,48 @@ rpm_msg_ram: memory@60000 { reg = <0x00060000 0x6000>; }; + usb3_phy: phy@78000 { + compatible = "qcom,usb-ssphy"; + reg = <0x00078000 0x400>; + #phy-cells = <0>; + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, + <&gcc GCC_USB3_PHY_PIPE_CLK>; + clock-names = "ref", "phy", "pipe"; + resets = <&gcc GCC_USB3_PHY_BCR>, + <&gcc GCC_USB3PHY_PHY_BCR>; + reset-names = "com", "phy"; + status = "disabled"; + }; + + usb2_phy_prim: phy@7a000 { + compatible = "qcom,qcs404-usb-hsphy"; + reg = <0x0007a000 0x200>; + #phy-cells = <0>; + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, + <&gcc GCC_USB2A_PHY_SLEEP_CLK>; + clock-names = "ref", "phy", "sleep"; + resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_BCR>, + <&gcc GCC_USB2A_PHY_BCR>; + reset-names = "phy", "por"; + status = "disabled"; + }; + + usb2_phy_sec: phy@7c000 { + compatible = "qcom,qcs404-usb-hsphy"; + reg = <0x0007c000 0x200>; + #phy-cells = <0>; + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, + <&gcc GCC_USB2A_PHY_SLEEP_CLK>; + clock-names = "ref", "phy", "sleep"; + resets = <&gcc GCC_QUSB2_PHY_BCR>, + <&gcc GCC_USB2_HS_PHY_ONLY_BCR>; + reset-names = "phy", "por"; + status = "disabled"; + }; + qfprom: qfprom@a4000 { compatible = "qcom,qfprom"; reg = <0x000a4000 0x1000>; @@ -379,6 +421,64 @@ glink-edge { }; }; + usb3: usb@7678800 { + compatible = "qcom,dwc3"; + reg = <0x07678800 0x400>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&gcc GCC_USB30_MASTER_CLK>, + <&gcc GCC_SYS_NOC_USB3_CLK>, + <&gcc GCC_USB30_SLEEP_CLK>, + <&gcc GCC_USB30_MOCK_UTMI_CLK>; + clock-names = "core", "iface", "sleep", "mock_utmi"; + assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_MASTER_CLK>; + assigned-clock-rates = <19200000>, <200000000>; + status = "disabled"; + + dwc3@7580000 { + compatible = "snps,dwc3"; + reg = <0x07580000 0xcd00>; + interrupts = ; + phys = <&usb2_phy_sec>, <&usb3_phy>; + phy-names = "usb2-phy", "usb3-phy"; + snps,has-lpm-erratum; + snps,hird-threshold = /bits/ 8 <0x10>; + snps,usb3_lpm_capable; + dr_mode = "otg"; + }; + }; + + usb2: usb@79b8800 { + compatible = "qcom,dwc3"; + reg = <0x079b8800 0x400>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>, + <&gcc GCC_PCNOC_USB2_CLK>, + <&gcc GCC_USB_HS_INACTIVITY_TIMERS_CLK>, + <&gcc GCC_USB20_MOCK_UTMI_CLK>; + clock-names = "core", "iface", "sleep", "mock_utmi"; + assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>, + <&gcc GCC_USB_HS_SYSTEM_CLK>; + assigned-clock-rates = <19200000>, <133333333>; + status = "disabled"; + + dwc3@78c0000 { + compatible = "snps,dwc3"; + reg = <0x078c0000 0xcc00>; + interrupts = ; + phys = <&usb2_phy_prim>; + phy-names = "usb2-phy"; + snps,has-lpm-erratum; + snps,hird-threshold = /bits/ 8 <0x10>; + snps,usb3_lpm_capable; + dr_mode = "peripheral"; + }; + }; + tlmm: pinctrl@1000000 { compatible = "qcom,qcs404-pinctrl"; reg = <0x01000000 0x200000>, From patchwork Mon Jan 20 16:31:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 11342539 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7E6C36C1 for ; Mon, 20 Jan 2020 16:31:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5CE5122464 for ; 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Mon, 20 Jan 2020 08:31:02 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, balbi@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, Bryan O'Donoghue , Andy Gross , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 13/19] arm64: dts: qcom: qcs404-evb: Define VBUS detect pin Date: Mon, 20 Jan 2020 16:31:10 +0000 Message-Id: <20200120163116.1197682-14-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> References: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org VBUS present/absent is presented to the SoC via a GPIO on the EVB. Define the pin mapping for later use by gpio-usb-conn. Cc: Andy Gross Cc: Bjorn Andersson Cc: Rob Herring Cc: Mark Rutland Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Bryan O'Donoghue --- arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi index 501a7330dbc8..6d53dc342f97 100644 --- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi @@ -4,6 +4,8 @@ #include #include "qcs404.dtsi" #include "pms405.dtsi" +#include +#include / { aliases { @@ -270,6 +272,18 @@ rclk { }; }; +&pms405_gpios { + usb3_vbus_pin: usb3-vbus-pin { + pinconf { + pins = "gpio12"; + function = PMIC_GPIO_FUNC_NORMAL; + input-enable; + bias-pull-down; + power-source = <1>; + }; + }; +}; + &wifi { status = "okay"; vdd-0.8-cx-mx-supply = <&vreg_l2_1p275>; From patchwork Mon Jan 20 16:31:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 11342505 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 500C06C1 for ; Mon, 20 Jan 2020 16:31:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2FD4C2253D for ; Mon, 20 Jan 2020 16:31:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="snHrV5Ua" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729525AbgATQbG (ORCPT ); Mon, 20 Jan 2020 11:31:06 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:35231 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729550AbgATQbG (ORCPT ); Mon, 20 Jan 2020 11:31:06 -0500 Received: by mail-wr1-f65.google.com with SMTP id g17so126094wro.2 for ; Mon, 20 Jan 2020 08:31:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ounN3zi0imbgKpbsfEs2C8qMeNLcd0eRtq+ghfuGYQw=; b=snHrV5UaYtwhG/1mAVN0g28aL9pRgZSRxNWIJxcloONV8g7TtwkXz34qevv4b0+Djv vWumO8D7s9MvaSs5Tf1v1CB2potRm0RonWfHiG/kqsHCVUVmsPTD80waSHX4kSLpRGXx rsN5lf64PMmnWzwhT/SAP2PC9AmkeCv04uQIFp4U6UmraQOeDNddTYea0pawPYPYHsMB 7A/ovV5aRQa/CH0ZWmzUOlXmE7T2/zzy4rkh+cjSVLyIjy7EFSe7SoJg/tgqEBDieLmR jQ3j1M09/ad7iVO1iqsYob66HSOO8ELeoO/xUeSV61osw0WC+I9tv19yPDQPCgVlY9Q0 VZEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ounN3zi0imbgKpbsfEs2C8qMeNLcd0eRtq+ghfuGYQw=; b=QL4S867JGDcS+Tej00WFbRspQ+aG8sVRkt/o0T9v2biibpk1iI2I86u0EPomwriYsi X2j2NCUE+L/++IynKpcNKcXPSHK7X6w4lgkgIrNFV4Y5UsYsW31BiYWU0Xjfvx58UlVy 4UfIt6GpR3ia01bDPJJjQ8Ct9L+uHJJy5M9+NPo/V5KY3uVTr+V5V/sIjMRVaZhR3msE etsJ/ZMWMjTe+oOeRQgOp5MnGGJuKr7D/tiSg6KOBQ1VwrhU2YKt/DZYmkl+o+CWI+A+ 38aAt1w5mI/innnleiPU+DKLU3+aFkzCcyH9lTeE3BgpsXgpAWfyyglpuk4jeBnoGFsf YZiw== X-Gm-Message-State: APjAAAVK1IC+C8rMo2fcPewL6og5jf+Uo/0azRxORCb5TfdTOyJELpnM yXA5j4ukcodVI5qZZWGPyTOSJQ== X-Google-Smtp-Source: APXvYqzqsAek5dun0Q5RAufnmOHfcCIBKXxyArSOYStiBxShzYVWPSCgi4DM0fNIw6sSdilZeVHxxw== X-Received: by 2002:adf:fa12:: with SMTP id m18mr291642wrr.309.1579537864214; Mon, 20 Jan 2020 08:31:04 -0800 (PST) Received: from localhost.localdomain ([176.61.57.127]) by smtp.gmail.com with ESMTPSA id p26sm22631756wmc.24.2020.01.20.08.31.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jan 2020 08:31:03 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, balbi@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, Bryan O'Donoghue , Andy Gross , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 14/19] arm64: dts: qcom: qcs404-evb: Define VBUS boost pin Date: Mon, 20 Jan 2020 16:31:11 +0000 Message-Id: <20200120163116.1197682-15-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> References: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org An external regulator is used to trigger VBUS on/off via GPIO. This patch defines the relevant GPIO in the EVB dts. Cc: Andy Gross Cc: Bjorn Andersson Cc: Rob Herring Cc: Mark Rutland Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Bryan O'Donoghue --- arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi index 6d53dc342f97..b6147b5ab5cb 100644 --- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi @@ -273,6 +273,14 @@ rclk { }; &pms405_gpios { + usb_vbus_boost_pin: usb-vbus-boost-pin { + pinconf { + pins = "gpio3"; + function = PMIC_GPIO_FUNC_NORMAL; + output-low; + power-source = <1>; + }; + }; usb3_vbus_pin: usb3-vbus-pin { pinconf { pins = "gpio12"; From patchwork Mon Jan 20 16:31:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 11342507 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A6CC46C1 for ; Mon, 20 Jan 2020 16:31:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 83AC22253D for ; Mon, 20 Jan 2020 16:31:09 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ZLzmT+7G" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729605AbgATQbI (ORCPT ); Mon, 20 Jan 2020 11:31:08 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:46496 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729579AbgATQbH (ORCPT ); Mon, 20 Jan 2020 11:31:07 -0500 Received: by mail-wr1-f65.google.com with SMTP id z7so39113wrl.13 for ; Mon, 20 Jan 2020 08:31:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9jS7AtcyDtrs+6cLov2M3M67k09AnqIN5nOTMIVW4oM=; b=ZLzmT+7G1QN2Kl52lracr4oWkYEPK8VZDgUoaX+8kglatJZ6qSTJZTGfqjjZc8sMqH HSEFXPwiLDj/K3rPp1aNqHHMoWNati381iodNxhdYSONqgxEkFt2cPRwxJFqbwvX69vz 41iUrrHUkJ1AVlw5TOONlRp+yy5YVnlSg43Xa+31g8UzsIB9aBYuOTDVio6l23wtRb0i 6i7DGHKTgBz+HObpdXH36jpNhIPHQlXrC0bvTD6rxvJroz+rRlHKasPgPzLEMd+8ctJ3 mGzWiAEneMOJ+G9Px7+1NmjiDR4x/NsAWde5SFLF8Y9OBTh/IwmWhQvIynLaIVcGQngC d6iw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9jS7AtcyDtrs+6cLov2M3M67k09AnqIN5nOTMIVW4oM=; b=hFhhSXjo41i69Ulx9PX6Dv5gUHdu+9FHNKiGvkS4XvMDEyUWnSE+2MquO4Db0W19JS V4WQiiM7HaJnKaKh2Q2si8shhXvCUC1pYLzbGTbcAcj1Z6071MmhaWku3jcDLB4R+sxM 2F+2ZAuduUXDbQeCdqI62I9BnOgAqmk0aoJsmrP72g/TjOO8G9Eq5gD8c3GjxvZ3xaRb 07LLmWje8rnpar+pYOuM/M1ErmXv83LMAihB5IjPumgVcY8033all0PLqrLHJHhStVZZ y9I5QYR4eIj3nJXAkO5JsKIq1cw4iCAe07ES/y9fYTh/nMDaEODoD3hb3E9xj0BwPK/M Aoew== X-Gm-Message-State: APjAAAVj4pxu0zqQARn+Yn1myZqHDV/SsNnW3MlYsf3tNpPUXRJ1SZV9 REkQnFQOvok2d6z7Qy5iW3gi+g== X-Google-Smtp-Source: APXvYqwsxlu9k7l6Uw+nDOZ0lR9INBaTqDEMiEHikJEgxASKQmp85XSc4MCElCe4yAI8hCM4Y4FHWQ== X-Received: by 2002:a5d:6b03:: with SMTP id v3mr283291wrw.289.1579537865228; Mon, 20 Jan 2020 08:31:05 -0800 (PST) Received: from localhost.localdomain ([176.61.57.127]) by smtp.gmail.com with ESMTPSA id p26sm22631756wmc.24.2020.01.20.08.31.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jan 2020 08:31:04 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, balbi@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, Bryan O'Donoghue , Andy Gross , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 15/19] arm64: dts: qcom: qcs404-evb: Define USB ID pin Date: Mon, 20 Jan 2020 16:31:12 +0000 Message-Id: <20200120163116.1197682-16-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> References: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The USB ID pin is used to tell if a system is a Host or a Device. For our purposes we will bind this pin into gpio-usb-conn later. For now define the pin with its pinmux. Cc: Andy Gross Cc: Bjorn Andersson Cc: Rob Herring Cc: Mark Rutland Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Bryan O'Donoghue --- arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi index b6147b5ab5cb..abfb2a9a37e9 100644 --- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi @@ -270,6 +270,20 @@ rclk { bias-pull-down; }; }; + + usb3_id_pin: usb3-id-pin { + pinmux { + pins = "gpio116"; + function = "gpio"; + }; + + pinconf { + pins = "gpio116"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + }; }; &pms405_gpios { From patchwork Mon Jan 20 16:31:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 11342527 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 694196C1 for ; Mon, 20 Jan 2020 16:31:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 47EED22314 for ; Mon, 20 Jan 2020 16:31:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="BJEfEYsP" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729751AbgATQbk (ORCPT ); Mon, 20 Jan 2020 11:31:40 -0500 Received: from mail-wm1-f68.google.com ([209.85.128.68]:54108 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729596AbgATQbI (ORCPT ); Mon, 20 Jan 2020 11:31:08 -0500 Received: by mail-wm1-f68.google.com with SMTP id m24so204756wmc.3 for ; Mon, 20 Jan 2020 08:31:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=4Kx77RkRZ6BLkxPPbqLY1opgnPyzoSH+OO3s+PAvU9w=; b=BJEfEYsP7dkNBq/ZXZrw1WeIwoHH6Y3/6fejM2G4jDVOeGOjUzz72jCC3ygm2JNOJI +D3smzukgxj94czG8PmnpA1mWLB9sI6JPgNinHewmz7ixadliLPaaPQJ5ZQinzr0WXpP n5xeJux1cMoRwISVE3kF1ASnAhB+OHzo1mm+Tyvfkvxx1AQCddfpiz2NblPJ+HNWdj80 nLy1pfaFu8DTkiuXJQc4CiOS2XUQO5cRd2bFrVFKsO936nKcfO7AfJ7aLIX1011+OlD/ GmRCmS5r5LQBtjmJ7RCJrf+giRcYZqPFtk0Ux3/kdruh7iFGuUNoQ8QaWcD5c+NfXEEC 2fbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4Kx77RkRZ6BLkxPPbqLY1opgnPyzoSH+OO3s+PAvU9w=; b=idn0HglgGvkKLaC2u/aDp8PcoEii//wD6fezvpMZN7htcEEaGWW6xGYcDhaCMd9QGi Jv9ge/zSexyL0qRVQ4LQ7lcWRoQYxSkZ5B2UPwsFSKuY8zjCeOXuNRlzQRUQpuv5qJOQ LETvM7mGCr7k4YSxo38Ue2xrWNP/FpswrJo7jPVR3A0dl/W86F64OGmxumyzg5vlQ6Qt 7ykS9GJ8L4oMH0IaGh5i2UKs6Fv9fUujNz/gTdH25wglYVBF85dwUEyMKAB2kJjVYsxu G8KhwJM/yb+spJ9r75WIKMTMEHTJeWUG3nb1lgPockE5wcgKBjOBO746cZ7o+GfDof8o LV5Q== X-Gm-Message-State: APjAAAVebrBe9+hk5hWpDvfFP28sq/ZOGNgpXwT29rS5KaYwldghaL0h rGlgv9lW4+X93A/Mi6xSThQZfw== X-Google-Smtp-Source: APXvYqz2a6qywCQBwkVN/qFSGZFQdZm3WG2wfjnhvelokq7ZMbtdhUeKnYqDBngNRoafomEDfzXuWQ== X-Received: by 2002:a1c:f003:: with SMTP id a3mr168184wmb.41.1579537866357; Mon, 20 Jan 2020 08:31:06 -0800 (PST) Received: from localhost.localdomain ([176.61.57.127]) by smtp.gmail.com with ESMTPSA id p26sm22631756wmc.24.2020.01.20.08.31.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jan 2020 08:31:05 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, balbi@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, Bryan O'Donoghue , Andy Gross , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 16/19] arm64: dts: qcom: qcs404-evb: Describe external VBUS regulator Date: Mon, 20 Jan 2020 16:31:13 +0000 Message-Id: <20200120163116.1197682-17-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> References: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org VBUS is supplied by an external regulator controlled by a GPIO pin. This patch models the regulator as regulator-usb3-vbus. Cc: Andy Gross Cc: Bjorn Andersson Cc: Rob Herring Cc: Mark Rutland Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Bryan O'Donoghue --- arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi index abfb2a9a37e9..01ef59e8e5b7 100644 --- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi @@ -33,6 +33,18 @@ vdd_esmps3_3p3: vdd-esmps3-3p3-regulator { regulator-max-microvolt = <3300000>; regulator-always-on; }; + + usb3_vbus_reg: regulator-usb3-vbus { + compatible = "regulator-fixed"; + regulator-name = "VBUS_BOOST_5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pms405_gpios 3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&usb_vbus_boost_pin>; + vin-supply = <&vph_pwr>; + enable-active-high; + }; }; &blsp1_uart3 { From patchwork Mon Jan 20 16:31:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 11342529 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6E498921 for ; Mon, 20 Jan 2020 16:31:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4C83022522 for ; Mon, 20 Jan 2020 16:31:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="KrTOAFoS" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729604AbgATQbk (ORCPT ); Mon, 20 Jan 2020 11:31:40 -0500 Received: from mail-wr1-f68.google.com ([209.85.221.68]:33325 "EHLO mail-wr1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729603AbgATQbJ (ORCPT ); Mon, 20 Jan 2020 11:31:09 -0500 Received: by mail-wr1-f68.google.com with SMTP id b6so140343wrq.0 for ; Mon, 20 Jan 2020 08:31:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GxnmQXYbPrwwDf1YSEYt6X6fG7RNrO9V3k1o149cooA=; b=KrTOAFoS5gy+apxyUACawp/SYox8aFo3/e48JlAmR7nlZGrIQnow4soJ8NO/A5riPi 8W3W6rcc287qy0yDWKV406c14yEIk49y7sCgU5cs0XAgMCNAOQ2K9xXfYyDOEJxZKm/B dgd/waopQrmDQZm+v4nx15QANkFEBC6OHtiPWJTEpAoeY982NQRPihwOLZyTpiAihGB9 7AiSSPLU3f568JvEiQYmXJIocofBn0gMqnfXqcVPuVOILoCPVlGFRNYhG/ejpVZQTaE+ Bj3fMJtiYxx07qYvBPBQL/HYUVbQH11JD0dVOirhJZI4+fWGHDNEdYV30yZdynVPwKms pfZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GxnmQXYbPrwwDf1YSEYt6X6fG7RNrO9V3k1o149cooA=; b=hk7qmBqIlNB2Xuu2AF026F/a+rjd1FVmcWmwj3vm7MWn+fTfFg0zl5otnlYWRTMSdm /IVo9+f8pktzJzSvDkroHLrw35ZEyRN+qabdeyhYLhJVuFsvpcJLoACTZOyFE38itE2k e2ERm6OpRY+YIFI5HF01xmDeWyv73RudJCexqCjIia+ArCDGDRV4SPjLzyoiuGVM6rPF 9kc4Mzg8830XjCiOj/JRMm7j8mV0WGWnL+gozSTBTZ0QUrbVT4QN9gJfGsL1znJ3YUNV nduQKQ23o/Ql6PloONBur3oQd4jQnNkc3mSuS6GtWBOqRueAAS9/OkwM4pF2g8ypQGmt SFpA== X-Gm-Message-State: APjAAAWpPhEBFPYAPhhO96wyma1r+WPPh5XjIFzIKXtRe/J14f81NUbf SL1qtxdDo5SvWdQvRmEhAEbRDQ== X-Google-Smtp-Source: APXvYqwghhUleMw2LU1W4UEnJa6R+rtx1K9hRLFt9rX2+vX67QUtw60cSxqT+JLR7aSNeUPZ5C2Bmw== X-Received: by 2002:adf:dc86:: with SMTP id r6mr372278wrj.68.1579537867368; Mon, 20 Jan 2020 08:31:07 -0800 (PST) Received: from localhost.localdomain ([176.61.57.127]) by smtp.gmail.com with ESMTPSA id p26sm22631756wmc.24.2020.01.20.08.31.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jan 2020 08:31:06 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, balbi@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, Bryan O'Donoghue , Andy Gross , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 17/19] arm64: dts: qcom: qcs404-evb: Raise vreg_l12_3p3 minimum voltage Date: Mon, 20 Jan 2020 16:31:14 +0000 Message-Id: <20200120163116.1197682-18-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> References: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Rather than set the minimum microvolt for this regulator in the USB SS PHY driver, set it in the DTS. Suggested-by: Bjorn Andersson Cc: Andy Gross Cc: Rob Herring Cc: Mark Rutland Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Bryan O'Donoghue --- arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi index 01ef59e8e5b7..0fff50f755ef 100644 --- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi @@ -199,7 +199,7 @@ vreg_l11_sdc2: l11 { }; vreg_l12_3p3: l12 { - regulator-min-microvolt = <2968000>; + regulator-min-microvolt = <3050000>; regulator-max-microvolt = <3300000>; }; From patchwork Mon Jan 20 16:31:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 11342517 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9895A6C1 for ; Mon, 20 Jan 2020 16:31:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 73FE9217F4 for ; Mon, 20 Jan 2020 16:31:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="LhOTSKfy" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729619AbgATQbQ (ORCPT ); Mon, 20 Jan 2020 11:31:16 -0500 Received: from mail-wr1-f66.google.com ([209.85.221.66]:37594 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729610AbgATQbK (ORCPT ); Mon, 20 Jan 2020 11:31:10 -0500 Received: by mail-wr1-f66.google.com with SMTP id w15so109845wru.4 for ; Mon, 20 Jan 2020 08:31:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LUSoU/XhVbuFFL332MrsGCHzak9+7MGgmls9JTYC/Cw=; b=LhOTSKfyxGu3QzNqPFlliI+E+JTZs7hl2ag76/1M4qOSHfq42vXcYje+r3VACQUqrv OA14VXRHnGA6xSd8TH/hySb60jJHoKlVYDrGuHwkfE8yV07+BfZx9/+7WEdoeZksxg32 IVZrSp6tkYItg31aYaLazuFk1KpjXqwYIlZkHWRGiNi36Oj7E+PBFpZBc/NMohFfxwcE CNmLEi2YVRpEA7IvbWqNdltO29jS+7z+Vp4MuYahgS37ZpKb7mBMfD7Lsi5lcut5J2Ne PFlESpL04Dst9VVWkPKKgm2IzDYm6aqm1wvH5jj9MFQAr+1MMjoTWdJZ+u6I/xxgEWR8 EKGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LUSoU/XhVbuFFL332MrsGCHzak9+7MGgmls9JTYC/Cw=; b=mbfEW4TViihpQD9CJdbHkIW8f0lZAGOAsTa3cLkTesHSeVhidXamqYdC3mOyFffCVH j4DQcacpVHMuTeapV9OBqPMbGrvHN3P4RzAeXvJxMHk8Q4oExnS7spMquSGx1C0fBfgz SnLasxz6nMWMeHctk7kpALbxptANBxWUdv7iv5LN7JaP6TPKQJk7Ly3CxHi1Pou/AJQO +UTfMsUxuPAmSjvSpUXNxI7uj9OXHbcRVPHD9OdbMfZTm7Q7TU4BgDccdKeZcAKay4nZ DXKg1dXPKETppsZQ7zsgPWR5g1YipVBUNhxWkpccxXGeHp5/4D3/RYnnNW3yo9J4YJWm 835Q== X-Gm-Message-State: APjAAAWsRHJ2Q+Mer84EwUxrzqC5cHf3vQ3WubkRNG0PdwbZAZnB5bUA tkD5vA52c1wehm9mOtt/URpNFQ== X-Google-Smtp-Source: APXvYqzh7+KwjH0AIYADBk8ipLPpoqsbpCKHss8cKke6kclzqR1hmQ5ry7k/jdlbdpit8NlVbn8tew== X-Received: by 2002:adf:cd92:: with SMTP id q18mr289882wrj.261.1579537868525; Mon, 20 Jan 2020 08:31:08 -0800 (PST) Received: from localhost.localdomain ([176.61.57.127]) by smtp.gmail.com with ESMTPSA id p26sm22631756wmc.24.2020.01.20.08.31.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jan 2020 08:31:07 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, balbi@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, Bryan O'Donoghue , Andy Gross , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 18/19] arm64: dts: qcom: qcs404-evb: Enable secondary USB controller Date: Mon, 20 Jan 2020 16:31:15 +0000 Message-Id: <20200120163116.1197682-19-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> References: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org This patch enables the second DWC3 controller which has one USB Hi-Speed PHY attached to it. Cc: Andy Gross Cc: Bjorn Andersson Cc: Rob Herring Cc: Mark Rutland Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Bryan O'Donoghue --- arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi index 0fff50f755ef..07d6d793a922 100644 --- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi @@ -318,6 +318,17 @@ pinconf { }; }; +&usb2 { + status = "okay"; +}; + +&usb2_phy_sec { + vdd-supply = <&vreg_l4_1p2>; + vdda1p8-supply = <&vreg_l5_1p8>; + vdda3p3-supply = <&vreg_l12_3p3>; + status = "okay"; +}; + &wifi { status = "okay"; vdd-0.8-cx-mx-supply = <&vreg_l2_1p275>; From patchwork Mon Jan 20 16:31:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 11342511 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 11350921 for ; Mon, 20 Jan 2020 16:31:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E37E9217F4 for ; Mon, 20 Jan 2020 16:31:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="KUCP0iXO" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729636AbgATQbM (ORCPT ); Mon, 20 Jan 2020 11:31:12 -0500 Received: from mail-wm1-f65.google.com ([209.85.128.65]:55551 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729624AbgATQbL (ORCPT ); Mon, 20 Jan 2020 11:31:11 -0500 Received: by mail-wm1-f65.google.com with SMTP id q9so192051wmj.5 for ; Mon, 20 Jan 2020 08:31:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+TYQNQQWESi4gKsyKl1vTO3f1E3mp/r/avow7BgHKMw=; b=KUCP0iXOMGojck9VBZNBRw2+JiHPhupKrykVLxkHtgMaLvcQ6j/cd2QGNjZwrezEMr 2mUA4Fb0Fywh1IJdvlfUEfxBlnLmifohbs5MyR0IJ+S3V2kQWnfnURxjV4+Famsdnehm lHruyqX+VNc9hSsgiDFLLo55zf+KeMkCVdhf3jwd6tGd+aHKnw0DuhukfF8OVTZ4k6Ay 7Af1bhjBthkJHBjjI7pTNswel5U/eeNGXu/cCwEhNvRNx2IDx9k98nNWOBzNxCDzojNp nvWMTt/V3BaJm8T+4B68QHz0V1QFuG6r/Jb6fJpLbxoMFybkuE4gtCR7mcxSTv0D7DI6 7yAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+TYQNQQWESi4gKsyKl1vTO3f1E3mp/r/avow7BgHKMw=; b=lxJushbrZ7PjPZf6JdCAs3UyJxkZz4qO+BXmWSPW373MWIU0vqH7V2IEWhsaHhVvFJ K71+o2nUz14e9gGw5pVes2tm+k/2iS7nrBQnGrB9UCPYMHERJeWr6PnXDX++dJ69rZNI uSZNMHF/HHkkdOxJqmtzzujUfvfxZiXSjEaF/5wGtwLsfHhGFIYwZgxJcDGSOiNRStYg iSaxvj11y8b8KqgpvvvMUWNf7unx+mMfRZDKP55Pp2yHPUcM1K79QVIOSW7oBSXe0Kfh 7510WYs/6LTl15k+ASfW7kCvintWWAfEPO/9Ul4m0fr5tGeFmZmWOXi3gjVZyBHbdjAg VU9Q== X-Gm-Message-State: APjAAAWmZ8zfPiiaf4wiVhmFptNLDxZUb7DFGvvjWwIlFBkZZf4N8PQl 6aq6nZRSDKPaYJH0iS4Ome0Hvw== X-Google-Smtp-Source: APXvYqx3mix0N3OSlbE724dBiszE0bIOQv9oqIWm0r574xwA6rZwDk5D5jD9j19ft4X5DAoq7PfbbA== X-Received: by 2002:a05:600c:2c01:: with SMTP id q1mr142132wmg.179.1579537869792; Mon, 20 Jan 2020 08:31:09 -0800 (PST) Received: from localhost.localdomain ([176.61.57.127]) by smtp.gmail.com with ESMTPSA id p26sm22631756wmc.24.2020.01.20.08.31.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jan 2020 08:31:09 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, balbi@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, Bryan O'Donoghue , Andy Gross , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 19/19] arm64: dts: qcom: qcs404-evb: Enable primary USB controller Date: Mon, 20 Jan 2020 16:31:16 +0000 Message-Id: <20200120163116.1197682-20-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> References: <20200120163116.1197682-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org This patch enables the primary USB controller which has - One USB3 SS PHY using gpio-usb-conn - One USB2 HS PHY in device mode only and no connector driver associated. Cc: Andy Gross Cc: Bjorn Andersson Cc: Rob Herring Cc: Mark Rutland Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Bryan O'Donoghue --- arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 29 ++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi index 07d6d793a922..a2cbca3a6124 100644 --- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi @@ -329,6 +329,35 @@ &usb2_phy_sec { status = "okay"; }; +&usb3 { + status = "okay"; + dwc3@7580000 { + usb-role-switch; + usb_con: gpio_usb_connector { + compatible = "gpio-usb-b-connector"; + label = "USB-C"; + id-gpio = <&tlmm 116 GPIO_ACTIVE_HIGH>; + vbus-supply = <&usb3_vbus_reg>; + pinctrl-names = "default"; + pinctrl-0 = <&usb3_id_pin>, <&usb3_vbus_pin>; + status = "okay"; + }; + }; +}; + +&usb2_phy_prim { + vdd-supply = <&vreg_l4_1p2>; + vdda1p8-supply = <&vreg_l5_1p8>; + vdda3p3-supply = <&vreg_l12_3p3>; + status = "okay"; +}; + +&usb3_phy { + vdd-supply = <&vreg_l3_1p05>; + vdda1p8-supply = <&vreg_l5_1p8>; + status = "okay"; +}; + &wifi { status = "okay"; vdd-0.8-cx-mx-supply = <&vreg_l2_1p275>;