From patchwork Tue Jan 21 14:39:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeff Kubascik X-Patchwork-Id: 11344071 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C46106C1 for ; Tue, 21 Jan 2020 14:39:51 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A99A22253D for ; Tue, 21 Jan 2020 14:39:51 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A99A22253D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=dornerworks.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1itufP-0003Xg-U6; Tue, 21 Jan 2020 14:38:07 +0000 Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1itufO-0003Xb-Hq for xen-devel@lists.xenproject.org; Tue, 21 Jan 2020 14:38:06 +0000 X-Inumbo-ID: 9cdc9c3e-3c5b-11ea-aecd-bc764e2007e4 Received: from webmail.dornerworks.com (unknown [12.207.209.150]) by us1-rack-iad1.inumbo.com (Halon) with ESMTP id 9cdc9c3e-3c5b-11ea-aecd-bc764e2007e4; Tue, 21 Jan 2020 14:37:57 +0000 (UTC) From: Jeff Kubascik To: Date: Tue, 21 Jan 2020 09:39:26 -0500 Message-ID: <20200121143926.125116-1-jeff.kubascik@dornerworks.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Originating-IP: [172.27.13.179] X-ClientProxiedBy: Mcbain.dw.local (172.27.1.45) To Mcbain.dw.local (172.27.1.45) X-spam-status: No, score=-2.9 required=3.5 tests=ALL_TRUSTED, BAYES_00, MAILSHELL_SCORE_10_69 X-Spam-Flag: NO Subject: [Xen-devel] [PATCH] xen/arm: Implement GICD_IGRPMODR as RAZ/WI for VGICv3 X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Volodymyr Babchuk , Stefano Stabellini , Julien Grall Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The VGICv3 module does not implement security extensions for guests. Furthermore, per the ARM Generic Interrupt Controller Architecture Specification (ARM IHI 0069E), section 9.9.15, the GICD_IGRPMODR register should be RAZ/WI to non-secure accesses when GICD_CTLR.DS = 0. This implements the GICD_IGRPMODR register for guest VMs as RAZ/WI, to avoid a data abort in the case the guest attempts to read or write the register. Signed-off-by: Jeff Kubascik --- xen/arch/arm/vgic-v3.c | 8 ++++++++ xen/include/asm-arm/gic_v3_defs.h | 2 ++ 2 files changed, 10 insertions(+) diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c index 422b94f902..c4305d25e3 100644 --- a/xen/arch/arm/vgic-v3.c +++ b/xen/arch/arm/vgic-v3.c @@ -1193,6 +1193,10 @@ static int vgic_v3_distr_mmio_read(struct vcpu *v, mmio_info_t *info, */ return __vgic_v3_distr_common_mmio_read("vGICD", v, info, gicd_reg, r); + case VRANGE32(GICD_IGRPMODR, GICD_IGRPMODRN): + /* We do not implement security extensions for guests, read zero */ + goto read_as_zero_32; + case VRANGE32(GICD_NSACR, GICD_NSACRN): /* We do not implement security extensions for guests, read zero */ goto read_as_zero_32; @@ -1379,6 +1383,10 @@ static int vgic_v3_distr_mmio_write(struct vcpu *v, mmio_info_t *info, return __vgic_v3_distr_common_mmio_write("vGICD", v, info, gicd_reg, r); + case VRANGE32(GICD_IGRPMODR, GICD_IGRPMODRN): + /* We do not implement security extensions for guests, write ignore */ + goto write_ignore_32; + case VRANGE32(GICD_NSACR, GICD_NSACRN): /* We do not implement security extensions for guests, write ignore */ goto write_ignore_32; diff --git a/xen/include/asm-arm/gic_v3_defs.h b/xen/include/asm-arm/gic_v3_defs.h index 5a578e7c11..42c1b3465c 100644 --- a/xen/include/asm-arm/gic_v3_defs.h +++ b/xen/include/asm-arm/gic_v3_defs.h @@ -30,6 +30,8 @@ #define GICD_CLRSPI_NSR (0x048) #define GICD_SETSPI_SR (0x050) #define GICD_CLRSPI_SR (0x058) +#define GICD_IGRPMODR (0xD00) +#define GICD_IGRPMODRN (0xD7C) #define GICD_IROUTER (0x6000) #define GICD_IROUTER32 (0x6100) #define GICD_IROUTER1019 (0x7FD8)