From patchwork Fri Jan 24 14:34:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 11350465 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8F284921 for ; Fri, 24 Jan 2020 14:40:01 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6CD1724676 for ; Fri, 24 Jan 2020 14:40:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="o2qa+b3p" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6CD1724676 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jPak2zTq+mMw5dk2irz5HScpapwBvegTNR1wAW9oDXE=; b=o2qa+b3pOStN6i 79fOFHoREp62P4Vf6J6C5U2ssbq8kop7b14brUkbWCGUpz3G8NHMsjm8aTbEYUbeweFzAr9GWZa/1 skGGk6a05JBRsNsy1EhaOZ/4l1pRl5+N19iw8c9rzjzLZi1s2LoePKM7PTw13RKXH22vsrag6P8eN xD9Ke1AkkeJbNuN23AozucP485gzy2DxEHzVRrWLHYu1tRSd96bjGGupjJD64xb43uqz75/dmOnZP Ipb/eT/kU3SxHKfW+3FLbRTiIhWsXk6ipKl+mU1dWw3WHv9a2MuBRmqoEDpa7HHgsEJM7EyOMFjw6 /cP6Jn3gehA0M5yE9QPg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1iv07p-0002rd-M5; Fri, 24 Jan 2020 14:39:57 +0000 Received: from szxga07-in.huawei.com ([45.249.212.35] helo=huawei.com) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1iv073-00029V-Rg for linux-arm-kernel@lists.infradead.org; Fri, 24 Jan 2020 14:39:11 +0000 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 7C03E325B45E66E3C637; Fri, 24 Jan 2020 22:39:03 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.439.0; Fri, 24 Jan 2020 22:38:53 +0800 From: John Garry To: , , , , , , , , Subject: [PATCH RFC 1/7] perf jevents: Add support for an extra directory level Date: Fri, 24 Jan 2020 22:34:59 +0800 Message-ID: <1579876505-113251-2-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1579876505-113251-1-git-send-email-john.garry@huawei.com> References: <1579876505-113251-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200124_063910_060055_ED1DD887 X-CRM114-Status: GOOD ( 12.15 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [45.249.212.35 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: suzuki.poulose@arm.com, John Garry , linuxarm@huawei.com, linux-kernel@vger.kernel.org, zhangshaokun@hisilicon.com, james.clark@arm.com, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Currently we support upto a level 2 directory, and level 2 would be in the form vendor/platform. Add support for a further level, to hold specific categories of events for when we want to segregate them for matching purposes. Signed-off-by: John Garry --- tools/perf/pmu-events/jevents.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c index 079c77b6a2fd..8af05b94a37d 100644 --- a/tools/perf/pmu-events/jevents.c +++ b/tools/perf/pmu-events/jevents.c @@ -960,15 +960,20 @@ static int process_one_file(const char *fpath, const struct stat *sb, int level = ftwbuf->level; int err = 0; - if (level == 2 && is_dir) { + if (level >= 2 && is_dir) { + int count = 0; /* * For level 2 directory, bname will include parent name, * like vendor/platform. So search back from platform dir * to find this. + * Something similar for level 3 directory, but we're a PMU + * category folder, like vendor/platform/cpu. */ bname = (char *) fpath + ftwbuf->base - 2; for (;;) { if (*bname == '/') + count++; + if (count == level - 1) break; bname--; } @@ -981,13 +986,13 @@ static int process_one_file(const char *fpath, const struct stat *sb, level, sb->st_size, bname, fpath); /* base dir or too deep */ - if (level == 0 || level > 3) + if (level == 0 || level > 4) return 0; /* model directory, reset topic */ if ((level == 1 && is_dir && is_leaf_dir(fpath)) || - (level == 2 && is_dir)) { + (level >= 2 && is_dir && is_leaf_dir(fpath))) { if (close_table) print_events_table_suffix(eventsfp); From patchwork Fri Jan 24 14:35:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 11350463 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 808EC921 for ; Fri, 24 Jan 2020 14:39:27 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5EA3A206F0 for ; Fri, 24 Jan 2020 14:39:27 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="LN/Lb8Xz" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5EA3A206F0 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=vbJ09DQ4uzKhaYf8CkIw9Y7wb+llsQiXbETo/szi5V4=; b=LN/Lb8XzfKav9d xlsh/NMV1u3V1IQ4oyxsRobKjVwJUXk6oiiHL3RKIuTX04pb4X/Wa7PFNZ5m6017hvza/Is+sn/SH xRFdNmYGkXJZJrVr72OJhVhTCmu9PIwlse3oZF5/eFC1kyyQnTPrPGX/c8mOHyUSwdr3N3UHL0uhX yTtWlk5QKWGUfqKxsBL8SeP39PD6Y2QyWXB0+Qx2Vx9oNcq95SVRqLUt0lEHWmkzCJtUTUm4uUNwu nIHgJmlI13Cq/PnLus1CNFZT1f6apLc7R1+lP41SXH7llH22TiAUWRTcsHc6CqUpTXnMj1cY8++LS Qc/zC+fTcYBKlnLDinCA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1iv07H-0002Nc-EK; Fri, 24 Jan 2020 14:39:23 +0000 Received: from szxga05-in.huawei.com ([45.249.212.191] helo=huawei.com) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1iv073-00029R-4E for linux-arm-kernel@lists.infradead.org; Fri, 24 Jan 2020 14:39:10 +0000 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 587E2253B7DCCCBE7187; Fri, 24 Jan 2020 22:39:03 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.439.0; Fri, 24 Jan 2020 22:38:53 +0800 From: John Garry To: , , , , , , , , Subject: [PATCH RFC 2/7] perf vendor events arm64: Relocate hip08 core events Date: Fri, 24 Jan 2020 22:35:00 +0800 Message-ID: <1579876505-113251-3-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1579876505-113251-1-git-send-email-john.garry@huawei.com> References: <1579876505-113251-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200124_063909_328805_E631994B X-CRM114-Status: UNSURE ( 7.53 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [45.249.212.191 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: suzuki.poulose@arm.com, John Garry , linuxarm@huawei.com, linux-kernel@vger.kernel.org, zhangshaokun@hisilicon.com, james.clark@arm.com, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Relocate the core events JSONs to match to future structure, which will have separate folders for CPU and uncore/system events. Signed-off-by: John Garry --- .../arch/arm64/hisilicon/hip08/{ => cpu}/core-imp-def.json | 0 tools/perf/pmu-events/arch/arm64/mapfile.csv | 2 +- 2 files changed, 1 insertion(+), 1 deletion(-) rename tools/perf/pmu-events/arch/arm64/hisilicon/hip08/{ => cpu}/core-imp-def.json (100%) diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/core-imp-def.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/cpu/core-imp-def.json similarity index 100% rename from tools/perf/pmu-events/arch/arm64/hisilicon/hip08/core-imp-def.json rename to tools/perf/pmu-events/arch/arm64/hisilicon/hip08/cpu/core-imp-def.json diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv index 0d609149b82a..c92cb3b519fc 100644 --- a/tools/perf/pmu-events/arch/arm64/mapfile.csv +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv @@ -20,5 +20,5 @@ 0x00000000410fd0c0,v1,arm/cortex-a76-n1,core 0x00000000420f5160,v1,cavium/thunderx2,core 0x00000000430f0af0,v1,cavium/thunderx2,core -0x00000000480fd010,v1,hisilicon/hip08,core +0x00000000480fd010,v1,hisilicon/hip08/cpu,core 0x00000000500f0000,v1,ampere/emag,core From patchwork Fri Jan 24 14:35:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 11350471 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A0EB5921 for ; Fri, 24 Jan 2020 14:40:52 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7A73E206F0 for ; Fri, 24 Jan 2020 14:40:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="I5jXOsuG" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7A73E206F0 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=q+RzhMpYyvJi9PcqXIo0rRBsot4MVUumNMP5xnBhPPg=; b=I5jXOsuGpc6Z4Y Ox3Tj56Sw+ykonVe+dihWGPZNopxVblFEgrM7vTbZcM+SiprePRFLWC0ICRKXBdzByMKvoqy7eql+ l9bHNe3kng2DhtgHGcMNgT57y3ERmNTn4tH2/Vgbkk4eQM2tcLwmLUjSkvbG771pAuKnuILNgIxaN lMFJmeBoaEVaHur2D5cHdES+d2X0U1OkdBD/a6pAb/9aP23kczEz2wgSa2t/1/EkkGRakNSvEcFIP 6Or5iNsEapqC8Pnm0FzRi2fEKCYkFwyN+ulF4JWS9kheWrmezaIilE9IISDs54EJJoyuaRpEHstWl sAIkuhhasEj+j/al2CCQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1iv08f-0004qJ-H5; Fri, 24 Jan 2020 14:40:49 +0000 Received: from szxga05-in.huawei.com ([45.249.212.191] helo=huawei.com) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1iv072-00029X-VF for linux-arm-kernel@lists.infradead.org; Fri, 24 Jan 2020 14:39:12 +0000 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 48009B4E415BE2436B1E; Fri, 24 Jan 2020 22:39:03 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.439.0; Fri, 24 Jan 2020 22:38:53 +0800 From: John Garry To: , , , , , , , , Subject: [PATCH RFC 3/7] perf jevents: Add support for a system events PMU Date: Fri, 24 Jan 2020 22:35:01 +0800 Message-ID: <1579876505-113251-4-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1579876505-113251-1-git-send-email-john.garry@huawei.com> References: <1579876505-113251-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200124_063909_351451_BE7B1B3C X-CRM114-Status: GOOD ( 28.64 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [45.249.212.191 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: suzuki.poulose@arm.com, John Garry , linuxarm@huawei.com, linux-kernel@vger.kernel.org, zhangshaokun@hisilicon.com, james.clark@arm.com, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Currently CPU or uncore PMUs are supported for PMU event aliasing. For fully integrated SoCs, we may have many other system PMUs and it is useful to be able to alias events for those PMUs also. This could also include the grey area of uncore PMUs, which need to be matched by CPU ID, so need to be tightly coupled with the CPU. This is how it works for x86. However, this may not work well for architectures where the CPU may not have fixed uncore PMUs - ARM arch, for example. Add support for a new mapfile - mapfile_sys.csv - which maps to system event tables. For these, some SYS ID is used to match. For CPU PMUs, mapfile.csv is still used to match any CPU event alises. Generated pmu-events.c format will be like: struct pmu_event pme_hisilicon_hip08_cpu[] = { { .name = "l1d_cache_rd", .event = "event=0x40", .desc = "L1D cache access, read", .topic = "core imp def", .long_desc = "Attributable Level 1 data cache access, read", }, { .name = "l1d_cache_wr", .event = "event=0x41", .desc = "L1D cache access, write", .topic = "core imp def", .long_desc = "Attributable Level 1 data cache access, write", }, { .name = 0, .event = 0, .desc = 0, }, }; struct pmu_event pme_hisilicon_hip08_sys[] = { { .name = "uncore_hisi_l3c.rd_cpipe", .event = "event=0", .desc = "Total read accesses. Unit: hisi_sccl,l3c ", .topic = "uncore l3c", .long_desc = "Total read accesses", .pmu = "hisi_sccl,l3c", }, { .name = "uncore_hisi_l3c.wr_cpipe", .event = "event=0x1", .desc = "Total write accesses. Unit: hisi_sccl,l3c ", .topic = "uncore l3c", .long_desc = "Total write accesses", .pmu = "hisi_sccl,l3c", }, { .name = 0, .event = 0, .desc = 0, }, }; struct pmu_events_map pmu_events_map[] = { { .cpuid = "0x00000000480fd010", .version = "v1", .type = "core", .table = pme_hisilicon_hip08_cpu }, { .sysid = "HIP08", .version = "v1", .type = "sys", .table = pme_hisilicon_hip08_sys }, { .cpuid = 0, .sysid = 0, .version = 0, .type = 0, .table = 0, }, }; Signed-off-by: John Garry --- tools/perf/pmu-events/README | 47 +++++++++++++---- .../pmu-events/arch/arm64/mapfile_sys.csv | 13 +++++ tools/perf/pmu-events/jevents.c | 52 ++++++++++++++++--- tools/perf/pmu-events/pmu-events.h | 1 + 4 files changed, 94 insertions(+), 19 deletions(-) create mode 100644 tools/perf/pmu-events/arch/arm64/mapfile_sys.csv diff --git a/tools/perf/pmu-events/README b/tools/perf/pmu-events/README index de7efa2cebd1..e940cef73d2b 100644 --- a/tools/perf/pmu-events/README +++ b/tools/perf/pmu-events/README @@ -1,6 +1,7 @@ The contents of this directory allow users to specify PMU events in their -CPUs by their symbolic names rather than raw event codes (see example below). +CPUs or other PMUs in the system by their symbolic names rather than raw +event codes (see example below). The main program in this directory, is the 'jevents', which is built and executed _BEFORE_ the perf binary itself is built. @@ -12,7 +13,12 @@ tree tools/perf/pmu-events/arch/foo. JSON files, each of which describes a set of PMU events. - The CSV file that maps a specific CPU to its set of PMU events is to - be named 'mapfile.csv' (see below for mapfile format). + be named 'mapfile.csv'. + + An additional optional CSV file maps specific PMU to its set of PMU + events is to be named 'mapfile_sys.csv'. + + See below for mapfile formats. - Directories are traversed, but all other files are ignored. @@ -22,10 +28,10 @@ tree tools/perf/pmu-events/arch/foo. Architecture standard JSONs must be located in the architecture root folder. Matching is based on the "EventName" field. -The PMU events supported by a CPU model are expected to grouped into topics -such as Pipelining, Cache, Memory, Floating-point etc. All events for a topic -should be placed in a separate JSON file - where the file name identifies -the topic. Eg: "Floating-point.json". +The PMU events supported by a CPU model or PMU are expected to grouped into +topics such as Pipelining, Cache, Memory, Floating-point etc. All events for +a topic should be placed in a separate JSON file - where the file name +identifies the topic. Eg: "Floating-point.json". All the topic JSON files for a CPU model/family should be in a separate sub directory. Thus for the Silvermont X86 CPU: @@ -38,7 +44,11 @@ The JSONs folder for a CPU model/family may be placed in the root arch folder, or may be placed in a vendor sub-folder under the arch folder for instances where the arch and vendor are not the same. -Using the JSON files and the mapfile, 'jevents' generates the C source file, +The JSONS folder for a system PMU should be placed in a subfolder for +the platform, separate to the CPU events folder. The reason is that different +matching mechanism could be used for detecting CPU and system PMUs. + +Using the JSON files and the mapfile(s), 'jevents' generates the C source file, 'pmu-events.c', which encodes the two sets of tables: - Set of 'PMU events tables' for all known CPUs in the architecture, @@ -83,11 +93,11 @@ NOTES: 2. The 'pmu-events.h' has an extern declaration for the mapping table and the generated 'pmu-events.c' defines this table. - 3. _All_ known CPU tables for architecture are included in the perf - binary. + 3. _All_ known CPU and system tables for architecture are included in + the perf binary. -At run time, perf determines the actual CPU it is running on, finds the -matching events table and builds aliases for those events. This allows +At run time, perf determines the actual CPU or system it is running on, finds +the matching events table and builds aliases for those events. This allows users to specify events by their name: $ perf stat -e pm_1plus_ppc_cmpl sleep 1 @@ -150,3 +160,18 @@ where: i.e the three CPU models use the JSON files (i.e PMU events) listed in the directory 'tools/perf/pmu-events/arch/x86/silvermont'. + +The mapfile_sys.csv format is slightly different, in that it contains a SYSID +instead of the CPUID: + + Header line + SYSID,Version,Dir/path/name,Type + +where, same as mapfile.csv, except: + + SYSID: + SYSID is a platform specific char string, that can be used + to identify thr system. + + Type: + Should always be sys diff --git a/tools/perf/pmu-events/arch/arm64/mapfile_sys.csv b/tools/perf/pmu-events/arch/arm64/mapfile_sys.csv new file mode 100644 index 000000000000..701d8ff67354 --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/mapfile_sys.csv @@ -0,0 +1,13 @@ +# Format: +# SYS ID,Version,JSON/file/pathname,Type +# +# where +# SYS ID Unique identifier for the system +# Could be DT machine ID, ACPI OEM ID, etc +# Version could be used to track version of of JSON file +# but currently unused. +# JSON/file/pathname is the path to JSON file, relative +# to tools/perf/pmu-events/arch/arm64/. +# Type is sys +# +#Family-model,Version,Filename,EventType diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c index 8af05b94a37d..da6430c0d184 100644 --- a/tools/perf/pmu-events/jevents.c +++ b/tools/perf/pmu-events/jevents.c @@ -755,6 +755,7 @@ static void print_mapping_table_suffix(FILE *outfp) */ fprintf(outfp, "{\n"); fprintf(outfp, "\t.cpuid = 0,\n"); + fprintf(outfp, "\t.sysid = 0,\n"); fprintf(outfp, "\t.version = 0,\n"); fprintf(outfp, "\t.type = 0,\n"); fprintf(outfp, "\t.table = 0,\n"); @@ -771,7 +772,7 @@ static int process_mapfile(FILE *outfp, char *fpath) char *save = NULL; char *line, *p; int line_num; - char *tblname; + char *tblname, *table_id; int ret = 0; pr_info("%s: Processing mapfile %s\n", prog, fpath); @@ -788,8 +789,6 @@ static int process_mapfile(FILE *outfp, char *fpath) return -1; } - print_mapping_table_prefix(outfp); - /* Skip first line (header) */ p = fgets(line, n, mapfp); if (!p) @@ -797,7 +796,7 @@ static int process_mapfile(FILE *outfp, char *fpath) line_num = 1; while (1) { - char *cpuid, *version, *type, *fname; + char *id, *version, *type, *fname; line_num++; p = fgets(line, n, mapfp); @@ -816,14 +815,21 @@ static int process_mapfile(FILE *outfp, char *fpath) } line[strlen(line)-1] = '\0'; - cpuid = fixregex(strtok_r(p, ",", &save)); + id = fixregex(strtok_r(p, ",", &save)); version = strtok_r(NULL, ",", &save); fname = strtok_r(NULL, ",", &save); type = strtok_r(NULL, ",", &save); + /* We treat uncore as "cpu" events */ + if (!strcmp(type, "core") || !strcmp(type, "uncore")) + table_id = "cpuid"; + else if (!strcmp(type, "sys")) + table_id = "sysid"; + else + table_id = "unknown"; tblname = file_name_to_table_name(fname); fprintf(outfp, "{\n"); - fprintf(outfp, "\t.cpuid = \"%s\",\n", cpuid); + fprintf(outfp, "\t.%s = \"%s\",\n", table_id, id); fprintf(outfp, "\t.version = \"%s\",\n", version); fprintf(outfp, "\t.type = \"%s\",\n", type); @@ -841,12 +847,36 @@ static int process_mapfile(FILE *outfp, char *fpath) } out: - print_mapping_table_suffix(outfp); fclose(mapfp); free(line); return ret; } +static int process_mapfiles(FILE *outfp, char *fpath, char *fpath_sys) +{ + char *save = NULL; + int line_num; + char *tblname; + char *table_id; + int ret; + + pr_info("%s: Processing mapfiles %s fpath_sys=%s\n", prog, fpath, fpath_sys); + + print_mapping_table_prefix(outfp); + + ret = process_mapfile(outfp, fpath); + if (ret) + goto out; + + if (fpath_sys) + ret = process_mapfile(outfp, fpath_sys); + +out: + print_mapping_table_suffix(outfp); + + return ret; +} + /* * If we fail to locate/process JSON and map files, create a NULL mapping * table. This would at least allow perf to build even if we can't find/use @@ -887,6 +917,7 @@ static int get_maxfds(void) */ static FILE *eventsfp; static char *mapfile; +static char *mapfile_sys; static int is_leaf_dir(const char *fpath) { @@ -1024,6 +1055,11 @@ static int process_one_file(const char *fpath, const struct stat *sb, return 0; } + if (!strcmp(bname, "mapfile_sys.csv")) { + mapfile_sys = strdup(fpath); + return 0; + } + pr_info("%s: Ignoring file %s\n", prog, fpath); return 0; } @@ -1174,7 +1210,7 @@ int main(int argc, char *argv[]) goto empty_map; } - if (process_mapfile(eventsfp, mapfile)) { + if (process_mapfiles(eventsfp, mapfile, mapfile_sys)) { pr_info("%s: Error processing mapfile %s\n", prog, mapfile); /* Make build fail */ fclose(eventsfp); diff --git a/tools/perf/pmu-events/pmu-events.h b/tools/perf/pmu-events/pmu-events.h index caeb577d36c9..9964bdd2f6e1 100644 --- a/tools/perf/pmu-events/pmu-events.h +++ b/tools/perf/pmu-events/pmu-events.h @@ -31,6 +31,7 @@ struct pmu_event { */ struct pmu_events_map { const char *cpuid; + const char *sysid; const char *version; const char *type; /* core, uncore etc */ struct pmu_event *table; From patchwork Fri Jan 24 14:35:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 11350467 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 33BFD921 for ; Fri, 24 Jan 2020 14:40:19 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EF98A2071A for ; Fri, 24 Jan 2020 14:40:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="fHo8NAyR" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EF98A2071A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=tqns9zFnAG+XH7IwO6T2mpgQwb+r/VjErH9iylIU3hY=; b=fHo8NAyRSlalFR 996E1bj8jC1EK2Y9HHvIQi4tSUPL4w26PLELL+telo04y24ggQd0K+uaPe7YCjY5LNB7WTmdt4CNb gxH321kxVa4YhR4glqxvRPO9wTcyLFvgQjPWVWxVio4w6Ct272tezPTh6ZyzgK7b3TslxEzDjXB8l /LO4DYYlvpojFCad9kzK+dHlP31iT49f4gYSaQjXpgRIAfYbODSDuUnpu1ZoTuY9HCngAwRRJguHy Z1uk+HzIzpyqQXbW0jF3pFXqUapuAMh5BDQdBN/yFLApLi3ekEc4xt67fCm9DHezDsHQ4IUoPLPZw V2Vjv/Yz/hsT/WvhOu0g==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1iv088-0004L1-CJ; Fri, 24 Jan 2020 14:40:16 +0000 Received: from szxga07-in.huawei.com ([45.249.212.35] helo=huawei.com) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1iv073-00029T-4B for linux-arm-kernel@lists.infradead.org; Fri, 24 Jan 2020 14:39:12 +0000 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 8A8E2D5C149B98C0DB21; Fri, 24 Jan 2020 22:39:03 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.439.0; Fri, 24 Jan 2020 22:38:54 +0800 From: John Garry To: , , , , , , , , Subject: [PATCH RFC 4/7] perf pmu: Rename uncore symbols to include system PMUs Date: Fri, 24 Jan 2020 22:35:02 +0800 Message-ID: <1579876505-113251-5-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1579876505-113251-1-git-send-email-john.garry@huawei.com> References: <1579876505-113251-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200124_063909_326400_48182AF0 X-CRM114-Status: GOOD ( 14.42 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [45.249.212.35 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: suzuki.poulose@arm.com, John Garry , linuxarm@huawei.com, linux-kernel@vger.kernel.org, zhangshaokun@hisilicon.com, james.clark@arm.com, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org We want to expand the perf PMU support to cover system PMUs, which are essentially the same as uncore pmus (from a kernel sysfs perspective anyway). So rename pmu_is_uncore() et al to cover this. Unfortunately we have no real way to detect if a PMU is uncore or system. We could check the PMU name for "uncore_" prefix to detect if really uncore, but this does not work for all uncore PMUs - maybe we should introduce this kernel naming convention for future support. Signed-off-by: John Garry --- tools/perf/arch/arm64/util/arm-spe.c | 2 +- tools/perf/util/evsel.h | 2 +- tools/perf/util/parse-events.c | 12 ++++++------ tools/perf/util/pmu.c | 6 +++--- tools/perf/util/pmu.h | 2 +- 5 files changed, 12 insertions(+), 12 deletions(-) diff --git a/tools/perf/arch/arm64/util/arm-spe.c b/tools/perf/arch/arm64/util/arm-spe.c index eba6541ec0f1..4241ad6c9fa0 100644 --- a/tools/perf/arch/arm64/util/arm-spe.c +++ b/tools/perf/arch/arm64/util/arm-spe.c @@ -223,7 +223,7 @@ struct perf_event_attr } arm_spe_pmu->selectable = true; - arm_spe_pmu->is_uncore = false; + arm_spe_pmu->is_uncore_or_sys = false; return attr; } diff --git a/tools/perf/util/evsel.h b/tools/perf/util/evsel.h index dc14f4a823cd..d583b2a64d93 100644 --- a/tools/perf/util/evsel.h +++ b/tools/perf/util/evsel.h @@ -75,7 +75,7 @@ struct evsel { bool precise_max; bool ignore_missing_thread; bool forced_leader; - bool use_uncore_alias; + bool use_uncore_or_system_alias; /* parse modifier helper */ int exclude_GH; int sample_read; diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c index ed7c008b9c8b..89105d5f0f0b 100644 --- a/tools/perf/util/parse-events.c +++ b/tools/perf/util/parse-events.c @@ -367,7 +367,7 @@ __add_event(struct list_head *list, int *idx, (*idx)++; evsel->core.cpus = perf_cpu_map__get(cpus); evsel->core.own_cpus = perf_cpu_map__get(cpus); - evsel->core.system_wide = pmu ? pmu->is_uncore : false; + evsel->core.system_wide = pmu ? pmu->is_uncore_or_sys : false; evsel->auto_merge_stats = auto_merge_stats; if (name) @@ -1404,7 +1404,7 @@ int parse_events_add_pmu(struct parse_events_state *parse_state, struct perf_pmu *pmu; struct evsel *evsel; struct parse_events_error *err = parse_state->error; - bool use_uncore_alias; + bool use_uncore_or_system_alias; LIST_HEAD(config_terms); pmu = perf_pmu__find(name); @@ -1425,7 +1425,7 @@ int parse_events_add_pmu(struct parse_events_state *parse_state, memset(&attr, 0, sizeof(attr)); } - use_uncore_alias = (pmu->is_uncore && use_alias); + use_uncore_or_system_alias = (pmu->is_uncore_or_sys && use_alias); if (!head_config) { attr.type = pmu->type; @@ -1433,7 +1433,7 @@ int parse_events_add_pmu(struct parse_events_state *parse_state, auto_merge_stats, NULL); if (evsel) { evsel->pmu_name = name; - evsel->use_uncore_alias = use_uncore_alias; + evsel->use_uncore_or_system_alias = use_uncore_or_system_alias; return 0; } else { return -ENOMEM; @@ -1481,7 +1481,7 @@ int parse_events_add_pmu(struct parse_events_state *parse_state, evsel->metric_expr = info.metric_expr; evsel->metric_name = info.metric_name; evsel->pmu_name = name; - evsel->use_uncore_alias = use_uncore_alias; + evsel->use_uncore_or_system_alias = use_uncore_or_system_alias; evsel->percore = config_term_percore(&evsel->config_terms); } @@ -1598,7 +1598,7 @@ parse_events__set_leader_for_uncore_aliase(char *name, struct list_head *list, __evlist__for_each_entry(list, evsel) { /* Only split the uncore group which members use alias */ - if (!evsel->use_uncore_alias) + if (!evsel->use_uncore_or_system_alias) goto out; /* The events must be from the same uncore block */ diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c index 8b99fd312aae..569aba4cec89 100644 --- a/tools/perf/util/pmu.c +++ b/tools/perf/util/pmu.c @@ -623,7 +623,7 @@ static struct perf_cpu_map *pmu_cpumask(const char *name) return NULL; } -static bool pmu_is_uncore(const char *name) +static bool pmu_is_uncore_or_sys(const char *name) { char path[PATH_MAX]; const char *sysfs; @@ -769,7 +769,7 @@ static void pmu_add_cpu_aliases(struct list_head *head, struct perf_pmu *pmu) break; } - if (pmu_is_uncore(name) && + if (pmu_is_uncore_or_sys(name) && pmu_uncore_alias_match(pname, name)) goto new_alias; @@ -838,7 +838,7 @@ static struct perf_pmu *pmu_lookup(const char *name) pmu->cpus = pmu_cpumask(name); pmu->name = strdup(name); pmu->type = type; - pmu->is_uncore = pmu_is_uncore(name); + pmu->is_uncore_or_sys = pmu_is_uncore_or_sys(name); pmu->max_precise = pmu_max_precise(name); pmu_add_cpu_aliases(&aliases, pmu); diff --git a/tools/perf/util/pmu.h b/tools/perf/util/pmu.h index 6737e3d5d568..67cf002c9458 100644 --- a/tools/perf/util/pmu.h +++ b/tools/perf/util/pmu.h @@ -25,7 +25,7 @@ struct perf_pmu { char *name; __u32 type; bool selectable; - bool is_uncore; + bool is_uncore_or_sys; bool auxtrace; int max_precise; struct perf_event_attr *default_config; From patchwork Fri Jan 24 14:35:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 11350469 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C97D6924 for ; Fri, 24 Jan 2020 14:40:33 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6230F206F0 for ; Fri, 24 Jan 2020 14:40:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="q2Er9tnV" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6230F206F0 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=iY0ninp+PZNVMREXniAPl/iWwtX1Dnp624JiS2bsYTY=; b=q2Er9tnVv0tg3Q CJ5KrayCUQA18fCyrHyFRquCFR5i1fQHrvQDhmSF/C4QndrlZOuqtalzGJ9/yzwU1u5S8gyjhdhi2 oJK2/S6T33yVAchjAuc4VO/bh7MSL4Mp+mLs5EUiNnVB0Q4mCZ4rjMUC8xjg0MUj9kHKYvLyaWaoE t57SnyDuUaj8kR+TzTr5SKvdQ0xsbWNPvEbjPabYVkbkmv7khyvxRYSmmo8awMQ9UmQxPnLRGlpyQ gcZ161mU+h9AB+vm2j010uvTv+frI6+vmyB/lIXMtWSbsBjFkpfn8TJfd07YRznxS6TjstIXQkKLE fb6YklJwdZC7pcvBwE4w==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1iv08I-0004XZ-Od; Fri, 24 Jan 2020 14:40:26 +0000 Received: from szxga05-in.huawei.com ([45.249.212.191] helo=huawei.com) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1iv073-00029U-Rf for linux-arm-kernel@lists.infradead.org; Fri, 24 Jan 2020 14:39:12 +0000 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 5116C6EDBC484FAE0A6D; Fri, 24 Jan 2020 22:39:03 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.439.0; Fri, 24 Jan 2020 22:38:54 +0800 From: John Garry To: , , , , , , , , Subject: [PATCH RFC 5/7] perf pmu: Support matching by sysid Date: Fri, 24 Jan 2020 22:35:03 +0800 Message-ID: <1579876505-113251-6-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1579876505-113251-1-git-send-email-john.garry@huawei.com> References: <1579876505-113251-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200124_063910_057647_CE6AA9BB X-CRM114-Status: GOOD ( 14.94 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [45.249.212.191 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: suzuki.poulose@arm.com, John Garry , linuxarm@huawei.com, linux-kernel@vger.kernel.org, zhangshaokun@hisilicon.com, james.clark@arm.com, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Match system or uncore PMU aliases by system id, SYSID. We use a SYSID read from sysfs or from an env variable to match against uncore or system PMU events. For x86, they want to match uncore events with cpuid - this still works fine for x86 as it would not have system event tables for uncore PMUs. Signed-off-by: John Garry --- tools/perf/util/pmu.c | 105 +++++++++++++++++++++++++++++++++++++----- 1 file changed, 94 insertions(+), 11 deletions(-) diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c index 569aba4cec89..4d4fe0c1ae22 100644 --- a/tools/perf/util/pmu.c +++ b/tools/perf/util/pmu.c @@ -672,11 +672,78 @@ static char *perf_pmu__getcpuid(struct perf_pmu *pmu) return cpuid; } +static char *get_sysid_str(void) +{ + char *buf = NULL; + char path[PATH_MAX]; + const char *sysfs = sysfs__mountpoint(); + FILE *file; + int s, i; + + if (!sysfs) + return NULL; + + buf = malloc(PATH_MAX); + if (!buf) { + pr_err("%s alloc failed\n", __func__); + return NULL; + } + + scnprintf(path, PATH_MAX, "%s/devices/soc0/machine", sysfs); + + file = fopen(path, "r"); + if (!file) { + pr_debug("fopen failed for file %s\n", path); + free(buf); + return NULL; + } + + if (!fgets(buf, PATH_MAX, file)) { + fclose(file); + pr_debug("gets failed for file %s\n", path); + free(buf); + return NULL; + } + fclose(file); + + /* Remove any whitespace, this could be from ACPI HID */ + s = strlen(buf); + for (i = 0; i < s; i++) { + if (buf[i] == ' ') { + buf[i] = 0; + break; + }; + } + + return buf; +} + +static char *perf_pmu__getsysid(void) +{ + char *sysid; + static bool printed; + + sysid = getenv("PERF_SYSID"); + if (sysid) + sysid = strdup(sysid); + + if (!sysid) + sysid = get_sysid_str(); + if (!sysid) + return NULL; + + if (!printed) { + pr_debug("Using SYSID %s\n", sysid); + printed = true; + } + return sysid; +} + struct pmu_events_map *perf_pmu__find_map(struct perf_pmu *pmu) { - struct pmu_events_map *map; + struct pmu_events_map *map, *found_map = NULL; char *cpuid = perf_pmu__getcpuid(pmu); - int i; + char *sysid; /* on some platforms which uses cpus map, cpuid can be NULL for * PMUs other than CORE PMUs. @@ -684,19 +751,35 @@ struct pmu_events_map *perf_pmu__find_map(struct perf_pmu *pmu) if (!cpuid) return NULL; - i = 0; - for (;;) { - map = &pmu_events_map[i++]; - if (!map->table) { - map = NULL; - break; + sysid = perf_pmu__getsysid(); + + /* + * Match sysid as first perference for uncore/sys PMUs. + * + * x86 uncore events match by cpuid, but we would not have map->socid + * set for that arch (so any matching here would fail for that). + */ + if (pmu && pmu_is_uncore_or_sys(pmu->name) && + !is_arm_pmu_core(pmu->name) && sysid) { + for (map = &pmu_events_map[0]; map->table; map++) { + if (map->sysid && !strcmp(map->sysid, sysid)) { + found_map = map; + goto out; + } } + } - if (!strcmp_cpuid_str(map->cpuid, cpuid)) - break; + for (map = &pmu_events_map[0]; map->table; map++) { + if (map->cpuid && cpuid && + !strcmp_cpuid_str(map->cpuid, cpuid)) { + found_map = map; + goto out; + } } +out: free(cpuid); - return map; + free(sysid); /* Can safely handle is sysid is NULL */ + return found_map; } static bool pmu_uncore_alias_match(const char *pmu_name, const char *name) From patchwork Fri Jan 24 14:35:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 11350475 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 922FD921 for ; Fri, 24 Jan 2020 14:41:17 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 29E8F206F0 for ; Fri, 24 Jan 2020 14:41:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="CJb7oVUt" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 29E8F206F0 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Ak/+uTC81whHwtzq30f7ffFIUFQ/PW6510fbzBQexJ0=; b=CJb7oVUtXr1GS0 9uiv0BNYhdNuTGgEIXZX1Qz2kkJpznO0ww5uurav0RONNzKE0g0agoNU+E1npyVnlHK4hkB1/Px3b g3MMZ/eYYjxkIx2hINPxmFwRJXP36nbXNfKJJN3yXaLY7GSmgNlp1D24sBZ9OgA7grJcqiM6hgcBR lQJqezo7EIp5p9ooL2EfRoojiqCUcsxdZhA1S1jzL51/f4nRkkQlc8ZxYGrSpkWQrg5xQzE7hCJRq lbz7x3bbELhVneWC2Imp8Y1djMlt0R+hhO2UnTtt/ru0+Ky1eFTYsEDDs65rwOIHaBIhS8P92be3j Os5B8Fy+f+Fh89cEfgXA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1iv092-0005GB-ON; Fri, 24 Jan 2020 14:41:12 +0000 Received: from szxga07-in.huawei.com ([45.249.212.35] helo=huawei.com) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1iv074-00029W-QQ for linux-arm-kernel@lists.infradead.org; Fri, 24 Jan 2020 14:39:13 +0000 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 83B88F9C643DD5541539; Fri, 24 Jan 2020 22:39:03 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.439.0; Fri, 24 Jan 2020 22:38:55 +0800 From: John Garry To: , , , , , , , , Subject: [PATCH RFC 6/7] perf vendor events arm64: Relocate uncore events for hip08 Date: Fri, 24 Jan 2020 22:35:04 +0800 Message-ID: <1579876505-113251-7-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1579876505-113251-1-git-send-email-john.garry@huawei.com> References: <1579876505-113251-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200124_063911_033267_31A5BEE7 X-CRM114-Status: UNSURE ( 7.95 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [45.249.212.35 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: suzuki.poulose@arm.com, John Garry , linuxarm@huawei.com, linux-kernel@vger.kernel.org, zhangshaokun@hisilicon.com, james.clark@arm.com, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org We will need to match uncore events via SYSID when we want to add any other system event PMU aliasing in future, so relocate the uncore JSONs now. We use HIP08 as the system id. Signed-off-by: John Garry --- .../arch/arm64/hisilicon/hip08/{ => sys}/uncore-ddrc.json | 0 .../arch/arm64/hisilicon/hip08/{ => sys}/uncore-hha.json | 0 .../arch/arm64/hisilicon/hip08/{ => sys}/uncore-l3c.json | 0 tools/perf/pmu-events/arch/arm64/mapfile_sys.csv | 1 + 4 files changed, 1 insertion(+) rename tools/perf/pmu-events/arch/arm64/hisilicon/hip08/{ => sys}/uncore-ddrc.json (100%) rename tools/perf/pmu-events/arch/arm64/hisilicon/hip08/{ => sys}/uncore-hha.json (100%) rename tools/perf/pmu-events/arch/arm64/hisilicon/hip08/{ => sys}/uncore-l3c.json (100%) diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/sys/uncore-ddrc.json similarity index 100% rename from tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json rename to tools/perf/pmu-events/arch/arm64/hisilicon/hip08/sys/uncore-ddrc.json diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/sys/uncore-hha.json similarity index 100% rename from tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json rename to tools/perf/pmu-events/arch/arm64/hisilicon/hip08/sys/uncore-hha.json diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/sys/uncore-l3c.json similarity index 100% rename from tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json rename to tools/perf/pmu-events/arch/arm64/hisilicon/hip08/sys/uncore-l3c.json diff --git a/tools/perf/pmu-events/arch/arm64/mapfile_sys.csv b/tools/perf/pmu-events/arch/arm64/mapfile_sys.csv index 701d8ff67354..d2baadcbbbed 100644 --- a/tools/perf/pmu-events/arch/arm64/mapfile_sys.csv +++ b/tools/perf/pmu-events/arch/arm64/mapfile_sys.csv @@ -11,3 +11,4 @@ # Type is sys # #Family-model,Version,Filename,EventType +HIP08,v1,hisilicon/hip08/sys,sys From patchwork Fri Jan 24 14:35:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 11350473 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 97CD817EF for ; Fri, 24 Jan 2020 14:41:04 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3BA18206F0 for ; Fri, 24 Jan 2020 14:41:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Cf+GPDMs" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3BA18206F0 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=mIL2WLL0MAZO/uM/Ghy7FJUkQgm1ZduVW72pF2UI1UY=; b=Cf+GPDMsG1NxhG ySnPkVNHhk+epeoDIQlnj+xJcGY+tdOigrwqculnsP8H4Gfv0ASC/jt803AzIG/B55BIPyT5uNKrX k4JGQL1DV36xKCb97VEXcPFZWN/zm81BzCnOPqX2G8M6404/LoDOq/4beHZqMfgzWfUcFZuXlJW/b tf7mvZZKu7mzIKhdcjCfnviS98s/K48PMSITmzdT11DbhBy9d1HIN8IzdtxldSahA56OQCy+3DmLX p5Y7wBJlIihpoULCYRGcot5f+Pr+HuhytnbG6HkiizF7CTPyH7pR8ltaHMwbKuKyHP8rb/2ibji4C lDVv6GE53RSwsqCTw7XQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1iv08p-00051q-Lp; Fri, 24 Jan 2020 14:40:59 +0000 Received: from szxga05-in.huawei.com ([45.249.212.191] helo=huawei.com) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1iv074-00029Y-QP for linux-arm-kernel@lists.infradead.org; Fri, 24 Jan 2020 14:39:13 +0000 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 60679D70EC9CD3104DCB; Fri, 24 Jan 2020 22:39:03 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.439.0; Fri, 24 Jan 2020 22:38:55 +0800 From: John Garry To: , , , , , , , , Subject: [PATCH RFC 7/7] perf vendor events arm64: Add hip08 SMMUv3 PMCG IMP DEF events Date: Fri, 24 Jan 2020 22:35:05 +0800 Message-ID: <1579876505-113251-8-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1579876505-113251-1-git-send-email-john.garry@huawei.com> References: <1579876505-113251-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200124_063911_025632_B74A6DED X-CRM114-Status: GOOD ( 11.65 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [45.249.212.191 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: suzuki.poulose@arm.com, John Garry , linuxarm@huawei.com, linux-kernel@vger.kernel.org, zhangshaokun@hisilicon.com, james.clark@arm.com, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add the SMMUv3 PMCG (Performance Monitor Event Group) implementation defined events for hip08 platform. Only a single event is added, but this is just an example for now. Signed-off-by: John Garry --- .../arch/arm64/hisilicon/hip08/sys/smmu-v3-pmcg.json | 9 +++++++++ tools/perf/pmu-events/jevents.c | 2 ++ 2 files changed, 11 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/hisilicon/hip08/sys/smmu-v3-pmcg.json diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/sys/smmu-v3-pmcg.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/sys/smmu-v3-pmcg.json new file mode 100644 index 000000000000..ff2414a5ebc4 --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/sys/smmu-v3-pmcg.json @@ -0,0 +1,9 @@ +[ + { + "EventCode": "0x8a", + "EventName": "smmuv3_pmcg.l1_tlb", + "BriefDescription": "SMMUv3 PMCG l1_tlb", + "PublicDescription": "SMMUv3 PMCG l1_tlb", + "Unit": "smmuv3_pmcg" + }, +] diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c index da6430c0d184..01541825a6c7 100644 --- a/tools/perf/pmu-events/jevents.c +++ b/tools/perf/pmu-events/jevents.c @@ -239,6 +239,8 @@ static struct map { { "hisi_sccl,ddrc", "hisi_sccl,ddrc" }, { "hisi_sccl,hha", "hisi_sccl,hha" }, { "hisi_sccl,l3c", "hisi_sccl,l3c" }, + /* it's not realistic to keep adding these, we need something more scalable ... */ + { "smmuv3_pmcg", "smmuv3_pmcg" }, { "L3PMC", "amd_l3" }, {} };