From patchwork Wed Jan 29 08:16:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Louis Kuo X-Patchwork-Id: 11355647 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7F67013A4 for ; Wed, 29 Jan 2020 08:17:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 597152173E for ; Wed, 29 Jan 2020 08:17:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="SoApOkEQ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726224AbgA2IRL (ORCPT ); Wed, 29 Jan 2020 03:17:11 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:40530 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726214AbgA2IRL (ORCPT ); Wed, 29 Jan 2020 03:17:11 -0500 X-UUID: 0a371151a4cc49a58946e7a75e3f8ec4-20200129 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=INKR0i+Hxnse1nE1cbIAERiSPrh/G+JRIrLKl829tUM=; b=SoApOkEQfNl4+LmTGWfcntVeiW7jBTtcokAr6b7ZgbKlpmdwzqhNZXf+4ikn8RJX1OCx2F0OEYZitAMw09NhKlsxqIfLDgKAweLgNHiPMuBMxMEgcVb064CWUHEIJLQw+l/hXFbauUQgqN37jqHGYPr5XDyF26/rS/ZHQ59DwMY=; X-UUID: 0a371151a4cc49a58946e7a75e3f8ec4-20200129 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 927428477; Wed, 29 Jan 2020 16:17:08 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 29 Jan 2020 16:15:45 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 29 Jan 2020 16:17:12 +0800 From: Louis Kuo To: , , , , , CC: , , , , , , , , , , , , , , Subject: [RFC PATCH V5 2/3] dt-bindings: mt8183: Add sensor interface dt-bindings Date: Wed, 29 Jan 2020 16:16:49 +0800 Message-ID: <20200129081650.8027-3-louis.kuo@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200129081650.8027-1-louis.kuo@mediatek.com> References: <20200129081650.8027-1-louis.kuo@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org This patch adds the DT binding documentation for the sensor interface module in Mediatek SoCs. Signed-off-by: Louis Kuo --- .../bindings/media/mediatek-seninf.txt | 66 +++++++++++++++++++ 1 file changed, 66 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek-seninf.txt diff --git a/Documentation/devicetree/bindings/media/mediatek-seninf.txt b/Documentation/devicetree/bindings/media/mediatek-seninf.txt new file mode 100644 index 000000000000..85a990814bdf --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek-seninf.txt @@ -0,0 +1,66 @@ + ca* Mediatek seninf MIPI-CSI2 host driver + +Seninf MIPI-CSI2 host driver is a HW camera interface controller. It support +a widely adopted, simple, high-speed protocol primarily intended for +point-to-point image and video transmission between cameras and host devices. + +Required properties: + - compatible: "mediatek,mt8183-seninf" + - reg: Must contain an entry for each entry in reg-names. + - reg-names: Must include the following entries: + "base": seninf registers base + "rx": Rx analog registers base + - interrupts: interrupt number to the cpu. + - clocks : clock name from clock manager. + - clock-names: must be CLK_CAM_SENINF and CLK_TOP_MUX_SENINF, + It is the clocks of seninf. + - ports : list port node of endpoint. + - port : describe endpoint for each remote device port connected to this + port. + reg : port reg 0 must be main camera, port reg 1 must be sub camera, + since seninf driver support upto 4 cameras, so camisp is reg 4. + +Example: + seninf: seninf@1a040000 { + compatible = "mediatek,mt8183-seninf"; + reg = <0 0x1a040000 0 0x8000>, + <0 0x11c80000 0 0x6000>; + reg-names = "base", "rx"; + interrupts = ; + power-domains = <&scpsys MT8183_POWER_DOMAIN_CAM>; + clocks = <&camsys CLK_CAM_SENINF>, + <&topckgen CLK_TOP_MUX_SENINF>; + clock-names = "CLK_CAM_SENINF", "CLK_TOP_MUX_SENINF"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + seninf_port0_endpoint: endpoint { + data-lanes = <0 1 3 4>; + remote-endpoint = <&ov8856_endpoint>; + }; + }; + + port@1 { + reg = <1>; + + seninf_port1_endpoint: endpoint { + data-lanes = <1>; + remote-endpoint = <&ov02a10_endpoint>; + }; + }; + + port@4 { + reg = <4>; + + seninf_camisp_endpoint: endpoint { + remote-endpoint = <&camisp_endpoint>; + }; + }; + }; + }; + From patchwork Wed Jan 29 08:16:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Louis Kuo X-Patchwork-Id: 11355651 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 73E6813A4 for ; Wed, 29 Jan 2020 08:17:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 52039207FF for ; Wed, 29 Jan 2020 08:17:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="QUGVIZbM" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726237AbgA2IRS (ORCPT ); Wed, 29 Jan 2020 03:17:18 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:55253 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726178AbgA2IRS (ORCPT ); Wed, 29 Jan 2020 03:17:18 -0500 X-UUID: 645842751a3d4538bbf06b99e476a495-20200129 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=3wcLgna0UQ6Pmik49xEVVcy56wDdAIj1SlCJHvZEet0=; b=QUGVIZbMTf5UnlVLL5xlzXz+OZIIc6a6BqD5H4ePY2JjGQ6tcHR7YxpeprLQrA7tJ0daB8m9k4Ikte69Sb5aSHyaMM5dRj1wyq7fugwr3fRapIRZ4NzkUaJk/lEoqSYd1++yKCEqJlmFdqmJe6HJ22aWV885bXFAiTdEXTrJPa8=; X-UUID: 645842751a3d4538bbf06b99e476a495-20200129 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1633652493; Wed, 29 Jan 2020 16:17:13 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 29 Jan 2020 16:16:35 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 29 Jan 2020 16:17:18 +0800 From: Louis Kuo To: , , , , , CC: , , , , , , , , , , , , , , Subject: [RFC PATCH V5 3/3] dts: arm64: mt8183: Add sensor interface nodes Date: Wed, 29 Jan 2020 16:16:50 +0800 Message-ID: <20200129081650.8027-4-louis.kuo@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200129081650.8027-1-louis.kuo@mediatek.com> References: <20200129081650.8027-1-louis.kuo@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Add nodes for Mediatek's sensor interface device. Sensor interface module embedded in Mediatek SOCs, works as a HW camera interface controller intended for image and data transmission between cameras and host devices. Signed-off-by: Louis Kuo --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 66aaa07f6cec..ae89386afe56 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -505,5 +505,17 @@ reg = <0 0x1a000000 0 0x1000>; #clock-cells = <1>; }; + seninf: seninf@1a040000 { + compatible = "mediatek,mt8183-seninf"; + reg = <0 0x1a040000 0 0x8000>, + <0 0x11c80000 0 0x6000>; + reg-names = "base", "rx"; + interrupts = ; + power-domains = <&scpsys MT8183_POWER_DOMAIN_CAM>; + clocks = <&camsys CLK_CAM_SENINF>, + <&topckgen CLK_TOP_MUX_SENINF>; + clock-names = "CLK_CAM_SENINF", "CLK_TOP_MUX_SENINF"; + status = "disabled"; + }; }; };