From patchwork Wed Feb 5 12:26:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 11366191 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 06B2514E3 for ; Wed, 5 Feb 2020 12:26:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D9FB42192A for ; Wed, 5 Feb 2020 12:26:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="Xb9REnIY" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728023AbgBEM0k (ORCPT ); Wed, 5 Feb 2020 07:26:40 -0500 Received: from mail26.static.mailgun.info ([104.130.122.26]:37284 "EHLO mail26.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728019AbgBEM0j (ORCPT ); Wed, 5 Feb 2020 07:26:39 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1580905599; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=5J/2d/yKfmhZMsyOqM5Y4Fz6w9WN5sJ8CWELf2rRwCk=; b=Xb9REnIYGWpiK3eGP2ODO5l5ueuxW8BW4c8QGAY32aZHTGU+XL8wPWSNJ4kSg6faRUw8UoDV VYGtpu08Yt6T2nKVPL2Bur1vR8CPjPctcNCGdjR0Ca8h4G5g4zuhCzwPKgXWCSt9sN+Ww7bL Hct8QXCQ27A/c+L3wEI4BWgN++0= X-Mailgun-Sending-Ip: 104.130.122.26 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by mxa.mailgun.org with ESMTP id 5e3ab47b.7f28108510d8-smtp-out-n03; Wed, 05 Feb 2020 12:26:35 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 7FF86C447A0; Wed, 5 Feb 2020 12:26:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mkshah-linux.qualcomm.com (blr-c-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id 71543C447A3; Wed, 5 Feb 2020 12:26:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 71543C447A3 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: swboyd@chromium.org, agross@kernel.org, david.brown@linaro.org, sudeep.holla@arm.com, Lorenzo.Pieralisi@arm.com Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, bjorn.andersson@linaro.org, evgreen@chromium.org, dianders@chromium.org, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, ulf.hansson@linaro.org, rjw@rjwysocki.net, Maulik Shah Subject: [PATCH v4 1/6] drivers: qcom: rpmh: fix macro to accept NULL argument Date: Wed, 5 Feb 2020 17:56:07 +0530 Message-Id: <1580905572-22712-2-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1580905572-22712-1-git-send-email-mkshah@codeaurora.org> References: <1580905572-22712-1-git-send-email-mkshah@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Device argument matches with dev variable declared in RPMH message. Compiler reports error when the argument is NULL since the argument matches the name of the property. Rename dev argument to device to fix this. Signed-off-by: Maulik Shah Reviewed-by: Stephen Boyd --- drivers/soc/qcom/rpmh.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/soc/qcom/rpmh.c b/drivers/soc/qcom/rpmh.c index 035091f..3a4579d 100644 --- a/drivers/soc/qcom/rpmh.c +++ b/drivers/soc/qcom/rpmh.c @@ -23,7 +23,7 @@ #define RPMH_TIMEOUT_MS msecs_to_jiffies(10000) -#define DEFINE_RPMH_MSG_ONSTACK(dev, s, q, name) \ +#define DEFINE_RPMH_MSG_ONSTACK(device, s, q, name) \ struct rpmh_request name = { \ .msg = { \ .state = s, \ @@ -33,7 +33,7 @@ }, \ .cmd = { { 0 } }, \ .completion = q, \ - .dev = dev, \ + .dev = device, \ .needs_free = false, \ } From patchwork Wed Feb 5 12:26:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 11366195 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A2F15186E for ; Wed, 5 Feb 2020 12:26:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8169A21741 for ; Wed, 5 Feb 2020 12:26:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="LQXvWUeY" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728052AbgBEM0o (ORCPT ); Wed, 5 Feb 2020 07:26:44 -0500 Received: from mail26.static.mailgun.info ([104.130.122.26]:57745 "EHLO mail26.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727500AbgBEM0n (ORCPT ); Wed, 5 Feb 2020 07:26:43 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1580905603; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=x+iZQ9XzDcSMxhDrHJl3nh+DtwFljq054K315F2nuJg=; b=LQXvWUeYSVGMTJg8JITDJRyTx0EQ3S7lEtGj8IVZ1o0MpwXWuD/t5o/ffw2vhJEhAcAb/NoY Q+txD9fTXm7U7aE7eIMDMFiBT+E6ywuCY1yRevtU9FC7+QEFXdmWwKSl89tDeoKdxjF81Lqs PkAxH22pQjUpI21Mc0ryxrQBFnI= X-Mailgun-Sending-Ip: 104.130.122.26 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by mxa.mailgun.org with ESMTP id 5e3ab482.7ff3e452b3e8-smtp-out-n03; Wed, 05 Feb 2020 12:26:42 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 73A2CC447AD; Wed, 5 Feb 2020 12:26:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mkshah-linux.qualcomm.com (blr-c-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id 83D9EC447A2; Wed, 5 Feb 2020 12:26:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 83D9EC447A2 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: swboyd@chromium.org, agross@kernel.org, david.brown@linaro.org, sudeep.holla@arm.com, Lorenzo.Pieralisi@arm.com Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, bjorn.andersson@linaro.org, evgreen@chromium.org, dianders@chromium.org, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, ulf.hansson@linaro.org, rjw@rjwysocki.net, Maulik Shah Subject: [PATCH v4 2/6] drivers: qcom: rpmh: remove rpmh_flush export Date: Wed, 5 Feb 2020 17:56:08 +0530 Message-Id: <1580905572-22712-3-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1580905572-22712-1-git-send-email-mkshah@codeaurora.org> References: <1580905572-22712-1-git-send-email-mkshah@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org rpmh_flush() was exported with the idea that an external entity operation during CPU idle would know when to flush the sleep and wake TCS. Since, this is not the case when defining a power domain for the RSC. Remove the function export and instead allow the function to be called internally. Signed-off-by: Maulik Shah Reviewed-by: Stephen Boyd --- drivers/soc/qcom/rpmh-internal.h | 1 + drivers/soc/qcom/rpmh.c | 18 ++++++++---------- include/soc/qcom/rpmh.h | 5 ----- 3 files changed, 9 insertions(+), 15 deletions(-) diff --git a/drivers/soc/qcom/rpmh-internal.h b/drivers/soc/qcom/rpmh-internal.h index a7bbbb6..6eec32b 100644 --- a/drivers/soc/qcom/rpmh-internal.h +++ b/drivers/soc/qcom/rpmh-internal.h @@ -110,5 +110,6 @@ int rpmh_rsc_write_ctrl_data(struct rsc_drv *drv, int rpmh_rsc_invalidate(struct rsc_drv *drv); void rpmh_tx_done(const struct tcs_request *msg, int r); +int rpmh_flush(struct rpmh_ctrlr *ctrlr); #endif /* __RPM_INTERNAL_H__ */ diff --git a/drivers/soc/qcom/rpmh.c b/drivers/soc/qcom/rpmh.c index 3a4579d..eb0ded0 100644 --- a/drivers/soc/qcom/rpmh.c +++ b/drivers/soc/qcom/rpmh.c @@ -427,11 +427,10 @@ static int is_req_valid(struct cache_req *req) req->sleep_val != req->wake_val); } -static int send_single(const struct device *dev, enum rpmh_state state, +static int send_single(struct rpmh_ctrlr *ctrlr, enum rpmh_state state, u32 addr, u32 data) { - DEFINE_RPMH_MSG_ONSTACK(dev, state, NULL, rpm_msg); - struct rpmh_ctrlr *ctrlr = get_rpmh_ctrlr(dev); + DEFINE_RPMH_MSG_ONSTACK(NULL, state, NULL, rpm_msg); /* Wake sets are always complete and sleep sets are not */ rpm_msg.msg.wait_for_compl = (state == RPMH_WAKE_ONLY_STATE); @@ -445,7 +444,7 @@ static int send_single(const struct device *dev, enum rpmh_state state, /** * rpmh_flush: Flushes the buffered active and sleep sets to TCS * - * @dev: The device making the request + * @ctrlr: controller making request to flush cached data * * Return: -EBUSY if the controller is busy, probably waiting on a response * to a RPMH request sent earlier. @@ -454,10 +453,9 @@ static int send_single(const struct device *dev, enum rpmh_state state, * that is powering down the entire system. Since no other RPMH API would be * executing at this time, it is safe to run lockless. */ -int rpmh_flush(const struct device *dev) +int rpmh_flush(struct rpmh_ctrlr *ctrlr) { struct cache_req *p; - struct rpmh_ctrlr *ctrlr = get_rpmh_ctrlr(dev); int ret; if (!ctrlr->dirty) { @@ -480,11 +478,12 @@ int rpmh_flush(const struct device *dev) __func__, p->addr, p->sleep_val, p->wake_val); continue; } - ret = send_single(dev, RPMH_SLEEP_STATE, p->addr, p->sleep_val); + ret = send_single(ctrlr, RPMH_SLEEP_STATE, p->addr, + p->sleep_val); if (ret) return ret; - ret = send_single(dev, RPMH_WAKE_ONLY_STATE, - p->addr, p->wake_val); + ret = send_single(ctrlr, RPMH_WAKE_ONLY_STATE, p->addr, + p->wake_val); if (ret) return ret; } @@ -493,7 +492,6 @@ int rpmh_flush(const struct device *dev) return 0; } -EXPORT_SYMBOL(rpmh_flush); /** * rpmh_invalidate: Invalidate all sleep and active sets diff --git a/include/soc/qcom/rpmh.h b/include/soc/qcom/rpmh.h index 619e07c..f9ec353 100644 --- a/include/soc/qcom/rpmh.h +++ b/include/soc/qcom/rpmh.h @@ -20,8 +20,6 @@ int rpmh_write_async(const struct device *dev, enum rpmh_state state, int rpmh_write_batch(const struct device *dev, enum rpmh_state state, const struct tcs_cmd *cmd, u32 *n); -int rpmh_flush(const struct device *dev); - int rpmh_invalidate(const struct device *dev); #else @@ -40,9 +38,6 @@ static inline int rpmh_write_batch(const struct device *dev, const struct tcs_cmd *cmd, u32 *n) { return -ENODEV; } -static inline int rpmh_flush(const struct device *dev) -{ return -ENODEV; } - static inline int rpmh_invalidate(const struct device *dev) { return -ENODEV; } From patchwork Wed Feb 5 12:26:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 11366201 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B657F112B for ; Wed, 5 Feb 2020 12:26:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 957F52192A for ; Wed, 5 Feb 2020 12:26:55 +0000 (UTC) Authentication-Results: mail.kernel.org; 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spf=none smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: swboyd@chromium.org, agross@kernel.org, david.brown@linaro.org, sudeep.holla@arm.com, Lorenzo.Pieralisi@arm.com Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, bjorn.andersson@linaro.org, evgreen@chromium.org, dianders@chromium.org, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, ulf.hansson@linaro.org, rjw@rjwysocki.net, Maulik Shah , devicetree@vger.kernel.org Subject: [PATCH v4 3/6] dt-bindings: soc: qcom: Add RSC power domain specifier Date: Wed, 5 Feb 2020 17:56:09 +0530 Message-Id: <1580905572-22712-4-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1580905572-22712-1-git-send-email-mkshah@codeaurora.org> References: <1580905572-22712-1-git-send-email-mkshah@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In addition to transmitting resource state requests to the remote processor, the RSC is responsible for powering off/lowering the requirements from CPUs subsystem for the associated hardware like buses, clocks, and regulators when all CPUs and cluster is powered down. The power domain is configured to a low power state and when all the CPUs are powered down, the RSC can lower resource state requirements and power down the rails that power the CPUs. Add PM domain specifier property for RSC controller. Cc: devicetree@vger.kernel.org Signed-off-by: Maulik Shah Reviewed-by: Stephen Boyd Acked-by: Rob Herring --- Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt b/Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt index 9b86d1e..5682806 100644 --- a/Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt +++ b/Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt @@ -83,6 +83,14 @@ Properties: Value type: Definition: Name for the RSC. The name would be used in trace logs. +- #power-domain-cells: + Usage: optional + Value type: + Definition: Must be 0. Number of cells in power domain specifier. + Optional for controllers that may be in 'solver' state + where they can be in autonomous mode executing low power + modes. + Drivers that want to use the RSC to communicate with RPMH must specify their bindings as child nodes of the RSC controllers they wish to communicate with. @@ -112,6 +120,7 @@ TCS-OFFSET: 0xD00 , , ; + #power-domain-cells = <0>; }; Example 2: From patchwork Wed Feb 5 12:26:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 11366205 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1BB7B14E3 for ; Wed, 5 Feb 2020 12:27:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E506721D7D for ; Wed, 5 Feb 2020 12:26:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="FTQjFBm3" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728106AbgBEM07 (ORCPT ); Wed, 5 Feb 2020 07:26:59 -0500 Received: from mail25.static.mailgun.info ([104.130.122.25]:60280 "EHLO mail25.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728047AbgBEM07 (ORCPT ); Wed, 5 Feb 2020 07:26:59 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1580905618; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=3oBp+GQXIvHz9eMsTaJ9GKjk778UhbK5cdSMUYMH/24=; b=FTQjFBm3ow3wpRkBW8j5n6oHAVXnftuRDZWpRsW1Cmj9tCUOpnZyhEBwrL9NzgU+pQ1ekT4K pWXgqz89a/yO6ubGCSNkj8+eWW0UFUZoa+GEKkOJGXzhxw+ebb1zNpYEFQRksmXqR4DvKeOn 88BfTN7GUOeNHOK7iFgLtyNywWo= X-Mailgun-Sending-Ip: 104.130.122.25 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by mxa.mailgun.org with ESMTP id 5e3ab491.7fdf29c96f48-smtp-out-n02; Wed, 05 Feb 2020 12:26:57 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 2566BC447A5; Wed, 5 Feb 2020 12:26:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mkshah-linux.qualcomm.com (blr-c-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id 7E851C447A1; Wed, 5 Feb 2020 12:26:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 7E851C447A1 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: swboyd@chromium.org, agross@kernel.org, david.brown@linaro.org, sudeep.holla@arm.com, Lorenzo.Pieralisi@arm.com Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, bjorn.andersson@linaro.org, evgreen@chromium.org, dianders@chromium.org, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, ulf.hansson@linaro.org, rjw@rjwysocki.net, Maulik Shah Subject: [PATCH v4 4/6] drivers: qcom: rpmh-rsc: Add RSC power domain support Date: Wed, 5 Feb 2020 17:56:10 +0530 Message-Id: <1580905572-22712-5-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1580905572-22712-1-git-send-email-mkshah@codeaurora.org> References: <1580905572-22712-1-git-send-email-mkshah@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add RSC power domain support. RSC is top level power domain in hireachical CPU LPM modes. Once the rsc domain is down flush all cached sleep and wake votes from controller. Signed-off-by: Maulik Shah --- drivers/soc/qcom/rpmh-internal.h | 2 + drivers/soc/qcom/rpmh-rsc.c | 81 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 83 insertions(+) diff --git a/drivers/soc/qcom/rpmh-internal.h b/drivers/soc/qcom/rpmh-internal.h index 6eec32b..3736c14 100644 --- a/drivers/soc/qcom/rpmh-internal.h +++ b/drivers/soc/qcom/rpmh-internal.h @@ -8,6 +8,7 @@ #define __RPM_INTERNAL_H__ #include +#include #include #define TCS_TYPE_NR 4 @@ -102,6 +103,7 @@ struct rsc_drv { DECLARE_BITMAP(tcs_in_use, MAX_TCS_NR); spinlock_t lock; struct rpmh_ctrlr client; + struct generic_pm_domain rsc_pd; }; int rpmh_rsc_send_data(struct rsc_drv *drv, const struct tcs_request *msg); diff --git a/drivers/soc/qcom/rpmh-rsc.c b/drivers/soc/qcom/rpmh-rsc.c index e278fc1..92bca4c 100644 --- a/drivers/soc/qcom/rpmh-rsc.c +++ b/drivers/soc/qcom/rpmh-rsc.c @@ -499,6 +499,32 @@ static int tcs_ctrl_write(struct rsc_drv *drv, const struct tcs_request *msg) } /** + * rpmh_rsc_ctrlr_is_idle: Check if any of the AMCs are busy. + * + * @drv: The controller + * + * Return: false if the TCSes are engaged in handling requests, True otherwise. + */ +static bool rpmh_rsc_ctrlr_is_idle(struct rsc_drv *drv) +{ + int m; + struct tcs_group *tcs = get_tcs_of_type(drv, ACTIVE_TCS); + bool ret = true; + unsigned long flags; + + spin_lock_irqsave(&drv->lock, flags); + for (m = tcs->offset; m < tcs->offset + tcs->num_tcs; m++) { + if (!tcs_is_free(drv, m)) { + ret = false; + break; + } + } + spin_unlock_irqrestore(&drv->lock, flags); + + return ret; +} + +/** * rpmh_rsc_write_ctrl_data: Write request to the controller * * @drv: the controller @@ -521,6 +547,50 @@ int rpmh_rsc_write_ctrl_data(struct rsc_drv *drv, const struct tcs_request *msg) return tcs_ctrl_write(drv, msg); } +static int rpmh_domain_power_off(struct generic_pm_domain *rsc_pd) +{ + struct rsc_drv *drv = container_of(rsc_pd, struct rsc_drv, rsc_pd); + + /* + * RPMh domain can not be powered off when there is pending ACK for + * ACTIVE_TCS request. Exit when controller is busy. + */ + if (!rpmh_rsc_ctrlr_is_idle(drv)) + return -EBUSY; + + return rpmh_flush(&drv->client); +} + +static int rpmh_probe_power_domain(struct platform_device *pdev, + struct rsc_drv *drv) +{ + int ret; + struct generic_pm_domain *rsc_pd = &drv->rsc_pd; + struct device_node *dn = pdev->dev.of_node; + + rsc_pd->name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s", dn->name); + if (!rsc_pd->name) + return -ENOMEM; + + rsc_pd->name = kbasename(rsc_pd->name); + rsc_pd->power_off = rpmh_domain_power_off; + rsc_pd->flags |= GENPD_FLAG_IRQ_SAFE; + + ret = pm_genpd_init(rsc_pd, NULL, false); + if (ret) + return ret; + + ret = of_genpd_add_provider_simple(dn, rsc_pd); + if (ret) + goto remove_pd; + + return ret; + +remove_pd: + pm_genpd_remove(rsc_pd); + return ret; +} + static int rpmh_probe_tcs_config(struct platform_device *pdev, struct rsc_drv *drv) { @@ -663,6 +733,17 @@ static int rpmh_rsc_probe(struct platform_device *pdev) if (ret) return ret; + /* + * Power domain is not required for controllers that support 'solver' + * mode where they can be in autonomous mode executing low power mode + * to power down. + */ + if (of_property_read_bool(dn, "#power-domain-cells")) { + ret = rpmh_probe_power_domain(pdev, drv); + if (ret) + return ret; + } + /* Enable the active TCS to send requests immediately */ write_tcs_reg(drv, RSC_DRV_IRQ_ENABLE, 0, drv->tcs[ACTIVE_TCS].mask); From patchwork Wed Feb 5 12:26:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 11366211 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DA764112B for ; Wed, 5 Feb 2020 12:27:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AF828222D9 for ; Wed, 5 Feb 2020 12:27:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="nFjzSchn" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727922AbgBEM1G (ORCPT ); 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Wed, 5 Feb 2020 12:27:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mkshah-linux.qualcomm.com (blr-c-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id E71F3C433CB; Wed, 5 Feb 2020 12:26:54 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org E71F3C433CB Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: swboyd@chromium.org, agross@kernel.org, david.brown@linaro.org, sudeep.holla@arm.com, Lorenzo.Pieralisi@arm.com Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, bjorn.andersson@linaro.org, evgreen@chromium.org, dianders@chromium.org, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, ulf.hansson@linaro.org, rjw@rjwysocki.net, Maulik Shah Subject: [PATCH v4 5/6] drivers: firmware: psci: Allow hierarchical topology in PC mode Date: Wed, 5 Feb 2020 17:56:11 +0530 Message-Id: <1580905572-22712-6-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1580905572-22712-1-git-send-email-mkshah@codeaurora.org> References: <1580905572-22712-1-git-send-email-mkshah@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Ulf Hansson If the hierarchical CPU topology is used, but the OS initiated mode isn't supported, we need to rely solely on the regular cpuidle framework to manage the idle state selection. Remove current limitation of hierarchical topology to be used in OSI mode only. Signed-off-by: Ulf Hansson [applied to new path, updated commit text] Signed-off-by: Maulik Shah --- drivers/cpuidle/cpuidle-psci-domain.c | 32 +++++++++++++++----------------- drivers/cpuidle/cpuidle-psci.c | 34 ++++++++++++++++------------------ 2 files changed, 31 insertions(+), 35 deletions(-) diff --git a/drivers/cpuidle/cpuidle-psci-domain.c b/drivers/cpuidle/cpuidle-psci-domain.c index 423f03b..fcab330 100644 --- a/drivers/cpuidle/cpuidle-psci-domain.c +++ b/drivers/cpuidle/cpuidle-psci-domain.c @@ -125,11 +125,14 @@ static int __init psci_pd_init(struct device_node *np) * Parse the domain idle states and let genpd manage the state selection * for those being compatible with "domain-idle-state". */ - ret = psci_pd_parse_states(np, &states, &state_count); - if (ret) - goto free_name; - pd->free_states = psci_pd_free_states; + if (psci_has_osi_support()) { + ret = psci_pd_parse_states(np, &states, &state_count); + if (ret) + goto free_name; + pd->free_states = psci_pd_free_states; + } + pd->name = kbasename(pd->name); pd->power_off = psci_pd_power_off; pd->states = states; @@ -236,10 +239,6 @@ static int __init psci_idle_init_domains(void) if (!np) return -ENODEV; - /* Currently limit the hierarchical topology to be used in OSI mode. */ - if (!psci_has_osi_support()) - goto out; - /* * Parse child nodes for the "#power-domain-cells" property and * initialize a genpd/genpd-of-provider pair when it's found. @@ -265,14 +264,16 @@ static int __init psci_idle_init_domains(void) goto remove_pd; /* Try to enable OSI mode. */ - ret = psci_set_osi_mode(); - if (ret) { - pr_warn("failed to enable OSI mode: %d\n", ret); - psci_pd_remove_topology(np); - goto remove_pd; + if (psci_has_osi_support()) { + ret = psci_set_osi_mode(); + if (ret) { + pr_warn("failed to enable OSI mode: %d\n", ret); + psci_pd_remove_topology(np); + goto remove_pd; + } else + osi_mode_enabled = true; } - osi_mode_enabled = true; of_node_put(np); pr_info("Initialized CPU PM domain topology\n"); return pd_count; @@ -293,9 +294,6 @@ struct device __init *psci_dt_attach_cpu(int cpu) { struct device *dev; - if (!osi_mode_enabled) - return NULL; - dev = dev_pm_domain_attach_by_name(get_cpu_device(cpu), "psci"); if (IS_ERR_OR_NULL(dev)) return dev; diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index edd7a54..16d8baa 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -193,24 +193,22 @@ static int __init psci_dt_cpu_init_idle(struct cpuidle_driver *drv, goto free_mem; } - /* Currently limit the hierarchical topology to be used in OSI mode. */ - if (psci_has_osi_support()) { - data->dev = psci_dt_attach_cpu(cpu); - if (IS_ERR(data->dev)) { - ret = PTR_ERR(data->dev); - goto free_mem; - } - - /* - * Using the deepest state for the CPU to trigger a potential - * selection of a shared state for the domain, assumes the - * domain states are all deeper states. - */ - if (data->dev) { - drv->states[state_count - 1].enter = - psci_enter_domain_idle_state; - psci_cpuidle_use_cpuhp = true; - } + data->dev = psci_dt_attach_cpu(cpu); + if (IS_ERR(data->dev)) { + ret = PTR_ERR(data->dev); + goto free_mem; + } + + /* + * Using the deepest state for the CPU to trigger a potential + * selection of a shared state for the domain, assumes the + * domain states are all deeper states. + */ + + if (data->dev) { + drv->states[state_count - 1].enter = + psci_enter_domain_idle_state; + psci_cpuidle_use_cpuhp = true; } /* Idle states parsed correctly, store them in the per-cpu struct. */ From patchwork Wed Feb 5 12:26:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 11366215 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D7E10186E for ; Wed, 5 Feb 2020 12:27:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id ACF2121D7D for ; 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spf=none smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: swboyd@chromium.org, agross@kernel.org, david.brown@linaro.org, sudeep.holla@arm.com, Lorenzo.Pieralisi@arm.com Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, bjorn.andersson@linaro.org, evgreen@chromium.org, dianders@chromium.org, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, ulf.hansson@linaro.org, rjw@rjwysocki.net, Maulik Shah , devicetree@vger.kernel.org Subject: [PATCH v4 6/6] arm64: dts: qcom: sc7180: Add cpuidle low power states Date: Wed, 5 Feb 2020 17:56:12 +0530 Message-Id: <1580905572-22712-7-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1580905572-22712-1-git-send-email-mkshah@codeaurora.org> References: <1580905572-22712-1-git-send-email-mkshah@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add device bindings for cpuidle states for cpu devices. Cc: devicetree@vger.kernel.org Signed-off-by: Maulik Shah --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 135 +++++++++++++++++++++++++++++++++++ 1 file changed, 135 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 8011c5f..844a25a 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -86,6 +86,8 @@ compatible = "arm,armv8"; reg = <0x0 0x0>; enable-method = "psci"; + power-domains = <&CPU_PD0>; + power-domain-names = "psci"; next-level-cache = <&L2_0>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -103,6 +105,8 @@ compatible = "arm,armv8"; reg = <0x0 0x100>; enable-method = "psci"; + power-domains = <&CPU_PD1>; + power-domain-names = "psci"; next-level-cache = <&L2_100>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -117,6 +121,8 @@ compatible = "arm,armv8"; reg = <0x0 0x200>; enable-method = "psci"; + power-domains = <&CPU_PD2>; + power-domain-names = "psci"; next-level-cache = <&L2_200>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -131,6 +137,8 @@ compatible = "arm,armv8"; reg = <0x0 0x300>; enable-method = "psci"; + power-domains = <&CPU_PD3>; + power-domain-names = "psci"; next-level-cache = <&L2_300>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -145,6 +153,8 @@ compatible = "arm,armv8"; reg = <0x0 0x400>; enable-method = "psci"; + power-domains = <&CPU_PD4>; + power-domain-names = "psci"; next-level-cache = <&L2_400>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -159,6 +169,8 @@ compatible = "arm,armv8"; reg = <0x0 0x500>; enable-method = "psci"; + power-domains = <&CPU_PD5>; + power-domain-names = "psci"; next-level-cache = <&L2_500>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -173,6 +185,8 @@ compatible = "arm,armv8"; reg = <0x0 0x600>; enable-method = "psci"; + power-domains = <&CPU_PD6>; + power-domain-names = "psci"; next-level-cache = <&L2_600>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 1>; @@ -187,6 +201,8 @@ compatible = "arm,armv8"; reg = <0x0 0x700>; enable-method = "psci"; + power-domains = <&CPU_PD7>; + power-domain-names = "psci"; next-level-cache = <&L2_700>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 1>; @@ -195,6 +211,60 @@ next-level-cache = <&L3_0>; }; }; + + idle-states { + entry-method = "psci"; + + LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 { + compatible = "arm,idle-state"; + idle-state-name = "little-power-down"; + arm,psci-suspend-param = <0x40000003>; + entry-latency-us = <549>; + exit-latency-us = <901>; + min-residency-us = <1774>; + local-timer-stop; + }; + + LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 { + compatible = "arm,idle-state"; + idle-state-name = "little-rail-power-down"; + arm,psci-suspend-param = <0x40000004>; + entry-latency-us = <702>; + exit-latency-us = <915>; + min-residency-us = <4001>; + local-timer-stop; + }; + + BIG_CPU_SLEEP_0: cpu-sleep-1-0 { + compatible = "arm,idle-state"; + idle-state-name = "big-power-down"; + arm,psci-suspend-param = <0x40000003>; + entry-latency-us = <523>; + exit-latency-us = <1244>; + min-residency-us = <2207>; + local-timer-stop; + }; + + BIG_CPU_SLEEP_1: cpu-sleep-1-1 { + compatible = "arm,idle-state"; + idle-state-name = "big-rail-power-down"; + arm,psci-suspend-param = <0x40000004>; + entry-latency-us = <526>; + exit-latency-us = <1854>; + min-residency-us = <5555>; + local-timer-stop; + }; + + CLUSTER_SLEEP_0: cluster-sleep-0 { + compatible = "arm,idle-state"; + idle-state-name = "cluster-power-down"; + arm,psci-suspend-param = <0x40003444>; + entry-latency-us = <3263>; + exit-latency-us = <6562>; + min-residency-us = <9926>; + local-timer-stop; + }; + }; }; memory@80000000 { @@ -297,6 +367,70 @@ psci { compatible = "arm,psci-1.0"; method = "smc"; + + CPU_PD0: cpu-pd0 { + #power-domain-cells = <0>; + power-domains = <&apps_rsc>; + domain-idle-states = <&LITTLE_CPU_SLEEP_0>, + <&LITTLE_CPU_SLEEP_1>, + <&CLUSTER_SLEEP_0>; + }; + + CPU_PD1: cpu-pd1 { + #power-domain-cells = <0>; + power-domains = <&apps_rsc>; + domain-idle-states = <&LITTLE_CPU_SLEEP_0>, + <&LITTLE_CPU_SLEEP_1>, + <&CLUSTER_SLEEP_0>; + }; + + CPU_PD2: cpu-pd2 { + #power-domain-cells = <0>; + power-domains = <&apps_rsc>; + domain-idle-states = <&LITTLE_CPU_SLEEP_0>, + <&LITTLE_CPU_SLEEP_1>, + <&CLUSTER_SLEEP_0>; + }; + + CPU_PD3: cpu-pd3 { + #power-domain-cells = <0>; + power-domains = <&apps_rsc>; + domain-idle-states = <&LITTLE_CPU_SLEEP_0>, + <&LITTLE_CPU_SLEEP_1>, + <&CLUSTER_SLEEP_0>; + }; + + CPU_PD4: cpu-pd4 { + #power-domain-cells = <0>; + power-domains = <&apps_rsc>; + domain-idle-states = <&LITTLE_CPU_SLEEP_0>, + <&LITTLE_CPU_SLEEP_1>, + <&CLUSTER_SLEEP_0>; + }; + + CPU_PD5: cpu-pd5 { + #power-domain-cells = <0>; + power-domains = <&apps_rsc>; + domain-idle-states = <&LITTLE_CPU_SLEEP_0>, + <&LITTLE_CPU_SLEEP_1>, + <&CLUSTER_SLEEP_0>; + }; + + CPU_PD6: cpu-pd6 { + #power-domain-cells = <0>; + power-domains = <&apps_rsc>; + domain-idle-states = <&BIG_CPU_SLEEP_0>, + <&BIG_CPU_SLEEP_1>, + <&CLUSTER_SLEEP_0>; + }; + + CPU_PD7: cpu-pd7 { + #power-domain-cells = <0>; + power-domains = <&apps_rsc>; + domain-idle-states = <&BIG_CPU_SLEEP_0>, + <&BIG_CPU_SLEEP_1>, + <&CLUSTER_SLEEP_0>; + }; }; soc: soc { @@ -1417,6 +1551,7 @@ , , ; + #power-domain-cells = <0>; rpmhcc: clock-controller { compatible = "qcom,sc7180-rpmh-clk";